clock.h 3.2 KB

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  1. /*
  2. * arch/arm/plat-spear/include/plat/clock.h
  3. *
  4. * Clock framework definitions for SPEAr platform
  5. *
  6. * Copyright (C) 2009 ST Microelectronics
  7. * Viresh Kumar<viresh.kumar@st.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #ifndef __PLAT_CLOCK_H
  14. #define __PLAT_CLOCK_H
  15. #include <linux/list.h>
  16. #include <asm/clkdev.h>
  17. #include <linux/types.h>
  18. /* clk structure flags */
  19. #define ALWAYS_ENABLED (1 << 0) /* clock always enabled */
  20. #define RESET_TO_ENABLE (1 << 1) /* reset register bit to enable clk */
  21. /**
  22. * struct clkops - clock operations
  23. * @enable: pointer to clock enable function
  24. * @disable: pointer to clock disable function
  25. */
  26. struct clkops {
  27. int (*enable) (struct clk *);
  28. void (*disable) (struct clk *);
  29. };
  30. /**
  31. * struct pclk_info - parents info
  32. * @pclk: pointer to parent clk
  33. * @pclk_mask: value to be written for selecting this parent
  34. * @scalable: Is parent scalable (1 - YES, 0 - NO)
  35. */
  36. struct pclk_info {
  37. struct clk *pclk;
  38. u8 pclk_mask;
  39. u8 scalable;
  40. };
  41. /**
  42. * struct pclk_sel - parents selection configuration
  43. * @pclk_info: pointer to array of parent clock info
  44. * @pclk_count: number of parents
  45. * @pclk_sel_reg: register for selecting a parent
  46. * @pclk_sel_mask: mask for selecting parent (can be used to clear bits also)
  47. */
  48. struct pclk_sel {
  49. struct pclk_info *pclk_info;
  50. u8 pclk_count;
  51. unsigned int *pclk_sel_reg;
  52. unsigned int pclk_sel_mask;
  53. };
  54. /**
  55. * struct clk - clock structure
  56. * @usage_count: num of users who enabled this clock
  57. * @flags: flags for clock properties
  58. * @rate: programmed clock rate in Hz
  59. * @en_reg: clk enable/disable reg
  60. * @en_reg_bit: clk enable/disable bit
  61. * @ops: clk enable/disable ops - generic_clkops selected if NULL
  62. * @recalc: pointer to clock rate recalculate function
  63. * @pclk: current parent clk
  64. * @pclk_sel: pointer to parent selection structure
  65. * @pclk_sel_shift: register shift for selecting parent of this clock
  66. * @children: list for childrens or this clock
  67. * @sibling: node for list of clocks having same parents
  68. * @private_data: clock specific private data
  69. */
  70. struct clk {
  71. unsigned int usage_count;
  72. unsigned int flags;
  73. unsigned long rate;
  74. unsigned int *en_reg;
  75. u8 en_reg_bit;
  76. const struct clkops *ops;
  77. void (*recalc) (struct clk *);
  78. struct clk *pclk;
  79. struct pclk_sel *pclk_sel;
  80. unsigned int pclk_sel_shift;
  81. struct list_head children;
  82. struct list_head sibling;
  83. void *private_data;
  84. };
  85. /* pll configuration structure */
  86. struct pll_clk_config {
  87. unsigned int *mode_reg;
  88. unsigned int *cfg_reg;
  89. };
  90. /* ahb and apb bus configuration structure */
  91. struct bus_clk_config {
  92. unsigned int *reg;
  93. unsigned int mask;
  94. unsigned int shift;
  95. };
  96. /*
  97. * Aux clk configuration structure: applicable to GPT, UART and FIRDA
  98. */
  99. struct aux_clk_config {
  100. unsigned int *synth_reg;
  101. };
  102. /* platform specific clock functions */
  103. void clk_register(struct clk_lookup *cl);
  104. void recalc_root_clocks(void);
  105. /* clock recalc functions */
  106. void follow_parent(struct clk *clk);
  107. void pll1_clk_recalc(struct clk *clk);
  108. void bus_clk_recalc(struct clk *clk);
  109. void gpt_clk_recalc(struct clk *clk);
  110. void aux_clk_recalc(struct clk *clk);
  111. #endif /* __PLAT_CLOCK_H */