v2m.c 7.9 KB

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  1. /*
  2. * Versatile Express V2M Motherboard Support
  3. */
  4. #include <linux/device.h>
  5. #include <linux/amba/bus.h>
  6. #include <linux/amba/mmci.h>
  7. #include <linux/io.h>
  8. #include <linux/init.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/smsc911x.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/sysdev.h>
  13. #include <linux/usb/isp1760.h>
  14. #include <asm/clkdev.h>
  15. #include <asm/sizes.h>
  16. #include <asm/mach/flash.h>
  17. #include <asm/mach/map.h>
  18. #include <asm/mach/time.h>
  19. #include <asm/hardware/arm_timer.h>
  20. #include <mach/clkdev.h>
  21. #include <mach/motherboard.h>
  22. #include <plat/timer-sp.h>
  23. #include "core.h"
  24. #define V2M_PA_CS0 0x40000000
  25. #define V2M_PA_CS1 0x44000000
  26. #define V2M_PA_CS2 0x48000000
  27. #define V2M_PA_CS3 0x4c000000
  28. #define V2M_PA_CS7 0x10000000
  29. static struct map_desc v2m_io_desc[] __initdata = {
  30. {
  31. .virtual = __MMIO_P2V(V2M_PA_CS7),
  32. .pfn = __phys_to_pfn(V2M_PA_CS7),
  33. .length = SZ_128K,
  34. .type = MT_DEVICE,
  35. },
  36. };
  37. void __init v2m_map_io(struct map_desc *tile, size_t num)
  38. {
  39. iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
  40. iotable_init(tile, num);
  41. }
  42. static void v2m_timer_init(void)
  43. {
  44. writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
  45. writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
  46. sp804_clocksource_init(MMIO_P2V(V2M_TIMER1));
  47. sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
  48. }
  49. struct sys_timer v2m_timer = {
  50. .init = v2m_timer_init,
  51. };
  52. static DEFINE_SPINLOCK(v2m_cfg_lock);
  53. int v2m_cfg_write(u32 devfn, u32 data)
  54. {
  55. /* Configuration interface broken? */
  56. u32 val;
  57. printk("%s: writing %08x to %08x\n", __func__, data, devfn);
  58. devfn |= SYS_CFG_START | SYS_CFG_WRITE;
  59. spin_lock(&v2m_cfg_lock);
  60. val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
  61. writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
  62. writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
  63. writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
  64. do {
  65. val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
  66. } while (val == 0);
  67. spin_unlock(&v2m_cfg_lock);
  68. return !!(val & SYS_CFG_ERR);
  69. }
  70. int v2m_cfg_read(u32 devfn, u32 *data)
  71. {
  72. u32 val;
  73. devfn |= SYS_CFG_START;
  74. spin_lock(&v2m_cfg_lock);
  75. writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
  76. writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
  77. mb();
  78. do {
  79. cpu_relax();
  80. val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
  81. } while (val == 0);
  82. *data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
  83. spin_unlock(&v2m_cfg_lock);
  84. return !!(val & SYS_CFG_ERR);
  85. }
  86. static struct resource v2m_pcie_i2c_resource = {
  87. .start = V2M_SERIAL_BUS_PCI,
  88. .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
  89. .flags = IORESOURCE_MEM,
  90. };
  91. static struct platform_device v2m_pcie_i2c_device = {
  92. .name = "versatile-i2c",
  93. .id = 0,
  94. .num_resources = 1,
  95. .resource = &v2m_pcie_i2c_resource,
  96. };
  97. static struct resource v2m_ddc_i2c_resource = {
  98. .start = V2M_SERIAL_BUS_DVI,
  99. .end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
  100. .flags = IORESOURCE_MEM,
  101. };
  102. static struct platform_device v2m_ddc_i2c_device = {
  103. .name = "versatile-i2c",
  104. .id = 1,
  105. .num_resources = 1,
  106. .resource = &v2m_ddc_i2c_resource,
  107. };
  108. static struct resource v2m_eth_resources[] = {
  109. {
  110. .start = V2M_LAN9118,
  111. .end = V2M_LAN9118 + SZ_64K - 1,
  112. .flags = IORESOURCE_MEM,
  113. }, {
  114. .start = IRQ_V2M_LAN9118,
  115. .end = IRQ_V2M_LAN9118,
  116. .flags = IORESOURCE_IRQ,
  117. },
  118. };
  119. static struct smsc911x_platform_config v2m_eth_config = {
  120. .flags = SMSC911X_USE_32BIT,
  121. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
  122. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  123. .phy_interface = PHY_INTERFACE_MODE_MII,
  124. };
  125. static struct platform_device v2m_eth_device = {
  126. .name = "smsc911x",
  127. .id = -1,
  128. .resource = v2m_eth_resources,
  129. .num_resources = ARRAY_SIZE(v2m_eth_resources),
  130. .dev.platform_data = &v2m_eth_config,
  131. };
  132. static struct resource v2m_usb_resources[] = {
  133. {
  134. .start = V2M_ISP1761,
  135. .end = V2M_ISP1761 + SZ_128K - 1,
  136. .flags = IORESOURCE_MEM,
  137. }, {
  138. .start = IRQ_V2M_ISP1761,
  139. .end = IRQ_V2M_ISP1761,
  140. .flags = IORESOURCE_IRQ,
  141. },
  142. };
  143. static struct isp1760_platform_data v2m_usb_config = {
  144. .is_isp1761 = true,
  145. .bus_width_16 = false,
  146. .port1_otg = true,
  147. .analog_oc = false,
  148. .dack_polarity_high = false,
  149. .dreq_polarity_high = false,
  150. };
  151. static struct platform_device v2m_usb_device = {
  152. .name = "isp1760",
  153. .id = -1,
  154. .resource = v2m_usb_resources,
  155. .num_resources = ARRAY_SIZE(v2m_usb_resources),
  156. .dev.platform_data = &v2m_usb_config,
  157. };
  158. static int v2m_flash_init(void)
  159. {
  160. writel(0, MMIO_P2V(V2M_SYS_FLASH));
  161. return 0;
  162. }
  163. static void v2m_flash_exit(void)
  164. {
  165. writel(0, MMIO_P2V(V2M_SYS_FLASH));
  166. }
  167. static void v2m_flash_set_vpp(int on)
  168. {
  169. writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
  170. }
  171. static struct flash_platform_data v2m_flash_data = {
  172. .map_name = "cfi_probe",
  173. .width = 4,
  174. .init = v2m_flash_init,
  175. .exit = v2m_flash_exit,
  176. .set_vpp = v2m_flash_set_vpp,
  177. };
  178. static struct resource v2m_flash_resources[] = {
  179. {
  180. .start = V2M_NOR0,
  181. .end = V2M_NOR0 + SZ_64M - 1,
  182. .flags = IORESOURCE_MEM,
  183. }, {
  184. .start = V2M_NOR1,
  185. .end = V2M_NOR1 + SZ_64M - 1,
  186. .flags = IORESOURCE_MEM,
  187. },
  188. };
  189. static struct platform_device v2m_flash_device = {
  190. .name = "armflash",
  191. .id = -1,
  192. .resource = v2m_flash_resources,
  193. .num_resources = ARRAY_SIZE(v2m_flash_resources),
  194. .dev.platform_data = &v2m_flash_data,
  195. };
  196. static unsigned int v2m_mmci_status(struct device *dev)
  197. {
  198. return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
  199. }
  200. static struct mmci_platform_data v2m_mmci_data = {
  201. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  202. .status = v2m_mmci_status,
  203. };
  204. static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL);
  205. static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data);
  206. static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL);
  207. static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL);
  208. static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
  209. static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
  210. static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
  211. static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
  212. static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL);
  213. static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL);
  214. static struct amba_device *v2m_amba_devs[] __initdata = {
  215. &aaci_device,
  216. &mmci_device,
  217. &kmi0_device,
  218. &kmi1_device,
  219. &uart0_device,
  220. &uart1_device,
  221. &uart2_device,
  222. &uart3_device,
  223. &wdt_device,
  224. &rtc_device,
  225. };
  226. static long v2m_osc_round(struct clk *clk, unsigned long rate)
  227. {
  228. return rate;
  229. }
  230. static int v2m_osc1_set(struct clk *clk, unsigned long rate)
  231. {
  232. return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
  233. }
  234. static const struct clk_ops osc1_clk_ops = {
  235. .round = v2m_osc_round,
  236. .set = v2m_osc1_set,
  237. };
  238. static struct clk osc1_clk = {
  239. .ops = &osc1_clk_ops,
  240. .rate = 24000000,
  241. };
  242. static struct clk osc2_clk = {
  243. .rate = 24000000,
  244. };
  245. static struct clk dummy_apb_pclk;
  246. static struct clk_lookup v2m_lookups[] = {
  247. { /* AMBA bus clock */
  248. .con_id = "apb_pclk",
  249. .clk = &dummy_apb_pclk,
  250. }, { /* UART0 */
  251. .dev_id = "mb:uart0",
  252. .clk = &osc2_clk,
  253. }, { /* UART1 */
  254. .dev_id = "mb:uart1",
  255. .clk = &osc2_clk,
  256. }, { /* UART2 */
  257. .dev_id = "mb:uart2",
  258. .clk = &osc2_clk,
  259. }, { /* UART3 */
  260. .dev_id = "mb:uart3",
  261. .clk = &osc2_clk,
  262. }, { /* KMI0 */
  263. .dev_id = "mb:kmi0",
  264. .clk = &osc2_clk,
  265. }, { /* KMI1 */
  266. .dev_id = "mb:kmi1",
  267. .clk = &osc2_clk,
  268. }, { /* MMC0 */
  269. .dev_id = "mb:mmci",
  270. .clk = &osc2_clk,
  271. }, { /* CLCD */
  272. .dev_id = "mb:clcd",
  273. .clk = &osc1_clk,
  274. },
  275. };
  276. static void v2m_power_off(void)
  277. {
  278. if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
  279. printk(KERN_EMERG "Unable to shutdown\n");
  280. }
  281. static void v2m_restart(char str, const char *cmd)
  282. {
  283. if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
  284. printk(KERN_EMERG "Unable to reboot\n");
  285. }
  286. static int __init v2m_init(void)
  287. {
  288. int i;
  289. clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
  290. platform_device_register(&v2m_pcie_i2c_device);
  291. platform_device_register(&v2m_ddc_i2c_device);
  292. platform_device_register(&v2m_flash_device);
  293. platform_device_register(&v2m_eth_device);
  294. platform_device_register(&v2m_usb_device);
  295. for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
  296. amba_device_register(v2m_amba_devs[i], &iomem_resource);
  297. pm_power_off = v2m_power_off;
  298. arm_pm_restart = v2m_restart;
  299. return 0;
  300. }
  301. arch_initcall(v2m_init);