setup-sh7377.c 5.3 KB

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  1. /*
  2. * sh7377 processor support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/input.h>
  27. #include <linux/io.h>
  28. #include <linux/serial_sci.h>
  29. #include <linux/sh_intc.h>
  30. #include <linux/sh_timer.h>
  31. #include <mach/hardware.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/mach/arch.h>
  34. /* SCIFA0 */
  35. static struct plat_sci_port scif0_platform_data = {
  36. .mapbase = 0xe6c40000,
  37. .flags = UPF_BOOT_AUTOCONF,
  38. .type = PORT_SCIF,
  39. .irqs = { evt2irq(0xc00), evt2irq(0xc00),
  40. evt2irq(0xc00), evt2irq(0xc00) },
  41. };
  42. static struct platform_device scif0_device = {
  43. .name = "sh-sci",
  44. .id = 0,
  45. .dev = {
  46. .platform_data = &scif0_platform_data,
  47. },
  48. };
  49. /* SCIFA1 */
  50. static struct plat_sci_port scif1_platform_data = {
  51. .mapbase = 0xe6c50000,
  52. .flags = UPF_BOOT_AUTOCONF,
  53. .type = PORT_SCIF,
  54. .irqs = { evt2irq(0xc20), evt2irq(0xc20),
  55. evt2irq(0xc20), evt2irq(0xc20) },
  56. };
  57. static struct platform_device scif1_device = {
  58. .name = "sh-sci",
  59. .id = 1,
  60. .dev = {
  61. .platform_data = &scif1_platform_data,
  62. },
  63. };
  64. /* SCIFA2 */
  65. static struct plat_sci_port scif2_platform_data = {
  66. .mapbase = 0xe6c60000,
  67. .flags = UPF_BOOT_AUTOCONF,
  68. .type = PORT_SCIF,
  69. .irqs = { evt2irq(0xc40), evt2irq(0xc40),
  70. evt2irq(0xc40), evt2irq(0xc40) },
  71. };
  72. static struct platform_device scif2_device = {
  73. .name = "sh-sci",
  74. .id = 2,
  75. .dev = {
  76. .platform_data = &scif2_platform_data,
  77. },
  78. };
  79. /* SCIFA3 */
  80. static struct plat_sci_port scif3_platform_data = {
  81. .mapbase = 0xe6c70000,
  82. .flags = UPF_BOOT_AUTOCONF,
  83. .type = PORT_SCIF,
  84. .irqs = { evt2irq(0xc60), evt2irq(0xc60),
  85. evt2irq(0xc60), evt2irq(0xc60) },
  86. };
  87. static struct platform_device scif3_device = {
  88. .name = "sh-sci",
  89. .id = 3,
  90. .dev = {
  91. .platform_data = &scif3_platform_data,
  92. },
  93. };
  94. /* SCIFA4 */
  95. static struct plat_sci_port scif4_platform_data = {
  96. .mapbase = 0xe6c80000,
  97. .flags = UPF_BOOT_AUTOCONF,
  98. .type = PORT_SCIF,
  99. .irqs = { evt2irq(0xd20), evt2irq(0xd20),
  100. evt2irq(0xd20), evt2irq(0xd20) },
  101. };
  102. static struct platform_device scif4_device = {
  103. .name = "sh-sci",
  104. .id = 4,
  105. .dev = {
  106. .platform_data = &scif4_platform_data,
  107. },
  108. };
  109. /* SCIFA5 */
  110. static struct plat_sci_port scif5_platform_data = {
  111. .mapbase = 0xe6cb0000,
  112. .flags = UPF_BOOT_AUTOCONF,
  113. .type = PORT_SCIF,
  114. .irqs = { evt2irq(0xd40), evt2irq(0xd40),
  115. evt2irq(0xd40), evt2irq(0xd40) },
  116. };
  117. static struct platform_device scif5_device = {
  118. .name = "sh-sci",
  119. .id = 5,
  120. .dev = {
  121. .platform_data = &scif5_platform_data,
  122. },
  123. };
  124. /* SCIFA6 */
  125. static struct plat_sci_port scif6_platform_data = {
  126. .mapbase = 0xe6cc0000,
  127. .flags = UPF_BOOT_AUTOCONF,
  128. .type = PORT_SCIF,
  129. .irqs = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80),
  130. intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) },
  131. };
  132. static struct platform_device scif6_device = {
  133. .name = "sh-sci",
  134. .id = 6,
  135. .dev = {
  136. .platform_data = &scif6_platform_data,
  137. },
  138. };
  139. /* SCIFB */
  140. static struct plat_sci_port scif7_platform_data = {
  141. .mapbase = 0xe6c30000,
  142. .flags = UPF_BOOT_AUTOCONF,
  143. .type = PORT_SCIF,
  144. .irqs = { evt2irq(0xd60), evt2irq(0xd60),
  145. evt2irq(0xd60), evt2irq(0xd60) },
  146. };
  147. static struct platform_device scif7_device = {
  148. .name = "sh-sci",
  149. .id = 7,
  150. .dev = {
  151. .platform_data = &scif7_platform_data,
  152. },
  153. };
  154. static struct sh_timer_config cmt10_platform_data = {
  155. .name = "CMT10",
  156. .channel_offset = 0x10,
  157. .timer_bit = 0,
  158. .clk = "r_clk",
  159. .clockevent_rating = 125,
  160. .clocksource_rating = 125,
  161. };
  162. static struct resource cmt10_resources[] = {
  163. [0] = {
  164. .name = "CMT10",
  165. .start = 0xe6138010,
  166. .end = 0xe613801b,
  167. .flags = IORESOURCE_MEM,
  168. },
  169. [1] = {
  170. .start = evt2irq(0xb00), /* CMT1_CMT10 */
  171. .flags = IORESOURCE_IRQ,
  172. },
  173. };
  174. static struct platform_device cmt10_device = {
  175. .name = "sh_cmt",
  176. .id = 10,
  177. .dev = {
  178. .platform_data = &cmt10_platform_data,
  179. },
  180. .resource = cmt10_resources,
  181. .num_resources = ARRAY_SIZE(cmt10_resources),
  182. };
  183. static struct platform_device *sh7377_early_devices[] __initdata = {
  184. &scif0_device,
  185. &scif1_device,
  186. &scif2_device,
  187. &scif3_device,
  188. &scif4_device,
  189. &scif5_device,
  190. &scif6_device,
  191. &scif7_device,
  192. &cmt10_device,
  193. };
  194. void __init sh7377_add_standard_devices(void)
  195. {
  196. platform_add_devices(sh7377_early_devices,
  197. ARRAY_SIZE(sh7377_early_devices));
  198. }
  199. #define SMSTPCR3 0xe615013c
  200. #define SMSTPCR3_CMT1 (1 << 29)
  201. void __init sh7377_add_early_devices(void)
  202. {
  203. /* enable clock to CMT1 */
  204. __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
  205. early_platform_add_devices(sh7377_early_devices,
  206. ARRAY_SIZE(sh7377_early_devices));
  207. }