dev-audio.c 4.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197
  1. /* linux/arch/arm/mach-s5p6442/dev-audio.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co. Ltd
  4. * Jaswinder Singh <jassi.brar@samsung.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/platform_device.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/gpio.h>
  13. #include <plat/gpio-cfg.h>
  14. #include <plat/audio.h>
  15. #include <mach/map.h>
  16. #include <mach/dma.h>
  17. #include <mach/irqs.h>
  18. static int s5p6442_cfg_i2s(struct platform_device *pdev)
  19. {
  20. /* configure GPIO for i2s port */
  21. switch (pdev->id) {
  22. case 1:
  23. s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(2));
  24. s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(2));
  25. s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(2));
  26. s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(2));
  27. s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(2));
  28. break;
  29. case -1:
  30. s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(2));
  31. s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(2));
  32. s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(2));
  33. s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(2));
  34. s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(2));
  35. break;
  36. default:
  37. printk(KERN_ERR "Invalid Device %d\n", pdev->id);
  38. return -EINVAL;
  39. }
  40. return 0;
  41. }
  42. static struct s3c_audio_pdata s3c_i2s_pdata = {
  43. .cfg_gpio = s5p6442_cfg_i2s,
  44. };
  45. static struct resource s5p6442_iis0_resource[] = {
  46. [0] = {
  47. .start = S5P6442_PA_I2S0,
  48. .end = S5P6442_PA_I2S0 + 0x100 - 1,
  49. .flags = IORESOURCE_MEM,
  50. },
  51. [1] = {
  52. .start = DMACH_I2S0_TX,
  53. .end = DMACH_I2S0_TX,
  54. .flags = IORESOURCE_DMA,
  55. },
  56. [2] = {
  57. .start = DMACH_I2S0_RX,
  58. .end = DMACH_I2S0_RX,
  59. .flags = IORESOURCE_DMA,
  60. },
  61. };
  62. struct platform_device s5p6442_device_iis0 = {
  63. .name = "s3c64xx-iis-v4",
  64. .id = -1,
  65. .num_resources = ARRAY_SIZE(s5p6442_iis0_resource),
  66. .resource = s5p6442_iis0_resource,
  67. .dev = {
  68. .platform_data = &s3c_i2s_pdata,
  69. },
  70. };
  71. static struct resource s5p6442_iis1_resource[] = {
  72. [0] = {
  73. .start = S5P6442_PA_I2S1,
  74. .end = S5P6442_PA_I2S1 + 0x100 - 1,
  75. .flags = IORESOURCE_MEM,
  76. },
  77. [1] = {
  78. .start = DMACH_I2S1_TX,
  79. .end = DMACH_I2S1_TX,
  80. .flags = IORESOURCE_DMA,
  81. },
  82. [2] = {
  83. .start = DMACH_I2S1_RX,
  84. .end = DMACH_I2S1_RX,
  85. .flags = IORESOURCE_DMA,
  86. },
  87. };
  88. struct platform_device s5p6442_device_iis1 = {
  89. .name = "s3c64xx-iis",
  90. .id = 1,
  91. .num_resources = ARRAY_SIZE(s5p6442_iis1_resource),
  92. .resource = s5p6442_iis1_resource,
  93. .dev = {
  94. .platform_data = &s3c_i2s_pdata,
  95. },
  96. };
  97. /* PCM Controller platform_devices */
  98. static int s5p6442_pcm_cfg_gpio(struct platform_device *pdev)
  99. {
  100. switch (pdev->id) {
  101. case 0:
  102. s3c_gpio_cfgpin(S5P6442_GPC0(0), S3C_GPIO_SFN(3));
  103. s3c_gpio_cfgpin(S5P6442_GPC0(1), S3C_GPIO_SFN(3));
  104. s3c_gpio_cfgpin(S5P6442_GPC0(2), S3C_GPIO_SFN(3));
  105. s3c_gpio_cfgpin(S5P6442_GPC0(3), S3C_GPIO_SFN(3));
  106. s3c_gpio_cfgpin(S5P6442_GPC0(4), S3C_GPIO_SFN(3));
  107. break;
  108. case 1:
  109. s3c_gpio_cfgpin(S5P6442_GPC1(0), S3C_GPIO_SFN(3));
  110. s3c_gpio_cfgpin(S5P6442_GPC1(1), S3C_GPIO_SFN(3));
  111. s3c_gpio_cfgpin(S5P6442_GPC1(2), S3C_GPIO_SFN(3));
  112. s3c_gpio_cfgpin(S5P6442_GPC1(3), S3C_GPIO_SFN(3));
  113. s3c_gpio_cfgpin(S5P6442_GPC1(4), S3C_GPIO_SFN(3));
  114. break;
  115. default:
  116. printk(KERN_DEBUG "Invalid PCM Controller number!");
  117. return -EINVAL;
  118. }
  119. return 0;
  120. }
  121. static struct s3c_audio_pdata s3c_pcm_pdata = {
  122. .cfg_gpio = s5p6442_pcm_cfg_gpio,
  123. };
  124. static struct resource s5p6442_pcm0_resource[] = {
  125. [0] = {
  126. .start = S5P6442_PA_PCM0,
  127. .end = S5P6442_PA_PCM0 + 0x100 - 1,
  128. .flags = IORESOURCE_MEM,
  129. },
  130. [1] = {
  131. .start = DMACH_PCM0_TX,
  132. .end = DMACH_PCM0_TX,
  133. .flags = IORESOURCE_DMA,
  134. },
  135. [2] = {
  136. .start = DMACH_PCM0_RX,
  137. .end = DMACH_PCM0_RX,
  138. .flags = IORESOURCE_DMA,
  139. },
  140. };
  141. struct platform_device s5p6442_device_pcm0 = {
  142. .name = "samsung-pcm",
  143. .id = 0,
  144. .num_resources = ARRAY_SIZE(s5p6442_pcm0_resource),
  145. .resource = s5p6442_pcm0_resource,
  146. .dev = {
  147. .platform_data = &s3c_pcm_pdata,
  148. },
  149. };
  150. static struct resource s5p6442_pcm1_resource[] = {
  151. [0] = {
  152. .start = S5P6442_PA_PCM1,
  153. .end = S5P6442_PA_PCM1 + 0x100 - 1,
  154. .flags = IORESOURCE_MEM,
  155. },
  156. [1] = {
  157. .start = DMACH_PCM1_TX,
  158. .end = DMACH_PCM1_TX,
  159. .flags = IORESOURCE_DMA,
  160. },
  161. [2] = {
  162. .start = DMACH_PCM1_RX,
  163. .end = DMACH_PCM1_RX,
  164. .flags = IORESOURCE_DMA,
  165. },
  166. };
  167. struct platform_device s5p6442_device_pcm1 = {
  168. .name = "samsung-pcm",
  169. .id = 1,
  170. .num_resources = ARRAY_SIZE(s5p6442_pcm1_resource),
  171. .resource = s5p6442_pcm1_resource,
  172. .dev = {
  173. .platform_data = &s3c_pcm_pdata,
  174. },
  175. };