mach-real6410.c 4.1 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-real6410.c
  2. *
  3. * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
  4. * Copyright 2008 Openmoko, Inc.
  5. * Copyright 2008 Simtec Electronics
  6. * Ben Dooks <ben@simtec.co.uk>
  7. * http://armlinux.simtec.co.uk/
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/init.h>
  19. #include <linux/dm9000.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/map.h>
  25. #include <mach/map.h>
  26. #include <mach/s3c6410.h>
  27. #include <mach/regs-srom.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/regs-serial.h>
  31. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  32. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  33. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  34. static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
  35. [0] = {
  36. .hwport = 0,
  37. .flags = 0,
  38. .ucon = UCON,
  39. .ulcon = ULCON,
  40. .ufcon = UFCON,
  41. },
  42. [1] = {
  43. .hwport = 1,
  44. .flags = 0,
  45. .ucon = UCON,
  46. .ulcon = ULCON,
  47. .ufcon = UFCON,
  48. },
  49. [2] = {
  50. .hwport = 2,
  51. .flags = 0,
  52. .ucon = UCON,
  53. .ulcon = ULCON,
  54. .ufcon = UFCON,
  55. },
  56. [3] = {
  57. .hwport = 3,
  58. .flags = 0,
  59. .ucon = UCON,
  60. .ulcon = ULCON,
  61. .ufcon = UFCON,
  62. },
  63. };
  64. /* DM9000AEP 10/100 ethernet controller */
  65. static struct resource real6410_dm9k_resource[] = {
  66. [0] = {
  67. .start = S3C64XX_PA_XM0CSN1,
  68. .end = S3C64XX_PA_XM0CSN1 + 1,
  69. .flags = IORESOURCE_MEM
  70. },
  71. [1] = {
  72. .start = S3C64XX_PA_XM0CSN1 + 4,
  73. .end = S3C64XX_PA_XM0CSN1 + 5,
  74. .flags = IORESOURCE_MEM
  75. },
  76. [2] = {
  77. .start = S3C_EINT(7),
  78. .end = S3C_EINT(7),
  79. .flags = IORESOURCE_IRQ,
  80. }
  81. };
  82. static struct dm9000_plat_data real6410_dm9k_pdata = {
  83. .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
  84. };
  85. static struct platform_device real6410_device_eth = {
  86. .name = "dm9000",
  87. .id = -1,
  88. .num_resources = ARRAY_SIZE(real6410_dm9k_resource),
  89. .resource = real6410_dm9k_resource,
  90. .dev = {
  91. .platform_data = &real6410_dm9k_pdata,
  92. },
  93. };
  94. static struct platform_device *real6410_devices[] __initdata = {
  95. &real6410_device_eth,
  96. &s3c_device_hsmmc0,
  97. &s3c_device_hsmmc1,
  98. };
  99. static void __init real6410_map_io(void)
  100. {
  101. s3c64xx_init_io(NULL, 0);
  102. s3c24xx_init_clocks(12000000);
  103. s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
  104. }
  105. static void __init real6410_machine_init(void)
  106. {
  107. u32 cs1;
  108. /* configure nCS1 width to 16 bits */
  109. cs1 = __raw_readl(S3C64XX_SROM_BW) &
  110. ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
  111. cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
  112. (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
  113. (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
  114. S3C64XX_SROM_BW__NCS1__SHIFT;
  115. __raw_writel(cs1, S3C64XX_SROM_BW);
  116. /* set timing for nCS1 suitable for ethernet chip */
  117. __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
  118. (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
  119. (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
  120. (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
  121. (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
  122. (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
  123. (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
  124. platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
  125. }
  126. MACHINE_START(REAL6410, "REAL6410")
  127. /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
  128. .phys_io = S3C_PA_UART & 0xfff00000,
  129. .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
  130. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  131. .init_irq = s3c6410_init_irq,
  132. .map_io = real6410_map_io,
  133. .init_machine = real6410_machine_init,
  134. .timer = &s3c24xx_timer,
  135. MACHINE_END