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linux-vybrid_pu...
/
arch
/
arm
/
mach-s3c2410
/
include
/
mach
/
map.h

map.h 3.2 KB
文件歷史 原始文件

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  1. /* arch/arm/mach-s3c2410/include/mach/map.h
    2. 

  2.  *
    3. 

  3.  * Copyright (c) 2003 Simtec Electronics
    4. 

  4.  *	Ben Dooks <ben@simtec.co.uk>
    5. 

  5.  *
    6. 

  6.  * S3C2410 - Memory map definitions
    7. 

  7.  *
    8. 

  8.  * This program is free software; you can redistribute it and/or modify
    9. 

  9.  * it under the terms of the GNU General Public License version 2 as
    10. 

  10.  * published by the Free Software Foundation.
    11. 

  11. */
    12. 

  12. 

  13. #ifndef __ASM_ARCH_MAP_H
    14. 

  14. #define __ASM_ARCH_MAP_H
    15. 

  15. 

  16. #include <plat/map-base.h>
    17. 

  17. #include <plat/map.h>
    18. 

  18. 

  19. #define S3C2410_ADDR(x)		S3C_ADDR(x)
    20. 

  20. 

  21. /* USB host controller */
    22. 

  22. #define S3C2410_PA_USBHOST (0x49000000)
    23. 

  23. 

  24. /* DMA controller */
    25. 

  25. #define S3C2410_PA_DMA	   (0x4B000000)
    26. 

  26. #define S3C24XX_SZ_DMA	   SZ_1M
    27. 

  27. 

  28. /* Clock and Power management */
    29. 

  29. #define S3C2410_PA_CLKPWR  (0x4C000000)
    30. 

  30. 

  31. /* LCD controller */
    32. 

  32. #define S3C2410_PA_LCD	   (0x4D000000)
    33. 

  33. #define S3C24XX_SZ_LCD	   SZ_1M
    34. 

  34. 

  35. /* NAND flash controller */
    36. 

  36. #define S3C2410_PA_NAND	   (0x4E000000)
    37. 

  37. 

  38. /* IIC hardware controller */
    39. 

  39. #define S3C2410_PA_IIC	   (0x54000000)
    40. 

  40. 

  41. /* IIS controller */
    42. 

  42. #define S3C2410_PA_IIS	   (0x55000000)
    43. 

  43. 

  44. /* RTC */
    45. 

  45. #define S3C2410_PA_RTC	   (0x57000000)
    46. 

  46. #define S3C24XX_SZ_RTC	   SZ_1M
    47. 

  47. 

  48. /* ADC */
    49. 

  49. #define S3C2410_PA_ADC	   (0x58000000)
    50. 

  50. 

  51. /* SPI */
    52. 

  52. #define S3C2410_PA_SPI	   (0x59000000)
    53. 

  53. 

  54. /* SDI */
    55. 

  55. #define S3C2410_PA_SDI	   (0x5A000000)
    56. 

  56. 

  57. /* CAMIF */
    58. 

  58. #define S3C2440_PA_CAMIF   (0x4F000000)
    59. 

  59. #define S3C2440_SZ_CAMIF   SZ_1M
    60. 

  60. 

  61. /* AC97 */
    62. 

  62. 

  63. #define S3C2440_PA_AC97	   (0x5B000000)
    64. 

  64. #define S3C2440_SZ_AC97	   SZ_1M
    65. 

  65. 

  66. /* S3C2443/S3C2416 High-speed SD/MMC */
    67. 

  67. #define S3C2443_PA_HSMMC   (0x4A800000)
    68. 

  68. #define S3C2416_PA_HSMMC0  (0x4AC00000)
    69. 

  69. 

  70. #define	S3C2443_PA_FB	(0x4C800000)
    71. 

  71. 

  72. /* S3C2412 memory and IO controls */
    73. 

  73. #define S3C2412_PA_SSMC	(0x4F000000)
    74. 

  74. #define S3C2412_VA_SSMC	S3C_ADDR_CPU(0x00000000)
    75. 

  75. 

  76. #define S3C2412_PA_EBI	(0x48800000)
    77. 

  77. #define S3C2412_VA_EBI	S3C_ADDR_CPU(0x00010000)
    78. 

  78. 

  79. /* physical addresses of all the chip-select areas */
    80. 

  80. 

  81. #define S3C2410_CS0 (0x00000000)
    82. 

  82. #define S3C2410_CS1 (0x08000000)
    83. 

  83. #define S3C2410_CS2 (0x10000000)
    84. 

  84. #define S3C2410_CS3 (0x18000000)
    85. 

  85. #define S3C2410_CS4 (0x20000000)
    86. 

  86. #define S3C2410_CS5 (0x28000000)
    87. 

  87. #define S3C2410_CS6 (0x30000000)
    88. 

  88. #define S3C2410_CS7 (0x38000000)
    89. 

  89. 

  90. #define S3C2410_SDRAM_PA    (S3C2410_CS6)
    91. 

  91. 

  92. /* Use a single interface for common resources between S3C24XX cpus */
    93. 

  93. 

  94. #define S3C24XX_PA_IRQ      S3C2410_PA_IRQ
    95. 

  95. #define S3C24XX_PA_MEMCTRL  S3C2410_PA_MEMCTRL
    96. 

  96. #define S3C24XX_PA_DMA      S3C2410_PA_DMA
    97. 

  97. #define S3C24XX_PA_CLKPWR   S3C2410_PA_CLKPWR
    98. 

  98. #define S3C24XX_PA_LCD      S3C2410_PA_LCD
    99. 

  99. #define S3C24XX_PA_UART     S3C2410_PA_UART
    100. 

  100. #define S3C24XX_PA_TIMER    S3C2410_PA_TIMER
    101. 

  101. #define S3C24XX_PA_USBDEV   S3C2410_PA_USBDEV
    102. 

  102. #define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
    103. 

  103. #define S3C24XX_PA_IIS      S3C2410_PA_IIS
    104. 

  104. #define S3C24XX_PA_GPIO     S3C2410_PA_GPIO
    105. 

  105. #define S3C24XX_PA_RTC      S3C2410_PA_RTC
    106. 

  106. #define S3C24XX_PA_ADC      S3C2410_PA_ADC
    107. 

  107. #define S3C24XX_PA_SPI      S3C2410_PA_SPI
    108. 

  108. #define S3C24XX_PA_SDI      S3C2410_PA_SDI
    109. 

  109. #define S3C24XX_PA_NAND	    S3C2410_PA_NAND
    110. 

  110. 

  111. #define S3C_PA_FB	    S3C2443_PA_FB
    112. 

  112. #define S3C_PA_IIC          S3C2410_PA_IIC
    113. 

  113. #define S3C_PA_UART	    S3C24XX_PA_UART
    114. 

  114. #define S3C_PA_USBHOST	S3C2410_PA_USBHOST
    115. 

  115. #define S3C_PA_HSMMC0	    S3C2443_PA_HSMMC
    116. 

  116. #define S3C_PA_HSMMC1	    S3C2416_PA_HSMMC0
    117. 

  117. #define S3C_PA_WDT	    S3C2410_PA_WATCHDOG
    118. 

  118. #define S3C_PA_NAND	    S3C24XX_PA_NAND
    119. 

  119. 

  120. #endif /* __ASM_ARCH_MAP_H */
    121.