debug-macro.S 2.8 KB

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  1. /* arch/arm/mach-s3c2410/include/mach/debug-macro.S
  2. *
  3. * Debugging macro include header
  4. *
  5. * Copyright (C) 1994-1999 Russell King
  6. * Copyright (C) 2005 Simtec Electronics
  7. *
  8. * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <mach/map.h>
  15. #include <mach/regs-gpio.h>
  16. #include <plat/regs-serial.h>
  17. #define S3C2410_UART1_OFF (0x4000)
  18. #define SHIFT_2440TXF (14-9)
  19. .macro addruart, rx, tmp
  20. mrc p15, 0, \rx, c1, c0
  21. tst \rx, #1
  22. ldreq \rx, = S3C24XX_PA_UART
  23. ldrne \rx, = S3C24XX_VA_UART
  24. #if CONFIG_DEBUG_S3C_UART != 0
  25. add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
  26. #endif
  27. .endm
  28. .macro fifo_full_s3c24xx rd, rx
  29. @ check for arm920 vs arm926. currently assume all arm926
  30. @ devices have an 64 byte FIFO identical to the s3c2440
  31. mrc p15, 0, \rd, c0, c0
  32. and \rd, \rd, #0xff0
  33. teq \rd, #0x260
  34. beq 1004f
  35. mrc p15, 0, \rd, c1, c0
  36. tst \rd, #1
  37. addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
  38. addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
  39. bic \rd, \rd, #0xff000
  40. ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
  41. and \rd, \rd, #0x00ff0000
  42. teq \rd, #0x00440000 @ is it 2440?
  43. 1004:
  44. ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  45. moveq \rd, \rd, lsr #SHIFT_2440TXF
  46. tst \rd, #S3C2410_UFSTAT_TXFULL
  47. .endm
  48. .macro fifo_full_s3c2410 rd, rx
  49. ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  50. tst \rd, #S3C2410_UFSTAT_TXFULL
  51. .endm
  52. /* fifo level reading */
  53. .macro fifo_level_s3c24xx rd, rx
  54. @ check for arm920 vs arm926. currently assume all arm926
  55. @ devices have an 64 byte FIFO identical to the s3c2440
  56. mrc p15, 0, \rd, c0, c0
  57. and \rd, \rd, #0xff0
  58. teq \rd, #0x260
  59. beq 10000f
  60. mrc p15, 0, \rd, c1, c0
  61. tst \rd, #1
  62. addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
  63. addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
  64. bic \rd, \rd, #0xff000
  65. ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
  66. and \rd, \rd, #0x00ff0000
  67. teq \rd, #0x00440000 @ is it 2440?
  68. 10000:
  69. ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  70. andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
  71. andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
  72. .endm
  73. .macro fifo_level_s3c2410 rd, rx
  74. ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  75. and \rd, \rd, #S3C2410_UFSTAT_TXMASK
  76. .endm
  77. /* Select the correct implementation depending on the configuration. The
  78. * S3C2440 will get selected by default, as these are the most widely
  79. * used variants of these
  80. */
  81. #if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
  82. #define fifo_full fifo_full_s3c2410
  83. #define fifo_level fifo_level_s3c2410
  84. #elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
  85. #define fifo_full fifo_full_s3c24xx
  86. #define fifo_level fifo_level_s3c24xx
  87. #endif
  88. /* include the reset of the code which will do the work */
  89. #include <plat/debug-macro.S>