mux2420.h 15 KB

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  1. /*
  2. * Copyright (C) 2009 Nokia
  3. * Copyright (C) 2009 Texas Instruments
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #define OMAP2420_CONTROL_PADCONF_MUX_PBASE 0x48000030LU
  10. #define OMAP2420_MUX(mode0, mux_value) \
  11. { \
  12. .reg_offset = (OMAP2420_CONTROL_PADCONF_##mode0##_OFFSET), \
  13. .value = (mux_value), \
  14. }
  15. /*
  16. * OMAP2420 CONTROL_PADCONF* register offsets for pin-muxing
  17. *
  18. * Extracted from the TRM. Add 0x48000030 to these values to get the
  19. * absolute addresses. The name in the macro is the mode-0 name of
  20. * the pin. NOTE: These registers are 8-bits wide.
  21. */
  22. #define OMAP2420_CONTROL_PADCONF_SDRC_A14_OFFSET 0x000
  23. #define OMAP2420_CONTROL_PADCONF_SDRC_A13_OFFSET 0x001
  24. #define OMAP2420_CONTROL_PADCONF_SDRC_A12_OFFSET 0x002
  25. #define OMAP2420_CONTROL_PADCONF_SDRC_BA1_OFFSET 0x003
  26. #define OMAP2420_CONTROL_PADCONF_SDRC_BA0_OFFSET 0x004
  27. #define OMAP2420_CONTROL_PADCONF_SDRC_A11_OFFSET 0x005
  28. #define OMAP2420_CONTROL_PADCONF_SDRC_A10_OFFSET 0x006
  29. #define OMAP2420_CONTROL_PADCONF_SDRC_A9_OFFSET 0x007
  30. #define OMAP2420_CONTROL_PADCONF_SDRC_A8_OFFSET 0x008
  31. #define OMAP2420_CONTROL_PADCONF_SDRC_A7_OFFSET 0x009
  32. #define OMAP2420_CONTROL_PADCONF_SDRC_A6_OFFSET 0x00a
  33. #define OMAP2420_CONTROL_PADCONF_SDRC_A5_OFFSET 0x00b
  34. #define OMAP2420_CONTROL_PADCONF_SDRC_A4_OFFSET 0x00c
  35. #define OMAP2420_CONTROL_PADCONF_SDRC_A3_OFFSET 0x00d
  36. #define OMAP2420_CONTROL_PADCONF_SDRC_A2_OFFSET 0x00e
  37. #define OMAP2420_CONTROL_PADCONF_SDRC_A1_OFFSET 0x00f
  38. #define OMAP2420_CONTROL_PADCONF_SDRC_A0_OFFSET 0x010
  39. #define OMAP2420_CONTROL_PADCONF_SDRC_D31_OFFSET 0x021
  40. #define OMAP2420_CONTROL_PADCONF_SDRC_D30_OFFSET 0x022
  41. #define OMAP2420_CONTROL_PADCONF_SDRC_D29_OFFSET 0x023
  42. #define OMAP2420_CONTROL_PADCONF_SDRC_D28_OFFSET 0x024
  43. #define OMAP2420_CONTROL_PADCONF_SDRC_D27_OFFSET 0x025
  44. #define OMAP2420_CONTROL_PADCONF_SDRC_D26_OFFSET 0x026
  45. #define OMAP2420_CONTROL_PADCONF_SDRC_D25_OFFSET 0x027
  46. #define OMAP2420_CONTROL_PADCONF_SDRC_D24_OFFSET 0x028
  47. #define OMAP2420_CONTROL_PADCONF_SDRC_D23_OFFSET 0x029
  48. #define OMAP2420_CONTROL_PADCONF_SDRC_D22_OFFSET 0x02a
  49. #define OMAP2420_CONTROL_PADCONF_SDRC_D21_OFFSET 0x02b
  50. #define OMAP2420_CONTROL_PADCONF_SDRC_D20_OFFSET 0x02c
  51. #define OMAP2420_CONTROL_PADCONF_SDRC_D19_OFFSET 0x02d
  52. #define OMAP2420_CONTROL_PADCONF_SDRC_D18_OFFSET 0x02e
  53. #define OMAP2420_CONTROL_PADCONF_SDRC_D17_OFFSET 0x02f
  54. #define OMAP2420_CONTROL_PADCONF_SDRC_D16_OFFSET 0x030
  55. #define OMAP2420_CONTROL_PADCONF_SDRC_D15_OFFSET 0x031
  56. #define OMAP2420_CONTROL_PADCONF_SDRC_D14_OFFSET 0x032
  57. #define OMAP2420_CONTROL_PADCONF_SDRC_D13_OFFSET 0x033
  58. #define OMAP2420_CONTROL_PADCONF_SDRC_D12_OFFSET 0x034
  59. #define OMAP2420_CONTROL_PADCONF_SDRC_D11_OFFSET 0x035
  60. #define OMAP2420_CONTROL_PADCONF_SDRC_D10_OFFSET 0x036
  61. #define OMAP2420_CONTROL_PADCONF_SDRC_D9_OFFSET 0x037
  62. #define OMAP2420_CONTROL_PADCONF_SDRC_D8_OFFSET 0x038
  63. #define OMAP2420_CONTROL_PADCONF_SDRC_D7_OFFSET 0x039
  64. #define OMAP2420_CONTROL_PADCONF_SDRC_D6_OFFSET 0x03a
  65. #define OMAP2420_CONTROL_PADCONF_SDRC_D5_OFFSET 0x03b
  66. #define OMAP2420_CONTROL_PADCONF_SDRC_D4_OFFSET 0x03c
  67. #define OMAP2420_CONTROL_PADCONF_SDRC_D3_OFFSET 0x03d
  68. #define OMAP2420_CONTROL_PADCONF_SDRC_D2_OFFSET 0x03e
  69. #define OMAP2420_CONTROL_PADCONF_SDRC_D1_OFFSET 0x03f
  70. #define OMAP2420_CONTROL_PADCONF_SDRC_D0_OFFSET 0x040
  71. #define OMAP2420_CONTROL_PADCONF_GPMC_A10_OFFSET 0x041
  72. #define OMAP2420_CONTROL_PADCONF_GPMC_A9_OFFSET 0x042
  73. #define OMAP2420_CONTROL_PADCONF_GPMC_A8_OFFSET 0x043
  74. #define OMAP2420_CONTROL_PADCONF_GPMC_A7_OFFSET 0x044
  75. #define OMAP2420_CONTROL_PADCONF_GPMC_A6_OFFSET 0x045
  76. #define OMAP2420_CONTROL_PADCONF_GPMC_A5_OFFSET 0x046
  77. #define OMAP2420_CONTROL_PADCONF_GPMC_A4_OFFSET 0x047
  78. #define OMAP2420_CONTROL_PADCONF_GPMC_A3_OFFSET 0x048
  79. #define OMAP2420_CONTROL_PADCONF_GPMC_A2_OFFSET 0x049
  80. #define OMAP2420_CONTROL_PADCONF_GPMC_A1_OFFSET 0x04a
  81. #define OMAP2420_CONTROL_PADCONF_GPMC_D15_OFFSET 0x04b
  82. #define OMAP2420_CONTROL_PADCONF_GPMC_D14_OFFSET 0x04c
  83. #define OMAP2420_CONTROL_PADCONF_GPMC_D13_OFFSET 0x04d
  84. #define OMAP2420_CONTROL_PADCONF_GPMC_D12_OFFSET 0x04e
  85. #define OMAP2420_CONTROL_PADCONF_GPMC_D11_OFFSET 0x04f
  86. #define OMAP2420_CONTROL_PADCONF_GPMC_D10_OFFSET 0x050
  87. #define OMAP2420_CONTROL_PADCONF_GPMC_D9_OFFSET 0x051
  88. #define OMAP2420_CONTROL_PADCONF_GPMC_D8_OFFSET 0x052
  89. #define OMAP2420_CONTROL_PADCONF_GPMC_D7_OFFSET 0x053
  90. #define OMAP2420_CONTROL_PADCONF_GPMC_D6_OFFSET 0x054
  91. #define OMAP2420_CONTROL_PADCONF_GPMC_D5_OFFSET 0x055
  92. #define OMAP2420_CONTROL_PADCONF_GPMC_D4_OFFSET 0x056
  93. #define OMAP2420_CONTROL_PADCONF_GPMC_D3_OFFSET 0x057
  94. #define OMAP2420_CONTROL_PADCONF_GPMC_D2_OFFSET 0x058
  95. #define OMAP2420_CONTROL_PADCONF_GPMC_D1_OFFSET 0x059
  96. #define OMAP2420_CONTROL_PADCONF_GPMC_D0_OFFSET 0x05a
  97. #define OMAP2420_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x05b
  98. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS0_OFFSET 0x05c
  99. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS1_OFFSET 0x05d
  100. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS2_OFFSET 0x05e
  101. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS3_OFFSET 0x05f
  102. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS4_OFFSET 0x060
  103. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS5_OFFSET 0x061
  104. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS6_OFFSET 0x062
  105. #define OMAP2420_CONTROL_PADCONF_GPMC_NCS7_OFFSET 0x063
  106. #define OMAP2420_CONTROL_PADCONF_GPMC_NALE_ALE_OFFSET 0x064
  107. #define OMAP2420_CONTROL_PADCONF_GPMC_NOE_OFFSET 0x065
  108. #define OMAP2420_CONTROL_PADCONF_GPMC_NWE_OFFSET 0x066
  109. #define OMAP2420_CONTROL_PADCONF_GPMC_NBE0_OFFSET 0x067
  110. #define OMAP2420_CONTROL_PADCONF_GPMC_NBE1_OFFSET 0x068
  111. #define OMAP2420_CONTROL_PADCONF_GPMC_NWP_OFFSET 0x069
  112. #define OMAP2420_CONTROL_PADCONF_GPMC_WAIT0_OFFSET 0x06a
  113. #define OMAP2420_CONTROL_PADCONF_GPMC_WAIT1_OFFSET 0x06b
  114. #define OMAP2420_CONTROL_PADCONF_GPMC_WAIT2_OFFSET 0x06c
  115. #define OMAP2420_CONTROL_PADCONF_GPMC_WAIT3_OFFSET 0x06d
  116. #define OMAP2420_CONTROL_PADCONF_SDRC_CLK_OFFSET 0x06e
  117. #define OMAP2420_CONTROL_PADCONF_SDRC_NCLK_OFFSET 0x06f
  118. #define OMAP2420_CONTROL_PADCONF_SDRC_NCS0_OFFSET 0x070
  119. #define OMAP2420_CONTROL_PADCONF_SDRC_NCS1_OFFSET 0x071
  120. #define OMAP2420_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x072
  121. #define OMAP2420_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x073
  122. #define OMAP2420_CONTROL_PADCONF_SDRC_NRAS_OFFSET 0x074
  123. #define OMAP2420_CONTROL_PADCONF_SDRC_NCAS_OFFSET 0x075
  124. #define OMAP2420_CONTROL_PADCONF_SDRC_NWE_OFFSET 0x076
  125. #define OMAP2420_CONTROL_PADCONF_SDRC_DM0_OFFSET 0x077
  126. #define OMAP2420_CONTROL_PADCONF_SDRC_DM1_OFFSET 0x078
  127. #define OMAP2420_CONTROL_PADCONF_SDRC_DM2_OFFSET 0x079
  128. #define OMAP2420_CONTROL_PADCONF_SDRC_DM3_OFFSET 0x07a
  129. #define OMAP2420_CONTROL_PADCONF_SDRC_DQS0_OFFSET 0x07f
  130. #define OMAP2420_CONTROL_PADCONF_SDRC_DQS1_OFFSET 0x080
  131. #define OMAP2420_CONTROL_PADCONF_SDRC_DQS2_OFFSET 0x081
  132. #define OMAP2420_CONTROL_PADCONF_SDRC_DQS3_OFFSET 0x082
  133. #define OMAP2420_CONTROL_PADCONF_DSS_DATA0_OFFSET 0x083
  134. #define OMAP2420_CONTROL_PADCONF_DSS_DATA1_OFFSET 0x084
  135. #define OMAP2420_CONTROL_PADCONF_DSS_DATA2_OFFSET 0x085
  136. #define OMAP2420_CONTROL_PADCONF_DSS_DATA3_OFFSET 0x086
  137. #define OMAP2420_CONTROL_PADCONF_DSS_DATA4_OFFSET 0x087
  138. #define OMAP2420_CONTROL_PADCONF_DSS_DATA5_OFFSET 0x088
  139. #define OMAP2420_CONTROL_PADCONF_DSS_DATA6_OFFSET 0x089
  140. #define OMAP2420_CONTROL_PADCONF_DSS_DATA7_OFFSET 0x08a
  141. #define OMAP2420_CONTROL_PADCONF_DSS_DATA8_OFFSET 0x08b
  142. #define OMAP2420_CONTROL_PADCONF_DSS_DATA9_OFFSET 0x08c
  143. #define OMAP2420_CONTROL_PADCONF_DSS_DATA10_OFFSET 0x08d
  144. #define OMAP2420_CONTROL_PADCONF_DSS_DATA11_OFFSET 0x08e
  145. #define OMAP2420_CONTROL_PADCONF_DSS_DATA12_OFFSET 0x08f
  146. #define OMAP2420_CONTROL_PADCONF_DSS_DATA13_OFFSET 0x090
  147. #define OMAP2420_CONTROL_PADCONF_DSS_DATA14_OFFSET 0x091
  148. #define OMAP2420_CONTROL_PADCONF_DSS_DATA15_OFFSET 0x092
  149. #define OMAP2420_CONTROL_PADCONF_DSS_DATA16_OFFSET 0x093
  150. #define OMAP2420_CONTROL_PADCONF_DSS_DATA17_OFFSET 0x094
  151. #define OMAP2420_CONTROL_PADCONF_UART1_CTS_OFFSET 0x095
  152. #define OMAP2420_CONTROL_PADCONF_UART1_RTS_OFFSET 0x096
  153. #define OMAP2420_CONTROL_PADCONF_UART1_TX_OFFSET 0x097
  154. #define OMAP2420_CONTROL_PADCONF_UART1_RX_OFFSET 0x098
  155. #define OMAP2420_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x099
  156. #define OMAP2420_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x09a
  157. #define OMAP2420_CONTROL_PADCONF_DSS_PCL_OFFSET 0x09b
  158. #define OMAP2420_CONTROL_PADCONF_DSS_VSYNC_OFFSET 0x09c
  159. #define OMAP2420_CONTROL_PADCONF_DSS_HSYNC_OFFSET 0x09d
  160. #define OMAP2420_CONTROL_PADCONF_DSS_ACBIAS_OFFSET 0x09e
  161. #define OMAP2420_CONTROL_PADCONF_CAM_D9_OFFSET 0x09f
  162. #define OMAP2420_CONTROL_PADCONF_CAM_D8_OFFSET 0x0a0
  163. #define OMAP2420_CONTROL_PADCONF_CAM_D7_OFFSET 0x0a1
  164. #define OMAP2420_CONTROL_PADCONF_CAM_D6_OFFSET 0x0a2
  165. #define OMAP2420_CONTROL_PADCONF_CAM_D5_OFFSET 0x0a3
  166. #define OMAP2420_CONTROL_PADCONF_CAM_D4_OFFSET 0x0a4
  167. #define OMAP2420_CONTROL_PADCONF_CAM_D3_OFFSET 0x0a5
  168. #define OMAP2420_CONTROL_PADCONF_CAM_D2_OFFSET 0x0a6
  169. #define OMAP2420_CONTROL_PADCONF_CAM_D1_OFFSET 0x0a7
  170. #define OMAP2420_CONTROL_PADCONF_CAM_D0_OFFSET 0x0a8
  171. #define OMAP2420_CONTROL_PADCONF_CAM_HS_OFFSET 0x0a9
  172. #define OMAP2420_CONTROL_PADCONF_CAM_VS_OFFSET 0x0aa
  173. #define OMAP2420_CONTROL_PADCONF_CAM_LCLK_OFFSET 0x0ab
  174. #define OMAP2420_CONTROL_PADCONF_CAM_XCLK_OFFSET 0x0ac
  175. #define OMAP2420_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET 0x0ad
  176. #define OMAP2420_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET 0x0ae
  177. #define OMAP2420_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET 0x0af
  178. #define OMAP2420_CONTROL_PADCONF_GPIO_62_OFFSET 0x0b0
  179. #define OMAP2420_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET 0x0b1
  180. #define OMAP2420_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET 0x0b2
  181. #define OMAP2420_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET 0x0b3
  182. #define OMAP2420_CONTROL_PADCONF_SSI1_WAKE_OFFSET 0x0b4
  183. #define OMAP2420_CONTROL_PADCONF_VLYNQ_CLK_OFFSET 0x0b5
  184. #define OMAP2420_CONTROL_PADCONF_VLYNQ_RX1_OFFSET 0x0b6
  185. #define OMAP2420_CONTROL_PADCONF_VLYNQ_RX0_OFFSET 0x0b7
  186. #define OMAP2420_CONTROL_PADCONF_VLYNQ_TX1_OFFSET 0x0b8
  187. #define OMAP2420_CONTROL_PADCONF_VLYNQ_TX0_OFFSET 0x0b9
  188. #define OMAP2420_CONTROL_PADCONF_VLYNQ_NLA_OFFSET 0x0ba
  189. #define OMAP2420_CONTROL_PADCONF_UART2_CTS_OFFSET 0x0bb
  190. #define OMAP2420_CONTROL_PADCONF_UART2_RTS_OFFSET 0x0bc
  191. #define OMAP2420_CONTROL_PADCONF_UART2_TX_OFFSET 0x0bd
  192. #define OMAP2420_CONTROL_PADCONF_UART2_RX_OFFSET 0x0be
  193. #define OMAP2420_CONTROL_PADCONF_EAC_BT_SCLK_OFFSET 0x0bf
  194. #define OMAP2420_CONTROL_PADCONF_EAC_BT_FS_OFFSET 0x0c0
  195. #define OMAP2420_CONTROL_PADCONF_EAC_BT_DIN_OFFSET 0x0c1
  196. #define OMAP2420_CONTROL_PADCONF_EAC_BT_DOUT_OFFSET 0x0c2
  197. #define OMAP2420_CONTROL_PADCONF_MMC_CLKO_OFFSET 0x0c3
  198. #define OMAP2420_CONTROL_PADCONF_MMC_CMD_OFFSET 0x0c4
  199. #define OMAP2420_CONTROL_PADCONF_MMC_DAT0_OFFSET 0x0c5
  200. #define OMAP2420_CONTROL_PADCONF_MMC_DAT1_OFFSET 0x0c6
  201. #define OMAP2420_CONTROL_PADCONF_MMC_DAT2_OFFSET 0x0c7
  202. #define OMAP2420_CONTROL_PADCONF_MMC_DAT3_OFFSET 0x0c8
  203. #define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR0_OFFSET 0x0c9
  204. #define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR1_OFFSET 0x0ca
  205. #define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR2_OFFSET 0x0cb
  206. #define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR3_OFFSET 0x0cc
  207. #define OMAP2420_CONTROL_PADCONF_MMC_CMD_DIR_OFFSET 0x0cd
  208. #define OMAP2420_CONTROL_PADCONF_MMC_CLKI_OFFSET 0x0ce
  209. #define OMAP2420_CONTROL_PADCONF_SPI1_CLK_OFFSET 0x0cf
  210. #define OMAP2420_CONTROL_PADCONF_SPI1_SIMO_OFFSET 0x0d0
  211. #define OMAP2420_CONTROL_PADCONF_SPI1_SOMI_OFFSET 0x0d1
  212. #define OMAP2420_CONTROL_PADCONF_SPI1_NCS0_OFFSET 0x0d2
  213. #define OMAP2420_CONTROL_PADCONF_SPI1_NCS1_OFFSET 0x0d3
  214. #define OMAP2420_CONTROL_PADCONF_SPI1_NCS2_OFFSET 0x0d4
  215. #define OMAP2420_CONTROL_PADCONF_SPI1_NCS3_OFFSET 0x0d5
  216. #define OMAP2420_CONTROL_PADCONF_SPI2_CLK_OFFSET 0x0d6
  217. #define OMAP2420_CONTROL_PADCONF_SPI2_SIMO_OFFSET 0x0d7
  218. #define OMAP2420_CONTROL_PADCONF_SPI2_SOMI_OFFSET 0x0d8
  219. #define OMAP2420_CONTROL_PADCONF_SPI2_NCS0_OFFSET 0x0d9
  220. #define OMAP2420_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET 0x0da
  221. #define OMAP2420_CONTROL_PADCONF_MCBSP1_FSR_OFFSET 0x0db
  222. #define OMAP2420_CONTROL_PADCONF_MCBSP1_DX_OFFSET 0x0dc
  223. #define OMAP2420_CONTROL_PADCONF_MCBSP1_DR_OFFSET 0x0dd
  224. #define OMAP2420_CONTROL_PADCONF_MCBSP_CLKS_OFFSET 0x0de
  225. #define OMAP2420_CONTROL_PADCONF_MCBSP1_FSX_OFFSET 0x0df
  226. #define OMAP2420_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET 0x0e0
  227. #define OMAP2420_CONTROL_PADCONF_I2C1_SCL_OFFSET 0x0e1
  228. #define OMAP2420_CONTROL_PADCONF_I2C1_SDA_OFFSET 0x0e2
  229. #define OMAP2420_CONTROL_PADCONF_I2C2_SCL_OFFSET 0x0e3
  230. #define OMAP2420_CONTROL_PADCONF_I2C2_SDA_OFFSET 0x0e4
  231. #define OMAP2420_CONTROL_PADCONF_HDQ_SIO_OFFSET 0x0e5
  232. #define OMAP2420_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET 0x0e6
  233. #define OMAP2420_CONTROL_PADCONF_UART3_RTS_SD_OFFSET 0x0e7
  234. #define OMAP2420_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET 0x0e8
  235. #define OMAP2420_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET 0x0e9
  236. #define OMAP2420_CONTROL_PADCONF_TV_CVBS_OFFSET 0x0ea
  237. #define OMAP2420_CONTROL_PADCONF_TV_VREF_OFFSET 0x0eb
  238. #define OMAP2420_CONTROL_PADCONF_TV_RREF_OFFSET 0x0ec
  239. #define OMAP2420_CONTROL_PADCONF_USB0_PUEN_OFFSET 0x0ed
  240. #define OMAP2420_CONTROL_PADCONF_USB0_VP_OFFSET 0x0ee
  241. #define OMAP2420_CONTROL_PADCONF_USB0_VM_OFFSET 0x0ef
  242. #define OMAP2420_CONTROL_PADCONF_USB0_RCV_OFFSET 0x0f0
  243. #define OMAP2420_CONTROL_PADCONF_USB0_TXEN_OFFSET 0x0f1
  244. #define OMAP2420_CONTROL_PADCONF_USB0_SE0_OFFSET 0x0f2
  245. #define OMAP2420_CONTROL_PADCONF_USB0_DAT_OFFSET 0x0f3
  246. #define OMAP2420_CONTROL_PADCONF_EAC_AC_SCLK_OFFSET 0x0f4
  247. #define OMAP2420_CONTROL_PADCONF_EAC_AC_FS_OFFSET 0x0f5
  248. #define OMAP2420_CONTROL_PADCONF_EAC_AC_DIN_OFFSET 0x0f6
  249. #define OMAP2420_CONTROL_PADCONF_EAC_AC_DOUT_OFFSET 0x0f7
  250. #define OMAP2420_CONTROL_PADCONF_EAC_AC_MCLK_OFFSET 0x0f8
  251. #define OMAP2420_CONTROL_PADCONF_EAC_AC_RST_OFFSET 0x0f9
  252. #define OMAP2420_CONTROL_PADCONF_SYS_NRESPWRON_OFFSET 0x0fa
  253. #define OMAP2420_CONTROL_PADCONF_SYS_NRESWARM_OFFSET 0x0fb
  254. #define OMAP2420_CONTROL_PADCONF_SYS_NIRQ_OFFSET 0x0fc
  255. #define OMAP2420_CONTROL_PADCONF_SYS_NV_OFFSET 0x0fd
  256. #define OMAP2420_CONTROL_PADCONF_GPIO_119_OFFSET 0x0fe
  257. #define OMAP2420_CONTROL_PADCONF_GPIO_120_OFFSET 0x0ff
  258. #define OMAP2420_CONTROL_PADCONF_GPIO_121_OFFSET 0x100
  259. #define OMAP2420_CONTROL_PADCONF_GPIO_122_OFFSET 0x101
  260. #define OMAP2420_CONTROL_PADCONF_SYS_32K_OFFSET 0x102
  261. #define OMAP2420_CONTROL_PADCONF_SYS_XTALIN_OFFSET 0x103
  262. #define OMAP2420_CONTROL_PADCONF_SYS_XTALOUT_OFFSET 0x104
  263. #define OMAP2420_CONTROL_PADCONF_GPIO_36_OFFSET 0x105
  264. #define OMAP2420_CONTROL_PADCONF_SYS_CLKREQ_OFFSET 0x106
  265. #define OMAP2420_CONTROL_PADCONF_SYS_CLKOUT_OFFSET 0x107
  266. #define OMAP2420_CONTROL_PADCONF_GPIO_6_OFFSET 0x108
  267. #define OMAP2420_CONTROL_PADCONF_GPIO_124_OFFSET 0x109
  268. #define OMAP2420_CONTROL_PADCONF_GPIO_125_OFFSET 0x10a
  269. #define OMAP2420_CONTROL_PADCONF_JTAG_EMU1_OFFSET 0x10b
  270. #define OMAP2420_CONTROL_PADCONF_JTAG_EMU0_OFFSET 0x10c
  271. #define OMAP2420_CONTROL_PADCONF_JTAG_NTRST_OFFSET 0x10d
  272. #define OMAP2420_CONTROL_PADCONF_JTAG_TCK_OFFSET 0x10e
  273. #define OMAP2420_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0x10f
  274. #define OMAP2420_CONTROL_PADCONF_JTAG_TMS_OFFSET 0x110
  275. #define OMAP2420_CONTROL_PADCONF_JTAG_TDI_OFFSET 0x111
  276. #define OMAP2420_CONTROL_PADCONF_JTAG_TDO_OFFSET 0x112
  277. #define OMAP2420_CONTROL_PADCONF_MUX_SIZE \
  278. (OMAP2420_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x1)