board-flash.c 6.2 KB

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  1. /*
  2. * board-sdp-flash.c
  3. * Modified from mach-omap2/board-3430sdp-flash.c
  4. *
  5. * Copyright (C) 2009 Nokia Corporation
  6. * Copyright (C) 2009 Texas Instruments
  7. *
  8. * Vimal Singh <vimalsingh@ti.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/io.h>
  18. #include <plat/gpmc.h>
  19. #include <plat/nand.h>
  20. #include <plat/onenand.h>
  21. #include <plat/tc.h>
  22. #include <mach/board-flash.h>
  23. #define REG_FPGA_REV 0x10
  24. #define REG_FPGA_DIP_SWITCH_INPUT2 0x60
  25. #define MAX_SUPPORTED_GPMC_CONFIG 3
  26. #define DEBUG_BASE 0x08000000 /* debug board */
  27. /* various memory sizes */
  28. #define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
  29. #define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
  30. static struct physmap_flash_data board_nor_data = {
  31. .width = 2,
  32. };
  33. static struct resource board_nor_resource = {
  34. .flags = IORESOURCE_MEM,
  35. };
  36. static struct platform_device board_nor_device = {
  37. .name = "physmap-flash",
  38. .id = 0,
  39. .dev = {
  40. .platform_data = &board_nor_data,
  41. },
  42. .num_resources = 1,
  43. .resource = &board_nor_resource,
  44. };
  45. static void
  46. __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  47. {
  48. int err;
  49. board_nor_data.parts = nor_parts;
  50. board_nor_data.nr_parts = nr_parts;
  51. /* Configure start address and size of NOR device */
  52. if (omap_rev() >= OMAP3430_REV_ES1_0) {
  53. err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
  54. (unsigned long *)&board_nor_resource.start);
  55. board_nor_resource.end = board_nor_resource.start
  56. + FLASH_SIZE_SDPV2 - 1;
  57. } else {
  58. err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
  59. (unsigned long *)&board_nor_resource.start);
  60. board_nor_resource.end = board_nor_resource.start
  61. + FLASH_SIZE_SDPV1 - 1;
  62. }
  63. if (err < 0) {
  64. printk(KERN_ERR "NOR: Can't request GPMC CS\n");
  65. return;
  66. }
  67. if (platform_device_register(&board_nor_device) < 0)
  68. printk(KERN_ERR "Unable to register NOR device\n");
  69. }
  70. #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  71. defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  72. static struct omap_onenand_platform_data board_onenand_data = {
  73. .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
  74. };
  75. static void
  76. __init board_onenand_init(struct mtd_partition *onenand_parts,
  77. u8 nr_parts, u8 cs)
  78. {
  79. board_onenand_data.cs = cs;
  80. board_onenand_data.parts = onenand_parts;
  81. board_onenand_data.nr_parts = nr_parts;
  82. gpmc_onenand_init(&board_onenand_data);
  83. }
  84. #else
  85. static void
  86. __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  87. {
  88. }
  89. #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
  90. #if defined(CONFIG_MTD_NAND_OMAP2) || \
  91. defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  92. /* Note that all values in this struct are in nanoseconds */
  93. static struct gpmc_timings nand_timings = {
  94. .sync_clk = 0,
  95. .cs_on = 0,
  96. .cs_rd_off = 36,
  97. .cs_wr_off = 36,
  98. .adv_on = 6,
  99. .adv_rd_off = 24,
  100. .adv_wr_off = 36,
  101. .we_off = 30,
  102. .oe_off = 48,
  103. .access = 54,
  104. .rd_cycle = 72,
  105. .wr_cycle = 72,
  106. .wr_access = 30,
  107. .wr_data_mux_bus = 0,
  108. };
  109. static struct omap_nand_platform_data board_nand_data = {
  110. .nand_setup = NULL,
  111. .gpmc_t = &nand_timings,
  112. .dma_channel = -1, /* disable DMA in OMAP NAND driver */
  113. .dev_ready = NULL,
  114. .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */
  115. };
  116. void
  117. __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
  118. {
  119. board_nand_data.cs = cs;
  120. board_nand_data.parts = nand_parts;
  121. board_nand_data.nr_parts = nr_parts;
  122. gpmc_nand_init(&board_nand_data);
  123. }
  124. #else
  125. void
  126. __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
  127. {
  128. }
  129. #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
  130. /**
  131. * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
  132. * the various cs values.
  133. */
  134. static u8 get_gpmc0_type(void)
  135. {
  136. u8 cs = 0;
  137. void __iomem *fpga_map_addr;
  138. fpga_map_addr = ioremap(DEBUG_BASE, 4096);
  139. if (!fpga_map_addr)
  140. return -ENOMEM;
  141. if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
  142. /* we dont have an DEBUG FPGA??? */
  143. /* Depend on #defines!! default to strata boot return param */
  144. goto unmap;
  145. /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
  146. cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
  147. /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
  148. if (omap_rev() >= OMAP3430_REV_ES1_0)
  149. /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
  150. cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
  151. ((cs & 2) << 1) | ((cs & 1) << 3);
  152. else
  153. /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
  154. cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
  155. unmap:
  156. iounmap(fpga_map_addr);
  157. return cs;
  158. }
  159. /**
  160. * sdp3430_flash_init - Identify devices connected to GPMC and register.
  161. *
  162. * @return - void.
  163. */
  164. void board_flash_init(struct flash_partitions partition_info[],
  165. char chip_sel_board[][GPMC_CS_NUM])
  166. {
  167. u8 cs = 0;
  168. u8 norcs = GPMC_CS_NUM + 1;
  169. u8 nandcs = GPMC_CS_NUM + 1;
  170. u8 onenandcs = GPMC_CS_NUM + 1;
  171. u8 idx;
  172. unsigned char *config_sel = NULL;
  173. /* REVISIT: Is this return correct idx for 2430 SDP?
  174. * for which cs configuration matches for 2430 SDP?
  175. */
  176. idx = get_gpmc0_type();
  177. if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
  178. printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
  179. return;
  180. }
  181. config_sel = (unsigned char *)(chip_sel_board[idx]);
  182. while (cs < GPMC_CS_NUM) {
  183. switch (config_sel[cs]) {
  184. case PDC_NOR:
  185. if (norcs > GPMC_CS_NUM)
  186. norcs = cs;
  187. break;
  188. case PDC_NAND:
  189. if (nandcs > GPMC_CS_NUM)
  190. nandcs = cs;
  191. break;
  192. case PDC_ONENAND:
  193. if (onenandcs > GPMC_CS_NUM)
  194. onenandcs = cs;
  195. break;
  196. };
  197. cs++;
  198. }
  199. if (norcs > GPMC_CS_NUM)
  200. printk(KERN_INFO "NOR: Unable to find configuration "
  201. "in GPMC\n");
  202. else
  203. board_nor_init(partition_info[0].parts,
  204. partition_info[0].nr_parts, norcs);
  205. if (onenandcs > GPMC_CS_NUM)
  206. printk(KERN_INFO "OneNAND: Unable to find configuration "
  207. "in GPMC\n");
  208. else
  209. board_onenand_init(partition_info[1].parts,
  210. partition_info[1].nr_parts, onenandcs);
  211. if (nandcs > GPMC_CS_NUM)
  212. printk(KERN_INFO "NAND: Unable to find configuration "
  213. "in GPMC\n");
  214. else
  215. board_nand_init(partition_info[2].parts,
  216. partition_info[2].nr_parts, nandcs);
  217. }