board-3430sdp.c 19 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/ads7846.h>
  22. #include <linux/i2c/twl.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <plat/mcspi.h>
  31. #include <plat/board.h>
  32. #include <plat/usb.h>
  33. #include <plat/common.h>
  34. #include <plat/dma.h>
  35. #include <plat/gpmc.h>
  36. #include <plat/display.h>
  37. #include <plat/control.h>
  38. #include <plat/gpmc-smc91x.h>
  39. #include <mach/board-flash.h>
  40. #include "mux.h"
  41. #include "sdram-qimonda-hyb18m512160af-6.h"
  42. #include "hsmmc.h"
  43. #include "pm.h"
  44. #define CONFIG_DISABLE_HFCLK 1
  45. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  46. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  47. #define ENABLE_VAUX3_DEDICATED 0x03
  48. #define ENABLE_VAUX3_DEV_GRP 0x20
  49. #define TWL4030_MSECURE_GPIO 22
  50. /* FIXME: These values need to be updated based on more profiling on 3430sdp*/
  51. static struct cpuidle_params omap3_cpuidle_params_table[] = {
  52. /* C1 */
  53. {1, 2, 2, 5},
  54. /* C2 */
  55. {1, 10, 10, 30},
  56. /* C3 */
  57. {1, 50, 50, 300},
  58. /* C4 */
  59. {1, 1500, 1800, 4000},
  60. /* C5 */
  61. {1, 2500, 7500, 12000},
  62. /* C6 */
  63. {1, 3000, 8500, 15000},
  64. /* C7 */
  65. {1, 10000, 30000, 300000},
  66. };
  67. static int board_keymap[] = {
  68. KEY(0, 0, KEY_LEFT),
  69. KEY(0, 1, KEY_RIGHT),
  70. KEY(0, 2, KEY_A),
  71. KEY(0, 3, KEY_B),
  72. KEY(0, 4, KEY_C),
  73. KEY(1, 0, KEY_DOWN),
  74. KEY(1, 1, KEY_UP),
  75. KEY(1, 2, KEY_E),
  76. KEY(1, 3, KEY_F),
  77. KEY(1, 4, KEY_G),
  78. KEY(2, 0, KEY_ENTER),
  79. KEY(2, 1, KEY_I),
  80. KEY(2, 2, KEY_J),
  81. KEY(2, 3, KEY_K),
  82. KEY(2, 4, KEY_3),
  83. KEY(3, 0, KEY_M),
  84. KEY(3, 1, KEY_N),
  85. KEY(3, 2, KEY_O),
  86. KEY(3, 3, KEY_P),
  87. KEY(3, 4, KEY_Q),
  88. KEY(4, 0, KEY_R),
  89. KEY(4, 1, KEY_4),
  90. KEY(4, 2, KEY_T),
  91. KEY(4, 3, KEY_U),
  92. KEY(4, 4, KEY_D),
  93. KEY(5, 0, KEY_V),
  94. KEY(5, 1, KEY_W),
  95. KEY(5, 2, KEY_L),
  96. KEY(5, 3, KEY_S),
  97. KEY(5, 4, KEY_H),
  98. 0
  99. };
  100. static struct matrix_keymap_data board_map_data = {
  101. .keymap = board_keymap,
  102. .keymap_size = ARRAY_SIZE(board_keymap),
  103. };
  104. static struct twl4030_keypad_data sdp3430_kp_data = {
  105. .keymap_data = &board_map_data,
  106. .rows = 5,
  107. .cols = 6,
  108. .rep = 1,
  109. };
  110. static int ts_gpio; /* Needed for ads7846_get_pendown_state */
  111. /**
  112. * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
  113. *
  114. * @return - void. If request gpio fails then Flag KERN_ERR.
  115. */
  116. static void ads7846_dev_init(void)
  117. {
  118. if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
  119. printk(KERN_ERR "can't get ads746 pen down GPIO\n");
  120. return;
  121. }
  122. gpio_direction_input(ts_gpio);
  123. gpio_set_debounce(ts_gpio, 310);
  124. }
  125. static int ads7846_get_pendown_state(void)
  126. {
  127. return !gpio_get_value(ts_gpio);
  128. }
  129. static struct ads7846_platform_data tsc2046_config __initdata = {
  130. .get_pendown_state = ads7846_get_pendown_state,
  131. .keep_vref_on = 1,
  132. .wakeup = true,
  133. };
  134. static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
  135. .turbo_mode = 0,
  136. .single_channel = 1, /* 0: slave, 1: master */
  137. };
  138. static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
  139. [0] = {
  140. /*
  141. * TSC2046 operates at a max freqency of 2MHz, so
  142. * operate slightly below at 1.5MHz
  143. */
  144. .modalias = "ads7846",
  145. .bus_num = 1,
  146. .chip_select = 0,
  147. .max_speed_hz = 1500000,
  148. .controller_data = &tsc2046_mcspi_config,
  149. .irq = 0,
  150. .platform_data = &tsc2046_config,
  151. },
  152. };
  153. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  154. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  155. static unsigned backlight_gpio;
  156. static unsigned enable_gpio;
  157. static int lcd_enabled;
  158. static int dvi_enabled;
  159. static void __init sdp3430_display_init(void)
  160. {
  161. int r;
  162. enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
  163. backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
  164. r = gpio_request(enable_gpio, "LCD reset");
  165. if (r) {
  166. printk(KERN_ERR "failed to get LCD reset GPIO\n");
  167. goto err0;
  168. }
  169. r = gpio_request(backlight_gpio, "LCD Backlight");
  170. if (r) {
  171. printk(KERN_ERR "failed to get LCD backlight GPIO\n");
  172. goto err1;
  173. }
  174. gpio_direction_output(enable_gpio, 0);
  175. gpio_direction_output(backlight_gpio, 0);
  176. return;
  177. err1:
  178. gpio_free(enable_gpio);
  179. err0:
  180. return;
  181. }
  182. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  183. {
  184. if (dvi_enabled) {
  185. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  186. return -EINVAL;
  187. }
  188. gpio_direction_output(enable_gpio, 1);
  189. gpio_direction_output(backlight_gpio, 1);
  190. lcd_enabled = 1;
  191. return 0;
  192. }
  193. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  194. {
  195. lcd_enabled = 0;
  196. gpio_direction_output(enable_gpio, 0);
  197. gpio_direction_output(backlight_gpio, 0);
  198. }
  199. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  200. {
  201. if (lcd_enabled) {
  202. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  203. return -EINVAL;
  204. }
  205. dvi_enabled = 1;
  206. return 0;
  207. }
  208. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  209. {
  210. dvi_enabled = 0;
  211. }
  212. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  213. {
  214. return 0;
  215. }
  216. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  217. {
  218. }
  219. static struct omap_dss_device sdp3430_lcd_device = {
  220. .name = "lcd",
  221. .driver_name = "sharp_ls_panel",
  222. .type = OMAP_DISPLAY_TYPE_DPI,
  223. .phy.dpi.data_lines = 16,
  224. .platform_enable = sdp3430_panel_enable_lcd,
  225. .platform_disable = sdp3430_panel_disable_lcd,
  226. };
  227. static struct omap_dss_device sdp3430_dvi_device = {
  228. .name = "dvi",
  229. .driver_name = "generic_panel",
  230. .type = OMAP_DISPLAY_TYPE_DPI,
  231. .phy.dpi.data_lines = 24,
  232. .platform_enable = sdp3430_panel_enable_dvi,
  233. .platform_disable = sdp3430_panel_disable_dvi,
  234. };
  235. static struct omap_dss_device sdp3430_tv_device = {
  236. .name = "tv",
  237. .driver_name = "venc",
  238. .type = OMAP_DISPLAY_TYPE_VENC,
  239. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  240. .platform_enable = sdp3430_panel_enable_tv,
  241. .platform_disable = sdp3430_panel_disable_tv,
  242. };
  243. static struct omap_dss_device *sdp3430_dss_devices[] = {
  244. &sdp3430_lcd_device,
  245. &sdp3430_dvi_device,
  246. &sdp3430_tv_device,
  247. };
  248. static struct omap_dss_board_info sdp3430_dss_data = {
  249. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  250. .devices = sdp3430_dss_devices,
  251. .default_device = &sdp3430_lcd_device,
  252. };
  253. static struct platform_device sdp3430_dss_device = {
  254. .name = "omapdss",
  255. .id = -1,
  256. .dev = {
  257. .platform_data = &sdp3430_dss_data,
  258. },
  259. };
  260. static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
  261. .supply = "vdda_dac",
  262. .dev = &sdp3430_dss_device.dev,
  263. };
  264. static struct platform_device *sdp3430_devices[] __initdata = {
  265. &sdp3430_dss_device,
  266. };
  267. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  268. };
  269. static void __init omap_3430sdp_init_irq(void)
  270. {
  271. omap_board_config = sdp3430_config;
  272. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  273. omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
  274. omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
  275. omap_init_irq();
  276. omap_gpio_init();
  277. }
  278. static int sdp3430_batt_table[] = {
  279. /* 0 C*/
  280. 30800, 29500, 28300, 27100,
  281. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
  282. 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
  283. 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
  284. 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
  285. 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
  286. 4040, 3910, 3790, 3670, 3550
  287. };
  288. static struct twl4030_bci_platform_data sdp3430_bci_data = {
  289. .battery_tmp_tbl = sdp3430_batt_table,
  290. .tblsize = ARRAY_SIZE(sdp3430_batt_table),
  291. };
  292. static struct omap2_hsmmc_info mmc[] = {
  293. {
  294. .mmc = 1,
  295. /* 8 bits (default) requires S6.3 == ON,
  296. * so the SIM card isn't used; else 4 bits.
  297. */
  298. .wires = 8,
  299. .gpio_wp = 4,
  300. },
  301. {
  302. .mmc = 2,
  303. .wires = 8,
  304. .gpio_wp = 7,
  305. },
  306. {} /* Terminator */
  307. };
  308. static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
  309. .supply = "vmmc",
  310. };
  311. static struct regulator_consumer_supply sdp3430_vsim_supply = {
  312. .supply = "vmmc_aux",
  313. };
  314. static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
  315. .supply = "vmmc",
  316. };
  317. static int sdp3430_twl_gpio_setup(struct device *dev,
  318. unsigned gpio, unsigned ngpio)
  319. {
  320. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  321. * gpio + 1 is "mmc1_cd" (input/IRQ)
  322. */
  323. mmc[0].gpio_cd = gpio + 0;
  324. mmc[1].gpio_cd = gpio + 1;
  325. omap2_hsmmc_init(mmc);
  326. /* link regulators to MMC adapters ... we "know" the
  327. * regulators will be set up only *after* we return.
  328. */
  329. sdp3430_vmmc1_supply.dev = mmc[0].dev;
  330. sdp3430_vsim_supply.dev = mmc[0].dev;
  331. sdp3430_vmmc2_supply.dev = mmc[1].dev;
  332. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  333. gpio_request(gpio + 7, "sub_lcd_en_bkl");
  334. gpio_direction_output(gpio + 7, 0);
  335. /* gpio + 15 is "sub_lcd_nRST" (output) */
  336. gpio_request(gpio + 15, "sub_lcd_nRST");
  337. gpio_direction_output(gpio + 15, 0);
  338. return 0;
  339. }
  340. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  341. .gpio_base = OMAP_MAX_GPIO_LINES,
  342. .irq_base = TWL4030_GPIO_IRQ_BASE,
  343. .irq_end = TWL4030_GPIO_IRQ_END,
  344. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  345. | BIT(16) | BIT(17),
  346. .setup = sdp3430_twl_gpio_setup,
  347. };
  348. static struct twl4030_usb_data sdp3430_usb_data = {
  349. .usb_mode = T2_USB_MODE_ULPI,
  350. };
  351. static struct twl4030_madc_platform_data sdp3430_madc_data = {
  352. .irq_line = 1,
  353. };
  354. /*
  355. * Apply all the fixed voltages since most versions of U-Boot
  356. * don't bother with that initialization.
  357. */
  358. /* VAUX1 for mainboard (irda and sub-lcd) */
  359. static struct regulator_init_data sdp3430_vaux1 = {
  360. .constraints = {
  361. .min_uV = 2800000,
  362. .max_uV = 2800000,
  363. .apply_uV = true,
  364. .valid_modes_mask = REGULATOR_MODE_NORMAL
  365. | REGULATOR_MODE_STANDBY,
  366. .valid_ops_mask = REGULATOR_CHANGE_MODE
  367. | REGULATOR_CHANGE_STATUS,
  368. },
  369. };
  370. /* VAUX2 for camera module */
  371. static struct regulator_init_data sdp3430_vaux2 = {
  372. .constraints = {
  373. .min_uV = 2800000,
  374. .max_uV = 2800000,
  375. .apply_uV = true,
  376. .valid_modes_mask = REGULATOR_MODE_NORMAL
  377. | REGULATOR_MODE_STANDBY,
  378. .valid_ops_mask = REGULATOR_CHANGE_MODE
  379. | REGULATOR_CHANGE_STATUS,
  380. },
  381. };
  382. /* VAUX3 for LCD board */
  383. static struct regulator_init_data sdp3430_vaux3 = {
  384. .constraints = {
  385. .min_uV = 2800000,
  386. .max_uV = 2800000,
  387. .apply_uV = true,
  388. .valid_modes_mask = REGULATOR_MODE_NORMAL
  389. | REGULATOR_MODE_STANDBY,
  390. .valid_ops_mask = REGULATOR_CHANGE_MODE
  391. | REGULATOR_CHANGE_STATUS,
  392. },
  393. };
  394. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  395. static struct regulator_init_data sdp3430_vaux4 = {
  396. .constraints = {
  397. .min_uV = 1800000,
  398. .max_uV = 1800000,
  399. .apply_uV = true,
  400. .valid_modes_mask = REGULATOR_MODE_NORMAL
  401. | REGULATOR_MODE_STANDBY,
  402. .valid_ops_mask = REGULATOR_CHANGE_MODE
  403. | REGULATOR_CHANGE_STATUS,
  404. },
  405. };
  406. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  407. static struct regulator_init_data sdp3430_vmmc1 = {
  408. .constraints = {
  409. .min_uV = 1850000,
  410. .max_uV = 3150000,
  411. .valid_modes_mask = REGULATOR_MODE_NORMAL
  412. | REGULATOR_MODE_STANDBY,
  413. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  414. | REGULATOR_CHANGE_MODE
  415. | REGULATOR_CHANGE_STATUS,
  416. },
  417. .num_consumer_supplies = 1,
  418. .consumer_supplies = &sdp3430_vmmc1_supply,
  419. };
  420. /* VMMC2 for MMC2 card */
  421. static struct regulator_init_data sdp3430_vmmc2 = {
  422. .constraints = {
  423. .min_uV = 1850000,
  424. .max_uV = 1850000,
  425. .apply_uV = true,
  426. .valid_modes_mask = REGULATOR_MODE_NORMAL
  427. | REGULATOR_MODE_STANDBY,
  428. .valid_ops_mask = REGULATOR_CHANGE_MODE
  429. | REGULATOR_CHANGE_STATUS,
  430. },
  431. .num_consumer_supplies = 1,
  432. .consumer_supplies = &sdp3430_vmmc2_supply,
  433. };
  434. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  435. static struct regulator_init_data sdp3430_vsim = {
  436. .constraints = {
  437. .min_uV = 1800000,
  438. .max_uV = 3000000,
  439. .valid_modes_mask = REGULATOR_MODE_NORMAL
  440. | REGULATOR_MODE_STANDBY,
  441. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  442. | REGULATOR_CHANGE_MODE
  443. | REGULATOR_CHANGE_STATUS,
  444. },
  445. .num_consumer_supplies = 1,
  446. .consumer_supplies = &sdp3430_vsim_supply,
  447. };
  448. /* VDAC for DSS driving S-Video */
  449. static struct regulator_init_data sdp3430_vdac = {
  450. .constraints = {
  451. .min_uV = 1800000,
  452. .max_uV = 1800000,
  453. .apply_uV = true,
  454. .valid_modes_mask = REGULATOR_MODE_NORMAL
  455. | REGULATOR_MODE_STANDBY,
  456. .valid_ops_mask = REGULATOR_CHANGE_MODE
  457. | REGULATOR_CHANGE_STATUS,
  458. },
  459. .num_consumer_supplies = 1,
  460. .consumer_supplies = &sdp3430_vdda_dac_supply,
  461. };
  462. /* VPLL2 for digital video outputs */
  463. static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
  464. {
  465. .supply = "vdds_dsi",
  466. .dev = &sdp3430_dss_device.dev,
  467. }
  468. };
  469. static struct regulator_init_data sdp3430_vpll2 = {
  470. .constraints = {
  471. .name = "VDVI",
  472. .min_uV = 1800000,
  473. .max_uV = 1800000,
  474. .apply_uV = true,
  475. .valid_modes_mask = REGULATOR_MODE_NORMAL
  476. | REGULATOR_MODE_STANDBY,
  477. .valid_ops_mask = REGULATOR_CHANGE_MODE
  478. | REGULATOR_CHANGE_STATUS,
  479. },
  480. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
  481. .consumer_supplies = sdp3430_vpll2_supplies,
  482. };
  483. static struct twl4030_codec_audio_data sdp3430_audio = {
  484. .audio_mclk = 26000000,
  485. };
  486. static struct twl4030_codec_data sdp3430_codec = {
  487. .audio_mclk = 26000000,
  488. .audio = &sdp3430_audio,
  489. };
  490. static struct twl4030_platform_data sdp3430_twldata = {
  491. .irq_base = TWL4030_IRQ_BASE,
  492. .irq_end = TWL4030_IRQ_END,
  493. /* platform_data for children goes here */
  494. .bci = &sdp3430_bci_data,
  495. .gpio = &sdp3430_gpio_data,
  496. .madc = &sdp3430_madc_data,
  497. .keypad = &sdp3430_kp_data,
  498. .usb = &sdp3430_usb_data,
  499. .codec = &sdp3430_codec,
  500. .vaux1 = &sdp3430_vaux1,
  501. .vaux2 = &sdp3430_vaux2,
  502. .vaux3 = &sdp3430_vaux3,
  503. .vaux4 = &sdp3430_vaux4,
  504. .vmmc1 = &sdp3430_vmmc1,
  505. .vmmc2 = &sdp3430_vmmc2,
  506. .vsim = &sdp3430_vsim,
  507. .vdac = &sdp3430_vdac,
  508. .vpll2 = &sdp3430_vpll2,
  509. };
  510. static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
  511. {
  512. I2C_BOARD_INFO("twl4030", 0x48),
  513. .flags = I2C_CLIENT_WAKE,
  514. .irq = INT_34XX_SYS_NIRQ,
  515. .platform_data = &sdp3430_twldata,
  516. },
  517. };
  518. static int __init omap3430_i2c_init(void)
  519. {
  520. /* i2c1 for PMIC only */
  521. omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
  522. ARRAY_SIZE(sdp3430_i2c_boardinfo));
  523. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  524. omap_register_i2c_bus(2, 400, NULL, 0);
  525. /* i2c3 on display connector (for DVI, tfp410) */
  526. omap_register_i2c_bus(3, 400, NULL, 0);
  527. return 0;
  528. }
  529. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  530. static struct omap_smc91x_platform_data board_smc91x_data = {
  531. .cs = 3,
  532. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  533. IORESOURCE_IRQ_LOWLEVEL,
  534. };
  535. static void __init board_smc91x_init(void)
  536. {
  537. if (omap_rev() > OMAP3430_REV_ES1_0)
  538. board_smc91x_data.gpio_irq = 6;
  539. else
  540. board_smc91x_data.gpio_irq = 29;
  541. gpmc_smc91x_init(&board_smc91x_data);
  542. }
  543. #else
  544. static inline void board_smc91x_init(void)
  545. {
  546. }
  547. #endif
  548. static void enable_board_wakeup_source(void)
  549. {
  550. /* T2 interrupt line (keypad) */
  551. omap_mux_init_signal("sys_nirq",
  552. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  553. }
  554. static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  555. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  556. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  557. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  558. .phy_reset = true,
  559. .reset_gpio_port[0] = 57,
  560. .reset_gpio_port[1] = 61,
  561. .reset_gpio_port[2] = -EINVAL
  562. };
  563. #ifdef CONFIG_OMAP_MUX
  564. static struct omap_board_mux board_mux[] __initdata = {
  565. { .reg_offset = OMAP_MUX_TERMINATOR },
  566. };
  567. #else
  568. #define board_mux NULL
  569. #endif
  570. /*
  571. * SDP3430 V2 Board CS organization
  572. * Different from SDP3430 V1. Now 4 switches used to specify CS
  573. *
  574. * See also the Switch S8 settings in the comments.
  575. */
  576. static char chip_sel_3430[][GPMC_CS_NUM] = {
  577. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  578. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  579. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  580. };
  581. static struct mtd_partition sdp_nor_partitions[] = {
  582. /* bootloader (U-Boot, etc) in first sector */
  583. {
  584. .name = "Bootloader-NOR",
  585. .offset = 0,
  586. .size = SZ_256K,
  587. .mask_flags = MTD_WRITEABLE, /* force read-only */
  588. },
  589. /* bootloader params in the next sector */
  590. {
  591. .name = "Params-NOR",
  592. .offset = MTDPART_OFS_APPEND,
  593. .size = SZ_256K,
  594. .mask_flags = 0,
  595. },
  596. /* kernel */
  597. {
  598. .name = "Kernel-NOR",
  599. .offset = MTDPART_OFS_APPEND,
  600. .size = SZ_2M,
  601. .mask_flags = 0
  602. },
  603. /* file system */
  604. {
  605. .name = "Filesystem-NOR",
  606. .offset = MTDPART_OFS_APPEND,
  607. .size = MTDPART_SIZ_FULL,
  608. .mask_flags = 0
  609. }
  610. };
  611. static struct mtd_partition sdp_onenand_partitions[] = {
  612. {
  613. .name = "X-Loader-OneNAND",
  614. .offset = 0,
  615. .size = 4 * (64 * 2048),
  616. .mask_flags = MTD_WRITEABLE /* force read-only */
  617. },
  618. {
  619. .name = "U-Boot-OneNAND",
  620. .offset = MTDPART_OFS_APPEND,
  621. .size = 2 * (64 * 2048),
  622. .mask_flags = MTD_WRITEABLE /* force read-only */
  623. },
  624. {
  625. .name = "U-Boot Environment-OneNAND",
  626. .offset = MTDPART_OFS_APPEND,
  627. .size = 1 * (64 * 2048),
  628. },
  629. {
  630. .name = "Kernel-OneNAND",
  631. .offset = MTDPART_OFS_APPEND,
  632. .size = 16 * (64 * 2048),
  633. },
  634. {
  635. .name = "File System-OneNAND",
  636. .offset = MTDPART_OFS_APPEND,
  637. .size = MTDPART_SIZ_FULL,
  638. },
  639. };
  640. static struct mtd_partition sdp_nand_partitions[] = {
  641. /* All the partition sizes are listed in terms of NAND block size */
  642. {
  643. .name = "X-Loader-NAND",
  644. .offset = 0,
  645. .size = 4 * (64 * 2048),
  646. .mask_flags = MTD_WRITEABLE, /* force read-only */
  647. },
  648. {
  649. .name = "U-Boot-NAND",
  650. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  651. .size = 10 * (64 * 2048),
  652. .mask_flags = MTD_WRITEABLE, /* force read-only */
  653. },
  654. {
  655. .name = "Boot Env-NAND",
  656. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  657. .size = 6 * (64 * 2048),
  658. },
  659. {
  660. .name = "Kernel-NAND",
  661. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  662. .size = 40 * (64 * 2048),
  663. },
  664. {
  665. .name = "File System - NAND",
  666. .size = MTDPART_SIZ_FULL,
  667. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  668. },
  669. };
  670. static struct flash_partitions sdp_flash_partitions[] = {
  671. {
  672. .parts = sdp_nor_partitions,
  673. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  674. },
  675. {
  676. .parts = sdp_onenand_partitions,
  677. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  678. },
  679. {
  680. .parts = sdp_nand_partitions,
  681. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  682. },
  683. };
  684. static struct omap_musb_board_data musb_board_data = {
  685. .interface_type = MUSB_INTERFACE_ULPI,
  686. .mode = MUSB_OTG,
  687. .power = 100,
  688. };
  689. static void __init omap_3430sdp_init(void)
  690. {
  691. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  692. omap3430_i2c_init();
  693. platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
  694. if (omap_rev() > OMAP3430_REV_ES1_0)
  695. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
  696. else
  697. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
  698. sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
  699. spi_register_board_info(sdp3430_spi_board_info,
  700. ARRAY_SIZE(sdp3430_spi_board_info));
  701. ads7846_dev_init();
  702. omap_serial_init();
  703. usb_musb_init(&musb_board_data);
  704. board_smc91x_init();
  705. board_flash_init(sdp_flash_partitions, chip_sel_3430);
  706. sdp3430_display_init();
  707. enable_board_wakeup_source();
  708. usb_ehci_init(&ehci_pdata);
  709. }
  710. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  711. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  712. .phys_io = 0x48000000,
  713. .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
  714. .boot_params = 0x80000100,
  715. .map_io = omap3_map_io,
  716. .reserve = omap_reserve,
  717. .init_irq = omap_3430sdp_init_irq,
  718. .init_machine = omap_3430sdp_init,
  719. .timer = &omap_timer,
  720. MACHINE_END