mm.c 2.2 KB

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  1. /*
  2. * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. *
  11. * Create static mapping between physical to virtual memory.
  12. */
  13. #include <linux/mm.h>
  14. #include <linux/init.h>
  15. #include <asm/mach/map.h>
  16. #include <mach/hardware.h>
  17. #include <mach/common.h>
  18. #include <mach/iomux-v3.h>
  19. /*
  20. * Define the MX51 memory map.
  21. */
  22. static struct map_desc mxc_io_desc[] __initdata = {
  23. {
  24. .virtual = MX51_IRAM_BASE_ADDR_VIRT,
  25. .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR),
  26. .length = MX51_IRAM_SIZE,
  27. .type = MT_DEVICE
  28. }, {
  29. .virtual = MX51_DEBUG_BASE_ADDR_VIRT,
  30. .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
  31. .length = MX51_DEBUG_SIZE,
  32. .type = MT_DEVICE
  33. }, {
  34. .virtual = MX51_AIPS1_BASE_ADDR_VIRT,
  35. .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
  36. .length = MX51_AIPS1_SIZE,
  37. .type = MT_DEVICE
  38. }, {
  39. .virtual = MX51_SPBA0_BASE_ADDR_VIRT,
  40. .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR),
  41. .length = MX51_SPBA0_SIZE,
  42. .type = MT_DEVICE
  43. }, {
  44. .virtual = MX51_AIPS2_BASE_ADDR_VIRT,
  45. .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
  46. .length = MX51_AIPS2_SIZE,
  47. .type = MT_DEVICE
  48. },
  49. };
  50. /*
  51. * This function initializes the memory map. It is called during the
  52. * system startup to create static physical to virtual memory mappings
  53. * for the IO modules.
  54. */
  55. void __init mx51_map_io(void)
  56. {
  57. mxc_set_cpu_type(MXC_CPU_MX51);
  58. mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
  59. mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
  60. iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
  61. }
  62. int imx51_register_gpios(void);
  63. void __init mx51_init_irq(void)
  64. {
  65. unsigned long tzic_addr;
  66. void __iomem *tzic_virt;
  67. if (mx51_revision() < MX51_CHIP_REV_2_0)
  68. tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
  69. else
  70. tzic_addr = MX51_TZIC_BASE_ADDR;
  71. tzic_virt = ioremap(tzic_addr, SZ_16K);
  72. if (!tzic_virt)
  73. panic("unable to map TZIC interrupt controller\n");
  74. tzic_init_irq(tzic_virt);
  75. imx51_register_gpios();
  76. }