proc_comm.h 7.1 KB

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  1. /* arch/arm/mach-msm/proc_comm.h
  2. *
  3. * Copyright (c) 2007 QUALCOMM Incorporated
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. */
  15. #ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_
  16. #define _ARCH_ARM_MACH_MSM_PROC_COMM_H_
  17. #include <linux/init.h>
  18. enum {
  19. PCOM_CMD_IDLE = 0x0,
  20. PCOM_CMD_DONE,
  21. PCOM_RESET_APPS,
  22. PCOM_RESET_CHIP,
  23. PCOM_CONFIG_NAND_MPU,
  24. PCOM_CONFIG_USB_CLKS,
  25. PCOM_GET_POWER_ON_STATUS,
  26. PCOM_GET_WAKE_UP_STATUS,
  27. PCOM_GET_BATT_LEVEL,
  28. PCOM_CHG_IS_CHARGING,
  29. PCOM_POWER_DOWN,
  30. PCOM_USB_PIN_CONFIG,
  31. PCOM_USB_PIN_SEL,
  32. PCOM_SET_RTC_ALARM,
  33. PCOM_NV_READ,
  34. PCOM_NV_WRITE,
  35. PCOM_GET_UUID_HIGH,
  36. PCOM_GET_UUID_LOW,
  37. PCOM_GET_HW_ENTROPY,
  38. PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE,
  39. PCOM_CLKCTL_RPC_ENABLE,
  40. PCOM_CLKCTL_RPC_DISABLE,
  41. PCOM_CLKCTL_RPC_RESET,
  42. PCOM_CLKCTL_RPC_SET_FLAGS,
  43. PCOM_CLKCTL_RPC_SET_RATE,
  44. PCOM_CLKCTL_RPC_MIN_RATE,
  45. PCOM_CLKCTL_RPC_MAX_RATE,
  46. PCOM_CLKCTL_RPC_RATE,
  47. PCOM_CLKCTL_RPC_PLL_REQUEST,
  48. PCOM_CLKCTL_RPC_ENABLED,
  49. PCOM_VREG_SWITCH,
  50. PCOM_VREG_SET_LEVEL,
  51. PCOM_GPIO_TLMM_CONFIG_GROUP,
  52. PCOM_GPIO_TLMM_UNCONFIG_GROUP,
  53. PCOM_NV_WRITE_BYTES_4_7,
  54. PCOM_CONFIG_DISP,
  55. PCOM_GET_FTM_BOOT_COUNT,
  56. PCOM_RPC_GPIO_TLMM_CONFIG_EX,
  57. PCOM_PM_MPP_CONFIG,
  58. PCOM_GPIO_IN,
  59. PCOM_GPIO_OUT,
  60. PCOM_RESET_MODEM,
  61. PCOM_RESET_CHIP_IMM,
  62. PCOM_PM_VID_EN,
  63. PCOM_VREG_PULLDOWN,
  64. PCOM_GET_MODEM_VERSION,
  65. PCOM_CLK_REGIME_SEC_RESET,
  66. PCOM_CLK_REGIME_SEC_RESET_ASSERT,
  67. PCOM_CLK_REGIME_SEC_RESET_DEASSERT,
  68. PCOM_CLK_REGIME_SEC_PLL_REQUEST_WRP,
  69. PCOM_CLK_REGIME_SEC_ENABLE,
  70. PCOM_CLK_REGIME_SEC_DISABLE,
  71. PCOM_CLK_REGIME_SEC_IS_ON,
  72. PCOM_CLK_REGIME_SEC_SEL_CLK_INV,
  73. PCOM_CLK_REGIME_SEC_SEL_CLK_SRC,
  74. PCOM_CLK_REGIME_SEC_SEL_CLK_DIV,
  75. PCOM_CLK_REGIME_SEC_ICODEC_CLK_ENABLE,
  76. PCOM_CLK_REGIME_SEC_ICODEC_CLK_DISABLE,
  77. PCOM_CLK_REGIME_SEC_SEL_SPEED,
  78. PCOM_CLK_REGIME_SEC_CONFIG_GP_CLK_WRP,
  79. PCOM_CLK_REGIME_SEC_CONFIG_MDH_CLK_WRP,
  80. PCOM_CLK_REGIME_SEC_USB_XTAL_ON,
  81. PCOM_CLK_REGIME_SEC_USB_XTAL_OFF,
  82. PCOM_CLK_REGIME_SEC_SET_QDSP_DME_MODE,
  83. PCOM_CLK_REGIME_SEC_SWITCH_ADSP_CLK,
  84. PCOM_CLK_REGIME_SEC_GET_MAX_ADSP_CLK_KHZ,
  85. PCOM_CLK_REGIME_SEC_GET_I2C_CLK_KHZ,
  86. PCOM_CLK_REGIME_SEC_MSM_GET_CLK_FREQ_KHZ,
  87. PCOM_CLK_REGIME_SEC_SEL_VFE_SRC,
  88. PCOM_CLK_REGIME_SEC_MSM_SEL_CAMCLK,
  89. PCOM_CLK_REGIME_SEC_MSM_SEL_LCDCLK,
  90. PCOM_CLK_REGIME_SEC_VFE_RAIL_OFF,
  91. PCOM_CLK_REGIME_SEC_VFE_RAIL_ON,
  92. PCOM_CLK_REGIME_SEC_GRP_RAIL_OFF,
  93. PCOM_CLK_REGIME_SEC_GRP_RAIL_ON,
  94. PCOM_CLK_REGIME_SEC_VDC_RAIL_OFF,
  95. PCOM_CLK_REGIME_SEC_VDC_RAIL_ON,
  96. PCOM_CLK_REGIME_SEC_LCD_CTRL,
  97. PCOM_CLK_REGIME_SEC_REGISTER_FOR_CPU_RESOURCE,
  98. PCOM_CLK_REGIME_SEC_DEREGISTER_FOR_CPU_RESOURCE,
  99. PCOM_CLK_REGIME_SEC_RESOURCE_REQUEST_WRP,
  100. PCOM_CLK_REGIME_MSM_SEC_SEL_CLK_OWNER,
  101. PCOM_CLK_REGIME_SEC_DEVMAN_REQUEST_WRP,
  102. PCOM_GPIO_CONFIG,
  103. PCOM_GPIO_CONFIGURE_GROUP,
  104. PCOM_GPIO_TLMM_SET_PORT,
  105. PCOM_GPIO_TLMM_CONFIG_EX,
  106. PCOM_SET_FTM_BOOT_COUNT,
  107. PCOM_RESERVED0,
  108. PCOM_RESERVED1,
  109. PCOM_CUSTOMER_CMD1,
  110. PCOM_CUSTOMER_CMD2,
  111. PCOM_CUSTOMER_CMD3,
  112. PCOM_CLK_REGIME_ENTER_APPSBL_CHG_MODE,
  113. PCOM_CLK_REGIME_EXIT_APPSBL_CHG_MODE,
  114. PCOM_CLK_REGIME_SEC_RAIL_DISABLE,
  115. PCOM_CLK_REGIME_SEC_RAIL_ENABLE,
  116. PCOM_CLK_REGIME_SEC_RAIL_CONTROL,
  117. PCOM_SET_SW_WATCHDOG_STATE,
  118. PCOM_PM_MPP_CONFIG_DIGITAL_INPUT,
  119. PCOM_PM_MPP_CONFIG_I_SINK,
  120. PCOM_RESERVED_101,
  121. PCOM_MSM_HSUSB_PHY_RESET,
  122. PCOM_GET_BATT_MV_LEVEL,
  123. PCOM_CHG_USB_IS_PC_CONNECTED,
  124. PCOM_CHG_USB_IS_CHARGER_CONNECTED,
  125. PCOM_CHG_USB_IS_DISCONNECTED,
  126. PCOM_CHG_USB_IS_AVAILABLE,
  127. PCOM_CLK_REGIME_SEC_MSM_SEL_FREQ,
  128. PCOM_CLK_REGIME_SEC_SET_PCLK_AXI_POLICY,
  129. PCOM_CLKCTL_RPC_RESET_ASSERT,
  130. PCOM_CLKCTL_RPC_RESET_DEASSERT,
  131. PCOM_CLKCTL_RPC_RAIL_ON,
  132. PCOM_CLKCTL_RPC_RAIL_OFF,
  133. PCOM_CLKCTL_RPC_RAIL_ENABLE,
  134. PCOM_CLKCTL_RPC_RAIL_DISABLE,
  135. PCOM_CLKCTL_RPC_RAIL_CONTROL,
  136. PCOM_CLKCTL_RPC_MIN_MSMC1,
  137. PCOM_NUM_CMDS,
  138. };
  139. enum {
  140. PCOM_INVALID_STATUS = 0x0,
  141. PCOM_READY,
  142. PCOM_CMD_RUNNING,
  143. PCOM_CMD_SUCCESS,
  144. PCOM_CMD_FAIL,
  145. PCOM_CMD_FAIL_FALSE_RETURNED,
  146. PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_SERVER,
  147. PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_CLIENT,
  148. PCOM_CMD_FAIL_CMD_UNREGISTERED,
  149. PCOM_CMD_FAIL_CMD_LOCKED,
  150. PCOM_CMD_FAIL_SERVER_NOT_YET_READY,
  151. PCOM_CMD_FAIL_BAD_DESTINATION,
  152. PCOM_CMD_FAIL_SERVER_RESET,
  153. PCOM_CMD_FAIL_SMSM_NOT_INIT,
  154. PCOM_CMD_FAIL_PROC_COMM_BUSY,
  155. PCOM_CMD_FAIL_PROC_COMM_NOT_INIT,
  156. };
  157. /* List of VREGs that support the Pull Down Resistor setting. */
  158. enum vreg_pdown_id {
  159. PM_VREG_PDOWN_MSMA_ID,
  160. PM_VREG_PDOWN_MSMP_ID,
  161. PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */
  162. PM_VREG_PDOWN_MSMC1_ID, /* Not supported in PM6620 */
  163. PM_VREG_PDOWN_MSMC2_ID, /* Supported in PM7500 only */
  164. PM_VREG_PDOWN_GP3_ID, /* Supported in PM7500 only */
  165. PM_VREG_PDOWN_MSME2_ID, /* Supported in PM7500 and Panoramix only */
  166. PM_VREG_PDOWN_GP4_ID, /* Supported in PM7500 only */
  167. PM_VREG_PDOWN_GP1_ID, /* Supported in PM7500 only */
  168. PM_VREG_PDOWN_TCXO_ID,
  169. PM_VREG_PDOWN_PA_ID,
  170. PM_VREG_PDOWN_RFTX_ID,
  171. PM_VREG_PDOWN_RFRX1_ID,
  172. PM_VREG_PDOWN_RFRX2_ID,
  173. PM_VREG_PDOWN_SYNT_ID,
  174. PM_VREG_PDOWN_WLAN_ID,
  175. PM_VREG_PDOWN_USB_ID,
  176. PM_VREG_PDOWN_MMC_ID,
  177. PM_VREG_PDOWN_RUIM_ID,
  178. PM_VREG_PDOWN_MSMC0_ID, /* Supported in PM6610 only */
  179. PM_VREG_PDOWN_GP2_ID, /* Supported in PM7500 only */
  180. PM_VREG_PDOWN_GP5_ID, /* Supported in PM7500 only */
  181. PM_VREG_PDOWN_GP6_ID, /* Supported in PM7500 only */
  182. PM_VREG_PDOWN_RF_ID,
  183. PM_VREG_PDOWN_RF_VCO_ID,
  184. PM_VREG_PDOWN_MPLL_ID,
  185. PM_VREG_PDOWN_S2_ID,
  186. PM_VREG_PDOWN_S3_ID,
  187. PM_VREG_PDOWN_RFUBM_ID,
  188. /* new for HAN */
  189. PM_VREG_PDOWN_RF1_ID,
  190. PM_VREG_PDOWN_RF2_ID,
  191. PM_VREG_PDOWN_RFA_ID,
  192. PM_VREG_PDOWN_CDC2_ID,
  193. PM_VREG_PDOWN_RFTX2_ID,
  194. PM_VREG_PDOWN_USIM_ID,
  195. PM_VREG_PDOWN_USB2P6_ID,
  196. PM_VREG_PDOWN_USB3P3_ID,
  197. PM_VREG_PDOWN_INVALID_ID,
  198. /* backward compatible enums only */
  199. PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID,
  200. PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID,
  201. PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID,
  202. PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID,
  203. PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID,
  204. PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID,
  205. PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID,
  206. PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID,
  207. PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID,
  208. PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID,
  209. PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID
  210. };
  211. enum {
  212. PCOM_CLKRGM_APPS_RESET_USB_PHY = 34,
  213. PCOM_CLKRGM_APPS_RESET_USBH = 37,
  214. };
  215. /* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */
  216. #define GPIO_ENABLE 0
  217. #define GPIO_DISABLE 1
  218. #define GPIO_INPUT 0
  219. #define GPIO_OUTPUT 1
  220. #define GPIO_NO_PULL 0
  221. #define GPIO_PULL_DOWN 1
  222. #define GPIO_KEEPER 2
  223. #define GPIO_PULL_UP 3
  224. #define GPIO_2MA 0
  225. #define GPIO_4MA 1
  226. #define GPIO_6MA 2
  227. #define GPIO_8MA 3
  228. #define GPIO_10MA 4
  229. #define GPIO_12MA 5
  230. #define GPIO_14MA 6
  231. #define GPIO_16MA 7
  232. #define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \
  233. ((((gpio) & 0x3FF) << 4) | \
  234. ((func) & 0xf) | \
  235. (((dir) & 0x1) << 14) | \
  236. (((pull) & 0x3) << 15) | \
  237. (((drvstr) & 0xF) << 17))
  238. int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2);
  239. void __init proc_comm_boot_wait(void);
  240. #endif