Home Explore Help
Register Sign In
phyus
/
linux-vybrid_public
8
0
Fork 0
Files Issues 0 Pull Requests 0 Wiki
Tree: 38a81da220
Branches Tags
linux-vybrid_pu...
/
arch
/
arm
/
mach-msm
/
devices-msm7x30.c

devices-msm7x30.c 4.7 KB
History Raw

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128 
  1. /*
    2. 

  2.  * Copyright (C) 2008 Google, Inc.
    3. 

  3.  * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
    4. 

  4.  *
    5. 

  5.  * This software is licensed under the terms of the GNU General Public
    6. 

  6.  * License version 2, as published by the Free Software Foundation, and
    7. 

  7.  * may be copied, distributed, and modified under those terms.
    8. 

  8.  *
    9. 

  9.  * This program is distributed in the hope that it will be useful,
    10. 

  10.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    11. 

  11.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    12. 

  12.  * GNU General Public License for more details.
    13. 

  13.  *
    14. 

  14.  */
    15. 

  15. 

  16. #include <linux/kernel.h>
    17. 

  17. #include <linux/platform_device.h>
    18. 

  18. 

  19. #include <linux/dma-mapping.h>
    20. 

  20. #include <mach/irqs.h>
    21. 

  21. #include <mach/msm_iomap.h>
    22. 

  22. #include <mach/dma.h>
    23. 

  23. #include <mach/board.h>
    24. 

  24. 

  25. #include "devices.h"
    26. 

  26. #include "smd_private.h"
    27. 

  27. 

  28. #include <asm/mach/flash.h>
    29. 

  29. 

  30. #include "clock-pcom.h"
    31. 

  31. 

  32. #include <mach/mmc.h>
    33. 

  33. 

  34. static struct resource resources_uart2[] = {
    35. 

  35. 	{
    36. 

  36. 		.start	= INT_UART2,
    37. 

  37. 		.end	= INT_UART2,
    38. 

  38. 		.flags	= IORESOURCE_IRQ,
    39. 

  39. 	},
    40. 

  40. 	{
    41. 

  41. 		.start	= MSM_UART2_PHYS,
    42. 

  42. 		.end	= MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
    43. 

  43. 		.flags	= IORESOURCE_MEM,
    44. 

  44. 	},
    45. 

  45. };
    46. 

  46. 

  47. struct platform_device msm_device_uart2 = {
    48. 

  48. 	.name	= "msm_serial",
    49. 

  49. 	.id	= 1,
    50. 

  50. 	.num_resources	= ARRAY_SIZE(resources_uart2),
    51. 

  51. 	.resource	= resources_uart2,
    52. 

  52. };
    53. 

  53. 

  54. struct clk msm_clocks_7x30[] = {
    55. 

  55. 	CLK_PCOM("adm_clk",	ADM_CLK,	NULL, 0),
    56. 

  56. 	CLK_PCOM("adsp_clk",	ADSP_CLK,	NULL, 0),
    57. 

  57. 	CLK_PCOM("cam_m_clk",	CAM_M_CLK,	NULL, 0),
    58. 

  58. 	CLK_PCOM("camif_pad_pclk",	CAMIF_PAD_P_CLK,	NULL, OFF),
    59. 

  59. 	CLK_PCOM("ebi1_clk",	EBI1_CLK,	NULL, CLK_MIN),
    60. 

  60. 	CLK_PCOM("ecodec_clk",	ECODEC_CLK,	NULL, 0),
    61. 

  61. 	CLK_PCOM("emdh_clk",	EMDH_CLK,	NULL, OFF | CLK_MINMAX),
    62. 

  62. 	CLK_PCOM("emdh_pclk",	EMDH_P_CLK,	NULL, OFF),
    63. 

  63. 	CLK_PCOM("gp_clk",	GP_CLK,		NULL, 0),
    64. 

  64. 	CLK_PCOM("grp_2d_clk",	GRP_2D_CLK,	NULL, 0),
    65. 

  65. 	CLK_PCOM("grp_2d_pclk",	GRP_2D_P_CLK,	NULL, 0),
    66. 

  66. 	CLK_PCOM("grp_clk",	GRP_3D_CLK,	NULL, 0),
    67. 

  67. 	CLK_PCOM("grp_pclk",	GRP_3D_P_CLK,	NULL, 0),
    68. 

  68. 	CLK_7X30S("grp_src_clk", GRP_3D_SRC_CLK, GRP_3D_CLK,	NULL, 0),
    69. 

  69. 	CLK_PCOM("hdmi_clk",	HDMI_CLK,	NULL, 0),
    70. 

  70. 	CLK_PCOM("imem_clk",	IMEM_CLK,	NULL, OFF),
    71. 

  71. 	CLK_PCOM("jpeg_clk",	JPEG_CLK,	NULL, OFF),
    72. 

  72. 	CLK_PCOM("jpeg_pclk",	JPEG_P_CLK,	NULL, OFF),
    73. 

  73. 	CLK_PCOM("lpa_codec_clk",	LPA_CODEC_CLK,		NULL, 0),
    74. 

  74. 	CLK_PCOM("lpa_core_clk",	LPA_CORE_CLK,		NULL, 0),
    75. 

  75. 	CLK_PCOM("lpa_pclk",		LPA_P_CLK,		NULL, 0),
    76. 

  76. 	CLK_PCOM("mdc_clk",	MDC_CLK,	NULL, 0),
    77. 

  77. 	CLK_PCOM("mddi_clk",	PMDH_CLK,	NULL, OFF | CLK_MINMAX),
    78. 

  78. 	CLK_PCOM("mddi_pclk",	PMDH_P_CLK,	NULL, 0),
    79. 

  79. 	CLK_PCOM("mdp_clk",	MDP_CLK,	NULL, OFF),
    80. 

  80. 	CLK_PCOM("mdp_pclk",	MDP_P_CLK,	NULL, 0),
    81. 

  81. 	CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
    82. 

  82. 	CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
    83. 

  83. 	CLK_PCOM("mdp_vsync_clk",	MDP_VSYNC_CLK,  NULL, 0),
    84. 

  84. 	CLK_PCOM("mfc_clk",		MFC_CLK,		NULL, 0),
    85. 

  85. 	CLK_PCOM("mfc_div2_clk",	MFC_DIV2_CLK,		NULL, 0),
    86. 

  86. 	CLK_PCOM("mfc_pclk",		MFC_P_CLK,		NULL, 0),
    87. 

  87. 	CLK_PCOM("mi2s_m_clk",		MI2S_M_CLK,  		NULL, 0),
    88. 

  88. 	CLK_PCOM("mi2s_s_clk",		MI2S_S_CLK,  		NULL, 0),
    89. 

  89. 	CLK_PCOM("mi2s_codec_rx_m_clk",	MI2S_CODEC_RX_M_CLK,  NULL, 0),
    90. 

  90. 	CLK_PCOM("mi2s_codec_rx_s_clk",	MI2S_CODEC_RX_S_CLK,  NULL, 0),
    91. 

  91. 	CLK_PCOM("mi2s_codec_tx_m_clk",	MI2S_CODEC_TX_M_CLK,  NULL, 0),
    92. 

  92. 	CLK_PCOM("mi2s_codec_tx_s_clk",	MI2S_CODEC_TX_S_CLK,  NULL, 0),
    93. 

  93. 	CLK_PCOM("pbus_clk",	PBUS_CLK,	NULL, CLK_MIN),
    94. 

  94. 	CLK_PCOM("pcm_clk",	PCM_CLK,	NULL, 0),
    95. 

  95. 	CLK_PCOM("rotator_clk",	AXI_ROTATOR_CLK,		NULL, 0),
    96. 

  96. 	CLK_PCOM("rotator_imem_clk",	ROTATOR_IMEM_CLK,	NULL, OFF),
    97. 

  97. 	CLK_PCOM("rotator_pclk",	ROTATOR_P_CLK,		NULL, OFF),
    98. 

  98. 	CLK_PCOM("sdac_clk",	SDAC_CLK,	NULL, OFF),
    99. 

  99. 	CLK_PCOM("spi_clk",	SPI_CLK,	NULL, 0),
    100. 

  100. 	CLK_PCOM("spi_pclk",	SPI_P_CLK,	NULL, 0),
    101. 

  101. 	CLK_7X30S("tv_src_clk",	TV_CLK, 	TV_ENC_CLK,	NULL, 0),
    102. 

  102. 	CLK_PCOM("tv_dac_clk",	TV_DAC_CLK,	NULL, 0),
    103. 

  103. 	CLK_PCOM("tv_enc_clk",	TV_ENC_CLK,	NULL, 0),
    104. 

  104. 	CLK_PCOM("uart_clk",	UART2_CLK,	&msm_device_uart2.dev, 0),
    105. 

  105. 	CLK_PCOM("usb_hs_clk",		USB_HS_CLK,		NULL, OFF),
    106. 

  106. 	CLK_PCOM("usb_hs_pclk",		USB_HS_P_CLK,		NULL, OFF),
    107. 

  107. 	CLK_PCOM("usb_hs_core_clk",	USB_HS_CORE_CLK,	NULL, OFF),
    108. 

  108. 	CLK_PCOM("usb_hs2_clk",		USB_HS2_CLK,		NULL, OFF),
    109. 

  109. 	CLK_PCOM("usb_hs2_pclk",	USB_HS2_P_CLK,		NULL, OFF),
    110. 

  110. 	CLK_PCOM("usb_hs2_core_clk",	USB_HS2_CORE_CLK,	NULL, OFF),
    111. 

  111. 	CLK_PCOM("usb_hs3_clk",		USB_HS3_CLK,		NULL, OFF),
    112. 

  112. 	CLK_PCOM("usb_hs3_pclk",	USB_HS3_P_CLK,		NULL, OFF),
    113. 

  113. 	CLK_PCOM("usb_hs3_core_clk",	USB_HS3_CORE_CLK,	NULL, OFF),
    114. 

  114. 	CLK_PCOM("vdc_clk",	VDC_CLK,	NULL, OFF | CLK_MIN),
    115. 

  115. 	CLK_PCOM("vfe_camif_clk",	VFE_CAMIF_CLK, 	NULL, 0),
    116. 

  116. 	CLK_PCOM("vfe_clk",	VFE_CLK,	NULL, 0),
    117. 

  117. 	CLK_PCOM("vfe_mdc_clk",	VFE_MDC_CLK,	NULL, 0),
    118. 

  118. 	CLK_PCOM("vfe_pclk",	VFE_P_CLK,	NULL, OFF),
    119. 

  119. 	CLK_PCOM("vpe_clk",	VPE_CLK,	NULL, 0),
    120. 

  120. 

  121. 	/* 7x30 v2 hardware only. */
    122. 

  122. 	CLK_PCOM("csi_clk",	CSI0_CLK,	NULL, 0),
    123. 

  123. 	CLK_PCOM("csi_pclk",	CSI0_P_CLK,	NULL, 0),
    124. 

  124. 	CLK_PCOM("csi_vfe_clk",	CSI0_VFE_CLK,	NULL, 0),
    125. 

  125. };
    126. 

  126. 

  127. unsigned msm_num_clocks_7x30 = ARRAY_SIZE(msm_clocks_7x30);
    128. 

  128.