devices-msm7x00.c 8.8 KB

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  1. /* linux/arch/arm/mach-msm/devices.c
  2. *
  3. * Copyright (C) 2008 Google, Inc.
  4. *
  5. * This software is licensed under the terms of the GNU General Public
  6. * License version 2, as published by the Free Software Foundation, and
  7. * may be copied, distributed, and modified under those terms.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/platform_device.h>
  17. #include <mach/irqs.h>
  18. #include <mach/msm_iomap.h>
  19. #include "devices.h"
  20. #include <asm/mach/flash.h>
  21. #include <linux/mtd/nand.h>
  22. #include <linux/mtd/partitions.h>
  23. #include "clock.h"
  24. #include <mach/mmc.h>
  25. static struct resource resources_uart1[] = {
  26. {
  27. .start = INT_UART1,
  28. .end = INT_UART1,
  29. .flags = IORESOURCE_IRQ,
  30. },
  31. {
  32. .start = MSM_UART1_PHYS,
  33. .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
  34. .flags = IORESOURCE_MEM,
  35. },
  36. };
  37. static struct resource resources_uart2[] = {
  38. {
  39. .start = INT_UART2,
  40. .end = INT_UART2,
  41. .flags = IORESOURCE_IRQ,
  42. },
  43. {
  44. .start = MSM_UART2_PHYS,
  45. .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
  46. .flags = IORESOURCE_MEM,
  47. },
  48. };
  49. static struct resource resources_uart3[] = {
  50. {
  51. .start = INT_UART3,
  52. .end = INT_UART3,
  53. .flags = IORESOURCE_IRQ,
  54. },
  55. {
  56. .start = MSM_UART3_PHYS,
  57. .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
  58. .flags = IORESOURCE_MEM,
  59. },
  60. };
  61. struct platform_device msm_device_uart1 = {
  62. .name = "msm_serial",
  63. .id = 0,
  64. .num_resources = ARRAY_SIZE(resources_uart1),
  65. .resource = resources_uart1,
  66. };
  67. struct platform_device msm_device_uart2 = {
  68. .name = "msm_serial",
  69. .id = 1,
  70. .num_resources = ARRAY_SIZE(resources_uart2),
  71. .resource = resources_uart2,
  72. };
  73. struct platform_device msm_device_uart3 = {
  74. .name = "msm_serial",
  75. .id = 2,
  76. .num_resources = ARRAY_SIZE(resources_uart3),
  77. .resource = resources_uart3,
  78. };
  79. static struct resource resources_i2c[] = {
  80. {
  81. .start = MSM_I2C_PHYS,
  82. .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
  83. .flags = IORESOURCE_MEM,
  84. },
  85. {
  86. .start = INT_PWB_I2C,
  87. .end = INT_PWB_I2C,
  88. .flags = IORESOURCE_IRQ,
  89. },
  90. };
  91. struct platform_device msm_device_i2c = {
  92. .name = "msm_i2c",
  93. .id = 0,
  94. .num_resources = ARRAY_SIZE(resources_i2c),
  95. .resource = resources_i2c,
  96. };
  97. static struct resource resources_hsusb[] = {
  98. {
  99. .start = MSM_HSUSB_PHYS,
  100. .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
  101. .flags = IORESOURCE_MEM,
  102. },
  103. {
  104. .start = INT_USB_HS,
  105. .end = INT_USB_HS,
  106. .flags = IORESOURCE_IRQ,
  107. },
  108. };
  109. struct platform_device msm_device_hsusb = {
  110. .name = "msm_hsusb",
  111. .id = -1,
  112. .num_resources = ARRAY_SIZE(resources_hsusb),
  113. .resource = resources_hsusb,
  114. .dev = {
  115. .coherent_dma_mask = 0xffffffff,
  116. },
  117. };
  118. struct flash_platform_data msm_nand_data = {
  119. .parts = NULL,
  120. .nr_parts = 0,
  121. };
  122. static struct resource resources_nand[] = {
  123. [0] = {
  124. .start = 7,
  125. .end = 7,
  126. .flags = IORESOURCE_DMA,
  127. },
  128. };
  129. struct platform_device msm_device_nand = {
  130. .name = "msm_nand",
  131. .id = -1,
  132. .num_resources = ARRAY_SIZE(resources_nand),
  133. .resource = resources_nand,
  134. .dev = {
  135. .platform_data = &msm_nand_data,
  136. },
  137. };
  138. struct platform_device msm_device_smd = {
  139. .name = "msm_smd",
  140. .id = -1,
  141. };
  142. static struct resource resources_sdc1[] = {
  143. {
  144. .start = MSM_SDC1_PHYS,
  145. .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. {
  149. .start = INT_SDC1_0,
  150. .end = INT_SDC1_0,
  151. .flags = IORESOURCE_IRQ,
  152. .name = "cmd_irq",
  153. },
  154. {
  155. .start = INT_SDC1_1,
  156. .end = INT_SDC1_1,
  157. .flags = IORESOURCE_IRQ,
  158. .name = "pio_irq",
  159. },
  160. {
  161. .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
  162. .name = "status_irq"
  163. },
  164. {
  165. .start = 8,
  166. .end = 8,
  167. .flags = IORESOURCE_DMA,
  168. },
  169. };
  170. static struct resource resources_sdc2[] = {
  171. {
  172. .start = MSM_SDC2_PHYS,
  173. .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
  174. .flags = IORESOURCE_MEM,
  175. },
  176. {
  177. .start = INT_SDC2_0,
  178. .end = INT_SDC2_0,
  179. .flags = IORESOURCE_IRQ,
  180. .name = "cmd_irq",
  181. },
  182. {
  183. .start = INT_SDC2_1,
  184. .end = INT_SDC2_1,
  185. .flags = IORESOURCE_IRQ,
  186. .name = "pio_irq",
  187. },
  188. {
  189. .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
  190. .name = "status_irq"
  191. },
  192. {
  193. .start = 8,
  194. .end = 8,
  195. .flags = IORESOURCE_DMA,
  196. },
  197. };
  198. static struct resource resources_sdc3[] = {
  199. {
  200. .start = MSM_SDC3_PHYS,
  201. .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
  202. .flags = IORESOURCE_MEM,
  203. },
  204. {
  205. .start = INT_SDC3_0,
  206. .end = INT_SDC3_0,
  207. .flags = IORESOURCE_IRQ,
  208. .name = "cmd_irq",
  209. },
  210. {
  211. .start = INT_SDC3_1,
  212. .end = INT_SDC3_1,
  213. .flags = IORESOURCE_IRQ,
  214. .name = "pio_irq",
  215. },
  216. {
  217. .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
  218. .name = "status_irq"
  219. },
  220. {
  221. .start = 8,
  222. .end = 8,
  223. .flags = IORESOURCE_DMA,
  224. },
  225. };
  226. static struct resource resources_sdc4[] = {
  227. {
  228. .start = MSM_SDC4_PHYS,
  229. .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. {
  233. .start = INT_SDC4_0,
  234. .end = INT_SDC4_0,
  235. .flags = IORESOURCE_IRQ,
  236. .name = "cmd_irq",
  237. },
  238. {
  239. .start = INT_SDC4_1,
  240. .end = INT_SDC4_1,
  241. .flags = IORESOURCE_IRQ,
  242. .name = "pio_irq",
  243. },
  244. {
  245. .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
  246. .name = "status_irq"
  247. },
  248. {
  249. .start = 8,
  250. .end = 8,
  251. .flags = IORESOURCE_DMA,
  252. },
  253. };
  254. struct platform_device msm_device_sdc1 = {
  255. .name = "msm_sdcc",
  256. .id = 1,
  257. .num_resources = ARRAY_SIZE(resources_sdc1),
  258. .resource = resources_sdc1,
  259. .dev = {
  260. .coherent_dma_mask = 0xffffffff,
  261. },
  262. };
  263. struct platform_device msm_device_sdc2 = {
  264. .name = "msm_sdcc",
  265. .id = 2,
  266. .num_resources = ARRAY_SIZE(resources_sdc2),
  267. .resource = resources_sdc2,
  268. .dev = {
  269. .coherent_dma_mask = 0xffffffff,
  270. },
  271. };
  272. struct platform_device msm_device_sdc3 = {
  273. .name = "msm_sdcc",
  274. .id = 3,
  275. .num_resources = ARRAY_SIZE(resources_sdc3),
  276. .resource = resources_sdc3,
  277. .dev = {
  278. .coherent_dma_mask = 0xffffffff,
  279. },
  280. };
  281. struct platform_device msm_device_sdc4 = {
  282. .name = "msm_sdcc",
  283. .id = 4,
  284. .num_resources = ARRAY_SIZE(resources_sdc4),
  285. .resource = resources_sdc4,
  286. .dev = {
  287. .coherent_dma_mask = 0xffffffff,
  288. },
  289. };
  290. static struct platform_device *msm_sdcc_devices[] __initdata = {
  291. &msm_device_sdc1,
  292. &msm_device_sdc2,
  293. &msm_device_sdc3,
  294. &msm_device_sdc4,
  295. };
  296. int __init msm_add_sdcc(unsigned int controller,
  297. struct msm_mmc_platform_data *plat,
  298. unsigned int stat_irq, unsigned long stat_irq_flags)
  299. {
  300. struct platform_device *pdev;
  301. struct resource *res;
  302. if (controller < 1 || controller > 4)
  303. return -EINVAL;
  304. pdev = msm_sdcc_devices[controller-1];
  305. pdev->dev.platform_data = plat;
  306. res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
  307. if (!res)
  308. return -EINVAL;
  309. else if (stat_irq) {
  310. res->start = res->end = stat_irq;
  311. res->flags &= ~IORESOURCE_DISABLED;
  312. res->flags |= stat_irq_flags;
  313. }
  314. return platform_device_register(pdev);
  315. }
  316. struct clk msm_clocks_7x01a[] = {
  317. CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
  318. CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
  319. CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0),
  320. CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
  321. CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
  322. CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF),
  323. CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
  324. CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF),
  325. CLK_PCOM("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
  326. CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
  327. CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
  328. CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
  329. CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
  330. CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
  331. CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0),
  332. CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
  333. CLK_PCOM("pmdh_clk", PMDH_CLK, NULL, OFF ),
  334. CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
  335. CLK_PCOM("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
  336. CLK_PCOM("sdc_pclk", SDC1_P_CLK, &msm_device_sdc1.dev, OFF),
  337. CLK_PCOM("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
  338. CLK_PCOM("sdc_pclk", SDC2_P_CLK, &msm_device_sdc2.dev, OFF),
  339. CLK_PCOM("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
  340. CLK_PCOM("sdc_pclk", SDC3_P_CLK, &msm_device_sdc3.dev, OFF),
  341. CLK_PCOM("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
  342. CLK_PCOM("sdc_pclk", SDC4_P_CLK, &msm_device_sdc4.dev, OFF),
  343. CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
  344. CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
  345. CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
  346. CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
  347. CLK_PCOM("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
  348. CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
  349. CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
  350. CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF),
  351. CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0),
  352. CLK_PCOM("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
  353. CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, &msm_device_hsusb.dev, OFF),
  354. CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
  355. CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ),
  356. CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
  357. CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
  358. };
  359. unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);