aspenite.c 3.7 KB

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  1. /*
  2. * linux/arch/arm/mach-mmp/aspenite.c
  3. *
  4. * Support for the Marvell PXA168-based Aspenite and Zylonite2
  5. * Development Platform.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * publishhed by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/smc91x.h>
  15. #include <linux/mtd/mtd.h>
  16. #include <linux/mtd/partitions.h>
  17. #include <linux/mtd/nand.h>
  18. #include <asm/mach-types.h>
  19. #include <asm/mach/arch.h>
  20. #include <mach/addr-map.h>
  21. #include <mach/mfp-pxa168.h>
  22. #include <mach/pxa168.h>
  23. #include <mach/gpio.h>
  24. #include "common.h"
  25. static unsigned long common_pin_config[] __initdata = {
  26. /* Data Flash Interface */
  27. GPIO0_DFI_D15,
  28. GPIO1_DFI_D14,
  29. GPIO2_DFI_D13,
  30. GPIO3_DFI_D12,
  31. GPIO4_DFI_D11,
  32. GPIO5_DFI_D10,
  33. GPIO6_DFI_D9,
  34. GPIO7_DFI_D8,
  35. GPIO8_DFI_D7,
  36. GPIO9_DFI_D6,
  37. GPIO10_DFI_D5,
  38. GPIO11_DFI_D4,
  39. GPIO12_DFI_D3,
  40. GPIO13_DFI_D2,
  41. GPIO14_DFI_D1,
  42. GPIO15_DFI_D0,
  43. /* Static Memory Controller */
  44. GPIO18_SMC_nCS0,
  45. GPIO34_SMC_nCS1,
  46. GPIO23_SMC_nLUA,
  47. GPIO25_SMC_nLLA,
  48. GPIO28_SMC_RDY,
  49. GPIO29_SMC_SCLK,
  50. GPIO35_SMC_BE1,
  51. GPIO36_SMC_BE2,
  52. GPIO27_GPIO, /* Ethernet IRQ */
  53. /* UART1 */
  54. GPIO107_UART1_RXD,
  55. GPIO108_UART1_TXD,
  56. /* SSP1 */
  57. GPIO113_I2S_MCLK,
  58. GPIO114_I2S_FRM,
  59. GPIO115_I2S_BCLK,
  60. GPIO116_I2S_RXD,
  61. GPIO117_I2S_TXD,
  62. };
  63. static struct smc91x_platdata smc91x_info = {
  64. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  65. };
  66. static struct resource smc91x_resources[] = {
  67. [0] = {
  68. .start = SMC_CS1_PHYS_BASE + 0x300,
  69. .end = SMC_CS1_PHYS_BASE + 0xfffff,
  70. .flags = IORESOURCE_MEM,
  71. },
  72. [1] = {
  73. .start = gpio_to_irq(27),
  74. .end = gpio_to_irq(27),
  75. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  76. }
  77. };
  78. static struct platform_device smc91x_device = {
  79. .name = "smc91x",
  80. .id = 0,
  81. .dev = {
  82. .platform_data = &smc91x_info,
  83. },
  84. .num_resources = ARRAY_SIZE(smc91x_resources),
  85. .resource = smc91x_resources,
  86. };
  87. static struct mtd_partition aspenite_nand_partitions[] = {
  88. {
  89. .name = "bootloader",
  90. .offset = 0,
  91. .size = SZ_1M,
  92. .mask_flags = MTD_WRITEABLE,
  93. }, {
  94. .name = "reserved",
  95. .offset = MTDPART_OFS_APPEND,
  96. .size = SZ_128K,
  97. .mask_flags = MTD_WRITEABLE,
  98. }, {
  99. .name = "reserved",
  100. .offset = MTDPART_OFS_APPEND,
  101. .size = SZ_8M,
  102. .mask_flags = MTD_WRITEABLE,
  103. }, {
  104. .name = "kernel",
  105. .offset = MTDPART_OFS_APPEND,
  106. .size = (SZ_2M + SZ_1M),
  107. .mask_flags = 0,
  108. }, {
  109. .name = "filesystem",
  110. .offset = MTDPART_OFS_APPEND,
  111. .size = SZ_48M,
  112. .mask_flags = 0,
  113. }
  114. };
  115. static struct pxa3xx_nand_platform_data aspenite_nand_info = {
  116. .enable_arbiter = 1,
  117. .parts = aspenite_nand_partitions,
  118. .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
  119. };
  120. static struct i2c_board_info aspenite_i2c_info[] __initdata = {
  121. { I2C_BOARD_INFO("wm8753", 0x1b), },
  122. };
  123. static void __init common_init(void)
  124. {
  125. mfp_config(ARRAY_AND_SIZE(common_pin_config));
  126. /* on-chip devices */
  127. pxa168_add_uart(1);
  128. pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
  129. pxa168_add_ssp(1);
  130. pxa168_add_nand(&aspenite_nand_info);
  131. /* off-chip devices */
  132. platform_device_register(&smc91x_device);
  133. }
  134. MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
  135. .phys_io = APB_PHYS_BASE,
  136. .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
  137. .map_io = mmp_map_io,
  138. .init_irq = pxa168_init_irq,
  139. .timer = &pxa168_timer,
  140. .init_machine = common_init,
  141. MACHINE_END
  142. MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
  143. .phys_io = APB_PHYS_BASE,
  144. .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
  145. .map_io = mmp_map_io,
  146. .init_irq = pxa168_init_irq,
  147. .timer = &pxa168_timer,
  148. .init_machine = common_init,
  149. MACHINE_END