common.c 27 KB

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  1. /*
  2. * arch/arm/mach-kirkwood/common.c
  3. *
  4. * Core functions for Marvell Kirkwood SoCs
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/serial_8250.h>
  14. #include <linux/mbus.h>
  15. #include <linux/mv643xx_eth.h>
  16. #include <linux/mv643xx_i2c.h>
  17. #include <linux/ata_platform.h>
  18. #include <linux/mtd/nand.h>
  19. #include <linux/spi/orion_spi.h>
  20. #include <net/dsa.h>
  21. #include <asm/page.h>
  22. #include <asm/timex.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/time.h>
  25. #include <mach/kirkwood.h>
  26. #include <mach/bridge-regs.h>
  27. #include <plat/audio.h>
  28. #include <plat/cache-feroceon-l2.h>
  29. #include <plat/ehci-orion.h>
  30. #include <plat/mvsdio.h>
  31. #include <plat/mv_xor.h>
  32. #include <plat/orion_nand.h>
  33. #include <plat/orion_wdt.h>
  34. #include <plat/time.h>
  35. #include "common.h"
  36. /*****************************************************************************
  37. * I/O Address Mapping
  38. ****************************************************************************/
  39. static struct map_desc kirkwood_io_desc[] __initdata = {
  40. {
  41. .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
  42. .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
  43. .length = KIRKWOOD_PCIE_IO_SIZE,
  44. .type = MT_DEVICE,
  45. }, {
  46. .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
  47. .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
  48. .length = KIRKWOOD_PCIE1_IO_SIZE,
  49. .type = MT_DEVICE,
  50. }, {
  51. .virtual = KIRKWOOD_REGS_VIRT_BASE,
  52. .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  53. .length = KIRKWOOD_REGS_SIZE,
  54. .type = MT_DEVICE,
  55. },
  56. };
  57. void __init kirkwood_map_io(void)
  58. {
  59. iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  60. }
  61. /*
  62. * Default clock control bits. Any bit _not_ set in this variable
  63. * will be cleared from the hardware after platform devices have been
  64. * registered. Some reserved bits must be set to 1.
  65. */
  66. unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
  67. /*****************************************************************************
  68. * EHCI
  69. ****************************************************************************/
  70. static struct orion_ehci_data kirkwood_ehci_data = {
  71. .dram = &kirkwood_mbus_dram_info,
  72. .phy_version = EHCI_PHY_NA,
  73. };
  74. static u64 ehci_dmamask = 0xffffffffUL;
  75. /*****************************************************************************
  76. * EHCI0
  77. ****************************************************************************/
  78. static struct resource kirkwood_ehci_resources[] = {
  79. {
  80. .start = USB_PHYS_BASE,
  81. .end = USB_PHYS_BASE + 0x0fff,
  82. .flags = IORESOURCE_MEM,
  83. }, {
  84. .start = IRQ_KIRKWOOD_USB,
  85. .end = IRQ_KIRKWOOD_USB,
  86. .flags = IORESOURCE_IRQ,
  87. },
  88. };
  89. static struct platform_device kirkwood_ehci = {
  90. .name = "orion-ehci",
  91. .id = 0,
  92. .dev = {
  93. .dma_mask = &ehci_dmamask,
  94. .coherent_dma_mask = 0xffffffff,
  95. .platform_data = &kirkwood_ehci_data,
  96. },
  97. .resource = kirkwood_ehci_resources,
  98. .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
  99. };
  100. void __init kirkwood_ehci_init(void)
  101. {
  102. kirkwood_clk_ctrl |= CGC_USB0;
  103. platform_device_register(&kirkwood_ehci);
  104. }
  105. /*****************************************************************************
  106. * GE00
  107. ****************************************************************************/
  108. struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
  109. .dram = &kirkwood_mbus_dram_info,
  110. };
  111. static struct resource kirkwood_ge00_shared_resources[] = {
  112. {
  113. .name = "ge00 base",
  114. .start = GE00_PHYS_BASE + 0x2000,
  115. .end = GE00_PHYS_BASE + 0x3fff,
  116. .flags = IORESOURCE_MEM,
  117. }, {
  118. .name = "ge00 err irq",
  119. .start = IRQ_KIRKWOOD_GE00_ERR,
  120. .end = IRQ_KIRKWOOD_GE00_ERR,
  121. .flags = IORESOURCE_IRQ,
  122. },
  123. };
  124. static struct platform_device kirkwood_ge00_shared = {
  125. .name = MV643XX_ETH_SHARED_NAME,
  126. .id = 0,
  127. .dev = {
  128. .platform_data = &kirkwood_ge00_shared_data,
  129. },
  130. .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
  131. .resource = kirkwood_ge00_shared_resources,
  132. };
  133. static struct resource kirkwood_ge00_resources[] = {
  134. {
  135. .name = "ge00 irq",
  136. .start = IRQ_KIRKWOOD_GE00_SUM,
  137. .end = IRQ_KIRKWOOD_GE00_SUM,
  138. .flags = IORESOURCE_IRQ,
  139. },
  140. };
  141. static struct platform_device kirkwood_ge00 = {
  142. .name = MV643XX_ETH_NAME,
  143. .id = 0,
  144. .num_resources = 1,
  145. .resource = kirkwood_ge00_resources,
  146. .dev = {
  147. .coherent_dma_mask = 0xffffffff,
  148. },
  149. };
  150. void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  151. {
  152. kirkwood_clk_ctrl |= CGC_GE0;
  153. eth_data->shared = &kirkwood_ge00_shared;
  154. kirkwood_ge00.dev.platform_data = eth_data;
  155. platform_device_register(&kirkwood_ge00_shared);
  156. platform_device_register(&kirkwood_ge00);
  157. }
  158. /*****************************************************************************
  159. * GE01
  160. ****************************************************************************/
  161. struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
  162. .dram = &kirkwood_mbus_dram_info,
  163. .shared_smi = &kirkwood_ge00_shared,
  164. };
  165. static struct resource kirkwood_ge01_shared_resources[] = {
  166. {
  167. .name = "ge01 base",
  168. .start = GE01_PHYS_BASE + 0x2000,
  169. .end = GE01_PHYS_BASE + 0x3fff,
  170. .flags = IORESOURCE_MEM,
  171. }, {
  172. .name = "ge01 err irq",
  173. .start = IRQ_KIRKWOOD_GE01_ERR,
  174. .end = IRQ_KIRKWOOD_GE01_ERR,
  175. .flags = IORESOURCE_IRQ,
  176. },
  177. };
  178. static struct platform_device kirkwood_ge01_shared = {
  179. .name = MV643XX_ETH_SHARED_NAME,
  180. .id = 1,
  181. .dev = {
  182. .platform_data = &kirkwood_ge01_shared_data,
  183. },
  184. .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
  185. .resource = kirkwood_ge01_shared_resources,
  186. };
  187. static struct resource kirkwood_ge01_resources[] = {
  188. {
  189. .name = "ge01 irq",
  190. .start = IRQ_KIRKWOOD_GE01_SUM,
  191. .end = IRQ_KIRKWOOD_GE01_SUM,
  192. .flags = IORESOURCE_IRQ,
  193. },
  194. };
  195. static struct platform_device kirkwood_ge01 = {
  196. .name = MV643XX_ETH_NAME,
  197. .id = 1,
  198. .num_resources = 1,
  199. .resource = kirkwood_ge01_resources,
  200. .dev = {
  201. .coherent_dma_mask = 0xffffffff,
  202. },
  203. };
  204. void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
  205. {
  206. kirkwood_clk_ctrl |= CGC_GE1;
  207. eth_data->shared = &kirkwood_ge01_shared;
  208. kirkwood_ge01.dev.platform_data = eth_data;
  209. platform_device_register(&kirkwood_ge01_shared);
  210. platform_device_register(&kirkwood_ge01);
  211. }
  212. /*****************************************************************************
  213. * Ethernet switch
  214. ****************************************************************************/
  215. static struct resource kirkwood_switch_resources[] = {
  216. {
  217. .start = 0,
  218. .end = 0,
  219. .flags = IORESOURCE_IRQ,
  220. },
  221. };
  222. static struct platform_device kirkwood_switch_device = {
  223. .name = "dsa",
  224. .id = 0,
  225. .num_resources = 0,
  226. .resource = kirkwood_switch_resources,
  227. };
  228. void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
  229. {
  230. int i;
  231. if (irq != NO_IRQ) {
  232. kirkwood_switch_resources[0].start = irq;
  233. kirkwood_switch_resources[0].end = irq;
  234. kirkwood_switch_device.num_resources = 1;
  235. }
  236. d->netdev = &kirkwood_ge00.dev;
  237. for (i = 0; i < d->nr_chips; i++)
  238. d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
  239. kirkwood_switch_device.dev.platform_data = d;
  240. platform_device_register(&kirkwood_switch_device);
  241. }
  242. /*****************************************************************************
  243. * NAND flash
  244. ****************************************************************************/
  245. static struct resource kirkwood_nand_resource = {
  246. .flags = IORESOURCE_MEM,
  247. .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
  248. .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
  249. KIRKWOOD_NAND_MEM_SIZE - 1,
  250. };
  251. static struct orion_nand_data kirkwood_nand_data = {
  252. .cle = 0,
  253. .ale = 1,
  254. .width = 8,
  255. };
  256. static struct platform_device kirkwood_nand_flash = {
  257. .name = "orion_nand",
  258. .id = -1,
  259. .dev = {
  260. .platform_data = &kirkwood_nand_data,
  261. },
  262. .resource = &kirkwood_nand_resource,
  263. .num_resources = 1,
  264. };
  265. void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
  266. int chip_delay)
  267. {
  268. kirkwood_clk_ctrl |= CGC_RUNIT;
  269. kirkwood_nand_data.parts = parts;
  270. kirkwood_nand_data.nr_parts = nr_parts;
  271. kirkwood_nand_data.chip_delay = chip_delay;
  272. platform_device_register(&kirkwood_nand_flash);
  273. }
  274. void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
  275. int (*dev_ready)(struct mtd_info *))
  276. {
  277. kirkwood_clk_ctrl |= CGC_RUNIT;
  278. kirkwood_nand_data.parts = parts;
  279. kirkwood_nand_data.nr_parts = nr_parts;
  280. kirkwood_nand_data.dev_ready = dev_ready;
  281. platform_device_register(&kirkwood_nand_flash);
  282. }
  283. /*****************************************************************************
  284. * SoC RTC
  285. ****************************************************************************/
  286. static struct resource kirkwood_rtc_resource = {
  287. .start = RTC_PHYS_BASE,
  288. .end = RTC_PHYS_BASE + SZ_16 - 1,
  289. .flags = IORESOURCE_MEM,
  290. };
  291. static void __init kirkwood_rtc_init(void)
  292. {
  293. platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
  294. }
  295. /*****************************************************************************
  296. * SATA
  297. ****************************************************************************/
  298. static struct resource kirkwood_sata_resources[] = {
  299. {
  300. .name = "sata base",
  301. .start = SATA_PHYS_BASE,
  302. .end = SATA_PHYS_BASE + 0x5000 - 1,
  303. .flags = IORESOURCE_MEM,
  304. }, {
  305. .name = "sata irq",
  306. .start = IRQ_KIRKWOOD_SATA,
  307. .end = IRQ_KIRKWOOD_SATA,
  308. .flags = IORESOURCE_IRQ,
  309. },
  310. };
  311. static struct platform_device kirkwood_sata = {
  312. .name = "sata_mv",
  313. .id = 0,
  314. .dev = {
  315. .coherent_dma_mask = 0xffffffff,
  316. },
  317. .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
  318. .resource = kirkwood_sata_resources,
  319. };
  320. void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
  321. {
  322. kirkwood_clk_ctrl |= CGC_SATA0;
  323. if (sata_data->n_ports > 1)
  324. kirkwood_clk_ctrl |= CGC_SATA1;
  325. sata_data->dram = &kirkwood_mbus_dram_info;
  326. kirkwood_sata.dev.platform_data = sata_data;
  327. platform_device_register(&kirkwood_sata);
  328. }
  329. /*****************************************************************************
  330. * SD/SDIO/MMC
  331. ****************************************************************************/
  332. static struct resource mvsdio_resources[] = {
  333. [0] = {
  334. .start = SDIO_PHYS_BASE,
  335. .end = SDIO_PHYS_BASE + SZ_1K - 1,
  336. .flags = IORESOURCE_MEM,
  337. },
  338. [1] = {
  339. .start = IRQ_KIRKWOOD_SDIO,
  340. .end = IRQ_KIRKWOOD_SDIO,
  341. .flags = IORESOURCE_IRQ,
  342. },
  343. };
  344. static u64 mvsdio_dmamask = 0xffffffffUL;
  345. static struct platform_device kirkwood_sdio = {
  346. .name = "mvsdio",
  347. .id = -1,
  348. .dev = {
  349. .dma_mask = &mvsdio_dmamask,
  350. .coherent_dma_mask = 0xffffffff,
  351. },
  352. .num_resources = ARRAY_SIZE(mvsdio_resources),
  353. .resource = mvsdio_resources,
  354. };
  355. void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
  356. {
  357. u32 dev, rev;
  358. kirkwood_pcie_id(&dev, &rev);
  359. if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
  360. mvsdio_data->clock = 100000000;
  361. else
  362. mvsdio_data->clock = 200000000;
  363. mvsdio_data->dram = &kirkwood_mbus_dram_info;
  364. kirkwood_clk_ctrl |= CGC_SDIO;
  365. kirkwood_sdio.dev.platform_data = mvsdio_data;
  366. platform_device_register(&kirkwood_sdio);
  367. }
  368. /*****************************************************************************
  369. * SPI
  370. ****************************************************************************/
  371. static struct orion_spi_info kirkwood_spi_plat_data = {
  372. };
  373. static struct resource kirkwood_spi_resources[] = {
  374. {
  375. .start = SPI_PHYS_BASE,
  376. .end = SPI_PHYS_BASE + SZ_512 - 1,
  377. .flags = IORESOURCE_MEM,
  378. },
  379. };
  380. static struct platform_device kirkwood_spi = {
  381. .name = "orion_spi",
  382. .id = 0,
  383. .resource = kirkwood_spi_resources,
  384. .dev = {
  385. .platform_data = &kirkwood_spi_plat_data,
  386. },
  387. .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
  388. };
  389. void __init kirkwood_spi_init()
  390. {
  391. kirkwood_clk_ctrl |= CGC_RUNIT;
  392. platform_device_register(&kirkwood_spi);
  393. }
  394. /*****************************************************************************
  395. * I2C
  396. ****************************************************************************/
  397. static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
  398. .freq_m = 8, /* assumes 166 MHz TCLK */
  399. .freq_n = 3,
  400. .timeout = 1000, /* Default timeout of 1 second */
  401. };
  402. static struct resource kirkwood_i2c_resources[] = {
  403. {
  404. .start = I2C_PHYS_BASE,
  405. .end = I2C_PHYS_BASE + 0x1f,
  406. .flags = IORESOURCE_MEM,
  407. }, {
  408. .start = IRQ_KIRKWOOD_TWSI,
  409. .end = IRQ_KIRKWOOD_TWSI,
  410. .flags = IORESOURCE_IRQ,
  411. },
  412. };
  413. static struct platform_device kirkwood_i2c = {
  414. .name = MV64XXX_I2C_CTLR_NAME,
  415. .id = 0,
  416. .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
  417. .resource = kirkwood_i2c_resources,
  418. .dev = {
  419. .platform_data = &kirkwood_i2c_pdata,
  420. },
  421. };
  422. void __init kirkwood_i2c_init(void)
  423. {
  424. platform_device_register(&kirkwood_i2c);
  425. }
  426. /*****************************************************************************
  427. * UART0
  428. ****************************************************************************/
  429. static struct plat_serial8250_port kirkwood_uart0_data[] = {
  430. {
  431. .mapbase = UART0_PHYS_BASE,
  432. .membase = (char *)UART0_VIRT_BASE,
  433. .irq = IRQ_KIRKWOOD_UART_0,
  434. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  435. .iotype = UPIO_MEM,
  436. .regshift = 2,
  437. .uartclk = 0,
  438. }, {
  439. },
  440. };
  441. static struct resource kirkwood_uart0_resources[] = {
  442. {
  443. .start = UART0_PHYS_BASE,
  444. .end = UART0_PHYS_BASE + 0xff,
  445. .flags = IORESOURCE_MEM,
  446. }, {
  447. .start = IRQ_KIRKWOOD_UART_0,
  448. .end = IRQ_KIRKWOOD_UART_0,
  449. .flags = IORESOURCE_IRQ,
  450. },
  451. };
  452. static struct platform_device kirkwood_uart0 = {
  453. .name = "serial8250",
  454. .id = 0,
  455. .dev = {
  456. .platform_data = kirkwood_uart0_data,
  457. },
  458. .resource = kirkwood_uart0_resources,
  459. .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
  460. };
  461. void __init kirkwood_uart0_init(void)
  462. {
  463. platform_device_register(&kirkwood_uart0);
  464. }
  465. /*****************************************************************************
  466. * UART1
  467. ****************************************************************************/
  468. static struct plat_serial8250_port kirkwood_uart1_data[] = {
  469. {
  470. .mapbase = UART1_PHYS_BASE,
  471. .membase = (char *)UART1_VIRT_BASE,
  472. .irq = IRQ_KIRKWOOD_UART_1,
  473. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  474. .iotype = UPIO_MEM,
  475. .regshift = 2,
  476. .uartclk = 0,
  477. }, {
  478. },
  479. };
  480. static struct resource kirkwood_uart1_resources[] = {
  481. {
  482. .start = UART1_PHYS_BASE,
  483. .end = UART1_PHYS_BASE + 0xff,
  484. .flags = IORESOURCE_MEM,
  485. }, {
  486. .start = IRQ_KIRKWOOD_UART_1,
  487. .end = IRQ_KIRKWOOD_UART_1,
  488. .flags = IORESOURCE_IRQ,
  489. },
  490. };
  491. static struct platform_device kirkwood_uart1 = {
  492. .name = "serial8250",
  493. .id = 1,
  494. .dev = {
  495. .platform_data = kirkwood_uart1_data,
  496. },
  497. .resource = kirkwood_uart1_resources,
  498. .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
  499. };
  500. void __init kirkwood_uart1_init(void)
  501. {
  502. platform_device_register(&kirkwood_uart1);
  503. }
  504. /*****************************************************************************
  505. * Cryptographic Engines and Security Accelerator (CESA)
  506. ****************************************************************************/
  507. static struct resource kirkwood_crypto_res[] = {
  508. {
  509. .name = "regs",
  510. .start = CRYPTO_PHYS_BASE,
  511. .end = CRYPTO_PHYS_BASE + 0xffff,
  512. .flags = IORESOURCE_MEM,
  513. }, {
  514. .name = "sram",
  515. .start = KIRKWOOD_SRAM_PHYS_BASE,
  516. .end = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
  517. .flags = IORESOURCE_MEM,
  518. }, {
  519. .name = "crypto interrupt",
  520. .start = IRQ_KIRKWOOD_CRYPTO,
  521. .end = IRQ_KIRKWOOD_CRYPTO,
  522. .flags = IORESOURCE_IRQ,
  523. },
  524. };
  525. static struct platform_device kirkwood_crypto_device = {
  526. .name = "mv_crypto",
  527. .id = -1,
  528. .num_resources = ARRAY_SIZE(kirkwood_crypto_res),
  529. .resource = kirkwood_crypto_res,
  530. };
  531. void __init kirkwood_crypto_init(void)
  532. {
  533. kirkwood_clk_ctrl |= CGC_CRYPTO;
  534. platform_device_register(&kirkwood_crypto_device);
  535. }
  536. /*****************************************************************************
  537. * XOR
  538. ****************************************************************************/
  539. static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
  540. .dram = &kirkwood_mbus_dram_info,
  541. };
  542. static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
  543. /*****************************************************************************
  544. * XOR0
  545. ****************************************************************************/
  546. static struct resource kirkwood_xor0_shared_resources[] = {
  547. {
  548. .name = "xor 0 low",
  549. .start = XOR0_PHYS_BASE,
  550. .end = XOR0_PHYS_BASE + 0xff,
  551. .flags = IORESOURCE_MEM,
  552. }, {
  553. .name = "xor 0 high",
  554. .start = XOR0_HIGH_PHYS_BASE,
  555. .end = XOR0_HIGH_PHYS_BASE + 0xff,
  556. .flags = IORESOURCE_MEM,
  557. },
  558. };
  559. static struct platform_device kirkwood_xor0_shared = {
  560. .name = MV_XOR_SHARED_NAME,
  561. .id = 0,
  562. .dev = {
  563. .platform_data = &kirkwood_xor_shared_data,
  564. },
  565. .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
  566. .resource = kirkwood_xor0_shared_resources,
  567. };
  568. static struct resource kirkwood_xor00_resources[] = {
  569. [0] = {
  570. .start = IRQ_KIRKWOOD_XOR_00,
  571. .end = IRQ_KIRKWOOD_XOR_00,
  572. .flags = IORESOURCE_IRQ,
  573. },
  574. };
  575. static struct mv_xor_platform_data kirkwood_xor00_data = {
  576. .shared = &kirkwood_xor0_shared,
  577. .hw_id = 0,
  578. .pool_size = PAGE_SIZE,
  579. };
  580. static struct platform_device kirkwood_xor00_channel = {
  581. .name = MV_XOR_NAME,
  582. .id = 0,
  583. .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
  584. .resource = kirkwood_xor00_resources,
  585. .dev = {
  586. .dma_mask = &kirkwood_xor_dmamask,
  587. .coherent_dma_mask = DMA_BIT_MASK(64),
  588. .platform_data = &kirkwood_xor00_data,
  589. },
  590. };
  591. static struct resource kirkwood_xor01_resources[] = {
  592. [0] = {
  593. .start = IRQ_KIRKWOOD_XOR_01,
  594. .end = IRQ_KIRKWOOD_XOR_01,
  595. .flags = IORESOURCE_IRQ,
  596. },
  597. };
  598. static struct mv_xor_platform_data kirkwood_xor01_data = {
  599. .shared = &kirkwood_xor0_shared,
  600. .hw_id = 1,
  601. .pool_size = PAGE_SIZE,
  602. };
  603. static struct platform_device kirkwood_xor01_channel = {
  604. .name = MV_XOR_NAME,
  605. .id = 1,
  606. .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
  607. .resource = kirkwood_xor01_resources,
  608. .dev = {
  609. .dma_mask = &kirkwood_xor_dmamask,
  610. .coherent_dma_mask = DMA_BIT_MASK(64),
  611. .platform_data = &kirkwood_xor01_data,
  612. },
  613. };
  614. static void __init kirkwood_xor0_init(void)
  615. {
  616. kirkwood_clk_ctrl |= CGC_XOR0;
  617. platform_device_register(&kirkwood_xor0_shared);
  618. /*
  619. * two engines can't do memset simultaneously, this limitation
  620. * satisfied by removing memset support from one of the engines.
  621. */
  622. dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
  623. dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
  624. platform_device_register(&kirkwood_xor00_channel);
  625. dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
  626. dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
  627. dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
  628. platform_device_register(&kirkwood_xor01_channel);
  629. }
  630. /*****************************************************************************
  631. * XOR1
  632. ****************************************************************************/
  633. static struct resource kirkwood_xor1_shared_resources[] = {
  634. {
  635. .name = "xor 1 low",
  636. .start = XOR1_PHYS_BASE,
  637. .end = XOR1_PHYS_BASE + 0xff,
  638. .flags = IORESOURCE_MEM,
  639. }, {
  640. .name = "xor 1 high",
  641. .start = XOR1_HIGH_PHYS_BASE,
  642. .end = XOR1_HIGH_PHYS_BASE + 0xff,
  643. .flags = IORESOURCE_MEM,
  644. },
  645. };
  646. static struct platform_device kirkwood_xor1_shared = {
  647. .name = MV_XOR_SHARED_NAME,
  648. .id = 1,
  649. .dev = {
  650. .platform_data = &kirkwood_xor_shared_data,
  651. },
  652. .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
  653. .resource = kirkwood_xor1_shared_resources,
  654. };
  655. static struct resource kirkwood_xor10_resources[] = {
  656. [0] = {
  657. .start = IRQ_KIRKWOOD_XOR_10,
  658. .end = IRQ_KIRKWOOD_XOR_10,
  659. .flags = IORESOURCE_IRQ,
  660. },
  661. };
  662. static struct mv_xor_platform_data kirkwood_xor10_data = {
  663. .shared = &kirkwood_xor1_shared,
  664. .hw_id = 0,
  665. .pool_size = PAGE_SIZE,
  666. };
  667. static struct platform_device kirkwood_xor10_channel = {
  668. .name = MV_XOR_NAME,
  669. .id = 2,
  670. .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
  671. .resource = kirkwood_xor10_resources,
  672. .dev = {
  673. .dma_mask = &kirkwood_xor_dmamask,
  674. .coherent_dma_mask = DMA_BIT_MASK(64),
  675. .platform_data = &kirkwood_xor10_data,
  676. },
  677. };
  678. static struct resource kirkwood_xor11_resources[] = {
  679. [0] = {
  680. .start = IRQ_KIRKWOOD_XOR_11,
  681. .end = IRQ_KIRKWOOD_XOR_11,
  682. .flags = IORESOURCE_IRQ,
  683. },
  684. };
  685. static struct mv_xor_platform_data kirkwood_xor11_data = {
  686. .shared = &kirkwood_xor1_shared,
  687. .hw_id = 1,
  688. .pool_size = PAGE_SIZE,
  689. };
  690. static struct platform_device kirkwood_xor11_channel = {
  691. .name = MV_XOR_NAME,
  692. .id = 3,
  693. .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
  694. .resource = kirkwood_xor11_resources,
  695. .dev = {
  696. .dma_mask = &kirkwood_xor_dmamask,
  697. .coherent_dma_mask = DMA_BIT_MASK(64),
  698. .platform_data = &kirkwood_xor11_data,
  699. },
  700. };
  701. static void __init kirkwood_xor1_init(void)
  702. {
  703. kirkwood_clk_ctrl |= CGC_XOR1;
  704. platform_device_register(&kirkwood_xor1_shared);
  705. /*
  706. * two engines can't do memset simultaneously, this limitation
  707. * satisfied by removing memset support from one of the engines.
  708. */
  709. dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
  710. dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
  711. platform_device_register(&kirkwood_xor10_channel);
  712. dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
  713. dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
  714. dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
  715. platform_device_register(&kirkwood_xor11_channel);
  716. }
  717. /*****************************************************************************
  718. * Watchdog
  719. ****************************************************************************/
  720. static struct orion_wdt_platform_data kirkwood_wdt_data = {
  721. .tclk = 0,
  722. };
  723. static struct platform_device kirkwood_wdt_device = {
  724. .name = "orion_wdt",
  725. .id = -1,
  726. .dev = {
  727. .platform_data = &kirkwood_wdt_data,
  728. },
  729. .num_resources = 0,
  730. };
  731. static void __init kirkwood_wdt_init(void)
  732. {
  733. kirkwood_wdt_data.tclk = kirkwood_tclk;
  734. platform_device_register(&kirkwood_wdt_device);
  735. }
  736. /*****************************************************************************
  737. * Time handling
  738. ****************************************************************************/
  739. int kirkwood_tclk;
  740. int __init kirkwood_find_tclk(void)
  741. {
  742. u32 dev, rev;
  743. kirkwood_pcie_id(&dev, &rev);
  744. if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
  745. rev == MV88F6281_REV_A1)) ||
  746. (dev == MV88F6282_DEV_ID))
  747. return 200000000;
  748. return 166666667;
  749. }
  750. static void __init kirkwood_timer_init(void)
  751. {
  752. kirkwood_tclk = kirkwood_find_tclk();
  753. orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
  754. }
  755. struct sys_timer kirkwood_timer = {
  756. .init = kirkwood_timer_init,
  757. };
  758. /*****************************************************************************
  759. * Audio
  760. ****************************************************************************/
  761. static struct resource kirkwood_i2s_resources[] = {
  762. [0] = {
  763. .start = AUDIO_PHYS_BASE,
  764. .end = AUDIO_PHYS_BASE + SZ_16K - 1,
  765. .flags = IORESOURCE_MEM,
  766. },
  767. [1] = {
  768. .start = IRQ_KIRKWOOD_I2S,
  769. .end = IRQ_KIRKWOOD_I2S,
  770. .flags = IORESOURCE_IRQ,
  771. },
  772. };
  773. static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
  774. .dram = &kirkwood_mbus_dram_info,
  775. .burst = 128,
  776. };
  777. static struct platform_device kirkwood_i2s_device = {
  778. .name = "kirkwood-i2s",
  779. .id = -1,
  780. .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
  781. .resource = kirkwood_i2s_resources,
  782. .dev = {
  783. .platform_data = &kirkwood_i2s_data,
  784. },
  785. };
  786. void __init kirkwood_audio_init(void)
  787. {
  788. kirkwood_clk_ctrl |= CGC_AUDIO;
  789. platform_device_register(&kirkwood_i2s_device);
  790. }
  791. /*****************************************************************************
  792. * General
  793. ****************************************************************************/
  794. /*
  795. * Identify device ID and revision.
  796. */
  797. static char * __init kirkwood_id(void)
  798. {
  799. u32 dev, rev;
  800. kirkwood_pcie_id(&dev, &rev);
  801. if (dev == MV88F6281_DEV_ID) {
  802. if (rev == MV88F6281_REV_Z0)
  803. return "MV88F6281-Z0";
  804. else if (rev == MV88F6281_REV_A0)
  805. return "MV88F6281-A0";
  806. else if (rev == MV88F6281_REV_A1)
  807. return "MV88F6281-A1";
  808. else
  809. return "MV88F6281-Rev-Unsupported";
  810. } else if (dev == MV88F6192_DEV_ID) {
  811. if (rev == MV88F6192_REV_Z0)
  812. return "MV88F6192-Z0";
  813. else if (rev == MV88F6192_REV_A0)
  814. return "MV88F6192-A0";
  815. else if (rev == MV88F6192_REV_A1)
  816. return "MV88F6192-A1";
  817. else
  818. return "MV88F6192-Rev-Unsupported";
  819. } else if (dev == MV88F6180_DEV_ID) {
  820. if (rev == MV88F6180_REV_A0)
  821. return "MV88F6180-Rev-A0";
  822. else if (rev == MV88F6180_REV_A1)
  823. return "MV88F6180-Rev-A1";
  824. else
  825. return "MV88F6180-Rev-Unsupported";
  826. } else if (dev == MV88F6282_DEV_ID) {
  827. if (rev == MV88F6282_REV_A0)
  828. return "MV88F6282-Rev-A0";
  829. else
  830. return "MV88F6282-Rev-Unsupported";
  831. } else {
  832. return "Device-Unknown";
  833. }
  834. }
  835. static void __init kirkwood_l2_init(void)
  836. {
  837. #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
  838. writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
  839. feroceon_l2_init(1);
  840. #else
  841. writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
  842. feroceon_l2_init(0);
  843. #endif
  844. }
  845. void __init kirkwood_init(void)
  846. {
  847. printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
  848. kirkwood_id(), kirkwood_tclk);
  849. kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
  850. kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
  851. kirkwood_spi_plat_data.tclk = kirkwood_tclk;
  852. kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
  853. kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
  854. kirkwood_i2s_data.tclk = kirkwood_tclk;
  855. /*
  856. * Disable propagation of mbus errors to the CPU local bus,
  857. * as this causes mbus errors (which can occur for example
  858. * for PCI aborts) to throw CPU aborts, which we're not set
  859. * up to deal with.
  860. */
  861. writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
  862. kirkwood_setup_cpu_mbus();
  863. #ifdef CONFIG_CACHE_FEROCEON_L2
  864. kirkwood_l2_init();
  865. #endif
  866. /* internal devices that every board has */
  867. kirkwood_rtc_init();
  868. kirkwood_wdt_init();
  869. kirkwood_xor0_init();
  870. kirkwood_xor1_init();
  871. kirkwood_crypto_init();
  872. }
  873. static int __init kirkwood_clock_gate(void)
  874. {
  875. unsigned int curr = readl(CLOCK_GATING_CTRL);
  876. u32 dev, rev;
  877. kirkwood_pcie_id(&dev, &rev);
  878. printk(KERN_DEBUG "Gating clock of unused units\n");
  879. printk(KERN_DEBUG "before: 0x%08x\n", curr);
  880. /* Make sure those units are accessible */
  881. writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
  882. /* For SATA: first shutdown the phy */
  883. if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
  884. /* Disable PLL and IVREF */
  885. writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
  886. /* Disable PHY */
  887. writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
  888. }
  889. if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
  890. /* Disable PLL and IVREF */
  891. writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
  892. /* Disable PHY */
  893. writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
  894. }
  895. /* For PCIe: first shutdown the phy */
  896. if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
  897. writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
  898. while (1)
  899. if (readl(PCIE_STATUS) & 0x1)
  900. break;
  901. writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
  902. }
  903. /* For PCIe 1: first shutdown the phy */
  904. if (dev == MV88F6282_DEV_ID) {
  905. if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
  906. writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
  907. while (1)
  908. if (readl(PCIE1_STATUS) & 0x1)
  909. break;
  910. writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
  911. }
  912. } else /* keep this bit set for devices that don't have PCIe1 */
  913. kirkwood_clk_ctrl |= CGC_PEX1;
  914. /* Now gate clock the required units */
  915. writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
  916. printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
  917. return 0;
  918. }
  919. late_initcall(kirkwood_clock_gate);