core.c 23 KB

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  1. /*
  2. * arch/arm/mach-ep93xx/core.c
  3. * Core routines for Cirrus EP93xx chips.
  4. *
  5. * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
  6. * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  7. *
  8. * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  9. * role in the ep93xx linux community.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. */
  16. #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/timex.h>
  23. #include <linux/irq.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/leds.h>
  27. #include <linux/termios.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/serial.h>
  30. #include <linux/mtd/physmap.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-gpio.h>
  33. #include <linux/spi/spi.h>
  34. #include <mach/hardware.h>
  35. #include <mach/fb.h>
  36. #include <mach/ep93xx_keypad.h>
  37. #include <mach/ep93xx_spi.h>
  38. #include <asm/mach/map.h>
  39. #include <asm/mach/time.h>
  40. #include <asm/hardware/vic.h>
  41. /*************************************************************************
  42. * Static I/O mappings that are needed for all EP93xx platforms
  43. *************************************************************************/
  44. static struct map_desc ep93xx_io_desc[] __initdata = {
  45. {
  46. .virtual = EP93XX_AHB_VIRT_BASE,
  47. .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  48. .length = EP93XX_AHB_SIZE,
  49. .type = MT_DEVICE,
  50. }, {
  51. .virtual = EP93XX_APB_VIRT_BASE,
  52. .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  53. .length = EP93XX_APB_SIZE,
  54. .type = MT_DEVICE,
  55. },
  56. };
  57. void __init ep93xx_map_io(void)
  58. {
  59. iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  60. }
  61. /*************************************************************************
  62. * Timer handling for EP93xx
  63. *************************************************************************
  64. * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
  65. * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  66. * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
  67. * is free-running, and can't generate interrupts.
  68. *
  69. * The 508 kHz timers are ideal for use for the timer interrupt, as the
  70. * most common values of HZ divide 508 kHz nicely. We pick one of the 16
  71. * bit timers (timer 1) since we don't need more than 16 bits of reload
  72. * value as long as HZ >= 8.
  73. *
  74. * The higher clock rate of timer 4 makes it a better choice than the
  75. * other timers for use in gettimeoffset(), while the fact that it can't
  76. * generate interrupts means we don't have to worry about not being able
  77. * to use this timer for something else. We also use timer 4 for keeping
  78. * track of lost jiffies.
  79. */
  80. #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
  81. #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
  82. #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
  83. #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
  84. #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
  85. #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
  86. #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
  87. #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
  88. #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
  89. #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
  90. #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
  91. #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
  92. #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
  93. #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
  94. #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
  95. #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
  96. #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
  97. #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
  98. #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
  99. #define EP93XX_TIMER123_CLOCK 508469
  100. #define EP93XX_TIMER4_CLOCK 983040
  101. #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
  102. #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
  103. static unsigned int last_jiffy_time;
  104. static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
  105. {
  106. /* Writing any value clears the timer interrupt */
  107. __raw_writel(1, EP93XX_TIMER1_CLEAR);
  108. /* Recover lost jiffies */
  109. while ((signed long)
  110. (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
  111. >= TIMER4_TICKS_PER_JIFFY) {
  112. last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
  113. timer_tick();
  114. }
  115. return IRQ_HANDLED;
  116. }
  117. static struct irqaction ep93xx_timer_irq = {
  118. .name = "ep93xx timer",
  119. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  120. .handler = ep93xx_timer_interrupt,
  121. };
  122. static void __init ep93xx_timer_init(void)
  123. {
  124. u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
  125. EP93XX_TIMER123_CONTROL_CLKSEL;
  126. /* Enable periodic HZ timer. */
  127. __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
  128. __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
  129. __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
  130. EP93XX_TIMER1_CONTROL);
  131. /* Enable lost jiffy timer. */
  132. __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
  133. EP93XX_TIMER4_VALUE_HIGH);
  134. setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
  135. }
  136. static unsigned long ep93xx_gettimeoffset(void)
  137. {
  138. int offset;
  139. offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
  140. /* Calculate (1000000 / 983040) * offset. */
  141. return offset + (53 * offset / 3072);
  142. }
  143. struct sys_timer ep93xx_timer = {
  144. .init = ep93xx_timer_init,
  145. .offset = ep93xx_gettimeoffset,
  146. };
  147. /*************************************************************************
  148. * EP93xx IRQ handling
  149. *************************************************************************/
  150. extern void ep93xx_gpio_init_irq(void);
  151. void __init ep93xx_init_irq(void)
  152. {
  153. vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
  154. vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
  155. ep93xx_gpio_init_irq();
  156. }
  157. /*************************************************************************
  158. * EP93xx System Controller Software Locked register handling
  159. *************************************************************************/
  160. /*
  161. * syscon_swlock prevents anything else from writing to the syscon
  162. * block while a software locked register is being written.
  163. */
  164. static DEFINE_SPINLOCK(syscon_swlock);
  165. void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
  166. {
  167. unsigned long flags;
  168. spin_lock_irqsave(&syscon_swlock, flags);
  169. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  170. __raw_writel(val, reg);
  171. spin_unlock_irqrestore(&syscon_swlock, flags);
  172. }
  173. EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
  174. void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
  175. {
  176. unsigned long flags;
  177. unsigned int val;
  178. spin_lock_irqsave(&syscon_swlock, flags);
  179. val = __raw_readl(EP93XX_SYSCON_DEVCFG);
  180. val &= ~clear_bits;
  181. val |= set_bits;
  182. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  183. __raw_writel(val, EP93XX_SYSCON_DEVCFG);
  184. spin_unlock_irqrestore(&syscon_swlock, flags);
  185. }
  186. EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
  187. /**
  188. * ep93xx_chip_revision() - returns the EP93xx chip revision
  189. *
  190. * See <mach/platform.h> for more information.
  191. */
  192. unsigned int ep93xx_chip_revision(void)
  193. {
  194. unsigned int v;
  195. v = __raw_readl(EP93XX_SYSCON_SYSCFG);
  196. v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
  197. v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
  198. return v;
  199. }
  200. /*************************************************************************
  201. * EP93xx peripheral handling
  202. *************************************************************************/
  203. #define EP93XX_UART_MCR_OFFSET (0x0100)
  204. static void ep93xx_uart_set_mctrl(struct amba_device *dev,
  205. void __iomem *base, unsigned int mctrl)
  206. {
  207. unsigned int mcr;
  208. mcr = 0;
  209. if (!(mctrl & TIOCM_RTS))
  210. mcr |= 2;
  211. if (!(mctrl & TIOCM_DTR))
  212. mcr |= 1;
  213. __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
  214. }
  215. static struct amba_pl010_data ep93xx_uart_data = {
  216. .set_mctrl = ep93xx_uart_set_mctrl,
  217. };
  218. static struct amba_device uart1_device = {
  219. .dev = {
  220. .init_name = "apb:uart1",
  221. .platform_data = &ep93xx_uart_data,
  222. },
  223. .res = {
  224. .start = EP93XX_UART1_PHYS_BASE,
  225. .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
  226. .flags = IORESOURCE_MEM,
  227. },
  228. .irq = { IRQ_EP93XX_UART1, NO_IRQ },
  229. .periphid = 0x00041010,
  230. };
  231. static struct amba_device uart2_device = {
  232. .dev = {
  233. .init_name = "apb:uart2",
  234. .platform_data = &ep93xx_uart_data,
  235. },
  236. .res = {
  237. .start = EP93XX_UART2_PHYS_BASE,
  238. .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. .irq = { IRQ_EP93XX_UART2, NO_IRQ },
  242. .periphid = 0x00041010,
  243. };
  244. static struct amba_device uart3_device = {
  245. .dev = {
  246. .init_name = "apb:uart3",
  247. .platform_data = &ep93xx_uart_data,
  248. },
  249. .res = {
  250. .start = EP93XX_UART3_PHYS_BASE,
  251. .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. .irq = { IRQ_EP93XX_UART3, NO_IRQ },
  255. .periphid = 0x00041010,
  256. };
  257. static struct resource ep93xx_rtc_resource[] = {
  258. {
  259. .start = EP93XX_RTC_PHYS_BASE,
  260. .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. };
  264. static struct platform_device ep93xx_rtc_device = {
  265. .name = "ep93xx-rtc",
  266. .id = -1,
  267. .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
  268. .resource = ep93xx_rtc_resource,
  269. };
  270. static struct resource ep93xx_ohci_resources[] = {
  271. [0] = {
  272. .start = EP93XX_USB_PHYS_BASE,
  273. .end = EP93XX_USB_PHYS_BASE + 0x0fff,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. [1] = {
  277. .start = IRQ_EP93XX_USB,
  278. .end = IRQ_EP93XX_USB,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. };
  282. static struct platform_device ep93xx_ohci_device = {
  283. .name = "ep93xx-ohci",
  284. .id = -1,
  285. .dev = {
  286. .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
  287. .coherent_dma_mask = DMA_BIT_MASK(32),
  288. },
  289. .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
  290. .resource = ep93xx_ohci_resources,
  291. };
  292. /*************************************************************************
  293. * EP93xx physmap'ed flash
  294. *************************************************************************/
  295. static struct physmap_flash_data ep93xx_flash_data;
  296. static struct resource ep93xx_flash_resource = {
  297. .flags = IORESOURCE_MEM,
  298. };
  299. static struct platform_device ep93xx_flash = {
  300. .name = "physmap-flash",
  301. .id = 0,
  302. .dev = {
  303. .platform_data = &ep93xx_flash_data,
  304. },
  305. .num_resources = 1,
  306. .resource = &ep93xx_flash_resource,
  307. };
  308. /**
  309. * ep93xx_register_flash() - Register the external flash device.
  310. * @width: bank width in octets
  311. * @start: resource start address
  312. * @size: resource size
  313. */
  314. void __init ep93xx_register_flash(unsigned int width,
  315. resource_size_t start, resource_size_t size)
  316. {
  317. ep93xx_flash_data.width = width;
  318. ep93xx_flash_resource.start = start;
  319. ep93xx_flash_resource.end = start + size - 1;
  320. platform_device_register(&ep93xx_flash);
  321. }
  322. /*************************************************************************
  323. * EP93xx ethernet peripheral handling
  324. *************************************************************************/
  325. static struct ep93xx_eth_data ep93xx_eth_data;
  326. static struct resource ep93xx_eth_resource[] = {
  327. {
  328. .start = EP93XX_ETHERNET_PHYS_BASE,
  329. .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
  330. .flags = IORESOURCE_MEM,
  331. }, {
  332. .start = IRQ_EP93XX_ETHERNET,
  333. .end = IRQ_EP93XX_ETHERNET,
  334. .flags = IORESOURCE_IRQ,
  335. }
  336. };
  337. static struct platform_device ep93xx_eth_device = {
  338. .name = "ep93xx-eth",
  339. .id = -1,
  340. .dev = {
  341. .platform_data = &ep93xx_eth_data,
  342. },
  343. .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
  344. .resource = ep93xx_eth_resource,
  345. };
  346. /**
  347. * ep93xx_register_eth - Register the built-in ethernet platform device.
  348. * @data: platform specific ethernet configuration (__initdata)
  349. * @copy_addr: flag indicating that the MAC address should be copied
  350. * from the IndAd registers (as programmed by the bootloader)
  351. */
  352. void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
  353. {
  354. if (copy_addr)
  355. memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
  356. ep93xx_eth_data = *data;
  357. platform_device_register(&ep93xx_eth_device);
  358. }
  359. /*************************************************************************
  360. * EP93xx i2c peripheral handling
  361. *************************************************************************/
  362. static struct i2c_gpio_platform_data ep93xx_i2c_data;
  363. static struct platform_device ep93xx_i2c_device = {
  364. .name = "i2c-gpio",
  365. .id = 0,
  366. .dev = {
  367. .platform_data = &ep93xx_i2c_data,
  368. },
  369. };
  370. /**
  371. * ep93xx_register_i2c - Register the i2c platform device.
  372. * @data: platform specific i2c-gpio configuration (__initdata)
  373. * @devices: platform specific i2c bus device information (__initdata)
  374. * @num: the number of devices on the i2c bus
  375. */
  376. void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
  377. struct i2c_board_info *devices, int num)
  378. {
  379. /*
  380. * Set the EEPROM interface pin drive type control.
  381. * Defines the driver type for the EECLK and EEDAT pins as either
  382. * open drain, which will require an external pull-up, or a normal
  383. * CMOS driver.
  384. */
  385. if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
  386. pr_warning("sda != EEDAT, open drain has no effect\n");
  387. if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
  388. pr_warning("scl != EECLK, open drain has no effect\n");
  389. __raw_writel((data->sda_is_open_drain << 1) |
  390. (data->scl_is_open_drain << 0),
  391. EP93XX_GPIO_EEDRIVE);
  392. ep93xx_i2c_data = *data;
  393. i2c_register_board_info(0, devices, num);
  394. platform_device_register(&ep93xx_i2c_device);
  395. }
  396. /*************************************************************************
  397. * EP93xx SPI peripheral handling
  398. *************************************************************************/
  399. static struct ep93xx_spi_info ep93xx_spi_master_data;
  400. static struct resource ep93xx_spi_resources[] = {
  401. {
  402. .start = EP93XX_SPI_PHYS_BASE,
  403. .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
  404. .flags = IORESOURCE_MEM,
  405. },
  406. {
  407. .start = IRQ_EP93XX_SSP,
  408. .end = IRQ_EP93XX_SSP,
  409. .flags = IORESOURCE_IRQ,
  410. },
  411. };
  412. static struct platform_device ep93xx_spi_device = {
  413. .name = "ep93xx-spi",
  414. .id = 0,
  415. .dev = {
  416. .platform_data = &ep93xx_spi_master_data,
  417. },
  418. .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
  419. .resource = ep93xx_spi_resources,
  420. };
  421. /**
  422. * ep93xx_register_spi() - registers spi platform device
  423. * @info: ep93xx board specific spi master info (__initdata)
  424. * @devices: SPI devices to register (__initdata)
  425. * @num: number of SPI devices to register
  426. *
  427. * This function registers platform device for the EP93xx SPI controller and
  428. * also makes sure that SPI pins are muxed so that I2S is not using those pins.
  429. */
  430. void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
  431. struct spi_board_info *devices, int num)
  432. {
  433. /*
  434. * When SPI is used, we need to make sure that I2S is muxed off from
  435. * SPI pins.
  436. */
  437. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
  438. ep93xx_spi_master_data = *info;
  439. spi_register_board_info(devices, num);
  440. platform_device_register(&ep93xx_spi_device);
  441. }
  442. /*************************************************************************
  443. * EP93xx LEDs
  444. *************************************************************************/
  445. static struct gpio_led ep93xx_led_pins[] = {
  446. {
  447. .name = "platform:grled",
  448. .gpio = EP93XX_GPIO_LINE_GRLED,
  449. }, {
  450. .name = "platform:rdled",
  451. .gpio = EP93XX_GPIO_LINE_RDLED,
  452. },
  453. };
  454. static struct gpio_led_platform_data ep93xx_led_data = {
  455. .num_leds = ARRAY_SIZE(ep93xx_led_pins),
  456. .leds = ep93xx_led_pins,
  457. };
  458. static struct platform_device ep93xx_leds = {
  459. .name = "leds-gpio",
  460. .id = -1,
  461. .dev = {
  462. .platform_data = &ep93xx_led_data,
  463. },
  464. };
  465. /*************************************************************************
  466. * EP93xx pwm peripheral handling
  467. *************************************************************************/
  468. static struct resource ep93xx_pwm0_resource[] = {
  469. {
  470. .start = EP93XX_PWM_PHYS_BASE,
  471. .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
  472. .flags = IORESOURCE_MEM,
  473. },
  474. };
  475. static struct platform_device ep93xx_pwm0_device = {
  476. .name = "ep93xx-pwm",
  477. .id = 0,
  478. .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
  479. .resource = ep93xx_pwm0_resource,
  480. };
  481. static struct resource ep93xx_pwm1_resource[] = {
  482. {
  483. .start = EP93XX_PWM_PHYS_BASE + 0x20,
  484. .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
  485. .flags = IORESOURCE_MEM,
  486. },
  487. };
  488. static struct platform_device ep93xx_pwm1_device = {
  489. .name = "ep93xx-pwm",
  490. .id = 1,
  491. .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
  492. .resource = ep93xx_pwm1_resource,
  493. };
  494. void __init ep93xx_register_pwm(int pwm0, int pwm1)
  495. {
  496. if (pwm0)
  497. platform_device_register(&ep93xx_pwm0_device);
  498. /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
  499. if (pwm1)
  500. platform_device_register(&ep93xx_pwm1_device);
  501. }
  502. int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
  503. {
  504. int err;
  505. if (pdev->id == 0) {
  506. err = 0;
  507. } else if (pdev->id == 1) {
  508. err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
  509. dev_name(&pdev->dev));
  510. if (err)
  511. return err;
  512. err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
  513. if (err)
  514. goto fail;
  515. /* PWM 1 output on EGPIO[14] */
  516. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
  517. } else {
  518. err = -ENODEV;
  519. }
  520. return err;
  521. fail:
  522. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  523. return err;
  524. }
  525. EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
  526. void ep93xx_pwm_release_gpio(struct platform_device *pdev)
  527. {
  528. if (pdev->id == 1) {
  529. gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
  530. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  531. /* EGPIO[14] used for GPIO */
  532. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
  533. }
  534. }
  535. EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
  536. /*************************************************************************
  537. * EP93xx video peripheral handling
  538. *************************************************************************/
  539. static struct ep93xxfb_mach_info ep93xxfb_data;
  540. static struct resource ep93xx_fb_resource[] = {
  541. {
  542. .start = EP93XX_RASTER_PHYS_BASE,
  543. .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
  544. .flags = IORESOURCE_MEM,
  545. },
  546. };
  547. static struct platform_device ep93xx_fb_device = {
  548. .name = "ep93xx-fb",
  549. .id = -1,
  550. .dev = {
  551. .platform_data = &ep93xxfb_data,
  552. .coherent_dma_mask = DMA_BIT_MASK(32),
  553. .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
  554. },
  555. .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
  556. .resource = ep93xx_fb_resource,
  557. };
  558. static struct platform_device ep93xx_bl_device = {
  559. .name = "ep93xx-bl",
  560. .id = -1,
  561. };
  562. /**
  563. * ep93xx_register_fb - Register the framebuffer platform device.
  564. * @data: platform specific framebuffer configuration (__initdata)
  565. */
  566. void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
  567. {
  568. ep93xxfb_data = *data;
  569. platform_device_register(&ep93xx_fb_device);
  570. platform_device_register(&ep93xx_bl_device);
  571. }
  572. /*************************************************************************
  573. * EP93xx matrix keypad peripheral handling
  574. *************************************************************************/
  575. static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
  576. static struct resource ep93xx_keypad_resource[] = {
  577. {
  578. .start = EP93XX_KEY_MATRIX_PHYS_BASE,
  579. .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
  580. .flags = IORESOURCE_MEM,
  581. }, {
  582. .start = IRQ_EP93XX_KEY,
  583. .end = IRQ_EP93XX_KEY,
  584. .flags = IORESOURCE_IRQ,
  585. },
  586. };
  587. static struct platform_device ep93xx_keypad_device = {
  588. .name = "ep93xx-keypad",
  589. .id = -1,
  590. .dev = {
  591. .platform_data = &ep93xx_keypad_data,
  592. },
  593. .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
  594. .resource = ep93xx_keypad_resource,
  595. };
  596. /**
  597. * ep93xx_register_keypad - Register the keypad platform device.
  598. * @data: platform specific keypad configuration (__initdata)
  599. */
  600. void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
  601. {
  602. ep93xx_keypad_data = *data;
  603. platform_device_register(&ep93xx_keypad_device);
  604. }
  605. int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
  606. {
  607. int err;
  608. int i;
  609. for (i = 0; i < 8; i++) {
  610. err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
  611. if (err)
  612. goto fail_gpio_c;
  613. err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
  614. if (err)
  615. goto fail_gpio_d;
  616. }
  617. /* Enable the keypad controller; GPIO ports C and D used for keypad */
  618. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  619. EP93XX_SYSCON_DEVCFG_GONK);
  620. return 0;
  621. fail_gpio_d:
  622. gpio_free(EP93XX_GPIO_LINE_C(i));
  623. fail_gpio_c:
  624. for ( ; i >= 0; --i) {
  625. gpio_free(EP93XX_GPIO_LINE_C(i));
  626. gpio_free(EP93XX_GPIO_LINE_D(i));
  627. }
  628. return err;
  629. }
  630. EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
  631. void ep93xx_keypad_release_gpio(struct platform_device *pdev)
  632. {
  633. int i;
  634. for (i = 0; i < 8; i++) {
  635. gpio_free(EP93XX_GPIO_LINE_C(i));
  636. gpio_free(EP93XX_GPIO_LINE_D(i));
  637. }
  638. /* Disable the keypad controller; GPIO ports C and D used for GPIO */
  639. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  640. EP93XX_SYSCON_DEVCFG_GONK);
  641. }
  642. EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
  643. /*************************************************************************
  644. * EP93xx I2S audio peripheral handling
  645. *************************************************************************/
  646. static struct resource ep93xx_i2s_resource[] = {
  647. {
  648. .start = EP93XX_I2S_PHYS_BASE,
  649. .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
  650. .flags = IORESOURCE_MEM,
  651. },
  652. };
  653. static struct platform_device ep93xx_i2s_device = {
  654. .name = "ep93xx-i2s",
  655. .id = -1,
  656. .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
  657. .resource = ep93xx_i2s_resource,
  658. };
  659. void __init ep93xx_register_i2s(void)
  660. {
  661. platform_device_register(&ep93xx_i2s_device);
  662. }
  663. #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
  664. EP93XX_SYSCON_DEVCFG_I2SONAC97)
  665. #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
  666. EP93XX_SYSCON_I2SCLKDIV_SPOL)
  667. int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
  668. {
  669. unsigned val;
  670. /* Sanity check */
  671. if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
  672. return -EINVAL;
  673. if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
  674. return -EINVAL;
  675. /* Must have only one of I2SONSSP/I2SONAC97 set */
  676. if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
  677. (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
  678. return -EINVAL;
  679. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  680. ep93xx_devcfg_set_bits(i2s_pins);
  681. /*
  682. * This is potentially racy with the clock api for i2s_mclk, sclk and
  683. * lrclk. Since the i2s driver is the only user of those clocks we
  684. * rely on it to prevent parallel use of this function and the
  685. * clock api for the i2s clocks.
  686. */
  687. val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
  688. val &= ~EP93XX_I2SCLKDIV_MASK;
  689. val |= i2s_config;
  690. ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
  691. return 0;
  692. }
  693. EXPORT_SYMBOL(ep93xx_i2s_acquire);
  694. void ep93xx_i2s_release(void)
  695. {
  696. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  697. }
  698. EXPORT_SYMBOL(ep93xx_i2s_release);
  699. extern void ep93xx_gpio_init(void);
  700. void __init ep93xx_init_devices(void)
  701. {
  702. /* Disallow access to MaverickCrunch initially */
  703. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
  704. ep93xx_gpio_init();
  705. amba_device_register(&uart1_device, &iomem_resource);
  706. amba_device_register(&uart2_device, &iomem_resource);
  707. amba_device_register(&uart3_device, &iomem_resource);
  708. platform_device_register(&ep93xx_rtc_device);
  709. platform_device_register(&ep93xx_ohci_device);
  710. platform_device_register(&ep93xx_leds);
  711. }