serial.c 3.0 KB

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  1. /*
  2. * TI DaVinci serial driver
  3. *
  4. * Copyright (C) 2006 Texas Instruments.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/serial_8250.h>
  24. #include <linux/serial_reg.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/clk.h>
  28. #include <linux/io.h>
  29. #include <mach/serial.h>
  30. #include <mach/cputype.h>
  31. static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
  32. int offset)
  33. {
  34. offset <<= up->regshift;
  35. WARN_ONCE(!up->membase, "unmapped read: uart[%d]\n", offset);
  36. return (unsigned int)__raw_readl(up->membase + offset);
  37. }
  38. static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
  39. int value)
  40. {
  41. offset <<= p->regshift;
  42. WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset);
  43. __raw_writel(value, p->membase + offset);
  44. }
  45. static void __init davinci_serial_reset(struct plat_serial8250_port *p)
  46. {
  47. unsigned int pwremu = 0;
  48. serial_write_reg(p, UART_IER, 0); /* disable all interrupts */
  49. /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
  50. serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
  51. mdelay(10);
  52. pwremu |= (0x3 << 13);
  53. pwremu |= 0x1;
  54. serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
  55. if (cpu_is_davinci_dm646x())
  56. serial_write_reg(p, UART_DM646X_SCR,
  57. UART_DM646X_SCR_TX_WATERMARK);
  58. }
  59. int __init davinci_serial_init(struct davinci_uart_config *info)
  60. {
  61. int i;
  62. char name[16];
  63. struct clk *uart_clk;
  64. struct davinci_soc_info *soc_info = &davinci_soc_info;
  65. struct device *dev = &soc_info->serial_dev->dev;
  66. struct plat_serial8250_port *p = dev->platform_data;
  67. /*
  68. * Make sure the serial ports are muxed on at this point.
  69. * You have to mux them off in device drivers later on if not needed.
  70. */
  71. for (i = 0; p->flags; i++, p++) {
  72. if (!(info->enabled_uarts & (1 << i)))
  73. continue;
  74. sprintf(name, "uart%d", i);
  75. uart_clk = clk_get(dev, name);
  76. if (IS_ERR(uart_clk)) {
  77. printk(KERN_ERR "%s:%d: failed to get UART%d clock\n",
  78. __func__, __LINE__, i);
  79. continue;
  80. }
  81. clk_enable(uart_clk);
  82. p->uartclk = clk_get_rate(uart_clk);
  83. if (!p->membase && p->mapbase) {
  84. p->membase = ioremap(p->mapbase, SZ_4K);
  85. if (p->membase)
  86. p->flags &= ~UPF_IOREMAP;
  87. else
  88. pr_err("uart regs ioremap failed\n");
  89. }
  90. if (p->membase && p->type != PORT_AR7)
  91. davinci_serial_reset(p);
  92. }
  93. return platform_device_register(soc_info->serial_dev);
  94. }