gpio.h 4.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161
  1. /*
  2. * TI DaVinci GPIO Support
  3. *
  4. * Copyright (c) 2006 David Brownell
  5. * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. */
  12. #ifndef __DAVINCI_GPIO_H
  13. #define __DAVINCI_GPIO_H
  14. #include <linux/io.h>
  15. #include <linux/spinlock.h>
  16. #include <asm-generic/gpio.h>
  17. #include <mach/irqs.h>
  18. #include <mach/common.h>
  19. #define DAVINCI_GPIO_BASE 0x01C67000
  20. enum davinci_gpio_type {
  21. GPIO_TYPE_DAVINCI = 0,
  22. GPIO_TYPE_TNETV107X,
  23. };
  24. /*
  25. * basic gpio routines
  26. *
  27. * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  28. * initializing banks together) rather than boot loaders; kexec() won't
  29. * go through boot loaders.
  30. *
  31. * the gpio clock will be turned on when gpios are used, and you may also
  32. * need to pay attention to PINMUX registers to be sure those pins are
  33. * used as gpios, not with other peripherals.
  34. *
  35. * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
  36. * and maybe for later updates, code may write GPIO(N). These may be
  37. * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
  38. * may not support all the GPIOs in that range.
  39. *
  40. * GPIOs can also be on external chips, numbered after the ones built-in
  41. * to the DaVinci chip. For now, they won't be usable as IRQ sources.
  42. */
  43. #define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
  44. /* Convert GPIO signal to GPIO pin number */
  45. #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
  46. struct davinci_gpio_controller {
  47. struct gpio_chip chip;
  48. int irq_base;
  49. spinlock_t lock;
  50. void __iomem *regs;
  51. void __iomem *set_data;
  52. void __iomem *clr_data;
  53. void __iomem *in_data;
  54. };
  55. /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  56. * with constant parameters; or in outlined code they execute at runtime.
  57. *
  58. * You'd access the controller directly when reading or writing more than
  59. * one gpio value at a time, and to support wired logic where the value
  60. * being driven by the cpu need not match the value read back.
  61. *
  62. * These are NOT part of the cross-platform GPIO interface
  63. */
  64. static inline struct davinci_gpio_controller *
  65. __gpio_to_controller(unsigned gpio)
  66. {
  67. struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
  68. int index = gpio / 32;
  69. if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
  70. return NULL;
  71. return ctlrs + index;
  72. }
  73. static inline u32 __gpio_mask(unsigned gpio)
  74. {
  75. return 1 << (gpio % 32);
  76. }
  77. /*
  78. * The get/set/clear functions will inline when called with constant
  79. * parameters referencing built-in GPIOs, for low-overhead bitbanging.
  80. *
  81. * gpio_set_value() will inline only on traditional Davinci style controllers
  82. * with distinct set/clear registers.
  83. *
  84. * Otherwise, calls with variable parameters or referencing external
  85. * GPIOs (e.g. on GPIO expander chips) use outlined functions.
  86. */
  87. static inline void gpio_set_value(unsigned gpio, int value)
  88. {
  89. if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
  90. struct davinci_gpio_controller *ctlr;
  91. u32 mask;
  92. ctlr = __gpio_to_controller(gpio);
  93. if (ctlr->set_data != ctlr->clr_data) {
  94. mask = __gpio_mask(gpio);
  95. if (value)
  96. __raw_writel(mask, ctlr->set_data);
  97. else
  98. __raw_writel(mask, ctlr->clr_data);
  99. return;
  100. }
  101. }
  102. __gpio_set_value(gpio, value);
  103. }
  104. /* Returns zero or nonzero; works for gpios configured as inputs OR
  105. * as outputs, at least for built-in GPIOs.
  106. *
  107. * NOTE: for built-in GPIOs, changes in reported values are synchronized
  108. * to the GPIO clock. This is easily seen after calling gpio_set_value()
  109. * and then immediately gpio_get_value(), where the gpio_get_value() will
  110. * return the old value until the GPIO clock ticks and the new value gets
  111. * latched.
  112. */
  113. static inline int gpio_get_value(unsigned gpio)
  114. {
  115. struct davinci_gpio_controller *ctlr;
  116. if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
  117. return __gpio_get_value(gpio);
  118. ctlr = __gpio_to_controller(gpio);
  119. return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
  120. }
  121. static inline int gpio_cansleep(unsigned gpio)
  122. {
  123. if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
  124. return 0;
  125. else
  126. return __gpio_cansleep(gpio);
  127. }
  128. static inline int gpio_to_irq(unsigned gpio)
  129. {
  130. return __gpio_to_irq(gpio);
  131. }
  132. static inline int irq_to_gpio(unsigned irq)
  133. {
  134. /* don't support the reverse mapping */
  135. return -ENOSYS;
  136. }
  137. #endif /* __DAVINCI_GPIO_H */