kvm_mips.c 27 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * KVM/MIPS: MIPS specific KVM APIs
  7. *
  8. * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
  9. * Authors: Sanjay Lal <sanjayl@kymasys.com>
  10. */
  11. #include <linux/errno.h>
  12. #include <linux/err.h>
  13. #include <linux/module.h>
  14. #include <linux/vmalloc.h>
  15. #include <linux/fs.h>
  16. #include <linux/bootmem.h>
  17. #include <asm/page.h>
  18. #include <asm/cacheflush.h>
  19. #include <asm/mmu_context.h>
  20. #include <linux/kvm_host.h>
  21. #include "kvm_mips_int.h"
  22. #include "kvm_mips_comm.h"
  23. #define CREATE_TRACE_POINTS
  24. #include "trace.h"
  25. #ifndef VECTORSPACING
  26. #define VECTORSPACING 0x100 /* for EI/VI mode */
  27. #endif
  28. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  29. struct kvm_stats_debugfs_item debugfs_entries[] = {
  30. { "wait", VCPU_STAT(wait_exits) },
  31. { "cache", VCPU_STAT(cache_exits) },
  32. { "signal", VCPU_STAT(signal_exits) },
  33. { "interrupt", VCPU_STAT(int_exits) },
  34. { "cop_unsuable", VCPU_STAT(cop_unusable_exits) },
  35. { "tlbmod", VCPU_STAT(tlbmod_exits) },
  36. { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits) },
  37. { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits) },
  38. { "addrerr_st", VCPU_STAT(addrerr_st_exits) },
  39. { "addrerr_ld", VCPU_STAT(addrerr_ld_exits) },
  40. { "syscall", VCPU_STAT(syscall_exits) },
  41. { "resvd_inst", VCPU_STAT(resvd_inst_exits) },
  42. { "break_inst", VCPU_STAT(break_inst_exits) },
  43. { "flush_dcache", VCPU_STAT(flush_dcache_exits) },
  44. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  45. {NULL}
  46. };
  47. static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
  48. {
  49. int i;
  50. for_each_possible_cpu(i) {
  51. vcpu->arch.guest_kernel_asid[i] = 0;
  52. vcpu->arch.guest_user_asid[i] = 0;
  53. }
  54. return 0;
  55. }
  56. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  57. {
  58. return gfn;
  59. }
  60. /* XXXKYMA: We are simulatoring a processor that has the WII bit set in Config7, so we
  61. * are "runnable" if interrupts are pending
  62. */
  63. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  64. {
  65. return !!(vcpu->arch.pending_exceptions);
  66. }
  67. int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
  68. {
  69. return 1;
  70. }
  71. int kvm_arch_hardware_enable(void *garbage)
  72. {
  73. return 0;
  74. }
  75. void kvm_arch_hardware_disable(void *garbage)
  76. {
  77. }
  78. int kvm_arch_hardware_setup(void)
  79. {
  80. return 0;
  81. }
  82. void kvm_arch_hardware_unsetup(void)
  83. {
  84. }
  85. void kvm_arch_check_processor_compat(void *rtn)
  86. {
  87. int *r = (int *)rtn;
  88. *r = 0;
  89. return;
  90. }
  91. static void kvm_mips_init_tlbs(struct kvm *kvm)
  92. {
  93. unsigned long wired;
  94. /* Add a wired entry to the TLB, it is used to map the commpage to the Guest kernel */
  95. wired = read_c0_wired();
  96. write_c0_wired(wired + 1);
  97. mtc0_tlbw_hazard();
  98. kvm->arch.commpage_tlb = wired;
  99. kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
  100. kvm->arch.commpage_tlb);
  101. }
  102. static void kvm_mips_init_vm_percpu(void *arg)
  103. {
  104. struct kvm *kvm = (struct kvm *)arg;
  105. kvm_mips_init_tlbs(kvm);
  106. kvm_mips_callbacks->vm_init(kvm);
  107. }
  108. int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
  109. {
  110. if (atomic_inc_return(&kvm_mips_instance) == 1) {
  111. kvm_info("%s: 1st KVM instance, setup host TLB parameters\n",
  112. __func__);
  113. on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
  114. }
  115. return 0;
  116. }
  117. void kvm_mips_free_vcpus(struct kvm *kvm)
  118. {
  119. unsigned int i;
  120. struct kvm_vcpu *vcpu;
  121. /* Put the pages we reserved for the guest pmap */
  122. for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
  123. if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
  124. kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
  125. }
  126. if (kvm->arch.guest_pmap)
  127. kfree(kvm->arch.guest_pmap);
  128. kvm_for_each_vcpu(i, vcpu, kvm) {
  129. kvm_arch_vcpu_free(vcpu);
  130. }
  131. mutex_lock(&kvm->lock);
  132. for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
  133. kvm->vcpus[i] = NULL;
  134. atomic_set(&kvm->online_vcpus, 0);
  135. mutex_unlock(&kvm->lock);
  136. }
  137. void kvm_arch_sync_events(struct kvm *kvm)
  138. {
  139. }
  140. static void kvm_mips_uninit_tlbs(void *arg)
  141. {
  142. /* Restore wired count */
  143. write_c0_wired(0);
  144. mtc0_tlbw_hazard();
  145. /* Clear out all the TLBs */
  146. kvm_local_flush_tlb_all();
  147. }
  148. void kvm_arch_destroy_vm(struct kvm *kvm)
  149. {
  150. kvm_mips_free_vcpus(kvm);
  151. /* If this is the last instance, restore wired count */
  152. if (atomic_dec_return(&kvm_mips_instance) == 0) {
  153. kvm_info("%s: last KVM instance, restoring TLB parameters\n",
  154. __func__);
  155. on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
  156. }
  157. }
  158. long
  159. kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
  160. {
  161. return -ENOIOCTLCMD;
  162. }
  163. void kvm_arch_free_memslot(struct kvm_memory_slot *free,
  164. struct kvm_memory_slot *dont)
  165. {
  166. }
  167. int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
  168. {
  169. return 0;
  170. }
  171. int kvm_arch_prepare_memory_region(struct kvm *kvm,
  172. struct kvm_memory_slot *memslot,
  173. struct kvm_userspace_memory_region *mem,
  174. enum kvm_mr_change change)
  175. {
  176. return 0;
  177. }
  178. void kvm_arch_commit_memory_region(struct kvm *kvm,
  179. struct kvm_userspace_memory_region *mem,
  180. const struct kvm_memory_slot *old,
  181. enum kvm_mr_change change)
  182. {
  183. unsigned long npages = 0;
  184. int i, err = 0;
  185. kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
  186. __func__, kvm, mem->slot, mem->guest_phys_addr,
  187. mem->memory_size, mem->userspace_addr);
  188. /* Setup Guest PMAP table */
  189. if (!kvm->arch.guest_pmap) {
  190. if (mem->slot == 0)
  191. npages = mem->memory_size >> PAGE_SHIFT;
  192. if (npages) {
  193. kvm->arch.guest_pmap_npages = npages;
  194. kvm->arch.guest_pmap =
  195. kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
  196. if (!kvm->arch.guest_pmap) {
  197. kvm_err("Failed to allocate guest PMAP");
  198. err = -ENOMEM;
  199. goto out;
  200. }
  201. kvm_info
  202. ("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
  203. npages, kvm->arch.guest_pmap);
  204. /* Now setup the page table */
  205. for (i = 0; i < npages; i++) {
  206. kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
  207. }
  208. }
  209. }
  210. out:
  211. return;
  212. }
  213. void kvm_arch_flush_shadow_all(struct kvm *kvm)
  214. {
  215. }
  216. void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
  217. struct kvm_memory_slot *slot)
  218. {
  219. }
  220. void kvm_arch_flush_shadow(struct kvm *kvm)
  221. {
  222. }
  223. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
  224. {
  225. extern char mips32_exception[], mips32_exceptionEnd[];
  226. extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
  227. int err, size, offset;
  228. void *gebase;
  229. int i;
  230. struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
  231. if (!vcpu) {
  232. err = -ENOMEM;
  233. goto out;
  234. }
  235. err = kvm_vcpu_init(vcpu, kvm, id);
  236. if (err)
  237. goto out_free_cpu;
  238. kvm_info("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
  239. /* Allocate space for host mode exception handlers that handle
  240. * guest mode exits
  241. */
  242. if (cpu_has_veic || cpu_has_vint) {
  243. size = 0x200 + VECTORSPACING * 64;
  244. } else {
  245. size = 0x200;
  246. }
  247. /* Save Linux EBASE */
  248. vcpu->arch.host_ebase = (void *)read_c0_ebase();
  249. gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
  250. if (!gebase) {
  251. err = -ENOMEM;
  252. goto out_free_cpu;
  253. }
  254. kvm_info("Allocated %d bytes for KVM Exception Handlers @ %p\n",
  255. ALIGN(size, PAGE_SIZE), gebase);
  256. /* Save new ebase */
  257. vcpu->arch.guest_ebase = gebase;
  258. /* Copy L1 Guest Exception handler to correct offset */
  259. /* TLB Refill, EXL = 0 */
  260. memcpy(gebase, mips32_exception,
  261. mips32_exceptionEnd - mips32_exception);
  262. /* General Exception Entry point */
  263. memcpy(gebase + 0x180, mips32_exception,
  264. mips32_exceptionEnd - mips32_exception);
  265. /* For vectored interrupts poke the exception code @ all offsets 0-7 */
  266. for (i = 0; i < 8; i++) {
  267. kvm_debug("L1 Vectored handler @ %p\n",
  268. gebase + 0x200 + (i * VECTORSPACING));
  269. memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
  270. mips32_exceptionEnd - mips32_exception);
  271. }
  272. /* General handler, relocate to unmapped space for sanity's sake */
  273. offset = 0x2000;
  274. kvm_info("Installing KVM Exception handlers @ %p, %#x bytes\n",
  275. gebase + offset,
  276. mips32_GuestExceptionEnd - mips32_GuestException);
  277. memcpy(gebase + offset, mips32_GuestException,
  278. mips32_GuestExceptionEnd - mips32_GuestException);
  279. /* Invalidate the icache for these ranges */
  280. mips32_SyncICache((unsigned long) gebase, ALIGN(size, PAGE_SIZE));
  281. /* Allocate comm page for guest kernel, a TLB will be reserved for mapping GVA @ 0xFFFF8000 to this page */
  282. vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
  283. if (!vcpu->arch.kseg0_commpage) {
  284. err = -ENOMEM;
  285. goto out_free_gebase;
  286. }
  287. kvm_info("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
  288. kvm_mips_commpage_init(vcpu);
  289. /* Init */
  290. vcpu->arch.last_sched_cpu = -1;
  291. /* Start off the timer */
  292. kvm_mips_emulate_count(vcpu);
  293. return vcpu;
  294. out_free_gebase:
  295. kfree(gebase);
  296. out_free_cpu:
  297. kfree(vcpu);
  298. out:
  299. return ERR_PTR(err);
  300. }
  301. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  302. {
  303. hrtimer_cancel(&vcpu->arch.comparecount_timer);
  304. kvm_vcpu_uninit(vcpu);
  305. kvm_mips_dump_stats(vcpu);
  306. if (vcpu->arch.guest_ebase)
  307. kfree(vcpu->arch.guest_ebase);
  308. if (vcpu->arch.kseg0_commpage)
  309. kfree(vcpu->arch.kseg0_commpage);
  310. }
  311. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  312. {
  313. kvm_arch_vcpu_free(vcpu);
  314. }
  315. int
  316. kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
  317. struct kvm_guest_debug *dbg)
  318. {
  319. return -ENOIOCTLCMD;
  320. }
  321. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
  322. {
  323. int r = 0;
  324. sigset_t sigsaved;
  325. if (vcpu->sigset_active)
  326. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  327. if (vcpu->mmio_needed) {
  328. if (!vcpu->mmio_is_write)
  329. kvm_mips_complete_mmio_load(vcpu, run);
  330. vcpu->mmio_needed = 0;
  331. }
  332. /* Check if we have any exceptions/interrupts pending */
  333. kvm_mips_deliver_interrupts(vcpu,
  334. kvm_read_c0_guest_cause(vcpu->arch.cop0));
  335. local_irq_disable();
  336. kvm_guest_enter();
  337. r = __kvm_mips_vcpu_run(run, vcpu);
  338. kvm_guest_exit();
  339. local_irq_enable();
  340. if (vcpu->sigset_active)
  341. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  342. return r;
  343. }
  344. int
  345. kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_mips_interrupt *irq)
  346. {
  347. int intr = (int)irq->irq;
  348. struct kvm_vcpu *dvcpu = NULL;
  349. if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
  350. kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
  351. (int)intr);
  352. if (irq->cpu == -1)
  353. dvcpu = vcpu;
  354. else
  355. dvcpu = vcpu->kvm->vcpus[irq->cpu];
  356. if (intr == 2 || intr == 3 || intr == 4) {
  357. kvm_mips_callbacks->queue_io_int(dvcpu, irq);
  358. } else if (intr == -2 || intr == -3 || intr == -4) {
  359. kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
  360. } else {
  361. kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
  362. irq->cpu, irq->irq);
  363. return -EINVAL;
  364. }
  365. dvcpu->arch.wait = 0;
  366. if (waitqueue_active(&dvcpu->wq)) {
  367. wake_up_interruptible(&dvcpu->wq);
  368. }
  369. return 0;
  370. }
  371. int
  372. kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
  373. struct kvm_mp_state *mp_state)
  374. {
  375. return -ENOIOCTLCMD;
  376. }
  377. int
  378. kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
  379. struct kvm_mp_state *mp_state)
  380. {
  381. return -ENOIOCTLCMD;
  382. }
  383. #define KVM_REG_MIPS_CP0_INDEX (0x10000 + 8 * 0 + 0)
  384. #define KVM_REG_MIPS_CP0_ENTRYLO0 (0x10000 + 8 * 2 + 0)
  385. #define KVM_REG_MIPS_CP0_ENTRYLO1 (0x10000 + 8 * 3 + 0)
  386. #define KVM_REG_MIPS_CP0_CONTEXT (0x10000 + 8 * 4 + 0)
  387. #define KVM_REG_MIPS_CP0_USERLOCAL (0x10000 + 8 * 4 + 2)
  388. #define KVM_REG_MIPS_CP0_PAGEMASK (0x10000 + 8 * 5 + 0)
  389. #define KVM_REG_MIPS_CP0_PAGEGRAIN (0x10000 + 8 * 5 + 1)
  390. #define KVM_REG_MIPS_CP0_WIRED (0x10000 + 8 * 6 + 0)
  391. #define KVM_REG_MIPS_CP0_HWRENA (0x10000 + 8 * 7 + 0)
  392. #define KVM_REG_MIPS_CP0_BADVADDR (0x10000 + 8 * 8 + 0)
  393. #define KVM_REG_MIPS_CP0_COUNT (0x10000 + 8 * 9 + 0)
  394. #define KVM_REG_MIPS_CP0_ENTRYHI (0x10000 + 8 * 10 + 0)
  395. #define KVM_REG_MIPS_CP0_COMPARE (0x10000 + 8 * 11 + 0)
  396. #define KVM_REG_MIPS_CP0_STATUS (0x10000 + 8 * 12 + 0)
  397. #define KVM_REG_MIPS_CP0_CAUSE (0x10000 + 8 * 13 + 0)
  398. #define KVM_REG_MIPS_CP0_EBASE (0x10000 + 8 * 15 + 1)
  399. #define KVM_REG_MIPS_CP0_CONFIG (0x10000 + 8 * 16 + 0)
  400. #define KVM_REG_MIPS_CP0_CONFIG1 (0x10000 + 8 * 16 + 1)
  401. #define KVM_REG_MIPS_CP0_CONFIG2 (0x10000 + 8 * 16 + 2)
  402. #define KVM_REG_MIPS_CP0_CONFIG3 (0x10000 + 8 * 16 + 3)
  403. #define KVM_REG_MIPS_CP0_CONFIG7 (0x10000 + 8 * 16 + 7)
  404. #define KVM_REG_MIPS_CP0_XCONTEXT (0x10000 + 8 * 20 + 0)
  405. #define KVM_REG_MIPS_CP0_ERROREPC (0x10000 + 8 * 30 + 0)
  406. static u64 kvm_mips_get_one_regs[] = {
  407. KVM_REG_MIPS_R0,
  408. KVM_REG_MIPS_R1,
  409. KVM_REG_MIPS_R2,
  410. KVM_REG_MIPS_R3,
  411. KVM_REG_MIPS_R4,
  412. KVM_REG_MIPS_R5,
  413. KVM_REG_MIPS_R6,
  414. KVM_REG_MIPS_R7,
  415. KVM_REG_MIPS_R8,
  416. KVM_REG_MIPS_R9,
  417. KVM_REG_MIPS_R10,
  418. KVM_REG_MIPS_R11,
  419. KVM_REG_MIPS_R12,
  420. KVM_REG_MIPS_R13,
  421. KVM_REG_MIPS_R14,
  422. KVM_REG_MIPS_R15,
  423. KVM_REG_MIPS_R16,
  424. KVM_REG_MIPS_R17,
  425. KVM_REG_MIPS_R18,
  426. KVM_REG_MIPS_R19,
  427. KVM_REG_MIPS_R20,
  428. KVM_REG_MIPS_R21,
  429. KVM_REG_MIPS_R22,
  430. KVM_REG_MIPS_R23,
  431. KVM_REG_MIPS_R24,
  432. KVM_REG_MIPS_R25,
  433. KVM_REG_MIPS_R26,
  434. KVM_REG_MIPS_R27,
  435. KVM_REG_MIPS_R28,
  436. KVM_REG_MIPS_R29,
  437. KVM_REG_MIPS_R30,
  438. KVM_REG_MIPS_R31,
  439. KVM_REG_MIPS_HI,
  440. KVM_REG_MIPS_LO,
  441. KVM_REG_MIPS_PC,
  442. KVM_REG_MIPS_CP0_INDEX,
  443. KVM_REG_MIPS_CP0_CONTEXT,
  444. KVM_REG_MIPS_CP0_PAGEMASK,
  445. KVM_REG_MIPS_CP0_WIRED,
  446. KVM_REG_MIPS_CP0_BADVADDR,
  447. KVM_REG_MIPS_CP0_ENTRYHI,
  448. KVM_REG_MIPS_CP0_STATUS,
  449. KVM_REG_MIPS_CP0_CAUSE,
  450. /* EPC set via kvm_regs, et al. */
  451. KVM_REG_MIPS_CP0_CONFIG,
  452. KVM_REG_MIPS_CP0_CONFIG1,
  453. KVM_REG_MIPS_CP0_CONFIG2,
  454. KVM_REG_MIPS_CP0_CONFIG3,
  455. KVM_REG_MIPS_CP0_CONFIG7,
  456. KVM_REG_MIPS_CP0_ERROREPC
  457. };
  458. static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
  459. const struct kvm_one_reg *reg)
  460. {
  461. u64 __user *uaddr = (u64 __user *)(long)reg->addr;
  462. struct mips_coproc *cop0 = vcpu->arch.cop0;
  463. s64 v;
  464. switch (reg->id) {
  465. case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
  466. v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
  467. break;
  468. case KVM_REG_MIPS_HI:
  469. v = (long)vcpu->arch.hi;
  470. break;
  471. case KVM_REG_MIPS_LO:
  472. v = (long)vcpu->arch.lo;
  473. break;
  474. case KVM_REG_MIPS_PC:
  475. v = (long)vcpu->arch.pc;
  476. break;
  477. case KVM_REG_MIPS_CP0_INDEX:
  478. v = (long)kvm_read_c0_guest_index(cop0);
  479. break;
  480. case KVM_REG_MIPS_CP0_CONTEXT:
  481. v = (long)kvm_read_c0_guest_context(cop0);
  482. break;
  483. case KVM_REG_MIPS_CP0_PAGEMASK:
  484. v = (long)kvm_read_c0_guest_pagemask(cop0);
  485. break;
  486. case KVM_REG_MIPS_CP0_WIRED:
  487. v = (long)kvm_read_c0_guest_wired(cop0);
  488. break;
  489. case KVM_REG_MIPS_CP0_BADVADDR:
  490. v = (long)kvm_read_c0_guest_badvaddr(cop0);
  491. break;
  492. case KVM_REG_MIPS_CP0_ENTRYHI:
  493. v = (long)kvm_read_c0_guest_entryhi(cop0);
  494. break;
  495. case KVM_REG_MIPS_CP0_STATUS:
  496. v = (long)kvm_read_c0_guest_status(cop0);
  497. break;
  498. case KVM_REG_MIPS_CP0_CAUSE:
  499. v = (long)kvm_read_c0_guest_cause(cop0);
  500. break;
  501. case KVM_REG_MIPS_CP0_ERROREPC:
  502. v = (long)kvm_read_c0_guest_errorepc(cop0);
  503. break;
  504. case KVM_REG_MIPS_CP0_CONFIG:
  505. v = (long)kvm_read_c0_guest_config(cop0);
  506. break;
  507. case KVM_REG_MIPS_CP0_CONFIG1:
  508. v = (long)kvm_read_c0_guest_config1(cop0);
  509. break;
  510. case KVM_REG_MIPS_CP0_CONFIG2:
  511. v = (long)kvm_read_c0_guest_config2(cop0);
  512. break;
  513. case KVM_REG_MIPS_CP0_CONFIG3:
  514. v = (long)kvm_read_c0_guest_config3(cop0);
  515. break;
  516. case KVM_REG_MIPS_CP0_CONFIG7:
  517. v = (long)kvm_read_c0_guest_config7(cop0);
  518. break;
  519. default:
  520. return -EINVAL;
  521. }
  522. return put_user(v, uaddr);
  523. }
  524. static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
  525. const struct kvm_one_reg *reg)
  526. {
  527. u64 __user *uaddr = (u64 __user *)(long)reg->addr;
  528. struct mips_coproc *cop0 = vcpu->arch.cop0;
  529. u64 v;
  530. if (get_user(v, uaddr) != 0)
  531. return -EFAULT;
  532. switch (reg->id) {
  533. case KVM_REG_MIPS_R0:
  534. /* Silently ignore requests to set $0 */
  535. break;
  536. case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
  537. vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
  538. break;
  539. case KVM_REG_MIPS_HI:
  540. vcpu->arch.hi = v;
  541. break;
  542. case KVM_REG_MIPS_LO:
  543. vcpu->arch.lo = v;
  544. break;
  545. case KVM_REG_MIPS_PC:
  546. vcpu->arch.pc = v;
  547. break;
  548. case KVM_REG_MIPS_CP0_INDEX:
  549. kvm_write_c0_guest_index(cop0, v);
  550. break;
  551. case KVM_REG_MIPS_CP0_CONTEXT:
  552. kvm_write_c0_guest_context(cop0, v);
  553. break;
  554. case KVM_REG_MIPS_CP0_PAGEMASK:
  555. kvm_write_c0_guest_pagemask(cop0, v);
  556. break;
  557. case KVM_REG_MIPS_CP0_WIRED:
  558. kvm_write_c0_guest_wired(cop0, v);
  559. break;
  560. case KVM_REG_MIPS_CP0_BADVADDR:
  561. kvm_write_c0_guest_badvaddr(cop0, v);
  562. break;
  563. case KVM_REG_MIPS_CP0_ENTRYHI:
  564. kvm_write_c0_guest_entryhi(cop0, v);
  565. break;
  566. case KVM_REG_MIPS_CP0_STATUS:
  567. kvm_write_c0_guest_status(cop0, v);
  568. break;
  569. case KVM_REG_MIPS_CP0_CAUSE:
  570. kvm_write_c0_guest_cause(cop0, v);
  571. break;
  572. case KVM_REG_MIPS_CP0_ERROREPC:
  573. kvm_write_c0_guest_errorepc(cop0, v);
  574. break;
  575. default:
  576. return -EINVAL;
  577. }
  578. return 0;
  579. }
  580. long
  581. kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
  582. {
  583. struct kvm_vcpu *vcpu = filp->private_data;
  584. void __user *argp = (void __user *)arg;
  585. long r;
  586. switch (ioctl) {
  587. case KVM_SET_ONE_REG:
  588. case KVM_GET_ONE_REG: {
  589. struct kvm_one_reg reg;
  590. if (copy_from_user(&reg, argp, sizeof(reg)))
  591. return -EFAULT;
  592. if (ioctl == KVM_SET_ONE_REG)
  593. return kvm_mips_set_reg(vcpu, &reg);
  594. else
  595. return kvm_mips_get_reg(vcpu, &reg);
  596. }
  597. case KVM_GET_REG_LIST: {
  598. struct kvm_reg_list __user *user_list = argp;
  599. u64 __user *reg_dest;
  600. struct kvm_reg_list reg_list;
  601. unsigned n;
  602. if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
  603. return -EFAULT;
  604. n = reg_list.n;
  605. reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
  606. if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
  607. return -EFAULT;
  608. if (n < reg_list.n)
  609. return -E2BIG;
  610. reg_dest = user_list->reg;
  611. if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
  612. sizeof(kvm_mips_get_one_regs)))
  613. return -EFAULT;
  614. return 0;
  615. }
  616. case KVM_NMI:
  617. /* Treat the NMI as a CPU reset */
  618. r = kvm_mips_reset_vcpu(vcpu);
  619. break;
  620. case KVM_INTERRUPT:
  621. {
  622. struct kvm_mips_interrupt irq;
  623. r = -EFAULT;
  624. if (copy_from_user(&irq, argp, sizeof(irq)))
  625. goto out;
  626. kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
  627. irq.irq);
  628. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  629. break;
  630. }
  631. default:
  632. r = -ENOIOCTLCMD;
  633. }
  634. out:
  635. return r;
  636. }
  637. /*
  638. * Get (and clear) the dirty memory log for a memory slot.
  639. */
  640. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
  641. {
  642. struct kvm_memory_slot *memslot;
  643. unsigned long ga, ga_end;
  644. int is_dirty = 0;
  645. int r;
  646. unsigned long n;
  647. mutex_lock(&kvm->slots_lock);
  648. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  649. if (r)
  650. goto out;
  651. /* If nothing is dirty, don't bother messing with page tables. */
  652. if (is_dirty) {
  653. memslot = &kvm->memslots->memslots[log->slot];
  654. ga = memslot->base_gfn << PAGE_SHIFT;
  655. ga_end = ga + (memslot->npages << PAGE_SHIFT);
  656. printk("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
  657. ga_end);
  658. n = kvm_dirty_bitmap_bytes(memslot);
  659. memset(memslot->dirty_bitmap, 0, n);
  660. }
  661. r = 0;
  662. out:
  663. mutex_unlock(&kvm->slots_lock);
  664. return r;
  665. }
  666. long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
  667. {
  668. long r;
  669. switch (ioctl) {
  670. default:
  671. r = -ENOIOCTLCMD;
  672. }
  673. return r;
  674. }
  675. int kvm_arch_init(void *opaque)
  676. {
  677. int ret;
  678. if (kvm_mips_callbacks) {
  679. kvm_err("kvm: module already exists\n");
  680. return -EEXIST;
  681. }
  682. ret = kvm_mips_emulation_init(&kvm_mips_callbacks);
  683. return ret;
  684. }
  685. void kvm_arch_exit(void)
  686. {
  687. kvm_mips_callbacks = NULL;
  688. }
  689. int
  690. kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
  691. {
  692. return -ENOIOCTLCMD;
  693. }
  694. int
  695. kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
  696. {
  697. return -ENOIOCTLCMD;
  698. }
  699. int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
  700. {
  701. return 0;
  702. }
  703. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  704. {
  705. return -ENOIOCTLCMD;
  706. }
  707. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  708. {
  709. return -ENOIOCTLCMD;
  710. }
  711. int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
  712. {
  713. return VM_FAULT_SIGBUS;
  714. }
  715. int kvm_dev_ioctl_check_extension(long ext)
  716. {
  717. int r;
  718. switch (ext) {
  719. case KVM_CAP_ONE_REG:
  720. r = 1;
  721. break;
  722. case KVM_CAP_COALESCED_MMIO:
  723. r = KVM_COALESCED_MMIO_PAGE_OFFSET;
  724. break;
  725. default:
  726. r = 0;
  727. break;
  728. }
  729. return r;
  730. }
  731. int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
  732. {
  733. return kvm_mips_pending_timer(vcpu);
  734. }
  735. int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
  736. {
  737. int i;
  738. struct mips_coproc *cop0;
  739. if (!vcpu)
  740. return -1;
  741. printk("VCPU Register Dump:\n");
  742. printk("\tpc = 0x%08lx\n", vcpu->arch.pc);;
  743. printk("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
  744. for (i = 0; i < 32; i += 4) {
  745. printk("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
  746. vcpu->arch.gprs[i],
  747. vcpu->arch.gprs[i + 1],
  748. vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
  749. }
  750. printk("\thi: 0x%08lx\n", vcpu->arch.hi);
  751. printk("\tlo: 0x%08lx\n", vcpu->arch.lo);
  752. cop0 = vcpu->arch.cop0;
  753. printk("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
  754. kvm_read_c0_guest_status(cop0), kvm_read_c0_guest_cause(cop0));
  755. printk("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
  756. return 0;
  757. }
  758. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  759. {
  760. int i;
  761. for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
  762. vcpu->arch.gprs[i] = regs->gpr[i];
  763. vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
  764. vcpu->arch.hi = regs->hi;
  765. vcpu->arch.lo = regs->lo;
  766. vcpu->arch.pc = regs->pc;
  767. return 0;
  768. }
  769. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  770. {
  771. int i;
  772. for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
  773. regs->gpr[i] = vcpu->arch.gprs[i];
  774. regs->hi = vcpu->arch.hi;
  775. regs->lo = vcpu->arch.lo;
  776. regs->pc = vcpu->arch.pc;
  777. return 0;
  778. }
  779. void kvm_mips_comparecount_func(unsigned long data)
  780. {
  781. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
  782. kvm_mips_callbacks->queue_timer_int(vcpu);
  783. vcpu->arch.wait = 0;
  784. if (waitqueue_active(&vcpu->wq)) {
  785. wake_up_interruptible(&vcpu->wq);
  786. }
  787. }
  788. /*
  789. * low level hrtimer wake routine.
  790. */
  791. enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
  792. {
  793. struct kvm_vcpu *vcpu;
  794. vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
  795. kvm_mips_comparecount_func((unsigned long) vcpu);
  796. hrtimer_forward_now(&vcpu->arch.comparecount_timer,
  797. ktime_set(0, MS_TO_NS(10)));
  798. return HRTIMER_RESTART;
  799. }
  800. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  801. {
  802. kvm_mips_callbacks->vcpu_init(vcpu);
  803. hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
  804. HRTIMER_MODE_REL);
  805. vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
  806. kvm_mips_init_shadow_tlb(vcpu);
  807. return 0;
  808. }
  809. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  810. {
  811. return;
  812. }
  813. int
  814. kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, struct kvm_translation *tr)
  815. {
  816. return 0;
  817. }
  818. /* Initial guest state */
  819. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  820. {
  821. return kvm_mips_callbacks->vcpu_setup(vcpu);
  822. }
  823. static
  824. void kvm_mips_set_c0_status(void)
  825. {
  826. uint32_t status = read_c0_status();
  827. if (cpu_has_fpu)
  828. status |= (ST0_CU1);
  829. if (cpu_has_dsp)
  830. status |= (ST0_MX);
  831. write_c0_status(status);
  832. ehb();
  833. }
  834. /*
  835. * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
  836. */
  837. int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
  838. {
  839. uint32_t cause = vcpu->arch.host_cp0_cause;
  840. uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
  841. uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
  842. unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
  843. enum emulation_result er = EMULATE_DONE;
  844. int ret = RESUME_GUEST;
  845. /* Set a default exit reason */
  846. run->exit_reason = KVM_EXIT_UNKNOWN;
  847. run->ready_for_interrupt_injection = 1;
  848. /* Set the appropriate status bits based on host CPU features, before we hit the scheduler */
  849. kvm_mips_set_c0_status();
  850. local_irq_enable();
  851. kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
  852. cause, opc, run, vcpu);
  853. /* Do a privilege check, if in UM most of these exit conditions end up
  854. * causing an exception to be delivered to the Guest Kernel
  855. */
  856. er = kvm_mips_check_privilege(cause, opc, run, vcpu);
  857. if (er == EMULATE_PRIV_FAIL) {
  858. goto skip_emul;
  859. } else if (er == EMULATE_FAIL) {
  860. run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
  861. ret = RESUME_HOST;
  862. goto skip_emul;
  863. }
  864. switch (exccode) {
  865. case T_INT:
  866. kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
  867. ++vcpu->stat.int_exits;
  868. trace_kvm_exit(vcpu, INT_EXITS);
  869. if (need_resched()) {
  870. cond_resched();
  871. }
  872. ret = RESUME_GUEST;
  873. break;
  874. case T_COP_UNUSABLE:
  875. kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
  876. ++vcpu->stat.cop_unusable_exits;
  877. trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
  878. ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
  879. /* XXXKYMA: Might need to return to user space */
  880. if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN) {
  881. ret = RESUME_HOST;
  882. }
  883. break;
  884. case T_TLB_MOD:
  885. ++vcpu->stat.tlbmod_exits;
  886. trace_kvm_exit(vcpu, TLBMOD_EXITS);
  887. ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
  888. break;
  889. case T_TLB_ST_MISS:
  890. kvm_debug
  891. ("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
  892. cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
  893. badvaddr);
  894. ++vcpu->stat.tlbmiss_st_exits;
  895. trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
  896. ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
  897. break;
  898. case T_TLB_LD_MISS:
  899. kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
  900. cause, opc, badvaddr);
  901. ++vcpu->stat.tlbmiss_ld_exits;
  902. trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
  903. ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
  904. break;
  905. case T_ADDR_ERR_ST:
  906. ++vcpu->stat.addrerr_st_exits;
  907. trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
  908. ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
  909. break;
  910. case T_ADDR_ERR_LD:
  911. ++vcpu->stat.addrerr_ld_exits;
  912. trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
  913. ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
  914. break;
  915. case T_SYSCALL:
  916. ++vcpu->stat.syscall_exits;
  917. trace_kvm_exit(vcpu, SYSCALL_EXITS);
  918. ret = kvm_mips_callbacks->handle_syscall(vcpu);
  919. break;
  920. case T_RES_INST:
  921. ++vcpu->stat.resvd_inst_exits;
  922. trace_kvm_exit(vcpu, RESVD_INST_EXITS);
  923. ret = kvm_mips_callbacks->handle_res_inst(vcpu);
  924. break;
  925. case T_BREAK:
  926. ++vcpu->stat.break_inst_exits;
  927. trace_kvm_exit(vcpu, BREAK_INST_EXITS);
  928. ret = kvm_mips_callbacks->handle_break(vcpu);
  929. break;
  930. default:
  931. kvm_err
  932. ("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
  933. exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
  934. kvm_read_c0_guest_status(vcpu->arch.cop0));
  935. kvm_arch_vcpu_dump_regs(vcpu);
  936. run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
  937. ret = RESUME_HOST;
  938. break;
  939. }
  940. skip_emul:
  941. local_irq_disable();
  942. if (er == EMULATE_DONE && !(ret & RESUME_HOST))
  943. kvm_mips_deliver_interrupts(vcpu, cause);
  944. if (!(ret & RESUME_HOST)) {
  945. /* Only check for signals if not already exiting to userspace */
  946. if (signal_pending(current)) {
  947. run->exit_reason = KVM_EXIT_INTR;
  948. ret = (-EINTR << 2) | RESUME_HOST;
  949. ++vcpu->stat.signal_exits;
  950. trace_kvm_exit(vcpu, SIGNAL_EXITS);
  951. }
  952. }
  953. return ret;
  954. }
  955. int __init kvm_mips_init(void)
  956. {
  957. int ret;
  958. ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
  959. if (ret)
  960. return ret;
  961. /* On MIPS, kernel modules are executed from "mapped space", which requires TLBs.
  962. * The TLB handling code is statically linked with the rest of the kernel (kvm_tlb.c)
  963. * to avoid the possibility of double faulting. The issue is that the TLB code
  964. * references routines that are part of the the KVM module,
  965. * which are only available once the module is loaded.
  966. */
  967. kvm_mips_gfn_to_pfn = gfn_to_pfn;
  968. kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
  969. kvm_mips_is_error_pfn = is_error_pfn;
  970. pr_info("KVM/MIPS Initialized\n");
  971. return 0;
  972. }
  973. void __exit kvm_mips_exit(void)
  974. {
  975. kvm_exit();
  976. kvm_mips_gfn_to_pfn = NULL;
  977. kvm_mips_release_pfn_clean = NULL;
  978. kvm_mips_is_error_pfn = NULL;
  979. pr_info("KVM/MIPS unloaded\n");
  980. }
  981. module_init(kvm_mips_init);
  982. module_exit(kvm_mips_exit);
  983. EXPORT_TRACEPOINT_SYMBOL(kvm_exit);