pci.c 24 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_MSI_VEC_BITS 6
  40. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  41. /* list of all detected zpci devices */
  42. LIST_HEAD(zpci_list);
  43. EXPORT_SYMBOL_GPL(zpci_list);
  44. DEFINE_MUTEX(zpci_list_lock);
  45. EXPORT_SYMBOL_GPL(zpci_list_lock);
  46. static struct pci_hp_callback_ops *hotplug_ops;
  47. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  48. static DEFINE_SPINLOCK(zpci_domain_lock);
  49. struct callback {
  50. irq_handler_t handler;
  51. void *data;
  52. };
  53. struct zdev_irq_map {
  54. unsigned long aibv; /* AI bit vector */
  55. int msi_vecs; /* consecutive MSI-vectors used */
  56. int __unused;
  57. struct callback cb[ZPCI_NR_MSI_VECS]; /* callback handler array */
  58. spinlock_t lock; /* protect callbacks against de-reg */
  59. };
  60. struct intr_bucket {
  61. /* amap of adapters, one bit per dev, corresponds to one irq nr */
  62. unsigned long *alloc;
  63. /* AI summary bit, global page for all devices */
  64. unsigned long *aisb;
  65. /* pointer to aibv and callback data in zdev */
  66. struct zdev_irq_map *imap[ZPCI_NR_DEVICES];
  67. /* protects the whole bucket struct */
  68. spinlock_t lock;
  69. };
  70. static struct intr_bucket *bucket;
  71. /* Adapter local summary indicator */
  72. static u8 *zpci_irq_si;
  73. /* I/O Map */
  74. static DEFINE_SPINLOCK(zpci_iomap_lock);
  75. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  76. struct zpci_iomap_entry *zpci_iomap_start;
  77. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  78. /* highest irq summary bit */
  79. static int __read_mostly aisb_max;
  80. static struct kmem_cache *zdev_irq_cache;
  81. static struct kmem_cache *zdev_fmb_cache;
  82. static inline int irq_to_msi_nr(unsigned int irq)
  83. {
  84. return irq & ZPCI_MSI_MASK;
  85. }
  86. static inline int irq_to_dev_nr(unsigned int irq)
  87. {
  88. return irq >> ZPCI_MSI_VEC_BITS;
  89. }
  90. static inline struct zdev_irq_map *get_imap(unsigned int irq)
  91. {
  92. return bucket->imap[irq_to_dev_nr(irq)];
  93. }
  94. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  95. {
  96. return (struct zpci_dev *) pdev->sysdata;
  97. }
  98. struct zpci_dev *get_zdev_by_fid(u32 fid)
  99. {
  100. struct zpci_dev *tmp, *zdev = NULL;
  101. mutex_lock(&zpci_list_lock);
  102. list_for_each_entry(tmp, &zpci_list, entry) {
  103. if (tmp->fid == fid) {
  104. zdev = tmp;
  105. break;
  106. }
  107. }
  108. mutex_unlock(&zpci_list_lock);
  109. return zdev;
  110. }
  111. bool zpci_fid_present(u32 fid)
  112. {
  113. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  114. }
  115. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  116. {
  117. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  118. }
  119. int pci_domain_nr(struct pci_bus *bus)
  120. {
  121. return ((struct zpci_dev *) bus->sysdata)->domain;
  122. }
  123. EXPORT_SYMBOL_GPL(pci_domain_nr);
  124. int pci_proc_domain(struct pci_bus *bus)
  125. {
  126. return pci_domain_nr(bus);
  127. }
  128. EXPORT_SYMBOL_GPL(pci_proc_domain);
  129. /* Modify PCI: Register adapter interruptions */
  130. static int zpci_register_airq(struct zpci_dev *zdev, unsigned int aisb,
  131. u64 aibv)
  132. {
  133. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  134. struct zpci_fib *fib;
  135. int rc;
  136. fib = (void *) get_zeroed_page(GFP_KERNEL);
  137. if (!fib)
  138. return -ENOMEM;
  139. fib->isc = PCI_ISC;
  140. fib->noi = zdev->irq_map->msi_vecs;
  141. fib->sum = 1; /* enable summary notifications */
  142. fib->aibv = aibv;
  143. fib->aibvo = 0; /* every function has its own page */
  144. fib->aisb = (u64) bucket->aisb + aisb / 8;
  145. fib->aisbo = aisb & ZPCI_MSI_MASK;
  146. rc = s390pci_mod_fc(req, fib);
  147. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  148. free_page((unsigned long) fib);
  149. return rc;
  150. }
  151. struct mod_pci_args {
  152. u64 base;
  153. u64 limit;
  154. u64 iota;
  155. u64 fmb_addr;
  156. };
  157. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  158. {
  159. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  160. struct zpci_fib *fib;
  161. int rc;
  162. /* The FIB must be available even if it's not used */
  163. fib = (void *) get_zeroed_page(GFP_KERNEL);
  164. if (!fib)
  165. return -ENOMEM;
  166. fib->pba = args->base;
  167. fib->pal = args->limit;
  168. fib->iota = args->iota;
  169. fib->fmb_addr = args->fmb_addr;
  170. rc = s390pci_mod_fc(req, fib);
  171. free_page((unsigned long) fib);
  172. return rc;
  173. }
  174. /* Modify PCI: Register I/O address translation parameters */
  175. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  176. u64 base, u64 limit, u64 iota)
  177. {
  178. struct mod_pci_args args = { base, limit, iota, 0 };
  179. WARN_ON_ONCE(iota & 0x3fff);
  180. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  181. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  182. }
  183. /* Modify PCI: Unregister I/O address translation parameters */
  184. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  185. {
  186. struct mod_pci_args args = { 0, 0, 0, 0 };
  187. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  188. }
  189. /* Modify PCI: Unregister adapter interruptions */
  190. static int zpci_unregister_airq(struct zpci_dev *zdev)
  191. {
  192. struct mod_pci_args args = { 0, 0, 0, 0 };
  193. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  194. }
  195. /* Modify PCI: Set PCI function measurement parameters */
  196. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  197. {
  198. struct mod_pci_args args = { 0, 0, 0, 0 };
  199. if (zdev->fmb)
  200. return -EINVAL;
  201. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  202. if (!zdev->fmb)
  203. return -ENOMEM;
  204. WARN_ON((u64) zdev->fmb & 0xf);
  205. args.fmb_addr = virt_to_phys(zdev->fmb);
  206. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  207. }
  208. /* Modify PCI: Disable PCI function measurement */
  209. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  210. {
  211. struct mod_pci_args args = { 0, 0, 0, 0 };
  212. int rc;
  213. if (!zdev->fmb)
  214. return -EINVAL;
  215. /* Function measurement is disabled if fmb address is zero */
  216. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  217. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  218. zdev->fmb = NULL;
  219. return rc;
  220. }
  221. #define ZPCI_PCIAS_CFGSPC 15
  222. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  223. {
  224. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  225. u64 data;
  226. int rc;
  227. rc = s390pci_load(&data, req, offset);
  228. if (!rc) {
  229. data = data << ((8 - len) * 8);
  230. data = le64_to_cpu(data);
  231. *val = (u32) data;
  232. } else
  233. *val = 0xffffffff;
  234. return rc;
  235. }
  236. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  237. {
  238. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  239. u64 data = val;
  240. int rc;
  241. data = cpu_to_le64(data);
  242. data = data >> ((8 - len) * 8);
  243. rc = s390pci_store(data, req, offset);
  244. return rc;
  245. }
  246. void enable_irq(unsigned int irq)
  247. {
  248. struct msi_desc *msi = irq_get_msi_desc(irq);
  249. zpci_msi_set_mask_bits(msi, 1, 0);
  250. }
  251. EXPORT_SYMBOL_GPL(enable_irq);
  252. void disable_irq(unsigned int irq)
  253. {
  254. struct msi_desc *msi = irq_get_msi_desc(irq);
  255. zpci_msi_set_mask_bits(msi, 1, 1);
  256. }
  257. EXPORT_SYMBOL_GPL(disable_irq);
  258. void pcibios_fixup_bus(struct pci_bus *bus)
  259. {
  260. }
  261. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  262. resource_size_t size,
  263. resource_size_t align)
  264. {
  265. return 0;
  266. }
  267. /* combine single writes by using store-block insn */
  268. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  269. {
  270. zpci_memcpy_toio(to, from, count);
  271. }
  272. /* Create a virtual mapping cookie for a PCI BAR */
  273. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  274. {
  275. struct zpci_dev *zdev = get_zdev(pdev);
  276. u64 addr;
  277. int idx;
  278. if ((bar & 7) != bar)
  279. return NULL;
  280. idx = zdev->bars[bar].map_idx;
  281. spin_lock(&zpci_iomap_lock);
  282. zpci_iomap_start[idx].fh = zdev->fh;
  283. zpci_iomap_start[idx].bar = bar;
  284. spin_unlock(&zpci_iomap_lock);
  285. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  286. return (void __iomem *) addr;
  287. }
  288. EXPORT_SYMBOL_GPL(pci_iomap);
  289. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  290. {
  291. unsigned int idx;
  292. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  293. spin_lock(&zpci_iomap_lock);
  294. zpci_iomap_start[idx].fh = 0;
  295. zpci_iomap_start[idx].bar = 0;
  296. spin_unlock(&zpci_iomap_lock);
  297. }
  298. EXPORT_SYMBOL_GPL(pci_iounmap);
  299. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  300. int size, u32 *val)
  301. {
  302. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  303. int ret;
  304. if (!zdev || devfn != ZPCI_DEVFN)
  305. ret = -ENODEV;
  306. else
  307. ret = zpci_cfg_load(zdev, where, val, size);
  308. return ret;
  309. }
  310. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  311. int size, u32 val)
  312. {
  313. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  314. int ret;
  315. if (!zdev || devfn != ZPCI_DEVFN)
  316. ret = -ENODEV;
  317. else
  318. ret = zpci_cfg_store(zdev, where, val, size);
  319. return ret;
  320. }
  321. static struct pci_ops pci_root_ops = {
  322. .read = pci_read,
  323. .write = pci_write,
  324. };
  325. /* store the last handled bit to implement fair scheduling of devices */
  326. static DEFINE_PER_CPU(unsigned long, next_sbit);
  327. static void zpci_irq_handler(void *dont, void *need)
  328. {
  329. unsigned long sbit, mbit, last = 0, start = __get_cpu_var(next_sbit);
  330. int rescan = 0, max = aisb_max;
  331. struct zdev_irq_map *imap;
  332. inc_irq_stat(IRQIO_PCI);
  333. sbit = start;
  334. scan:
  335. /* find summary_bit */
  336. for_each_set_bit_left_cont(sbit, bucket->aisb, max) {
  337. clear_bit(63 - (sbit & 63), bucket->aisb + (sbit >> 6));
  338. last = sbit;
  339. /* find vector bit */
  340. imap = bucket->imap[sbit];
  341. for_each_set_bit_left(mbit, &imap->aibv, imap->msi_vecs) {
  342. inc_irq_stat(IRQIO_MSI);
  343. clear_bit(63 - mbit, &imap->aibv);
  344. spin_lock(&imap->lock);
  345. if (imap->cb[mbit].handler)
  346. imap->cb[mbit].handler(mbit,
  347. imap->cb[mbit].data);
  348. spin_unlock(&imap->lock);
  349. }
  350. }
  351. if (rescan)
  352. goto out;
  353. /* scan the skipped bits */
  354. if (start > 0) {
  355. sbit = 0;
  356. max = start;
  357. start = 0;
  358. goto scan;
  359. }
  360. /* enable interrupts again */
  361. set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  362. /* check again to not lose initiative */
  363. rmb();
  364. max = aisb_max;
  365. sbit = find_first_bit_left(bucket->aisb, max);
  366. if (sbit != max) {
  367. rescan++;
  368. goto scan;
  369. }
  370. out:
  371. /* store next device bit to scan */
  372. __get_cpu_var(next_sbit) = (++last >= aisb_max) ? 0 : last;
  373. }
  374. /* msi_vecs - number of requested interrupts, 0 place function to error state */
  375. static int zpci_setup_msi(struct pci_dev *pdev, int msi_vecs)
  376. {
  377. struct zpci_dev *zdev = get_zdev(pdev);
  378. unsigned int aisb, msi_nr;
  379. struct msi_desc *msi;
  380. int rc;
  381. /* store the number of used MSI vectors */
  382. zdev->irq_map->msi_vecs = min(msi_vecs, ZPCI_NR_MSI_VECS);
  383. spin_lock(&bucket->lock);
  384. aisb = find_first_zero_bit(bucket->alloc, PAGE_SIZE);
  385. /* alloc map exhausted? */
  386. if (aisb == PAGE_SIZE) {
  387. spin_unlock(&bucket->lock);
  388. return -EIO;
  389. }
  390. set_bit(aisb, bucket->alloc);
  391. spin_unlock(&bucket->lock);
  392. zdev->aisb = aisb;
  393. if (aisb + 1 > aisb_max)
  394. aisb_max = aisb + 1;
  395. /* wire up IRQ shortcut pointer */
  396. bucket->imap[zdev->aisb] = zdev->irq_map;
  397. pr_debug("%s: imap[%u] linked to %p\n", __func__, zdev->aisb, zdev->irq_map);
  398. /* TODO: irq number 0 wont be found if we return less than requested MSIs.
  399. * ignore it for now and fix in common code.
  400. */
  401. msi_nr = aisb << ZPCI_MSI_VEC_BITS;
  402. list_for_each_entry(msi, &pdev->msi_list, list) {
  403. rc = zpci_setup_msi_irq(zdev, msi, msi_nr,
  404. aisb << ZPCI_MSI_VEC_BITS);
  405. if (rc)
  406. return rc;
  407. msi_nr++;
  408. }
  409. rc = zpci_register_airq(zdev, aisb, (u64) &zdev->irq_map->aibv);
  410. if (rc) {
  411. clear_bit(aisb, bucket->alloc);
  412. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  413. return rc;
  414. }
  415. return (zdev->irq_map->msi_vecs == msi_vecs) ?
  416. 0 : zdev->irq_map->msi_vecs;
  417. }
  418. static void zpci_teardown_msi(struct pci_dev *pdev)
  419. {
  420. struct zpci_dev *zdev = get_zdev(pdev);
  421. struct msi_desc *msi;
  422. int aisb, rc;
  423. rc = zpci_unregister_airq(zdev);
  424. if (rc) {
  425. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  426. return;
  427. }
  428. msi = list_first_entry(&pdev->msi_list, struct msi_desc, list);
  429. aisb = irq_to_dev_nr(msi->irq);
  430. list_for_each_entry(msi, &pdev->msi_list, list)
  431. zpci_teardown_msi_irq(zdev, msi);
  432. clear_bit(aisb, bucket->alloc);
  433. if (aisb + 1 == aisb_max)
  434. aisb_max--;
  435. }
  436. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  437. {
  438. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  439. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  440. return -EINVAL;
  441. return zpci_setup_msi(pdev, nvec);
  442. }
  443. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  444. {
  445. pr_info("%s: on pdev: %p\n", __func__, pdev);
  446. zpci_teardown_msi(pdev);
  447. }
  448. static void zpci_map_resources(struct zpci_dev *zdev)
  449. {
  450. struct pci_dev *pdev = zdev->pdev;
  451. resource_size_t len;
  452. int i;
  453. for (i = 0; i < PCI_BAR_COUNT; i++) {
  454. len = pci_resource_len(pdev, i);
  455. if (!len)
  456. continue;
  457. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  458. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  459. pr_debug("BAR%i: -> start: %Lx end: %Lx\n",
  460. i, pdev->resource[i].start, pdev->resource[i].end);
  461. }
  462. }
  463. static void zpci_unmap_resources(struct zpci_dev *zdev)
  464. {
  465. struct pci_dev *pdev = zdev->pdev;
  466. resource_size_t len;
  467. int i;
  468. for (i = 0; i < PCI_BAR_COUNT; i++) {
  469. len = pci_resource_len(pdev, i);
  470. if (!len)
  471. continue;
  472. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  473. }
  474. }
  475. struct zpci_dev *zpci_alloc_device(void)
  476. {
  477. struct zpci_dev *zdev;
  478. /* Alloc memory for our private pci device data */
  479. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  480. if (!zdev)
  481. return ERR_PTR(-ENOMEM);
  482. /* Alloc aibv & callback space */
  483. zdev->irq_map = kmem_cache_zalloc(zdev_irq_cache, GFP_KERNEL);
  484. if (!zdev->irq_map)
  485. goto error;
  486. WARN_ON((u64) zdev->irq_map & 0xff);
  487. return zdev;
  488. error:
  489. kfree(zdev);
  490. return ERR_PTR(-ENOMEM);
  491. }
  492. void zpci_free_device(struct zpci_dev *zdev)
  493. {
  494. kmem_cache_free(zdev_irq_cache, zdev->irq_map);
  495. kfree(zdev);
  496. }
  497. /*
  498. * Too late for any s390 specific setup, since interrupts must be set up
  499. * already which requires DMA setup too and the pci scan will access the
  500. * config space, which only works if the function handle is enabled.
  501. */
  502. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  503. {
  504. struct resource *res;
  505. u16 cmd;
  506. int i;
  507. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  508. for (i = 0; i < PCI_BAR_COUNT; i++) {
  509. res = &pdev->resource[i];
  510. if (res->flags & IORESOURCE_IO)
  511. return -EINVAL;
  512. if (res->flags & IORESOURCE_MEM)
  513. cmd |= PCI_COMMAND_MEMORY;
  514. }
  515. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  516. return 0;
  517. }
  518. int pcibios_add_platform_entries(struct pci_dev *pdev)
  519. {
  520. return zpci_sysfs_add_device(&pdev->dev);
  521. }
  522. int zpci_request_irq(unsigned int irq, irq_handler_t handler, void *data)
  523. {
  524. int msi_nr = irq_to_msi_nr(irq);
  525. struct zdev_irq_map *imap;
  526. struct msi_desc *msi;
  527. msi = irq_get_msi_desc(irq);
  528. if (!msi)
  529. return -EIO;
  530. imap = get_imap(irq);
  531. spin_lock_init(&imap->lock);
  532. pr_debug("%s: register handler for IRQ:MSI %d:%d\n", __func__, irq >> 6, msi_nr);
  533. imap->cb[msi_nr].handler = handler;
  534. imap->cb[msi_nr].data = data;
  535. /*
  536. * The generic MSI code returns with the interrupt disabled on the
  537. * card, using the MSI mask bits. Firmware doesn't appear to unmask
  538. * at that level, so we do it here by hand.
  539. */
  540. zpci_msi_set_mask_bits(msi, 1, 0);
  541. return 0;
  542. }
  543. void zpci_free_irq(unsigned int irq)
  544. {
  545. struct zdev_irq_map *imap = get_imap(irq);
  546. int msi_nr = irq_to_msi_nr(irq);
  547. unsigned long flags;
  548. pr_debug("%s: for irq: %d\n", __func__, irq);
  549. spin_lock_irqsave(&imap->lock, flags);
  550. imap->cb[msi_nr].handler = NULL;
  551. imap->cb[msi_nr].data = NULL;
  552. spin_unlock_irqrestore(&imap->lock, flags);
  553. }
  554. int request_irq(unsigned int irq, irq_handler_t handler,
  555. unsigned long irqflags, const char *devname, void *dev_id)
  556. {
  557. pr_debug("%s: irq: %d handler: %p flags: %lx dev: %s\n",
  558. __func__, irq, handler, irqflags, devname);
  559. return zpci_request_irq(irq, handler, dev_id);
  560. }
  561. EXPORT_SYMBOL_GPL(request_irq);
  562. void free_irq(unsigned int irq, void *dev_id)
  563. {
  564. zpci_free_irq(irq);
  565. }
  566. EXPORT_SYMBOL_GPL(free_irq);
  567. static int __init zpci_irq_init(void)
  568. {
  569. int cpu, rc;
  570. bucket = kzalloc(sizeof(*bucket), GFP_KERNEL);
  571. if (!bucket)
  572. return -ENOMEM;
  573. bucket->aisb = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  574. if (!bucket->aisb) {
  575. rc = -ENOMEM;
  576. goto out_aisb;
  577. }
  578. bucket->alloc = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  579. if (!bucket->alloc) {
  580. rc = -ENOMEM;
  581. goto out_alloc;
  582. }
  583. isc_register(PCI_ISC);
  584. zpci_irq_si = s390_register_adapter_interrupt(&zpci_irq_handler, NULL, PCI_ISC);
  585. if (IS_ERR(zpci_irq_si)) {
  586. rc = PTR_ERR(zpci_irq_si);
  587. zpci_irq_si = NULL;
  588. goto out_ai;
  589. }
  590. for_each_online_cpu(cpu)
  591. per_cpu(next_sbit, cpu) = 0;
  592. spin_lock_init(&bucket->lock);
  593. /* set summary to 1 to be called every time for the ISC */
  594. *zpci_irq_si = 1;
  595. set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  596. return 0;
  597. out_ai:
  598. isc_unregister(PCI_ISC);
  599. free_page((unsigned long) bucket->alloc);
  600. out_alloc:
  601. free_page((unsigned long) bucket->aisb);
  602. out_aisb:
  603. kfree(bucket);
  604. return rc;
  605. }
  606. static void zpci_irq_exit(void)
  607. {
  608. free_page((unsigned long) bucket->alloc);
  609. free_page((unsigned long) bucket->aisb);
  610. s390_unregister_adapter_interrupt(zpci_irq_si, PCI_ISC);
  611. isc_unregister(PCI_ISC);
  612. kfree(bucket);
  613. }
  614. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  615. unsigned long flags, int domain)
  616. {
  617. struct resource *r;
  618. char *name;
  619. int rc;
  620. r = kzalloc(sizeof(*r), GFP_KERNEL);
  621. if (!r)
  622. return ERR_PTR(-ENOMEM);
  623. r->start = start;
  624. r->end = r->start + size - 1;
  625. r->flags = flags;
  626. r->parent = &iomem_resource;
  627. name = kmalloc(18, GFP_KERNEL);
  628. if (!name) {
  629. kfree(r);
  630. return ERR_PTR(-ENOMEM);
  631. }
  632. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  633. r->name = name;
  634. rc = request_resource(&iomem_resource, r);
  635. if (rc)
  636. pr_debug("request resource %pR failed\n", r);
  637. return r;
  638. }
  639. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  640. {
  641. int entry;
  642. spin_lock(&zpci_iomap_lock);
  643. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  644. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  645. spin_unlock(&zpci_iomap_lock);
  646. return -ENOSPC;
  647. }
  648. set_bit(entry, zpci_iomap);
  649. spin_unlock(&zpci_iomap_lock);
  650. return entry;
  651. }
  652. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  653. {
  654. spin_lock(&zpci_iomap_lock);
  655. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  656. clear_bit(entry, zpci_iomap);
  657. spin_unlock(&zpci_iomap_lock);
  658. }
  659. int pcibios_add_device(struct pci_dev *pdev)
  660. {
  661. struct zpci_dev *zdev = get_zdev(pdev);
  662. zdev->pdev = pdev;
  663. zpci_debug_init_device(zdev);
  664. zpci_fmb_enable_device(zdev);
  665. zpci_map_resources(zdev);
  666. return 0;
  667. }
  668. void pcibios_release_device(struct pci_dev *pdev)
  669. {
  670. struct zpci_dev *zdev = get_zdev(pdev);
  671. zpci_unmap_resources(zdev);
  672. zpci_fmb_disable_device(zdev);
  673. zpci_debug_exit_device(zdev);
  674. zdev->pdev = NULL;
  675. }
  676. static int zpci_scan_bus(struct zpci_dev *zdev)
  677. {
  678. struct resource *res;
  679. LIST_HEAD(resources);
  680. int i;
  681. /* allocate mapping entry for each used bar */
  682. for (i = 0; i < PCI_BAR_COUNT; i++) {
  683. unsigned long addr, size, flags;
  684. int entry;
  685. if (!zdev->bars[i].size)
  686. continue;
  687. entry = zpci_alloc_iomap(zdev);
  688. if (entry < 0)
  689. return entry;
  690. zdev->bars[i].map_idx = entry;
  691. /* only MMIO is supported */
  692. flags = IORESOURCE_MEM;
  693. if (zdev->bars[i].val & 8)
  694. flags |= IORESOURCE_PREFETCH;
  695. if (zdev->bars[i].val & 4)
  696. flags |= IORESOURCE_MEM_64;
  697. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  698. size = 1UL << zdev->bars[i].size;
  699. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  700. if (IS_ERR(res)) {
  701. zpci_free_iomap(zdev, entry);
  702. return PTR_ERR(res);
  703. }
  704. pci_add_resource(&resources, res);
  705. }
  706. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  707. zdev, &resources);
  708. if (!zdev->bus)
  709. return -EIO;
  710. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  711. return 0;
  712. }
  713. static int zpci_alloc_domain(struct zpci_dev *zdev)
  714. {
  715. spin_lock(&zpci_domain_lock);
  716. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  717. if (zdev->domain == ZPCI_NR_DEVICES) {
  718. spin_unlock(&zpci_domain_lock);
  719. return -ENOSPC;
  720. }
  721. set_bit(zdev->domain, zpci_domain);
  722. spin_unlock(&zpci_domain_lock);
  723. return 0;
  724. }
  725. static void zpci_free_domain(struct zpci_dev *zdev)
  726. {
  727. spin_lock(&zpci_domain_lock);
  728. clear_bit(zdev->domain, zpci_domain);
  729. spin_unlock(&zpci_domain_lock);
  730. }
  731. int zpci_enable_device(struct zpci_dev *zdev)
  732. {
  733. int rc;
  734. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  735. if (rc)
  736. goto out;
  737. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  738. rc = zpci_dma_init_device(zdev);
  739. if (rc)
  740. goto out_dma;
  741. return 0;
  742. out_dma:
  743. clp_disable_fh(zdev);
  744. out:
  745. return rc;
  746. }
  747. EXPORT_SYMBOL_GPL(zpci_enable_device);
  748. int zpci_disable_device(struct zpci_dev *zdev)
  749. {
  750. zpci_dma_exit_device(zdev);
  751. return clp_disable_fh(zdev);
  752. }
  753. EXPORT_SYMBOL_GPL(zpci_disable_device);
  754. int zpci_create_device(struct zpci_dev *zdev)
  755. {
  756. int rc;
  757. rc = zpci_alloc_domain(zdev);
  758. if (rc)
  759. goto out;
  760. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  761. rc = zpci_enable_device(zdev);
  762. if (rc)
  763. goto out_free;
  764. zdev->state = ZPCI_FN_STATE_ONLINE;
  765. }
  766. rc = zpci_scan_bus(zdev);
  767. if (rc)
  768. goto out_disable;
  769. mutex_lock(&zpci_list_lock);
  770. list_add_tail(&zdev->entry, &zpci_list);
  771. if (hotplug_ops)
  772. hotplug_ops->create_slot(zdev);
  773. mutex_unlock(&zpci_list_lock);
  774. return 0;
  775. out_disable:
  776. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  777. zpci_disable_device(zdev);
  778. out_free:
  779. zpci_free_domain(zdev);
  780. out:
  781. return rc;
  782. }
  783. void zpci_stop_device(struct zpci_dev *zdev)
  784. {
  785. zpci_dma_exit_device(zdev);
  786. /*
  787. * Note: SCLP disables fh via set-pci-fn so don't
  788. * do that here.
  789. */
  790. }
  791. EXPORT_SYMBOL_GPL(zpci_stop_device);
  792. static inline int barsize(u8 size)
  793. {
  794. return (size) ? (1 << size) >> 10 : 0;
  795. }
  796. static int zpci_mem_init(void)
  797. {
  798. zdev_irq_cache = kmem_cache_create("PCI_IRQ_cache", sizeof(struct zdev_irq_map),
  799. L1_CACHE_BYTES, SLAB_HWCACHE_ALIGN, NULL);
  800. if (!zdev_irq_cache)
  801. goto error_zdev;
  802. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  803. 16, 0, NULL);
  804. if (!zdev_fmb_cache)
  805. goto error_fmb;
  806. /* TODO: use realloc */
  807. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  808. GFP_KERNEL);
  809. if (!zpci_iomap_start)
  810. goto error_iomap;
  811. return 0;
  812. error_iomap:
  813. kmem_cache_destroy(zdev_fmb_cache);
  814. error_fmb:
  815. kmem_cache_destroy(zdev_irq_cache);
  816. error_zdev:
  817. return -ENOMEM;
  818. }
  819. static void zpci_mem_exit(void)
  820. {
  821. kfree(zpci_iomap_start);
  822. kmem_cache_destroy(zdev_irq_cache);
  823. kmem_cache_destroy(zdev_fmb_cache);
  824. }
  825. void zpci_register_hp_ops(struct pci_hp_callback_ops *ops)
  826. {
  827. mutex_lock(&zpci_list_lock);
  828. hotplug_ops = ops;
  829. mutex_unlock(&zpci_list_lock);
  830. }
  831. EXPORT_SYMBOL_GPL(zpci_register_hp_ops);
  832. void zpci_deregister_hp_ops(void)
  833. {
  834. mutex_lock(&zpci_list_lock);
  835. hotplug_ops = NULL;
  836. mutex_unlock(&zpci_list_lock);
  837. }
  838. EXPORT_SYMBOL_GPL(zpci_deregister_hp_ops);
  839. unsigned int s390_pci_probe;
  840. EXPORT_SYMBOL_GPL(s390_pci_probe);
  841. char * __init pcibios_setup(char *str)
  842. {
  843. if (!strcmp(str, "on")) {
  844. s390_pci_probe = 1;
  845. return NULL;
  846. }
  847. return str;
  848. }
  849. static int __init pci_base_init(void)
  850. {
  851. int rc;
  852. if (!s390_pci_probe)
  853. return 0;
  854. if (!test_facility(2) || !test_facility(69)
  855. || !test_facility(71) || !test_facility(72))
  856. return 0;
  857. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  858. test_facility(69), test_facility(70),
  859. test_facility(71));
  860. rc = zpci_debug_init();
  861. if (rc)
  862. return rc;
  863. rc = zpci_mem_init();
  864. if (rc)
  865. goto out_mem;
  866. rc = zpci_msihash_init();
  867. if (rc)
  868. goto out_hash;
  869. rc = zpci_irq_init();
  870. if (rc)
  871. goto out_irq;
  872. rc = zpci_dma_init();
  873. if (rc)
  874. goto out_dma;
  875. rc = clp_find_pci_devices();
  876. if (rc)
  877. goto out_find;
  878. return 0;
  879. out_find:
  880. zpci_dma_exit();
  881. out_dma:
  882. zpci_irq_exit();
  883. out_irq:
  884. zpci_msihash_exit();
  885. out_hash:
  886. zpci_mem_exit();
  887. out_mem:
  888. zpci_debug_exit();
  889. return rc;
  890. }
  891. subsys_initcall(pci_base_init);