nouveau_drv.c 13 KB

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  1. /*
  2. * Copyright 2005 Stephane Marchesin.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include "drm_crtc_helper.h"
  29. #include "nouveau_drv.h"
  30. #include "nouveau_abi16.h"
  31. #include "nouveau_hw.h"
  32. #include "nouveau_fb.h"
  33. #include "nouveau_fbcon.h"
  34. #include "nouveau_pm.h"
  35. #include <engine/fifo.h>
  36. #include "nv50_display.h"
  37. #include "drm_pciids.h"
  38. MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  39. int nouveau_modeset = -1;
  40. module_param_named(modeset, nouveau_modeset, int, 0400);
  41. MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  42. int nouveau_vram_pushbuf;
  43. module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  44. MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  45. int nouveau_vram_notify = 0;
  46. module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  47. MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
  48. char *nouveau_vram_type;
  49. module_param_named(vram_type, nouveau_vram_type, charp, 0400);
  50. MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  51. int nouveau_duallink = 1;
  52. module_param_named(duallink, nouveau_duallink, int, 0400);
  53. MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  54. int nouveau_uscript_lvds = -1;
  55. module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  56. MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  57. int nouveau_uscript_tmds = -1;
  58. module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  59. MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  60. int nouveau_ignorelid = 0;
  61. module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  62. MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  63. int nouveau_noaccel = -1;
  64. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  65. MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  66. int nouveau_nofbaccel = 0;
  67. module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  68. MODULE_PARM_DESC(force_post, "Force POST");
  69. int nouveau_force_post = 0;
  70. module_param_named(force_post, nouveau_force_post, int, 0400);
  71. MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  72. int nouveau_override_conntype = 0;
  73. module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  74. MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
  75. int nouveau_tv_disable = 0;
  76. module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  77. MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  78. "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  79. "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  80. "\t\tDefault: PAL\n"
  81. "\t\t*NOTE* Ignored for cards with external TV encoders.");
  82. char *nouveau_tv_norm;
  83. module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  84. MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  85. "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  86. "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  87. "\t\t0x100 vgaattr, 0x200 EVO (G80+)");
  88. int nouveau_reg_debug;
  89. module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  90. MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
  91. char *nouveau_perflvl;
  92. module_param_named(perflvl, nouveau_perflvl, charp, 0400);
  93. MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
  94. int nouveau_perflvl_wr;
  95. module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
  96. MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
  97. int nouveau_msi;
  98. module_param_named(msi, nouveau_msi, int, 0400);
  99. MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
  100. int nouveau_ctxfw;
  101. module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
  102. MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
  103. int nouveau_mxmdcb = 1;
  104. module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
  105. int nouveau_fbpercrtc;
  106. #if 0
  107. module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  108. #endif
  109. static struct drm_driver driver;
  110. int __devinit
  111. nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  112. {
  113. return drm_get_pci_dev(pdev, ent, &driver);
  114. }
  115. void
  116. nouveau_pci_remove(struct pci_dev *pdev)
  117. {
  118. struct drm_device *dev = pci_get_drvdata(pdev);
  119. drm_put_dev(dev);
  120. }
  121. int
  122. nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  123. {
  124. struct drm_device *dev = pci_get_drvdata(pdev);
  125. struct drm_nouveau_private *dev_priv = dev->dev_private;
  126. struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
  127. struct nouveau_channel *chan;
  128. struct drm_crtc *crtc;
  129. int ret, i, e;
  130. NV_INFO(dev, "Disabling display...\n");
  131. nouveau_display_fini(dev);
  132. NV_INFO(dev, "Disabling fbcon...\n");
  133. nouveau_fbcon_set_suspend(dev, 1);
  134. NV_INFO(dev, "Unpinning framebuffer(s)...\n");
  135. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  136. struct nouveau_framebuffer *nouveau_fb;
  137. nouveau_fb = nouveau_framebuffer(crtc->fb);
  138. if (!nouveau_fb || !nouveau_fb->nvbo)
  139. continue;
  140. nouveau_bo_unpin(nouveau_fb->nvbo);
  141. }
  142. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  143. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  144. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  145. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  146. }
  147. NV_INFO(dev, "Evicting buffers...\n");
  148. ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
  149. NV_INFO(dev, "Idling channels...\n");
  150. for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
  151. chan = dev_priv->channels.ptr[i];
  152. if (chan && chan->pushbuf_bo)
  153. nouveau_channel_idle(chan);
  154. }
  155. for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
  156. if (!dev_priv->eng[e])
  157. continue;
  158. ret = dev_priv->eng[e]->fini(dev, e, true);
  159. if (ret) {
  160. NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
  161. goto out_abort;
  162. }
  163. }
  164. return 0;
  165. out_abort:
  166. NV_INFO(dev, "Re-enabling acceleration..\n");
  167. for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
  168. if (dev_priv->eng[e])
  169. dev_priv->eng[e]->init(dev, e);
  170. }
  171. return ret;
  172. }
  173. int
  174. nouveau_pci_resume(struct pci_dev *pdev)
  175. {
  176. struct drm_device *dev = pci_get_drvdata(pdev);
  177. struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
  178. struct drm_nouveau_private *dev_priv = dev->dev_private;
  179. struct nouveau_engine *engine = &dev_priv->engine;
  180. struct drm_crtc *crtc;
  181. int ret, i;
  182. /* Make the CRTCs accessible */
  183. engine->display.early_init(dev);
  184. NV_INFO(dev, "POSTing device...\n");
  185. ret = nouveau_run_vbios_init(dev);
  186. if (ret)
  187. return ret;
  188. NV_INFO(dev, "Reinitialising engines...\n");
  189. for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
  190. if (dev_priv->eng[i])
  191. dev_priv->eng[i]->init(dev, i);
  192. }
  193. nouveau_irq_postinstall(dev);
  194. /* Re-write SKIPS, they'll have been lost over the suspend */
  195. if (nouveau_vram_pushbuf) {
  196. struct nouveau_channel *chan;
  197. int j;
  198. for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
  199. chan = dev_priv->channels.ptr[i];
  200. if (!chan || !chan->pushbuf_bo)
  201. continue;
  202. for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
  203. nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
  204. }
  205. }
  206. nouveau_pm_resume(dev);
  207. NV_INFO(dev, "Restoring mode...\n");
  208. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  209. struct nouveau_framebuffer *nouveau_fb;
  210. nouveau_fb = nouveau_framebuffer(crtc->fb);
  211. if (!nouveau_fb || !nouveau_fb->nvbo)
  212. continue;
  213. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  214. }
  215. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  216. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  217. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  218. if (!ret)
  219. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  220. if (ret)
  221. NV_ERROR(dev, "Could not pin/map cursor.\n");
  222. }
  223. nouveau_fbcon_set_suspend(dev, 0);
  224. nouveau_fbcon_zfill_all(dev);
  225. nouveau_display_init(dev);
  226. /* Force CLUT to get re-loaded during modeset */
  227. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  228. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  229. nv_crtc->lut.depth = 0;
  230. }
  231. drm_helper_resume_force_mode(dev);
  232. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  233. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  234. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  235. nv_crtc->cursor.set_offset(nv_crtc, offset);
  236. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  237. nv_crtc->cursor_saved_y);
  238. }
  239. return 0;
  240. }
  241. static struct drm_ioctl_desc nouveau_ioctls[] = {
  242. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  243. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  244. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  245. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  246. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  247. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  248. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  249. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  250. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  251. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  252. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  253. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  254. };
  255. static const struct file_operations nouveau_driver_fops = {
  256. .owner = THIS_MODULE,
  257. .open = drm_open,
  258. .release = drm_release,
  259. .unlocked_ioctl = drm_ioctl,
  260. .mmap = nouveau_ttm_mmap,
  261. .poll = drm_poll,
  262. .fasync = drm_fasync,
  263. .read = drm_read,
  264. #if defined(CONFIG_COMPAT)
  265. .compat_ioctl = nouveau_compat_ioctl,
  266. #endif
  267. .llseek = noop_llseek,
  268. };
  269. int nouveau_drm_load(struct drm_device *, unsigned long);
  270. int nouveau_drm_unload(struct drm_device *);
  271. static struct drm_driver driver = {
  272. .driver_features =
  273. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  274. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  275. DRIVER_MODESET | DRIVER_PRIME,
  276. .load = nouveau_drm_load,
  277. .firstopen = nouveau_firstopen,
  278. .lastclose = nouveau_lastclose,
  279. .unload = nouveau_drm_unload,
  280. .open = nouveau_open,
  281. .preclose = nouveau_preclose,
  282. .postclose = nouveau_postclose,
  283. #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
  284. .debugfs_init = nouveau_debugfs_init,
  285. .debugfs_cleanup = nouveau_debugfs_takedown,
  286. #endif
  287. .irq_preinstall = nouveau_irq_preinstall,
  288. .irq_postinstall = nouveau_irq_postinstall,
  289. .irq_uninstall = nouveau_irq_uninstall,
  290. .irq_handler = nouveau_irq_handler,
  291. .get_vblank_counter = drm_vblank_count,
  292. .enable_vblank = nouveau_vblank_enable,
  293. .disable_vblank = nouveau_vblank_disable,
  294. .ioctls = nouveau_ioctls,
  295. .fops = &nouveau_driver_fops,
  296. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  297. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  298. .gem_prime_export = nouveau_gem_prime_export,
  299. .gem_prime_import = nouveau_gem_prime_import,
  300. .gem_init_object = nouveau_gem_object_new,
  301. .gem_free_object = nouveau_gem_object_del,
  302. .gem_open_object = nouveau_gem_object_open,
  303. .gem_close_object = nouveau_gem_object_close,
  304. .dumb_create = nouveau_display_dumb_create,
  305. .dumb_map_offset = nouveau_display_dumb_map_offset,
  306. .dumb_destroy = nouveau_display_dumb_destroy,
  307. .name = DRIVER_NAME,
  308. .desc = DRIVER_DESC,
  309. #ifdef GIT_REVISION
  310. .date = GIT_REVISION,
  311. #else
  312. .date = DRIVER_DATE,
  313. #endif
  314. .major = DRIVER_MAJOR,
  315. .minor = DRIVER_MINOR,
  316. .patchlevel = DRIVER_PATCHLEVEL,
  317. };
  318. int __init nouveau_init(struct pci_driver *pdrv)
  319. {
  320. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  321. if (nouveau_modeset == -1) {
  322. #ifdef CONFIG_VGA_CONSOLE
  323. if (vgacon_text_force())
  324. nouveau_modeset = 0;
  325. else
  326. #endif
  327. nouveau_modeset = 1;
  328. }
  329. if (!nouveau_modeset)
  330. return 0;
  331. nouveau_register_dsm_handler();
  332. return drm_pci_init(&driver, pdrv);
  333. }
  334. void __exit nouveau_exit(struct pci_driver *pdrv)
  335. {
  336. if (!nouveau_modeset)
  337. return;
  338. drm_pci_exit(&driver, pdrv);
  339. nouveau_unregister_dsm_handler();
  340. }