qla_os.c 101 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/moduleparam.h>
  9. #include <linux/vmalloc.h>
  10. #include <linux/delay.h>
  11. #include <linux/kthread.h>
  12. #include <linux/mutex.h>
  13. #include <linux/kobject.h>
  14. #include <linux/slab.h>
  15. #include <scsi/scsi_tcq.h>
  16. #include <scsi/scsicam.h>
  17. #include <scsi/scsi_transport.h>
  18. #include <scsi/scsi_transport_fc.h>
  19. /*
  20. * Driver version
  21. */
  22. char qla2x00_version_str[40];
  23. static int apidev_major;
  24. /*
  25. * SRB allocation cache
  26. */
  27. static struct kmem_cache *srb_cachep;
  28. /*
  29. * CT6 CTX allocation cache
  30. */
  31. static struct kmem_cache *ctx_cachep;
  32. int ql2xlogintimeout = 20;
  33. module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
  34. MODULE_PARM_DESC(ql2xlogintimeout,
  35. "Login timeout value in seconds.");
  36. int qlport_down_retry;
  37. module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
  38. MODULE_PARM_DESC(qlport_down_retry,
  39. "Maximum number of command retries to a port that returns "
  40. "a PORT-DOWN status.");
  41. int ql2xplogiabsentdevice;
  42. module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  43. MODULE_PARM_DESC(ql2xplogiabsentdevice,
  44. "Option to enable PLOGI to devices that are not present after "
  45. "a Fabric scan. This is needed for several broken switches. "
  46. "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  47. int ql2xloginretrycount = 0;
  48. module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
  49. MODULE_PARM_DESC(ql2xloginretrycount,
  50. "Specify an alternate value for the NVRAM login retry count.");
  51. int ql2xallocfwdump = 1;
  52. module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
  53. MODULE_PARM_DESC(ql2xallocfwdump,
  54. "Option to enable allocation of memory for a firmware dump "
  55. "during HBA initialization. Memory allocation requirements "
  56. "vary by ISP type. Default is 1 - allocate memory.");
  57. int ql2xextended_error_logging;
  58. module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  59. MODULE_PARM_DESC(ql2xextended_error_logging,
  60. "Option to enable extended error logging, "
  61. "Default is 0 - no logging. 1 - log errors.");
  62. int ql2xshiftctondsd = 6;
  63. module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
  64. MODULE_PARM_DESC(ql2xshiftctondsd,
  65. "Set to control shifting of command type processing "
  66. "based on total number of SG elements.");
  67. static void qla2x00_free_device(scsi_qla_host_t *);
  68. int ql2xfdmienable=1;
  69. module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
  70. MODULE_PARM_DESC(ql2xfdmienable,
  71. "Enables FDMI registrations. "
  72. "0 - no FDMI. Default is 1 - perform FDMI.");
  73. #define MAX_Q_DEPTH 32
  74. static int ql2xmaxqdepth = MAX_Q_DEPTH;
  75. module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(ql2xmaxqdepth,
  77. "Maximum queue depth to report for target devices.");
  78. int ql2xiidmaenable=1;
  79. module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
  80. MODULE_PARM_DESC(ql2xiidmaenable,
  81. "Enables iIDMA settings "
  82. "Default is 1 - perform iIDMA. 0 - no iIDMA.");
  83. int ql2xmaxqueues = 1;
  84. module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
  85. MODULE_PARM_DESC(ql2xmaxqueues,
  86. "Enables MQ settings "
  87. "Default is 1 for single queue. Set it to number \
  88. of queues in MQ mode.");
  89. int ql2xmultique_tag;
  90. module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
  91. MODULE_PARM_DESC(ql2xmultique_tag,
  92. "Enables CPU affinity settings for the driver "
  93. "Default is 0 for no affinity of request and response IO. "
  94. "Set it to 1 to turn on the cpu affinity.");
  95. int ql2xfwloadbin;
  96. module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
  97. MODULE_PARM_DESC(ql2xfwloadbin,
  98. "Option to specify location from which to load ISP firmware:\n"
  99. " 2 -- load firmware via the request_firmware() (hotplug)\n"
  100. " interface.\n"
  101. " 1 -- load firmware from flash.\n"
  102. " 0 -- use default semantics.\n");
  103. int ql2xetsenable;
  104. module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
  105. MODULE_PARM_DESC(ql2xetsenable,
  106. "Enables firmware ETS burst."
  107. "Default is 0 - skip ETS enablement.");
  108. int ql2xdbwr;
  109. module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
  110. MODULE_PARM_DESC(ql2xdbwr,
  111. "Option to specify scheme for request queue posting\n"
  112. " 0 -- Regular doorbell.\n"
  113. " 1 -- CAMRAM doorbell (faster).\n");
  114. int ql2xdontresethba;
  115. module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
  116. MODULE_PARM_DESC(ql2xdontresethba,
  117. "Option to specify reset behaviour\n"
  118. " 0 (Default) -- Reset on failure.\n"
  119. " 1 -- Do not reset on failure.\n");
  120. int ql2xasynctmfenable;
  121. module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
  122. MODULE_PARM_DESC(ql2xasynctmfenable,
  123. "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
  124. "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
  125. /*
  126. * SCSI host template entry points
  127. */
  128. static int qla2xxx_slave_configure(struct scsi_device * device);
  129. static int qla2xxx_slave_alloc(struct scsi_device *);
  130. static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
  131. static void qla2xxx_scan_start(struct Scsi_Host *);
  132. static void qla2xxx_slave_destroy(struct scsi_device *);
  133. static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
  134. void (*fn)(struct scsi_cmnd *));
  135. static int qla2xxx_eh_abort(struct scsi_cmnd *);
  136. static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
  137. static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
  138. static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
  139. static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
  140. static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
  141. static int qla2x00_change_queue_type(struct scsi_device *, int);
  142. struct scsi_host_template qla2xxx_driver_template = {
  143. .module = THIS_MODULE,
  144. .name = QLA2XXX_DRIVER_NAME,
  145. .queuecommand = qla2xxx_queuecommand,
  146. .eh_abort_handler = qla2xxx_eh_abort,
  147. .eh_device_reset_handler = qla2xxx_eh_device_reset,
  148. .eh_target_reset_handler = qla2xxx_eh_target_reset,
  149. .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
  150. .eh_host_reset_handler = qla2xxx_eh_host_reset,
  151. .slave_configure = qla2xxx_slave_configure,
  152. .slave_alloc = qla2xxx_slave_alloc,
  153. .slave_destroy = qla2xxx_slave_destroy,
  154. .scan_finished = qla2xxx_scan_finished,
  155. .scan_start = qla2xxx_scan_start,
  156. .change_queue_depth = qla2x00_change_queue_depth,
  157. .change_queue_type = qla2x00_change_queue_type,
  158. .this_id = -1,
  159. .cmd_per_lun = 3,
  160. .use_clustering = ENABLE_CLUSTERING,
  161. .sg_tablesize = SG_ALL,
  162. .max_sectors = 0xFFFF,
  163. .shost_attrs = qla2x00_host_attrs,
  164. };
  165. static struct scsi_transport_template *qla2xxx_transport_template = NULL;
  166. struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
  167. /* TODO Convert to inlines
  168. *
  169. * Timer routines
  170. */
  171. __inline__ void
  172. qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
  173. {
  174. init_timer(&vha->timer);
  175. vha->timer.expires = jiffies + interval * HZ;
  176. vha->timer.data = (unsigned long)vha;
  177. vha->timer.function = (void (*)(unsigned long))func;
  178. add_timer(&vha->timer);
  179. vha->timer_active = 1;
  180. }
  181. static inline void
  182. qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
  183. {
  184. /* Currently used for 82XX only. */
  185. if (vha->device_flags & DFLG_DEV_FAILED)
  186. return;
  187. mod_timer(&vha->timer, jiffies + interval * HZ);
  188. }
  189. static __inline__ void
  190. qla2x00_stop_timer(scsi_qla_host_t *vha)
  191. {
  192. del_timer_sync(&vha->timer);
  193. vha->timer_active = 0;
  194. }
  195. static int qla2x00_do_dpc(void *data);
  196. static void qla2x00_rst_aen(scsi_qla_host_t *);
  197. static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
  198. struct req_que **, struct rsp_que **);
  199. static void qla2x00_mem_free(struct qla_hw_data *);
  200. static void qla2x00_sp_free_dma(srb_t *);
  201. /* -------------------------------------------------------------------------- */
  202. static int qla2x00_alloc_queues(struct qla_hw_data *ha)
  203. {
  204. ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
  205. GFP_KERNEL);
  206. if (!ha->req_q_map) {
  207. qla_printk(KERN_WARNING, ha,
  208. "Unable to allocate memory for request queue ptrs\n");
  209. goto fail_req_map;
  210. }
  211. ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
  212. GFP_KERNEL);
  213. if (!ha->rsp_q_map) {
  214. qla_printk(KERN_WARNING, ha,
  215. "Unable to allocate memory for response queue ptrs\n");
  216. goto fail_rsp_map;
  217. }
  218. set_bit(0, ha->rsp_qid_map);
  219. set_bit(0, ha->req_qid_map);
  220. return 1;
  221. fail_rsp_map:
  222. kfree(ha->req_q_map);
  223. ha->req_q_map = NULL;
  224. fail_req_map:
  225. return -ENOMEM;
  226. }
  227. static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
  228. {
  229. if (req && req->ring)
  230. dma_free_coherent(&ha->pdev->dev,
  231. (req->length + 1) * sizeof(request_t),
  232. req->ring, req->dma);
  233. kfree(req);
  234. req = NULL;
  235. }
  236. static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
  237. {
  238. if (rsp && rsp->ring)
  239. dma_free_coherent(&ha->pdev->dev,
  240. (rsp->length + 1) * sizeof(response_t),
  241. rsp->ring, rsp->dma);
  242. kfree(rsp);
  243. rsp = NULL;
  244. }
  245. static void qla2x00_free_queues(struct qla_hw_data *ha)
  246. {
  247. struct req_que *req;
  248. struct rsp_que *rsp;
  249. int cnt;
  250. for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
  251. req = ha->req_q_map[cnt];
  252. qla2x00_free_req_que(ha, req);
  253. }
  254. kfree(ha->req_q_map);
  255. ha->req_q_map = NULL;
  256. for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
  257. rsp = ha->rsp_q_map[cnt];
  258. qla2x00_free_rsp_que(ha, rsp);
  259. }
  260. kfree(ha->rsp_q_map);
  261. ha->rsp_q_map = NULL;
  262. }
  263. static int qla25xx_setup_mode(struct scsi_qla_host *vha)
  264. {
  265. uint16_t options = 0;
  266. int ques, req, ret;
  267. struct qla_hw_data *ha = vha->hw;
  268. if (!(ha->fw_attributes & BIT_6)) {
  269. qla_printk(KERN_INFO, ha,
  270. "Firmware is not multi-queue capable\n");
  271. goto fail;
  272. }
  273. if (ql2xmultique_tag) {
  274. /* create a request queue for IO */
  275. options |= BIT_7;
  276. req = qla25xx_create_req_que(ha, options, 0, 0, -1,
  277. QLA_DEFAULT_QUE_QOS);
  278. if (!req) {
  279. qla_printk(KERN_WARNING, ha,
  280. "Can't create request queue\n");
  281. goto fail;
  282. }
  283. ha->wq = create_workqueue("qla2xxx_wq");
  284. vha->req = ha->req_q_map[req];
  285. options |= BIT_1;
  286. for (ques = 1; ques < ha->max_rsp_queues; ques++) {
  287. ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
  288. if (!ret) {
  289. qla_printk(KERN_WARNING, ha,
  290. "Response Queue create failed\n");
  291. goto fail2;
  292. }
  293. }
  294. ha->flags.cpu_affinity_enabled = 1;
  295. DEBUG2(qla_printk(KERN_INFO, ha,
  296. "CPU affinity mode enabled, no. of response"
  297. " queues:%d, no. of request queues:%d\n",
  298. ha->max_rsp_queues, ha->max_req_queues));
  299. }
  300. return 0;
  301. fail2:
  302. qla25xx_delete_queues(vha);
  303. destroy_workqueue(ha->wq);
  304. ha->wq = NULL;
  305. fail:
  306. ha->mqenable = 0;
  307. kfree(ha->req_q_map);
  308. kfree(ha->rsp_q_map);
  309. ha->max_req_queues = ha->max_rsp_queues = 1;
  310. return 1;
  311. }
  312. static char *
  313. qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
  314. {
  315. struct qla_hw_data *ha = vha->hw;
  316. static char *pci_bus_modes[] = {
  317. "33", "66", "100", "133",
  318. };
  319. uint16_t pci_bus;
  320. strcpy(str, "PCI");
  321. pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
  322. if (pci_bus) {
  323. strcat(str, "-X (");
  324. strcat(str, pci_bus_modes[pci_bus]);
  325. } else {
  326. pci_bus = (ha->pci_attr & BIT_8) >> 8;
  327. strcat(str, " (");
  328. strcat(str, pci_bus_modes[pci_bus]);
  329. }
  330. strcat(str, " MHz)");
  331. return (str);
  332. }
  333. static char *
  334. qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
  335. {
  336. static char *pci_bus_modes[] = { "33", "66", "100", "133", };
  337. struct qla_hw_data *ha = vha->hw;
  338. uint32_t pci_bus;
  339. int pcie_reg;
  340. pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  341. if (pcie_reg) {
  342. char lwstr[6];
  343. uint16_t pcie_lstat, lspeed, lwidth;
  344. pcie_reg += 0x12;
  345. pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
  346. lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
  347. lwidth = (pcie_lstat &
  348. (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
  349. strcpy(str, "PCIe (");
  350. if (lspeed == 1)
  351. strcat(str, "2.5GT/s ");
  352. else if (lspeed == 2)
  353. strcat(str, "5.0GT/s ");
  354. else
  355. strcat(str, "<unknown> ");
  356. snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
  357. strcat(str, lwstr);
  358. return str;
  359. }
  360. strcpy(str, "PCI");
  361. pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
  362. if (pci_bus == 0 || pci_bus == 8) {
  363. strcat(str, " (");
  364. strcat(str, pci_bus_modes[pci_bus >> 3]);
  365. } else {
  366. strcat(str, "-X ");
  367. if (pci_bus & BIT_2)
  368. strcat(str, "Mode 2");
  369. else
  370. strcat(str, "Mode 1");
  371. strcat(str, " (");
  372. strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
  373. }
  374. strcat(str, " MHz)");
  375. return str;
  376. }
  377. static char *
  378. qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
  379. {
  380. char un_str[10];
  381. struct qla_hw_data *ha = vha->hw;
  382. sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
  383. ha->fw_minor_version,
  384. ha->fw_subminor_version);
  385. if (ha->fw_attributes & BIT_9) {
  386. strcat(str, "FLX");
  387. return (str);
  388. }
  389. switch (ha->fw_attributes & 0xFF) {
  390. case 0x7:
  391. strcat(str, "EF");
  392. break;
  393. case 0x17:
  394. strcat(str, "TP");
  395. break;
  396. case 0x37:
  397. strcat(str, "IP");
  398. break;
  399. case 0x77:
  400. strcat(str, "VI");
  401. break;
  402. default:
  403. sprintf(un_str, "(%x)", ha->fw_attributes);
  404. strcat(str, un_str);
  405. break;
  406. }
  407. if (ha->fw_attributes & 0x100)
  408. strcat(str, "X");
  409. return (str);
  410. }
  411. static char *
  412. qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
  413. {
  414. struct qla_hw_data *ha = vha->hw;
  415. sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
  416. ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
  417. return str;
  418. }
  419. static inline srb_t *
  420. qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
  421. struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  422. {
  423. srb_t *sp;
  424. struct qla_hw_data *ha = vha->hw;
  425. sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
  426. if (!sp)
  427. return sp;
  428. sp->fcport = fcport;
  429. sp->cmd = cmd;
  430. sp->flags = 0;
  431. CMD_SP(cmd) = (void *)sp;
  432. cmd->scsi_done = done;
  433. sp->ctx = NULL;
  434. return sp;
  435. }
  436. static int
  437. qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  438. {
  439. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  440. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  441. struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
  442. struct qla_hw_data *ha = vha->hw;
  443. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  444. srb_t *sp;
  445. int rval;
  446. if (ha->flags.eeh_busy) {
  447. if (ha->flags.pci_channel_io_perm_failure)
  448. cmd->result = DID_NO_CONNECT << 16;
  449. else
  450. cmd->result = DID_REQUEUE << 16;
  451. goto qc24_fail_command;
  452. }
  453. rval = fc_remote_port_chkready(rport);
  454. if (rval) {
  455. cmd->result = rval;
  456. goto qc24_fail_command;
  457. }
  458. /* Close window on fcport/rport state-transitioning. */
  459. if (fcport->drport)
  460. goto qc24_target_busy;
  461. if (atomic_read(&fcport->state) != FCS_ONLINE) {
  462. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
  463. atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  464. cmd->result = DID_NO_CONNECT << 16;
  465. goto qc24_fail_command;
  466. }
  467. goto qc24_target_busy;
  468. }
  469. spin_unlock_irq(vha->host->host_lock);
  470. sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
  471. if (!sp)
  472. goto qc24_host_busy_lock;
  473. rval = ha->isp_ops->start_scsi(sp);
  474. if (rval != QLA_SUCCESS)
  475. goto qc24_host_busy_free_sp;
  476. spin_lock_irq(vha->host->host_lock);
  477. return 0;
  478. qc24_host_busy_free_sp:
  479. qla2x00_sp_free_dma(sp);
  480. mempool_free(sp, ha->srb_mempool);
  481. qc24_host_busy_lock:
  482. spin_lock_irq(vha->host->host_lock);
  483. return SCSI_MLQUEUE_HOST_BUSY;
  484. qc24_target_busy:
  485. return SCSI_MLQUEUE_TARGET_BUSY;
  486. qc24_fail_command:
  487. done(cmd);
  488. return 0;
  489. }
  490. /*
  491. * qla2x00_eh_wait_on_command
  492. * Waits for the command to be returned by the Firmware for some
  493. * max time.
  494. *
  495. * Input:
  496. * cmd = Scsi Command to wait on.
  497. *
  498. * Return:
  499. * Not Found : 0
  500. * Found : 1
  501. */
  502. static int
  503. qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
  504. {
  505. #define ABORT_POLLING_PERIOD 1000
  506. #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
  507. unsigned long wait_iter = ABORT_WAIT_ITER;
  508. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  509. struct qla_hw_data *ha = vha->hw;
  510. int ret = QLA_SUCCESS;
  511. if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
  512. DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
  513. return ret;
  514. }
  515. while (CMD_SP(cmd) && wait_iter--) {
  516. msleep(ABORT_POLLING_PERIOD);
  517. }
  518. if (CMD_SP(cmd))
  519. ret = QLA_FUNCTION_FAILED;
  520. return ret;
  521. }
  522. /*
  523. * qla2x00_wait_for_hba_online
  524. * Wait till the HBA is online after going through
  525. * <= MAX_RETRIES_OF_ISP_ABORT or
  526. * finally HBA is disabled ie marked offline
  527. *
  528. * Input:
  529. * ha - pointer to host adapter structure
  530. *
  531. * Note:
  532. * Does context switching-Release SPIN_LOCK
  533. * (if any) before calling this routine.
  534. *
  535. * Return:
  536. * Success (Adapter is online) : 0
  537. * Failed (Adapter is offline/disabled) : 1
  538. */
  539. int
  540. qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
  541. {
  542. int return_status;
  543. unsigned long wait_online;
  544. struct qla_hw_data *ha = vha->hw;
  545. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  546. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  547. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  548. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  549. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  550. ha->dpc_active) && time_before(jiffies, wait_online)) {
  551. msleep(1000);
  552. }
  553. if (base_vha->flags.online)
  554. return_status = QLA_SUCCESS;
  555. else
  556. return_status = QLA_FUNCTION_FAILED;
  557. return (return_status);
  558. }
  559. int
  560. qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
  561. {
  562. int return_status;
  563. unsigned long wait_reset;
  564. struct qla_hw_data *ha = vha->hw;
  565. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  566. wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  567. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  568. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  569. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  570. ha->dpc_active) && time_before(jiffies, wait_reset)) {
  571. msleep(1000);
  572. if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
  573. ha->flags.chip_reset_done)
  574. break;
  575. }
  576. if (ha->flags.chip_reset_done)
  577. return_status = QLA_SUCCESS;
  578. else
  579. return_status = QLA_FUNCTION_FAILED;
  580. return return_status;
  581. }
  582. /*
  583. * qla2x00_wait_for_loop_ready
  584. * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
  585. * to be in LOOP_READY state.
  586. * Input:
  587. * ha - pointer to host adapter structure
  588. *
  589. * Note:
  590. * Does context switching-Release SPIN_LOCK
  591. * (if any) before calling this routine.
  592. *
  593. *
  594. * Return:
  595. * Success (LOOP_READY) : 0
  596. * Failed (LOOP_NOT_READY) : 1
  597. */
  598. static inline int
  599. qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
  600. {
  601. int return_status = QLA_SUCCESS;
  602. unsigned long loop_timeout ;
  603. struct qla_hw_data *ha = vha->hw;
  604. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  605. /* wait for 5 min at the max for loop to be ready */
  606. loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  607. while ((!atomic_read(&base_vha->loop_down_timer) &&
  608. atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
  609. atomic_read(&base_vha->loop_state) != LOOP_READY) {
  610. if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  611. return_status = QLA_FUNCTION_FAILED;
  612. break;
  613. }
  614. msleep(1000);
  615. if (time_after_eq(jiffies, loop_timeout)) {
  616. return_status = QLA_FUNCTION_FAILED;
  617. break;
  618. }
  619. }
  620. return (return_status);
  621. }
  622. /**************************************************************************
  623. * qla2xxx_eh_abort
  624. *
  625. * Description:
  626. * The abort function will abort the specified command.
  627. *
  628. * Input:
  629. * cmd = Linux SCSI command packet to be aborted.
  630. *
  631. * Returns:
  632. * Either SUCCESS or FAILED.
  633. *
  634. * Note:
  635. * Only return FAILED if command not returned by firmware.
  636. **************************************************************************/
  637. static int
  638. qla2xxx_eh_abort(struct scsi_cmnd *cmd)
  639. {
  640. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  641. srb_t *sp;
  642. int ret, i;
  643. unsigned int id, lun;
  644. unsigned long serial;
  645. unsigned long flags;
  646. int wait = 0;
  647. struct qla_hw_data *ha = vha->hw;
  648. struct req_que *req = vha->req;
  649. srb_t *spt;
  650. fc_block_scsi_eh(cmd);
  651. if (!CMD_SP(cmd))
  652. return SUCCESS;
  653. ret = SUCCESS;
  654. id = cmd->device->id;
  655. lun = cmd->device->lun;
  656. serial = cmd->serial_number;
  657. spt = (srb_t *) CMD_SP(cmd);
  658. if (!spt)
  659. return SUCCESS;
  660. /* Check active list for command command. */
  661. spin_lock_irqsave(&ha->hardware_lock, flags);
  662. for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
  663. sp = req->outstanding_cmds[i];
  664. if (sp == NULL)
  665. continue;
  666. if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID))
  667. continue;
  668. if (sp->cmd != cmd)
  669. continue;
  670. DEBUG2(printk("%s(%ld): aborting sp %p from RISC."
  671. " pid=%ld.\n", __func__, vha->host_no, sp, serial));
  672. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  673. if (ha->isp_ops->abort_command(sp)) {
  674. DEBUG2(printk("%s(%ld): abort_command "
  675. "mbx failed.\n", __func__, vha->host_no));
  676. ret = FAILED;
  677. } else {
  678. DEBUG3(printk("%s(%ld): abort_command "
  679. "mbx success.\n", __func__, vha->host_no));
  680. wait = 1;
  681. }
  682. spin_lock_irqsave(&ha->hardware_lock, flags);
  683. break;
  684. }
  685. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  686. /* Wait for the command to be returned. */
  687. if (wait) {
  688. if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
  689. qla_printk(KERN_ERR, ha,
  690. "scsi(%ld:%d:%d): Abort handler timed out -- %lx "
  691. "%x.\n", vha->host_no, id, lun, serial, ret);
  692. ret = FAILED;
  693. }
  694. }
  695. qla_printk(KERN_INFO, ha,
  696. "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n",
  697. vha->host_no, id, lun, wait, serial, ret);
  698. return ret;
  699. }
  700. enum nexus_wait_type {
  701. WAIT_HOST = 0,
  702. WAIT_TARGET,
  703. WAIT_LUN,
  704. };
  705. static int
  706. qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
  707. unsigned int l, srb_t *sp, enum nexus_wait_type type)
  708. {
  709. int cnt, match, status;
  710. unsigned long flags;
  711. struct qla_hw_data *ha = vha->hw;
  712. struct req_que *req;
  713. status = QLA_SUCCESS;
  714. if (!sp)
  715. return status;
  716. spin_lock_irqsave(&ha->hardware_lock, flags);
  717. req = vha->req;
  718. for (cnt = 1; status == QLA_SUCCESS &&
  719. cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  720. sp = req->outstanding_cmds[cnt];
  721. if (!sp)
  722. continue;
  723. if (sp->ctx)
  724. continue;
  725. if (vha->vp_idx != sp->fcport->vha->vp_idx)
  726. continue;
  727. match = 0;
  728. switch (type) {
  729. case WAIT_HOST:
  730. match = 1;
  731. break;
  732. case WAIT_TARGET:
  733. match = sp->cmd->device->id == t;
  734. break;
  735. case WAIT_LUN:
  736. match = (sp->cmd->device->id == t &&
  737. sp->cmd->device->lun == l);
  738. break;
  739. }
  740. if (!match)
  741. continue;
  742. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  743. status = qla2x00_eh_wait_on_command(sp->cmd);
  744. spin_lock_irqsave(&ha->hardware_lock, flags);
  745. }
  746. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  747. return status;
  748. }
  749. void qla82xx_wait_for_pending_commands(scsi_qla_host_t *vha)
  750. {
  751. int cnt;
  752. srb_t *sp;
  753. struct req_que *req = vha->req;
  754. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  755. "Waiting for pending commands\n"));
  756. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  757. sp = req->outstanding_cmds[cnt];
  758. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
  759. sp, WAIT_HOST) == QLA_SUCCESS) {
  760. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  761. "Done wait for pending commands\n"));
  762. }
  763. }
  764. }
  765. static char *reset_errors[] = {
  766. "HBA not online",
  767. "HBA not ready",
  768. "Task management failed",
  769. "Waiting for command completions",
  770. };
  771. static int
  772. __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
  773. struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
  774. {
  775. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  776. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  777. int err;
  778. fc_block_scsi_eh(cmd);
  779. if (!fcport)
  780. return FAILED;
  781. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
  782. vha->host_no, cmd->device->id, cmd->device->lun, name);
  783. err = 0;
  784. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  785. goto eh_reset_failed;
  786. err = 1;
  787. if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
  788. goto eh_reset_failed;
  789. err = 2;
  790. if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
  791. != QLA_SUCCESS)
  792. goto eh_reset_failed;
  793. err = 3;
  794. if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
  795. cmd->device->lun, (srb_t *) CMD_SP(cmd), type) != QLA_SUCCESS)
  796. goto eh_reset_failed;
  797. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
  798. vha->host_no, cmd->device->id, cmd->device->lun, name);
  799. return SUCCESS;
  800. eh_reset_failed:
  801. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
  802. , vha->host_no, cmd->device->id, cmd->device->lun, name,
  803. reset_errors[err]);
  804. return FAILED;
  805. }
  806. static int
  807. qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
  808. {
  809. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  810. struct qla_hw_data *ha = vha->hw;
  811. return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
  812. ha->isp_ops->lun_reset);
  813. }
  814. static int
  815. qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
  816. {
  817. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  818. struct qla_hw_data *ha = vha->hw;
  819. return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
  820. ha->isp_ops->target_reset);
  821. }
  822. /**************************************************************************
  823. * qla2xxx_eh_bus_reset
  824. *
  825. * Description:
  826. * The bus reset function will reset the bus and abort any executing
  827. * commands.
  828. *
  829. * Input:
  830. * cmd = Linux SCSI command packet of the command that cause the
  831. * bus reset.
  832. *
  833. * Returns:
  834. * SUCCESS/FAILURE (defined as macro in scsi.h).
  835. *
  836. **************************************************************************/
  837. static int
  838. qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
  839. {
  840. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  841. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  842. int ret = FAILED;
  843. unsigned int id, lun;
  844. unsigned long serial;
  845. srb_t *sp = (srb_t *) CMD_SP(cmd);
  846. fc_block_scsi_eh(cmd);
  847. id = cmd->device->id;
  848. lun = cmd->device->lun;
  849. serial = cmd->serial_number;
  850. if (!fcport)
  851. return ret;
  852. qla_printk(KERN_INFO, vha->hw,
  853. "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
  854. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
  855. DEBUG2(printk("%s failed:board disabled\n",__func__));
  856. goto eh_bus_reset_done;
  857. }
  858. if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
  859. if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
  860. ret = SUCCESS;
  861. }
  862. if (ret == FAILED)
  863. goto eh_bus_reset_done;
  864. /* Flush outstanding commands. */
  865. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) !=
  866. QLA_SUCCESS)
  867. ret = FAILED;
  868. eh_bus_reset_done:
  869. qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
  870. (ret == FAILED) ? "failed" : "succeded");
  871. return ret;
  872. }
  873. /**************************************************************************
  874. * qla2xxx_eh_host_reset
  875. *
  876. * Description:
  877. * The reset function will reset the Adapter.
  878. *
  879. * Input:
  880. * cmd = Linux SCSI command packet of the command that cause the
  881. * adapter reset.
  882. *
  883. * Returns:
  884. * Either SUCCESS or FAILED.
  885. *
  886. * Note:
  887. **************************************************************************/
  888. static int
  889. qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
  890. {
  891. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  892. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  893. struct qla_hw_data *ha = vha->hw;
  894. int ret = FAILED;
  895. unsigned int id, lun;
  896. unsigned long serial;
  897. srb_t *sp = (srb_t *) CMD_SP(cmd);
  898. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  899. fc_block_scsi_eh(cmd);
  900. id = cmd->device->id;
  901. lun = cmd->device->lun;
  902. serial = cmd->serial_number;
  903. if (!fcport)
  904. return ret;
  905. qla_printk(KERN_INFO, ha,
  906. "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
  907. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  908. goto eh_host_reset_lock;
  909. /*
  910. * Fixme-may be dpc thread is active and processing
  911. * loop_resync,so wait a while for it to
  912. * be completed and then issue big hammer.Otherwise
  913. * it may cause I/O failure as big hammer marks the
  914. * devices as lost kicking of the port_down_timer
  915. * while dpc is stuck for the mailbox to complete.
  916. */
  917. qla2x00_wait_for_loop_ready(vha);
  918. if (vha != base_vha) {
  919. if (qla2x00_vp_abort_isp(vha))
  920. goto eh_host_reset_lock;
  921. } else {
  922. if (IS_QLA82XX(vha->hw)) {
  923. if (!qla82xx_fcoe_ctx_reset(vha)) {
  924. /* Ctx reset success */
  925. ret = SUCCESS;
  926. goto eh_host_reset_lock;
  927. }
  928. /* fall thru if ctx reset failed */
  929. }
  930. if (ha->wq)
  931. flush_workqueue(ha->wq);
  932. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  933. if (ha->isp_ops->abort_isp(base_vha)) {
  934. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  935. /* failed. schedule dpc to try */
  936. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  937. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  938. goto eh_host_reset_lock;
  939. }
  940. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  941. }
  942. /* Waiting for command to be returned to OS.*/
  943. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) ==
  944. QLA_SUCCESS)
  945. ret = SUCCESS;
  946. eh_host_reset_lock:
  947. qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
  948. (ret == FAILED) ? "failed" : "succeded");
  949. return ret;
  950. }
  951. /*
  952. * qla2x00_loop_reset
  953. * Issue loop reset.
  954. *
  955. * Input:
  956. * ha = adapter block pointer.
  957. *
  958. * Returns:
  959. * 0 = success
  960. */
  961. int
  962. qla2x00_loop_reset(scsi_qla_host_t *vha)
  963. {
  964. int ret;
  965. struct fc_port *fcport;
  966. struct qla_hw_data *ha = vha->hw;
  967. if (ha->flags.enable_target_reset) {
  968. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  969. if (fcport->port_type != FCT_TARGET)
  970. continue;
  971. ret = ha->isp_ops->target_reset(fcport, 0, 0);
  972. if (ret != QLA_SUCCESS) {
  973. DEBUG2_3(printk("%s(%ld): bus_reset failed: "
  974. "target_reset=%d d_id=%x.\n", __func__,
  975. vha->host_no, ret, fcport->d_id.b24));
  976. }
  977. }
  978. }
  979. if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
  980. ret = qla2x00_full_login_lip(vha);
  981. if (ret != QLA_SUCCESS) {
  982. DEBUG2_3(printk("%s(%ld): failed: "
  983. "full_login_lip=%d.\n", __func__, vha->host_no,
  984. ret));
  985. }
  986. atomic_set(&vha->loop_state, LOOP_DOWN);
  987. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  988. qla2x00_mark_all_devices_lost(vha, 0);
  989. qla2x00_wait_for_loop_ready(vha);
  990. }
  991. if (ha->flags.enable_lip_reset) {
  992. ret = qla2x00_lip_reset(vha);
  993. if (ret != QLA_SUCCESS) {
  994. DEBUG2_3(printk("%s(%ld): failed: "
  995. "lip_reset=%d.\n", __func__, vha->host_no, ret));
  996. } else
  997. qla2x00_wait_for_loop_ready(vha);
  998. }
  999. /* Issue marker command only when we are going to start the I/O */
  1000. vha->marker_needed = 1;
  1001. return QLA_SUCCESS;
  1002. }
  1003. void
  1004. qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
  1005. {
  1006. int que, cnt;
  1007. unsigned long flags;
  1008. srb_t *sp;
  1009. struct srb_ctx *ctx;
  1010. struct qla_hw_data *ha = vha->hw;
  1011. struct req_que *req;
  1012. spin_lock_irqsave(&ha->hardware_lock, flags);
  1013. for (que = 0; que < ha->max_req_queues; que++) {
  1014. req = ha->req_q_map[que];
  1015. if (!req)
  1016. continue;
  1017. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  1018. sp = req->outstanding_cmds[cnt];
  1019. if (sp) {
  1020. req->outstanding_cmds[cnt] = NULL;
  1021. if (!sp->ctx ||
  1022. (sp->flags & SRB_FCP_CMND_DMA_VALID)) {
  1023. sp->cmd->result = res;
  1024. qla2x00_sp_compl(ha, sp);
  1025. } else {
  1026. ctx = sp->ctx;
  1027. if (ctx->type == SRB_LOGIN_CMD ||
  1028. ctx->type == SRB_LOGOUT_CMD) {
  1029. ctx->u.iocb_cmd->free(sp);
  1030. } else {
  1031. struct fc_bsg_job *bsg_job =
  1032. ctx->u.bsg_job;
  1033. if (bsg_job->request->msgcode
  1034. == FC_BSG_HST_CT)
  1035. kfree(sp->fcport);
  1036. bsg_job->req->errors = 0;
  1037. bsg_job->reply->result = res;
  1038. bsg_job->job_done(bsg_job);
  1039. kfree(sp->ctx);
  1040. mempool_free(sp,
  1041. ha->srb_mempool);
  1042. }
  1043. }
  1044. }
  1045. }
  1046. }
  1047. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1048. }
  1049. static int
  1050. qla2xxx_slave_alloc(struct scsi_device *sdev)
  1051. {
  1052. struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
  1053. if (!rport || fc_remote_port_chkready(rport))
  1054. return -ENXIO;
  1055. sdev->hostdata = *(fc_port_t **)rport->dd_data;
  1056. return 0;
  1057. }
  1058. static int
  1059. qla2xxx_slave_configure(struct scsi_device *sdev)
  1060. {
  1061. scsi_qla_host_t *vha = shost_priv(sdev->host);
  1062. struct qla_hw_data *ha = vha->hw;
  1063. struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
  1064. struct req_que *req = vha->req;
  1065. if (sdev->tagged_supported)
  1066. scsi_activate_tcq(sdev, req->max_q_depth);
  1067. else
  1068. scsi_deactivate_tcq(sdev, req->max_q_depth);
  1069. rport->dev_loss_tmo = ha->port_down_retry_count;
  1070. return 0;
  1071. }
  1072. static void
  1073. qla2xxx_slave_destroy(struct scsi_device *sdev)
  1074. {
  1075. sdev->hostdata = NULL;
  1076. }
  1077. static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
  1078. {
  1079. fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
  1080. if (!scsi_track_queue_full(sdev, qdepth))
  1081. return;
  1082. DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
  1083. "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
  1084. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1085. sdev->queue_depth));
  1086. }
  1087. static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
  1088. {
  1089. fc_port_t *fcport = sdev->hostdata;
  1090. struct scsi_qla_host *vha = fcport->vha;
  1091. struct qla_hw_data *ha = vha->hw;
  1092. struct req_que *req = NULL;
  1093. req = vha->req;
  1094. if (!req)
  1095. return;
  1096. if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
  1097. return;
  1098. if (sdev->ordered_tags)
  1099. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
  1100. else
  1101. scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
  1102. DEBUG2(qla_printk(KERN_INFO, ha,
  1103. "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
  1104. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1105. sdev->queue_depth));
  1106. }
  1107. static int
  1108. qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
  1109. {
  1110. switch (reason) {
  1111. case SCSI_QDEPTH_DEFAULT:
  1112. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1113. break;
  1114. case SCSI_QDEPTH_QFULL:
  1115. qla2x00_handle_queue_full(sdev, qdepth);
  1116. break;
  1117. case SCSI_QDEPTH_RAMP_UP:
  1118. qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
  1119. break;
  1120. default:
  1121. return -EOPNOTSUPP;
  1122. }
  1123. return sdev->queue_depth;
  1124. }
  1125. static int
  1126. qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
  1127. {
  1128. if (sdev->tagged_supported) {
  1129. scsi_set_tag_type(sdev, tag_type);
  1130. if (tag_type)
  1131. scsi_activate_tcq(sdev, sdev->queue_depth);
  1132. else
  1133. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  1134. } else
  1135. tag_type = 0;
  1136. return tag_type;
  1137. }
  1138. /**
  1139. * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
  1140. * @ha: HA context
  1141. *
  1142. * At exit, the @ha's flags.enable_64bit_addressing set to indicated
  1143. * supported addressing method.
  1144. */
  1145. static void
  1146. qla2x00_config_dma_addressing(struct qla_hw_data *ha)
  1147. {
  1148. /* Assume a 32bit DMA mask. */
  1149. ha->flags.enable_64bit_addressing = 0;
  1150. if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
  1151. /* Any upper-dword bits set? */
  1152. if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
  1153. !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
  1154. /* Ok, a 64bit DMA mask is applicable. */
  1155. ha->flags.enable_64bit_addressing = 1;
  1156. ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
  1157. ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
  1158. return;
  1159. }
  1160. }
  1161. dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
  1162. pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
  1163. }
  1164. static void
  1165. qla2x00_enable_intrs(struct qla_hw_data *ha)
  1166. {
  1167. unsigned long flags = 0;
  1168. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1169. spin_lock_irqsave(&ha->hardware_lock, flags);
  1170. ha->interrupts_on = 1;
  1171. /* enable risc and host interrupts */
  1172. WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
  1173. RD_REG_WORD(&reg->ictrl);
  1174. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1175. }
  1176. static void
  1177. qla2x00_disable_intrs(struct qla_hw_data *ha)
  1178. {
  1179. unsigned long flags = 0;
  1180. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1181. spin_lock_irqsave(&ha->hardware_lock, flags);
  1182. ha->interrupts_on = 0;
  1183. /* disable risc and host interrupts */
  1184. WRT_REG_WORD(&reg->ictrl, 0);
  1185. RD_REG_WORD(&reg->ictrl);
  1186. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1187. }
  1188. static void
  1189. qla24xx_enable_intrs(struct qla_hw_data *ha)
  1190. {
  1191. unsigned long flags = 0;
  1192. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1193. spin_lock_irqsave(&ha->hardware_lock, flags);
  1194. ha->interrupts_on = 1;
  1195. WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
  1196. RD_REG_DWORD(&reg->ictrl);
  1197. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1198. }
  1199. static void
  1200. qla24xx_disable_intrs(struct qla_hw_data *ha)
  1201. {
  1202. unsigned long flags = 0;
  1203. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1204. if (IS_NOPOLLING_TYPE(ha))
  1205. return;
  1206. spin_lock_irqsave(&ha->hardware_lock, flags);
  1207. ha->interrupts_on = 0;
  1208. WRT_REG_DWORD(&reg->ictrl, 0);
  1209. RD_REG_DWORD(&reg->ictrl);
  1210. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1211. }
  1212. static struct isp_operations qla2100_isp_ops = {
  1213. .pci_config = qla2100_pci_config,
  1214. .reset_chip = qla2x00_reset_chip,
  1215. .chip_diag = qla2x00_chip_diag,
  1216. .config_rings = qla2x00_config_rings,
  1217. .reset_adapter = qla2x00_reset_adapter,
  1218. .nvram_config = qla2x00_nvram_config,
  1219. .update_fw_options = qla2x00_update_fw_options,
  1220. .load_risc = qla2x00_load_risc,
  1221. .pci_info_str = qla2x00_pci_info_str,
  1222. .fw_version_str = qla2x00_fw_version_str,
  1223. .intr_handler = qla2100_intr_handler,
  1224. .enable_intrs = qla2x00_enable_intrs,
  1225. .disable_intrs = qla2x00_disable_intrs,
  1226. .abort_command = qla2x00_abort_command,
  1227. .target_reset = qla2x00_abort_target,
  1228. .lun_reset = qla2x00_lun_reset,
  1229. .fabric_login = qla2x00_login_fabric,
  1230. .fabric_logout = qla2x00_fabric_logout,
  1231. .calc_req_entries = qla2x00_calc_iocbs_32,
  1232. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1233. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1234. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1235. .read_nvram = qla2x00_read_nvram_data,
  1236. .write_nvram = qla2x00_write_nvram_data,
  1237. .fw_dump = qla2100_fw_dump,
  1238. .beacon_on = NULL,
  1239. .beacon_off = NULL,
  1240. .beacon_blink = NULL,
  1241. .read_optrom = qla2x00_read_optrom_data,
  1242. .write_optrom = qla2x00_write_optrom_data,
  1243. .get_flash_version = qla2x00_get_flash_version,
  1244. .start_scsi = qla2x00_start_scsi,
  1245. .abort_isp = qla2x00_abort_isp,
  1246. };
  1247. static struct isp_operations qla2300_isp_ops = {
  1248. .pci_config = qla2300_pci_config,
  1249. .reset_chip = qla2x00_reset_chip,
  1250. .chip_diag = qla2x00_chip_diag,
  1251. .config_rings = qla2x00_config_rings,
  1252. .reset_adapter = qla2x00_reset_adapter,
  1253. .nvram_config = qla2x00_nvram_config,
  1254. .update_fw_options = qla2x00_update_fw_options,
  1255. .load_risc = qla2x00_load_risc,
  1256. .pci_info_str = qla2x00_pci_info_str,
  1257. .fw_version_str = qla2x00_fw_version_str,
  1258. .intr_handler = qla2300_intr_handler,
  1259. .enable_intrs = qla2x00_enable_intrs,
  1260. .disable_intrs = qla2x00_disable_intrs,
  1261. .abort_command = qla2x00_abort_command,
  1262. .target_reset = qla2x00_abort_target,
  1263. .lun_reset = qla2x00_lun_reset,
  1264. .fabric_login = qla2x00_login_fabric,
  1265. .fabric_logout = qla2x00_fabric_logout,
  1266. .calc_req_entries = qla2x00_calc_iocbs_32,
  1267. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1268. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1269. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1270. .read_nvram = qla2x00_read_nvram_data,
  1271. .write_nvram = qla2x00_write_nvram_data,
  1272. .fw_dump = qla2300_fw_dump,
  1273. .beacon_on = qla2x00_beacon_on,
  1274. .beacon_off = qla2x00_beacon_off,
  1275. .beacon_blink = qla2x00_beacon_blink,
  1276. .read_optrom = qla2x00_read_optrom_data,
  1277. .write_optrom = qla2x00_write_optrom_data,
  1278. .get_flash_version = qla2x00_get_flash_version,
  1279. .start_scsi = qla2x00_start_scsi,
  1280. .abort_isp = qla2x00_abort_isp,
  1281. };
  1282. static struct isp_operations qla24xx_isp_ops = {
  1283. .pci_config = qla24xx_pci_config,
  1284. .reset_chip = qla24xx_reset_chip,
  1285. .chip_diag = qla24xx_chip_diag,
  1286. .config_rings = qla24xx_config_rings,
  1287. .reset_adapter = qla24xx_reset_adapter,
  1288. .nvram_config = qla24xx_nvram_config,
  1289. .update_fw_options = qla24xx_update_fw_options,
  1290. .load_risc = qla24xx_load_risc,
  1291. .pci_info_str = qla24xx_pci_info_str,
  1292. .fw_version_str = qla24xx_fw_version_str,
  1293. .intr_handler = qla24xx_intr_handler,
  1294. .enable_intrs = qla24xx_enable_intrs,
  1295. .disable_intrs = qla24xx_disable_intrs,
  1296. .abort_command = qla24xx_abort_command,
  1297. .target_reset = qla24xx_abort_target,
  1298. .lun_reset = qla24xx_lun_reset,
  1299. .fabric_login = qla24xx_login_fabric,
  1300. .fabric_logout = qla24xx_fabric_logout,
  1301. .calc_req_entries = NULL,
  1302. .build_iocbs = NULL,
  1303. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1304. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1305. .read_nvram = qla24xx_read_nvram_data,
  1306. .write_nvram = qla24xx_write_nvram_data,
  1307. .fw_dump = qla24xx_fw_dump,
  1308. .beacon_on = qla24xx_beacon_on,
  1309. .beacon_off = qla24xx_beacon_off,
  1310. .beacon_blink = qla24xx_beacon_blink,
  1311. .read_optrom = qla24xx_read_optrom_data,
  1312. .write_optrom = qla24xx_write_optrom_data,
  1313. .get_flash_version = qla24xx_get_flash_version,
  1314. .start_scsi = qla24xx_start_scsi,
  1315. .abort_isp = qla2x00_abort_isp,
  1316. };
  1317. static struct isp_operations qla25xx_isp_ops = {
  1318. .pci_config = qla25xx_pci_config,
  1319. .reset_chip = qla24xx_reset_chip,
  1320. .chip_diag = qla24xx_chip_diag,
  1321. .config_rings = qla24xx_config_rings,
  1322. .reset_adapter = qla24xx_reset_adapter,
  1323. .nvram_config = qla24xx_nvram_config,
  1324. .update_fw_options = qla24xx_update_fw_options,
  1325. .load_risc = qla24xx_load_risc,
  1326. .pci_info_str = qla24xx_pci_info_str,
  1327. .fw_version_str = qla24xx_fw_version_str,
  1328. .intr_handler = qla24xx_intr_handler,
  1329. .enable_intrs = qla24xx_enable_intrs,
  1330. .disable_intrs = qla24xx_disable_intrs,
  1331. .abort_command = qla24xx_abort_command,
  1332. .target_reset = qla24xx_abort_target,
  1333. .lun_reset = qla24xx_lun_reset,
  1334. .fabric_login = qla24xx_login_fabric,
  1335. .fabric_logout = qla24xx_fabric_logout,
  1336. .calc_req_entries = NULL,
  1337. .build_iocbs = NULL,
  1338. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1339. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1340. .read_nvram = qla25xx_read_nvram_data,
  1341. .write_nvram = qla25xx_write_nvram_data,
  1342. .fw_dump = qla25xx_fw_dump,
  1343. .beacon_on = qla24xx_beacon_on,
  1344. .beacon_off = qla24xx_beacon_off,
  1345. .beacon_blink = qla24xx_beacon_blink,
  1346. .read_optrom = qla25xx_read_optrom_data,
  1347. .write_optrom = qla24xx_write_optrom_data,
  1348. .get_flash_version = qla24xx_get_flash_version,
  1349. .start_scsi = qla24xx_start_scsi,
  1350. .abort_isp = qla2x00_abort_isp,
  1351. };
  1352. static struct isp_operations qla81xx_isp_ops = {
  1353. .pci_config = qla25xx_pci_config,
  1354. .reset_chip = qla24xx_reset_chip,
  1355. .chip_diag = qla24xx_chip_diag,
  1356. .config_rings = qla24xx_config_rings,
  1357. .reset_adapter = qla24xx_reset_adapter,
  1358. .nvram_config = qla81xx_nvram_config,
  1359. .update_fw_options = qla81xx_update_fw_options,
  1360. .load_risc = qla81xx_load_risc,
  1361. .pci_info_str = qla24xx_pci_info_str,
  1362. .fw_version_str = qla24xx_fw_version_str,
  1363. .intr_handler = qla24xx_intr_handler,
  1364. .enable_intrs = qla24xx_enable_intrs,
  1365. .disable_intrs = qla24xx_disable_intrs,
  1366. .abort_command = qla24xx_abort_command,
  1367. .target_reset = qla24xx_abort_target,
  1368. .lun_reset = qla24xx_lun_reset,
  1369. .fabric_login = qla24xx_login_fabric,
  1370. .fabric_logout = qla24xx_fabric_logout,
  1371. .calc_req_entries = NULL,
  1372. .build_iocbs = NULL,
  1373. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1374. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1375. .read_nvram = NULL,
  1376. .write_nvram = NULL,
  1377. .fw_dump = qla81xx_fw_dump,
  1378. .beacon_on = qla24xx_beacon_on,
  1379. .beacon_off = qla24xx_beacon_off,
  1380. .beacon_blink = qla24xx_beacon_blink,
  1381. .read_optrom = qla25xx_read_optrom_data,
  1382. .write_optrom = qla24xx_write_optrom_data,
  1383. .get_flash_version = qla24xx_get_flash_version,
  1384. .start_scsi = qla24xx_start_scsi,
  1385. .abort_isp = qla2x00_abort_isp,
  1386. };
  1387. static struct isp_operations qla82xx_isp_ops = {
  1388. .pci_config = qla82xx_pci_config,
  1389. .reset_chip = qla82xx_reset_chip,
  1390. .chip_diag = qla24xx_chip_diag,
  1391. .config_rings = qla82xx_config_rings,
  1392. .reset_adapter = qla24xx_reset_adapter,
  1393. .nvram_config = qla81xx_nvram_config,
  1394. .update_fw_options = qla24xx_update_fw_options,
  1395. .load_risc = qla82xx_load_risc,
  1396. .pci_info_str = qla82xx_pci_info_str,
  1397. .fw_version_str = qla24xx_fw_version_str,
  1398. .intr_handler = qla82xx_intr_handler,
  1399. .enable_intrs = qla82xx_enable_intrs,
  1400. .disable_intrs = qla82xx_disable_intrs,
  1401. .abort_command = qla24xx_abort_command,
  1402. .target_reset = qla24xx_abort_target,
  1403. .lun_reset = qla24xx_lun_reset,
  1404. .fabric_login = qla24xx_login_fabric,
  1405. .fabric_logout = qla24xx_fabric_logout,
  1406. .calc_req_entries = NULL,
  1407. .build_iocbs = NULL,
  1408. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1409. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1410. .read_nvram = qla24xx_read_nvram_data,
  1411. .write_nvram = qla24xx_write_nvram_data,
  1412. .fw_dump = qla24xx_fw_dump,
  1413. .beacon_on = qla24xx_beacon_on,
  1414. .beacon_off = qla24xx_beacon_off,
  1415. .beacon_blink = qla24xx_beacon_blink,
  1416. .read_optrom = qla82xx_read_optrom_data,
  1417. .write_optrom = qla82xx_write_optrom_data,
  1418. .get_flash_version = qla24xx_get_flash_version,
  1419. .start_scsi = qla82xx_start_scsi,
  1420. .abort_isp = qla82xx_abort_isp,
  1421. };
  1422. static inline void
  1423. qla2x00_set_isp_flags(struct qla_hw_data *ha)
  1424. {
  1425. ha->device_type = DT_EXTENDED_IDS;
  1426. switch (ha->pdev->device) {
  1427. case PCI_DEVICE_ID_QLOGIC_ISP2100:
  1428. ha->device_type |= DT_ISP2100;
  1429. ha->device_type &= ~DT_EXTENDED_IDS;
  1430. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1431. break;
  1432. case PCI_DEVICE_ID_QLOGIC_ISP2200:
  1433. ha->device_type |= DT_ISP2200;
  1434. ha->device_type &= ~DT_EXTENDED_IDS;
  1435. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1436. break;
  1437. case PCI_DEVICE_ID_QLOGIC_ISP2300:
  1438. ha->device_type |= DT_ISP2300;
  1439. ha->device_type |= DT_ZIO_SUPPORTED;
  1440. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1441. break;
  1442. case PCI_DEVICE_ID_QLOGIC_ISP2312:
  1443. ha->device_type |= DT_ISP2312;
  1444. ha->device_type |= DT_ZIO_SUPPORTED;
  1445. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1446. break;
  1447. case PCI_DEVICE_ID_QLOGIC_ISP2322:
  1448. ha->device_type |= DT_ISP2322;
  1449. ha->device_type |= DT_ZIO_SUPPORTED;
  1450. if (ha->pdev->subsystem_vendor == 0x1028 &&
  1451. ha->pdev->subsystem_device == 0x0170)
  1452. ha->device_type |= DT_OEM_001;
  1453. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1454. break;
  1455. case PCI_DEVICE_ID_QLOGIC_ISP6312:
  1456. ha->device_type |= DT_ISP6312;
  1457. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1458. break;
  1459. case PCI_DEVICE_ID_QLOGIC_ISP6322:
  1460. ha->device_type |= DT_ISP6322;
  1461. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1462. break;
  1463. case PCI_DEVICE_ID_QLOGIC_ISP2422:
  1464. ha->device_type |= DT_ISP2422;
  1465. ha->device_type |= DT_ZIO_SUPPORTED;
  1466. ha->device_type |= DT_FWI2;
  1467. ha->device_type |= DT_IIDMA;
  1468. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1469. break;
  1470. case PCI_DEVICE_ID_QLOGIC_ISP2432:
  1471. ha->device_type |= DT_ISP2432;
  1472. ha->device_type |= DT_ZIO_SUPPORTED;
  1473. ha->device_type |= DT_FWI2;
  1474. ha->device_type |= DT_IIDMA;
  1475. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1476. break;
  1477. case PCI_DEVICE_ID_QLOGIC_ISP8432:
  1478. ha->device_type |= DT_ISP8432;
  1479. ha->device_type |= DT_ZIO_SUPPORTED;
  1480. ha->device_type |= DT_FWI2;
  1481. ha->device_type |= DT_IIDMA;
  1482. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1483. break;
  1484. case PCI_DEVICE_ID_QLOGIC_ISP5422:
  1485. ha->device_type |= DT_ISP5422;
  1486. ha->device_type |= DT_FWI2;
  1487. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1488. break;
  1489. case PCI_DEVICE_ID_QLOGIC_ISP5432:
  1490. ha->device_type |= DT_ISP5432;
  1491. ha->device_type |= DT_FWI2;
  1492. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1493. break;
  1494. case PCI_DEVICE_ID_QLOGIC_ISP2532:
  1495. ha->device_type |= DT_ISP2532;
  1496. ha->device_type |= DT_ZIO_SUPPORTED;
  1497. ha->device_type |= DT_FWI2;
  1498. ha->device_type |= DT_IIDMA;
  1499. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1500. break;
  1501. case PCI_DEVICE_ID_QLOGIC_ISP8001:
  1502. ha->device_type |= DT_ISP8001;
  1503. ha->device_type |= DT_ZIO_SUPPORTED;
  1504. ha->device_type |= DT_FWI2;
  1505. ha->device_type |= DT_IIDMA;
  1506. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1507. break;
  1508. case PCI_DEVICE_ID_QLOGIC_ISP8021:
  1509. ha->device_type |= DT_ISP8021;
  1510. ha->device_type |= DT_ZIO_SUPPORTED;
  1511. ha->device_type |= DT_FWI2;
  1512. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1513. /* Initialize 82XX ISP flags */
  1514. qla82xx_init_flags(ha);
  1515. break;
  1516. }
  1517. if (IS_QLA82XX(ha))
  1518. ha->port_no = !(ha->portnum & 1);
  1519. else
  1520. /* Get adapter physical port no from interrupt pin register. */
  1521. pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
  1522. if (ha->port_no & 1)
  1523. ha->flags.port0 = 1;
  1524. else
  1525. ha->flags.port0 = 0;
  1526. }
  1527. static int
  1528. qla2x00_iospace_config(struct qla_hw_data *ha)
  1529. {
  1530. resource_size_t pio;
  1531. uint16_t msix;
  1532. int cpus;
  1533. if (IS_QLA82XX(ha))
  1534. return qla82xx_iospace_config(ha);
  1535. if (pci_request_selected_regions(ha->pdev, ha->bars,
  1536. QLA2XXX_DRIVER_NAME)) {
  1537. qla_printk(KERN_WARNING, ha,
  1538. "Failed to reserve PIO/MMIO regions (%s)\n",
  1539. pci_name(ha->pdev));
  1540. goto iospace_error_exit;
  1541. }
  1542. if (!(ha->bars & 1))
  1543. goto skip_pio;
  1544. /* We only need PIO for Flash operations on ISP2312 v2 chips. */
  1545. pio = pci_resource_start(ha->pdev, 0);
  1546. if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
  1547. if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
  1548. qla_printk(KERN_WARNING, ha,
  1549. "Invalid PCI I/O region size (%s)...\n",
  1550. pci_name(ha->pdev));
  1551. pio = 0;
  1552. }
  1553. } else {
  1554. qla_printk(KERN_WARNING, ha,
  1555. "region #0 not a PIO resource (%s)...\n",
  1556. pci_name(ha->pdev));
  1557. pio = 0;
  1558. }
  1559. ha->pio_address = pio;
  1560. skip_pio:
  1561. /* Use MMIO operations for all accesses. */
  1562. if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
  1563. qla_printk(KERN_ERR, ha,
  1564. "region #1 not an MMIO resource (%s), aborting\n",
  1565. pci_name(ha->pdev));
  1566. goto iospace_error_exit;
  1567. }
  1568. if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
  1569. qla_printk(KERN_ERR, ha,
  1570. "Invalid PCI mem region size (%s), aborting\n",
  1571. pci_name(ha->pdev));
  1572. goto iospace_error_exit;
  1573. }
  1574. ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
  1575. if (!ha->iobase) {
  1576. qla_printk(KERN_ERR, ha,
  1577. "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
  1578. goto iospace_error_exit;
  1579. }
  1580. /* Determine queue resources */
  1581. ha->max_req_queues = ha->max_rsp_queues = 1;
  1582. if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
  1583. (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
  1584. (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
  1585. goto mqiobase_exit;
  1586. ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
  1587. pci_resource_len(ha->pdev, 3));
  1588. if (ha->mqiobase) {
  1589. /* Read MSIX vector size of the board */
  1590. pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
  1591. ha->msix_count = msix;
  1592. /* Max queues are bounded by available msix vectors */
  1593. /* queue 0 uses two msix vectors */
  1594. if (ql2xmultique_tag) {
  1595. cpus = num_online_cpus();
  1596. ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
  1597. (cpus + 1) : (ha->msix_count - 1);
  1598. ha->max_req_queues = 2;
  1599. } else if (ql2xmaxqueues > 1) {
  1600. ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
  1601. QLA_MQ_SIZE : ql2xmaxqueues;
  1602. DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
  1603. " of request queues:%d\n", ha->max_req_queues));
  1604. }
  1605. qla_printk(KERN_INFO, ha,
  1606. "MSI-X vector count: %d\n", msix);
  1607. } else
  1608. qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
  1609. mqiobase_exit:
  1610. ha->msix_count = ha->max_rsp_queues + 1;
  1611. return (0);
  1612. iospace_error_exit:
  1613. return (-ENOMEM);
  1614. }
  1615. static void
  1616. qla2xxx_scan_start(struct Scsi_Host *shost)
  1617. {
  1618. scsi_qla_host_t *vha = shost_priv(shost);
  1619. if (vha->hw->flags.running_gold_fw)
  1620. return;
  1621. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1622. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1623. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1624. set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
  1625. }
  1626. static int
  1627. qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
  1628. {
  1629. scsi_qla_host_t *vha = shost_priv(shost);
  1630. if (!vha->host)
  1631. return 1;
  1632. if (time > vha->hw->loop_reset_delay * HZ)
  1633. return 1;
  1634. return atomic_read(&vha->loop_state) == LOOP_READY;
  1635. }
  1636. /*
  1637. * PCI driver interface
  1638. */
  1639. static int __devinit
  1640. qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
  1641. {
  1642. int ret = -ENODEV;
  1643. struct Scsi_Host *host;
  1644. scsi_qla_host_t *base_vha = NULL;
  1645. struct qla_hw_data *ha;
  1646. char pci_info[30];
  1647. char fw_str[30];
  1648. struct scsi_host_template *sht;
  1649. int bars, max_id, mem_only = 0;
  1650. uint16_t req_length = 0, rsp_length = 0;
  1651. struct req_que *req = NULL;
  1652. struct rsp_que *rsp = NULL;
  1653. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  1654. sht = &qla2xxx_driver_template;
  1655. if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
  1656. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
  1657. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
  1658. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
  1659. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
  1660. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
  1661. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
  1662. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
  1663. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1664. mem_only = 1;
  1665. }
  1666. if (mem_only) {
  1667. if (pci_enable_device_mem(pdev))
  1668. goto probe_out;
  1669. } else {
  1670. if (pci_enable_device(pdev))
  1671. goto probe_out;
  1672. }
  1673. /* This may fail but that's ok */
  1674. pci_enable_pcie_error_reporting(pdev);
  1675. ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
  1676. if (!ha) {
  1677. DEBUG(printk("Unable to allocate memory for ha\n"));
  1678. goto probe_out;
  1679. }
  1680. ha->pdev = pdev;
  1681. /* Clear our data area */
  1682. ha->bars = bars;
  1683. ha->mem_only = mem_only;
  1684. spin_lock_init(&ha->hardware_lock);
  1685. /* Set ISP-type information. */
  1686. qla2x00_set_isp_flags(ha);
  1687. /* Set EEH reset type to fundamental if required by hba */
  1688. if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
  1689. pdev->needs_freset = 1;
  1690. }
  1691. /* Configure PCI I/O space */
  1692. ret = qla2x00_iospace_config(ha);
  1693. if (ret)
  1694. goto probe_hw_failed;
  1695. qla_printk(KERN_INFO, ha,
  1696. "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
  1697. ha->iobase);
  1698. ha->prev_topology = 0;
  1699. ha->init_cb_size = sizeof(init_cb_t);
  1700. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  1701. ha->optrom_size = OPTROM_SIZE_2300;
  1702. /* Assign ISP specific operations. */
  1703. max_id = MAX_TARGETS_2200;
  1704. if (IS_QLA2100(ha)) {
  1705. max_id = MAX_TARGETS_2100;
  1706. ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
  1707. req_length = REQUEST_ENTRY_CNT_2100;
  1708. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1709. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1710. ha->gid_list_info_size = 4;
  1711. ha->flash_conf_off = ~0;
  1712. ha->flash_data_off = ~0;
  1713. ha->nvram_conf_off = ~0;
  1714. ha->nvram_data_off = ~0;
  1715. ha->isp_ops = &qla2100_isp_ops;
  1716. } else if (IS_QLA2200(ha)) {
  1717. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1718. req_length = REQUEST_ENTRY_CNT_2200;
  1719. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1720. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1721. ha->gid_list_info_size = 4;
  1722. ha->flash_conf_off = ~0;
  1723. ha->flash_data_off = ~0;
  1724. ha->nvram_conf_off = ~0;
  1725. ha->nvram_data_off = ~0;
  1726. ha->isp_ops = &qla2100_isp_ops;
  1727. } else if (IS_QLA23XX(ha)) {
  1728. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1729. req_length = REQUEST_ENTRY_CNT_2200;
  1730. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1731. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1732. ha->gid_list_info_size = 6;
  1733. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1734. ha->optrom_size = OPTROM_SIZE_2322;
  1735. ha->flash_conf_off = ~0;
  1736. ha->flash_data_off = ~0;
  1737. ha->nvram_conf_off = ~0;
  1738. ha->nvram_data_off = ~0;
  1739. ha->isp_ops = &qla2300_isp_ops;
  1740. } else if (IS_QLA24XX_TYPE(ha)) {
  1741. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1742. req_length = REQUEST_ENTRY_CNT_24XX;
  1743. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1744. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1745. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1746. ha->gid_list_info_size = 8;
  1747. ha->optrom_size = OPTROM_SIZE_24XX;
  1748. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
  1749. ha->isp_ops = &qla24xx_isp_ops;
  1750. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1751. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1752. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1753. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1754. } else if (IS_QLA25XX(ha)) {
  1755. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1756. req_length = REQUEST_ENTRY_CNT_24XX;
  1757. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1758. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1759. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1760. ha->gid_list_info_size = 8;
  1761. ha->optrom_size = OPTROM_SIZE_25XX;
  1762. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1763. ha->isp_ops = &qla25xx_isp_ops;
  1764. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1765. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1766. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1767. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1768. } else if (IS_QLA81XX(ha)) {
  1769. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1770. req_length = REQUEST_ENTRY_CNT_24XX;
  1771. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1772. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1773. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1774. ha->gid_list_info_size = 8;
  1775. ha->optrom_size = OPTROM_SIZE_81XX;
  1776. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1777. ha->isp_ops = &qla81xx_isp_ops;
  1778. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
  1779. ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
  1780. ha->nvram_conf_off = ~0;
  1781. ha->nvram_data_off = ~0;
  1782. } else if (IS_QLA82XX(ha)) {
  1783. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1784. req_length = REQUEST_ENTRY_CNT_82XX;
  1785. rsp_length = RESPONSE_ENTRY_CNT_82XX;
  1786. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1787. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1788. ha->gid_list_info_size = 8;
  1789. ha->optrom_size = OPTROM_SIZE_82XX;
  1790. ha->isp_ops = &qla82xx_isp_ops;
  1791. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1792. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1793. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1794. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1795. }
  1796. mutex_init(&ha->vport_lock);
  1797. init_completion(&ha->mbx_cmd_comp);
  1798. complete(&ha->mbx_cmd_comp);
  1799. init_completion(&ha->mbx_intr_comp);
  1800. set_bit(0, (unsigned long *) ha->vp_idx_map);
  1801. qla2x00_config_dma_addressing(ha);
  1802. ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
  1803. if (!ret) {
  1804. qla_printk(KERN_WARNING, ha,
  1805. "[ERROR] Failed to allocate memory for adapter\n");
  1806. goto probe_hw_failed;
  1807. }
  1808. req->max_q_depth = MAX_Q_DEPTH;
  1809. if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
  1810. req->max_q_depth = ql2xmaxqdepth;
  1811. base_vha = qla2x00_create_host(sht, ha);
  1812. if (!base_vha) {
  1813. qla_printk(KERN_WARNING, ha,
  1814. "[ERROR] Failed to allocate memory for scsi_host\n");
  1815. ret = -ENOMEM;
  1816. qla2x00_mem_free(ha);
  1817. qla2x00_free_req_que(ha, req);
  1818. qla2x00_free_rsp_que(ha, rsp);
  1819. goto probe_hw_failed;
  1820. }
  1821. pci_set_drvdata(pdev, base_vha);
  1822. host = base_vha->host;
  1823. base_vha->req = req;
  1824. host->can_queue = req->length + 128;
  1825. if (IS_QLA2XXX_MIDTYPE(ha))
  1826. base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
  1827. else
  1828. base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
  1829. base_vha->vp_idx;
  1830. if (IS_QLA2100(ha))
  1831. host->sg_tablesize = 32;
  1832. host->max_id = max_id;
  1833. host->this_id = 255;
  1834. host->cmd_per_lun = 3;
  1835. host->unique_id = host->host_no;
  1836. host->max_cmd_len = MAX_CMDSZ;
  1837. host->max_channel = MAX_BUSES - 1;
  1838. host->max_lun = MAX_LUNS;
  1839. host->transportt = qla2xxx_transport_template;
  1840. sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
  1841. /* Set up the irqs */
  1842. ret = qla2x00_request_irqs(ha, rsp);
  1843. if (ret)
  1844. goto probe_init_failed;
  1845. pci_save_state(pdev);
  1846. /* Alloc arrays of request and response ring ptrs */
  1847. que_init:
  1848. if (!qla2x00_alloc_queues(ha)) {
  1849. qla_printk(KERN_WARNING, ha,
  1850. "[ERROR] Failed to allocate memory for queue"
  1851. " pointers\n");
  1852. goto probe_init_failed;
  1853. }
  1854. ha->rsp_q_map[0] = rsp;
  1855. ha->req_q_map[0] = req;
  1856. rsp->req = req;
  1857. req->rsp = rsp;
  1858. set_bit(0, ha->req_qid_map);
  1859. set_bit(0, ha->rsp_qid_map);
  1860. /* FWI2-capable only. */
  1861. req->req_q_in = &ha->iobase->isp24.req_q_in;
  1862. req->req_q_out = &ha->iobase->isp24.req_q_out;
  1863. rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
  1864. rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
  1865. if (ha->mqenable) {
  1866. req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
  1867. req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
  1868. rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
  1869. rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
  1870. }
  1871. if (IS_QLA82XX(ha)) {
  1872. req->req_q_out = &ha->iobase->isp82.req_q_out[0];
  1873. rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
  1874. rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
  1875. }
  1876. if (qla2x00_initialize_adapter(base_vha)) {
  1877. qla_printk(KERN_WARNING, ha,
  1878. "Failed to initialize adapter\n");
  1879. DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
  1880. "Adapter flags %x.\n",
  1881. base_vha->host_no, base_vha->device_flags));
  1882. if (IS_QLA82XX(ha)) {
  1883. qla82xx_idc_lock(ha);
  1884. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  1885. QLA82XX_DEV_FAILED);
  1886. qla82xx_idc_unlock(ha);
  1887. qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
  1888. }
  1889. ret = -ENODEV;
  1890. goto probe_failed;
  1891. }
  1892. if (ha->mqenable) {
  1893. if (qla25xx_setup_mode(base_vha)) {
  1894. qla_printk(KERN_WARNING, ha,
  1895. "Can't create queues, falling back to single"
  1896. " queue mode\n");
  1897. goto que_init;
  1898. }
  1899. }
  1900. if (ha->flags.running_gold_fw)
  1901. goto skip_dpc;
  1902. /*
  1903. * Startup the kernel thread for this host adapter
  1904. */
  1905. ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
  1906. "%s_dpc", base_vha->host_str);
  1907. if (IS_ERR(ha->dpc_thread)) {
  1908. qla_printk(KERN_WARNING, ha,
  1909. "Unable to start DPC thread!\n");
  1910. ret = PTR_ERR(ha->dpc_thread);
  1911. goto probe_failed;
  1912. }
  1913. skip_dpc:
  1914. list_add_tail(&base_vha->list, &ha->vp_list);
  1915. base_vha->host->irq = ha->pdev->irq;
  1916. /* Initialized the timer */
  1917. qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
  1918. DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
  1919. base_vha->host_no, ha));
  1920. ha->isp_ops->enable_intrs(ha);
  1921. ret = scsi_add_host(host, &pdev->dev);
  1922. if (ret)
  1923. goto probe_failed;
  1924. base_vha->flags.init_done = 1;
  1925. base_vha->flags.online = 1;
  1926. scsi_scan_host(host);
  1927. qla2x00_alloc_sysfs_attr(base_vha);
  1928. qla2x00_init_host_attr(base_vha);
  1929. qla2x00_dfs_setup(base_vha);
  1930. qla_printk(KERN_INFO, ha, "\n"
  1931. " QLogic Fibre Channel HBA Driver: %s\n"
  1932. " QLogic %s - %s\n"
  1933. " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
  1934. qla2x00_version_str, ha->model_number,
  1935. ha->model_desc ? ha->model_desc : "", pdev->device,
  1936. ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
  1937. ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
  1938. ha->isp_ops->fw_version_str(base_vha, fw_str));
  1939. return 0;
  1940. probe_init_failed:
  1941. qla2x00_free_req_que(ha, req);
  1942. qla2x00_free_rsp_que(ha, rsp);
  1943. ha->max_req_queues = ha->max_rsp_queues = 0;
  1944. probe_failed:
  1945. if (base_vha->timer_active)
  1946. qla2x00_stop_timer(base_vha);
  1947. base_vha->flags.online = 0;
  1948. if (ha->dpc_thread) {
  1949. struct task_struct *t = ha->dpc_thread;
  1950. ha->dpc_thread = NULL;
  1951. kthread_stop(t);
  1952. }
  1953. qla2x00_free_device(base_vha);
  1954. scsi_host_put(base_vha->host);
  1955. probe_hw_failed:
  1956. if (IS_QLA82XX(ha)) {
  1957. qla82xx_idc_lock(ha);
  1958. qla82xx_clear_drv_active(ha);
  1959. qla82xx_idc_unlock(ha);
  1960. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  1961. if (!ql2xdbwr)
  1962. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  1963. } else {
  1964. if (ha->iobase)
  1965. iounmap(ha->iobase);
  1966. }
  1967. pci_release_selected_regions(ha->pdev, ha->bars);
  1968. kfree(ha);
  1969. ha = NULL;
  1970. probe_out:
  1971. pci_disable_device(pdev);
  1972. return ret;
  1973. }
  1974. static void
  1975. qla2x00_remove_one(struct pci_dev *pdev)
  1976. {
  1977. scsi_qla_host_t *base_vha, *vha, *temp;
  1978. struct qla_hw_data *ha;
  1979. base_vha = pci_get_drvdata(pdev);
  1980. ha = base_vha->hw;
  1981. list_for_each_entry_safe(vha, temp, &ha->vp_list, list) {
  1982. if (vha && vha->fc_vport)
  1983. fc_vport_terminate(vha->fc_vport);
  1984. }
  1985. set_bit(UNLOADING, &base_vha->dpc_flags);
  1986. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  1987. qla2x00_dfs_remove(base_vha);
  1988. qla84xx_put_chip(base_vha);
  1989. /* Disable timer */
  1990. if (base_vha->timer_active)
  1991. qla2x00_stop_timer(base_vha);
  1992. base_vha->flags.online = 0;
  1993. /* Flush the work queue and remove it */
  1994. if (ha->wq) {
  1995. flush_workqueue(ha->wq);
  1996. destroy_workqueue(ha->wq);
  1997. ha->wq = NULL;
  1998. }
  1999. /* Kill the kernel thread for this host */
  2000. if (ha->dpc_thread) {
  2001. struct task_struct *t = ha->dpc_thread;
  2002. /*
  2003. * qla2xxx_wake_dpc checks for ->dpc_thread
  2004. * so we need to zero it out.
  2005. */
  2006. ha->dpc_thread = NULL;
  2007. kthread_stop(t);
  2008. }
  2009. qla2x00_free_sysfs_attr(base_vha);
  2010. fc_remove_host(base_vha->host);
  2011. scsi_remove_host(base_vha->host);
  2012. qla2x00_free_device(base_vha);
  2013. scsi_host_put(base_vha->host);
  2014. if (IS_QLA82XX(ha)) {
  2015. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2016. if (!ql2xdbwr)
  2017. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2018. } else {
  2019. if (ha->iobase)
  2020. iounmap(ha->iobase);
  2021. if (ha->mqiobase)
  2022. iounmap(ha->mqiobase);
  2023. }
  2024. pci_release_selected_regions(ha->pdev, ha->bars);
  2025. kfree(ha);
  2026. ha = NULL;
  2027. pci_disable_pcie_error_reporting(pdev);
  2028. pci_disable_device(pdev);
  2029. pci_set_drvdata(pdev, NULL);
  2030. }
  2031. static void
  2032. qla2x00_free_device(scsi_qla_host_t *vha)
  2033. {
  2034. struct qla_hw_data *ha = vha->hw;
  2035. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  2036. /* Disable timer */
  2037. if (vha->timer_active)
  2038. qla2x00_stop_timer(vha);
  2039. /* Kill the kernel thread for this host */
  2040. if (ha->dpc_thread) {
  2041. struct task_struct *t = ha->dpc_thread;
  2042. /*
  2043. * qla2xxx_wake_dpc checks for ->dpc_thread
  2044. * so we need to zero it out.
  2045. */
  2046. ha->dpc_thread = NULL;
  2047. kthread_stop(t);
  2048. }
  2049. qla25xx_delete_queues(vha);
  2050. if (ha->flags.fce_enabled)
  2051. qla2x00_disable_fce_trace(vha, NULL, NULL);
  2052. if (ha->eft)
  2053. qla2x00_disable_eft_trace(vha);
  2054. /* Stop currently executing firmware. */
  2055. qla2x00_try_to_stop_firmware(vha);
  2056. vha->flags.online = 0;
  2057. /* turn-off interrupts on the card */
  2058. if (ha->interrupts_on) {
  2059. vha->flags.init_done = 0;
  2060. ha->isp_ops->disable_intrs(ha);
  2061. }
  2062. qla2x00_free_irqs(vha);
  2063. qla2x00_mem_free(ha);
  2064. qla2x00_free_queues(ha);
  2065. }
  2066. static inline void
  2067. qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
  2068. int defer)
  2069. {
  2070. struct fc_rport *rport;
  2071. scsi_qla_host_t *base_vha;
  2072. if (!fcport->rport)
  2073. return;
  2074. rport = fcport->rport;
  2075. if (defer) {
  2076. base_vha = pci_get_drvdata(vha->hw->pdev);
  2077. spin_lock_irq(vha->host->host_lock);
  2078. fcport->drport = rport;
  2079. spin_unlock_irq(vha->host->host_lock);
  2080. set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2081. qla2xxx_wake_dpc(base_vha);
  2082. } else
  2083. fc_remote_port_delete(rport);
  2084. }
  2085. /*
  2086. * qla2x00_mark_device_lost Updates fcport state when device goes offline.
  2087. *
  2088. * Input: ha = adapter block pointer. fcport = port structure pointer.
  2089. *
  2090. * Return: None.
  2091. *
  2092. * Context:
  2093. */
  2094. void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
  2095. int do_login, int defer)
  2096. {
  2097. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2098. vha->vp_idx == fcport->vp_idx) {
  2099. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2100. qla2x00_schedule_rport_del(vha, fcport, defer);
  2101. }
  2102. /*
  2103. * We may need to retry the login, so don't change the state of the
  2104. * port but do the retries.
  2105. */
  2106. if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
  2107. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2108. if (!do_login)
  2109. return;
  2110. if (fcport->login_retry == 0) {
  2111. fcport->login_retry = vha->hw->login_retry_count;
  2112. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2113. DEBUG(printk("scsi(%ld): Port login retry: "
  2114. "%02x%02x%02x%02x%02x%02x%02x%02x, "
  2115. "id = 0x%04x retry cnt=%d\n",
  2116. vha->host_no,
  2117. fcport->port_name[0],
  2118. fcport->port_name[1],
  2119. fcport->port_name[2],
  2120. fcport->port_name[3],
  2121. fcport->port_name[4],
  2122. fcport->port_name[5],
  2123. fcport->port_name[6],
  2124. fcport->port_name[7],
  2125. fcport->loop_id,
  2126. fcport->login_retry));
  2127. }
  2128. }
  2129. /*
  2130. * qla2x00_mark_all_devices_lost
  2131. * Updates fcport state when device goes offline.
  2132. *
  2133. * Input:
  2134. * ha = adapter block pointer.
  2135. * fcport = port structure pointer.
  2136. *
  2137. * Return:
  2138. * None.
  2139. *
  2140. * Context:
  2141. */
  2142. void
  2143. qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
  2144. {
  2145. fc_port_t *fcport;
  2146. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2147. if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
  2148. continue;
  2149. /*
  2150. * No point in marking the device as lost, if the device is
  2151. * already DEAD.
  2152. */
  2153. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
  2154. continue;
  2155. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2156. if (defer)
  2157. qla2x00_schedule_rport_del(vha, fcport, defer);
  2158. else if (vha->vp_idx == fcport->vp_idx)
  2159. qla2x00_schedule_rport_del(vha, fcport, defer);
  2160. }
  2161. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2162. }
  2163. }
  2164. /*
  2165. * qla2x00_mem_alloc
  2166. * Allocates adapter memory.
  2167. *
  2168. * Returns:
  2169. * 0 = success.
  2170. * !0 = failure.
  2171. */
  2172. static int
  2173. qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
  2174. struct req_que **req, struct rsp_que **rsp)
  2175. {
  2176. char name[16];
  2177. ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
  2178. &ha->init_cb_dma, GFP_KERNEL);
  2179. if (!ha->init_cb)
  2180. goto fail;
  2181. ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
  2182. &ha->gid_list_dma, GFP_KERNEL);
  2183. if (!ha->gid_list)
  2184. goto fail_free_init_cb;
  2185. ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
  2186. if (!ha->srb_mempool)
  2187. goto fail_free_gid_list;
  2188. if (IS_QLA82XX(ha)) {
  2189. /* Allocate cache for CT6 Ctx. */
  2190. if (!ctx_cachep) {
  2191. ctx_cachep = kmem_cache_create("qla2xxx_ctx",
  2192. sizeof(struct ct6_dsd), 0,
  2193. SLAB_HWCACHE_ALIGN, NULL);
  2194. if (!ctx_cachep)
  2195. goto fail_free_gid_list;
  2196. }
  2197. ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
  2198. ctx_cachep);
  2199. if (!ha->ctx_mempool)
  2200. goto fail_free_srb_mempool;
  2201. }
  2202. /* Get memory for cached NVRAM */
  2203. ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
  2204. if (!ha->nvram)
  2205. goto fail_free_ctx_mempool;
  2206. snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
  2207. ha->pdev->device);
  2208. ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2209. DMA_POOL_SIZE, 8, 0);
  2210. if (!ha->s_dma_pool)
  2211. goto fail_free_nvram;
  2212. if (IS_QLA82XX(ha)) {
  2213. ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2214. DSD_LIST_DMA_POOL_SIZE, 8, 0);
  2215. if (!ha->dl_dma_pool) {
  2216. qla_printk(KERN_WARNING, ha,
  2217. "Memory Allocation failed - dl_dma_pool\n");
  2218. goto fail_s_dma_pool;
  2219. }
  2220. ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2221. FCP_CMND_DMA_POOL_SIZE, 8, 0);
  2222. if (!ha->fcp_cmnd_dma_pool) {
  2223. qla_printk(KERN_WARNING, ha,
  2224. "Memory Allocation failed - fcp_cmnd_dma_pool\n");
  2225. goto fail_dl_dma_pool;
  2226. }
  2227. }
  2228. /* Allocate memory for SNS commands */
  2229. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2230. /* Get consistent memory allocated for SNS commands */
  2231. ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
  2232. sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
  2233. if (!ha->sns_cmd)
  2234. goto fail_dma_pool;
  2235. } else {
  2236. /* Get consistent memory allocated for MS IOCB */
  2237. ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2238. &ha->ms_iocb_dma);
  2239. if (!ha->ms_iocb)
  2240. goto fail_dma_pool;
  2241. /* Get consistent memory allocated for CT SNS commands */
  2242. ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
  2243. sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
  2244. if (!ha->ct_sns)
  2245. goto fail_free_ms_iocb;
  2246. }
  2247. /* Allocate memory for request ring */
  2248. *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
  2249. if (!*req) {
  2250. DEBUG(printk("Unable to allocate memory for req\n"));
  2251. goto fail_req;
  2252. }
  2253. (*req)->length = req_len;
  2254. (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2255. ((*req)->length + 1) * sizeof(request_t),
  2256. &(*req)->dma, GFP_KERNEL);
  2257. if (!(*req)->ring) {
  2258. DEBUG(printk("Unable to allocate memory for req_ring\n"));
  2259. goto fail_req_ring;
  2260. }
  2261. /* Allocate memory for response ring */
  2262. *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
  2263. if (!*rsp) {
  2264. qla_printk(KERN_WARNING, ha,
  2265. "Unable to allocate memory for rsp\n");
  2266. goto fail_rsp;
  2267. }
  2268. (*rsp)->hw = ha;
  2269. (*rsp)->length = rsp_len;
  2270. (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2271. ((*rsp)->length + 1) * sizeof(response_t),
  2272. &(*rsp)->dma, GFP_KERNEL);
  2273. if (!(*rsp)->ring) {
  2274. qla_printk(KERN_WARNING, ha,
  2275. "Unable to allocate memory for rsp_ring\n");
  2276. goto fail_rsp_ring;
  2277. }
  2278. (*req)->rsp = *rsp;
  2279. (*rsp)->req = *req;
  2280. /* Allocate memory for NVRAM data for vports */
  2281. if (ha->nvram_npiv_size) {
  2282. ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
  2283. ha->nvram_npiv_size, GFP_KERNEL);
  2284. if (!ha->npiv_info) {
  2285. qla_printk(KERN_WARNING, ha,
  2286. "Unable to allocate memory for npiv info\n");
  2287. goto fail_npiv_info;
  2288. }
  2289. } else
  2290. ha->npiv_info = NULL;
  2291. /* Get consistent memory allocated for EX-INIT-CB. */
  2292. if (IS_QLA8XXX_TYPE(ha)) {
  2293. ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2294. &ha->ex_init_cb_dma);
  2295. if (!ha->ex_init_cb)
  2296. goto fail_ex_init_cb;
  2297. }
  2298. INIT_LIST_HEAD(&ha->gbl_dsd_list);
  2299. /* Get consistent memory allocated for Async Port-Database. */
  2300. if (!IS_FWI2_CAPABLE(ha)) {
  2301. ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2302. &ha->async_pd_dma);
  2303. if (!ha->async_pd)
  2304. goto fail_async_pd;
  2305. }
  2306. INIT_LIST_HEAD(&ha->vp_list);
  2307. return 1;
  2308. fail_async_pd:
  2309. dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
  2310. fail_ex_init_cb:
  2311. kfree(ha->npiv_info);
  2312. fail_npiv_info:
  2313. dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
  2314. sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
  2315. (*rsp)->ring = NULL;
  2316. (*rsp)->dma = 0;
  2317. fail_rsp_ring:
  2318. kfree(*rsp);
  2319. fail_rsp:
  2320. dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
  2321. sizeof(request_t), (*req)->ring, (*req)->dma);
  2322. (*req)->ring = NULL;
  2323. (*req)->dma = 0;
  2324. fail_req_ring:
  2325. kfree(*req);
  2326. fail_req:
  2327. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2328. ha->ct_sns, ha->ct_sns_dma);
  2329. ha->ct_sns = NULL;
  2330. ha->ct_sns_dma = 0;
  2331. fail_free_ms_iocb:
  2332. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2333. ha->ms_iocb = NULL;
  2334. ha->ms_iocb_dma = 0;
  2335. fail_dma_pool:
  2336. if (IS_QLA82XX(ha)) {
  2337. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2338. ha->fcp_cmnd_dma_pool = NULL;
  2339. }
  2340. fail_dl_dma_pool:
  2341. if (IS_QLA82XX(ha)) {
  2342. dma_pool_destroy(ha->dl_dma_pool);
  2343. ha->dl_dma_pool = NULL;
  2344. }
  2345. fail_s_dma_pool:
  2346. dma_pool_destroy(ha->s_dma_pool);
  2347. ha->s_dma_pool = NULL;
  2348. fail_free_nvram:
  2349. kfree(ha->nvram);
  2350. ha->nvram = NULL;
  2351. fail_free_ctx_mempool:
  2352. mempool_destroy(ha->ctx_mempool);
  2353. ha->ctx_mempool = NULL;
  2354. fail_free_srb_mempool:
  2355. mempool_destroy(ha->srb_mempool);
  2356. ha->srb_mempool = NULL;
  2357. fail_free_gid_list:
  2358. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2359. ha->gid_list_dma);
  2360. ha->gid_list = NULL;
  2361. ha->gid_list_dma = 0;
  2362. fail_free_init_cb:
  2363. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
  2364. ha->init_cb_dma);
  2365. ha->init_cb = NULL;
  2366. ha->init_cb_dma = 0;
  2367. fail:
  2368. DEBUG(printk("%s: Memory allocation failure\n", __func__));
  2369. return -ENOMEM;
  2370. }
  2371. /*
  2372. * qla2x00_mem_free
  2373. * Frees all adapter allocated memory.
  2374. *
  2375. * Input:
  2376. * ha = adapter block pointer.
  2377. */
  2378. static void
  2379. qla2x00_mem_free(struct qla_hw_data *ha)
  2380. {
  2381. if (ha->srb_mempool)
  2382. mempool_destroy(ha->srb_mempool);
  2383. if (ha->fce)
  2384. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  2385. ha->fce_dma);
  2386. if (ha->fw_dump) {
  2387. if (ha->eft)
  2388. dma_free_coherent(&ha->pdev->dev,
  2389. ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
  2390. vfree(ha->fw_dump);
  2391. }
  2392. if (ha->dcbx_tlv)
  2393. dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
  2394. ha->dcbx_tlv, ha->dcbx_tlv_dma);
  2395. if (ha->xgmac_data)
  2396. dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
  2397. ha->xgmac_data, ha->xgmac_data_dma);
  2398. if (ha->sns_cmd)
  2399. dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
  2400. ha->sns_cmd, ha->sns_cmd_dma);
  2401. if (ha->ct_sns)
  2402. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2403. ha->ct_sns, ha->ct_sns_dma);
  2404. if (ha->sfp_data)
  2405. dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
  2406. if (ha->edc_data)
  2407. dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
  2408. if (ha->ms_iocb)
  2409. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2410. if (ha->ex_init_cb)
  2411. dma_pool_free(ha->s_dma_pool,
  2412. ha->ex_init_cb, ha->ex_init_cb_dma);
  2413. if (ha->async_pd)
  2414. dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
  2415. if (ha->s_dma_pool)
  2416. dma_pool_destroy(ha->s_dma_pool);
  2417. if (ha->gid_list)
  2418. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2419. ha->gid_list_dma);
  2420. if (IS_QLA82XX(ha)) {
  2421. if (!list_empty(&ha->gbl_dsd_list)) {
  2422. struct dsd_dma *dsd_ptr, *tdsd_ptr;
  2423. /* clean up allocated prev pool */
  2424. list_for_each_entry_safe(dsd_ptr,
  2425. tdsd_ptr, &ha->gbl_dsd_list, list) {
  2426. dma_pool_free(ha->dl_dma_pool,
  2427. dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
  2428. list_del(&dsd_ptr->list);
  2429. kfree(dsd_ptr);
  2430. }
  2431. }
  2432. }
  2433. if (ha->dl_dma_pool)
  2434. dma_pool_destroy(ha->dl_dma_pool);
  2435. if (ha->fcp_cmnd_dma_pool)
  2436. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2437. if (ha->ctx_mempool)
  2438. mempool_destroy(ha->ctx_mempool);
  2439. if (ha->init_cb)
  2440. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
  2441. ha->init_cb, ha->init_cb_dma);
  2442. vfree(ha->optrom_buffer);
  2443. kfree(ha->nvram);
  2444. kfree(ha->npiv_info);
  2445. ha->srb_mempool = NULL;
  2446. ha->ctx_mempool = NULL;
  2447. ha->eft = NULL;
  2448. ha->eft_dma = 0;
  2449. ha->sns_cmd = NULL;
  2450. ha->sns_cmd_dma = 0;
  2451. ha->ct_sns = NULL;
  2452. ha->ct_sns_dma = 0;
  2453. ha->ms_iocb = NULL;
  2454. ha->ms_iocb_dma = 0;
  2455. ha->init_cb = NULL;
  2456. ha->init_cb_dma = 0;
  2457. ha->ex_init_cb = NULL;
  2458. ha->ex_init_cb_dma = 0;
  2459. ha->async_pd = NULL;
  2460. ha->async_pd_dma = 0;
  2461. ha->s_dma_pool = NULL;
  2462. ha->dl_dma_pool = NULL;
  2463. ha->fcp_cmnd_dma_pool = NULL;
  2464. ha->gid_list = NULL;
  2465. ha->gid_list_dma = 0;
  2466. ha->fw_dump = NULL;
  2467. ha->fw_dumped = 0;
  2468. ha->fw_dump_reading = 0;
  2469. }
  2470. struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
  2471. struct qla_hw_data *ha)
  2472. {
  2473. struct Scsi_Host *host;
  2474. struct scsi_qla_host *vha = NULL;
  2475. host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
  2476. if (host == NULL) {
  2477. printk(KERN_WARNING
  2478. "qla2xxx: Couldn't allocate host from scsi layer!\n");
  2479. goto fail;
  2480. }
  2481. /* Clear our data area */
  2482. vha = shost_priv(host);
  2483. memset(vha, 0, sizeof(scsi_qla_host_t));
  2484. vha->host = host;
  2485. vha->host_no = host->host_no;
  2486. vha->hw = ha;
  2487. INIT_LIST_HEAD(&vha->vp_fcports);
  2488. INIT_LIST_HEAD(&vha->work_list);
  2489. INIT_LIST_HEAD(&vha->list);
  2490. spin_lock_init(&vha->work_lock);
  2491. sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
  2492. return vha;
  2493. fail:
  2494. return vha;
  2495. }
  2496. static struct qla_work_evt *
  2497. qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
  2498. {
  2499. struct qla_work_evt *e;
  2500. e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
  2501. if (!e)
  2502. return NULL;
  2503. INIT_LIST_HEAD(&e->list);
  2504. e->type = type;
  2505. e->flags = QLA_EVT_FLAG_FREE;
  2506. return e;
  2507. }
  2508. static int
  2509. qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
  2510. {
  2511. unsigned long flags;
  2512. spin_lock_irqsave(&vha->work_lock, flags);
  2513. list_add_tail(&e->list, &vha->work_list);
  2514. spin_unlock_irqrestore(&vha->work_lock, flags);
  2515. qla2xxx_wake_dpc(vha);
  2516. return QLA_SUCCESS;
  2517. }
  2518. int
  2519. qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
  2520. u32 data)
  2521. {
  2522. struct qla_work_evt *e;
  2523. e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
  2524. if (!e)
  2525. return QLA_FUNCTION_FAILED;
  2526. e->u.aen.code = code;
  2527. e->u.aen.data = data;
  2528. return qla2x00_post_work(vha, e);
  2529. }
  2530. int
  2531. qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
  2532. {
  2533. struct qla_work_evt *e;
  2534. e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
  2535. if (!e)
  2536. return QLA_FUNCTION_FAILED;
  2537. memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2538. return qla2x00_post_work(vha, e);
  2539. }
  2540. #define qla2x00_post_async_work(name, type) \
  2541. int qla2x00_post_async_##name##_work( \
  2542. struct scsi_qla_host *vha, \
  2543. fc_port_t *fcport, uint16_t *data) \
  2544. { \
  2545. struct qla_work_evt *e; \
  2546. \
  2547. e = qla2x00_alloc_work(vha, type); \
  2548. if (!e) \
  2549. return QLA_FUNCTION_FAILED; \
  2550. \
  2551. e->u.logio.fcport = fcport; \
  2552. if (data) { \
  2553. e->u.logio.data[0] = data[0]; \
  2554. e->u.logio.data[1] = data[1]; \
  2555. } \
  2556. return qla2x00_post_work(vha, e); \
  2557. }
  2558. qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
  2559. qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
  2560. qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
  2561. qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
  2562. qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
  2563. qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
  2564. int
  2565. qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
  2566. {
  2567. struct qla_work_evt *e;
  2568. e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
  2569. if (!e)
  2570. return QLA_FUNCTION_FAILED;
  2571. e->u.uevent.code = code;
  2572. return qla2x00_post_work(vha, e);
  2573. }
  2574. static void
  2575. qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
  2576. {
  2577. char event_string[40];
  2578. char *envp[] = { event_string, NULL };
  2579. switch (code) {
  2580. case QLA_UEVENT_CODE_FW_DUMP:
  2581. snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
  2582. vha->host_no);
  2583. break;
  2584. default:
  2585. /* do nothing */
  2586. break;
  2587. }
  2588. kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
  2589. }
  2590. void
  2591. qla2x00_do_work(struct scsi_qla_host *vha)
  2592. {
  2593. struct qla_work_evt *e, *tmp;
  2594. unsigned long flags;
  2595. LIST_HEAD(work);
  2596. spin_lock_irqsave(&vha->work_lock, flags);
  2597. list_splice_init(&vha->work_list, &work);
  2598. spin_unlock_irqrestore(&vha->work_lock, flags);
  2599. list_for_each_entry_safe(e, tmp, &work, list) {
  2600. list_del_init(&e->list);
  2601. switch (e->type) {
  2602. case QLA_EVT_AEN:
  2603. fc_host_post_event(vha->host, fc_get_event_number(),
  2604. e->u.aen.code, e->u.aen.data);
  2605. break;
  2606. case QLA_EVT_IDC_ACK:
  2607. qla81xx_idc_ack(vha, e->u.idc_ack.mb);
  2608. break;
  2609. case QLA_EVT_ASYNC_LOGIN:
  2610. qla2x00_async_login(vha, e->u.logio.fcport,
  2611. e->u.logio.data);
  2612. break;
  2613. case QLA_EVT_ASYNC_LOGIN_DONE:
  2614. qla2x00_async_login_done(vha, e->u.logio.fcport,
  2615. e->u.logio.data);
  2616. break;
  2617. case QLA_EVT_ASYNC_LOGOUT:
  2618. qla2x00_async_logout(vha, e->u.logio.fcport);
  2619. break;
  2620. case QLA_EVT_ASYNC_LOGOUT_DONE:
  2621. qla2x00_async_logout_done(vha, e->u.logio.fcport,
  2622. e->u.logio.data);
  2623. break;
  2624. case QLA_EVT_ASYNC_ADISC:
  2625. qla2x00_async_adisc(vha, e->u.logio.fcport,
  2626. e->u.logio.data);
  2627. break;
  2628. case QLA_EVT_ASYNC_ADISC_DONE:
  2629. qla2x00_async_adisc_done(vha, e->u.logio.fcport,
  2630. e->u.logio.data);
  2631. break;
  2632. case QLA_EVT_UEVENT:
  2633. qla2x00_uevent_emit(vha, e->u.uevent.code);
  2634. break;
  2635. }
  2636. if (e->flags & QLA_EVT_FLAG_FREE)
  2637. kfree(e);
  2638. }
  2639. }
  2640. /* Relogins all the fcports of a vport
  2641. * Context: dpc thread
  2642. */
  2643. void qla2x00_relogin(struct scsi_qla_host *vha)
  2644. {
  2645. fc_port_t *fcport;
  2646. int status;
  2647. uint16_t next_loopid = 0;
  2648. struct qla_hw_data *ha = vha->hw;
  2649. uint16_t data[2];
  2650. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2651. /*
  2652. * If the port is not ONLINE then try to login
  2653. * to it if we haven't run out of retries.
  2654. */
  2655. if (atomic_read(&fcport->state) != FCS_ONLINE &&
  2656. fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
  2657. fcport->login_retry--;
  2658. if (fcport->flags & FCF_FABRIC_DEVICE) {
  2659. if (fcport->flags & FCF_FCP2_DEVICE)
  2660. ha->isp_ops->fabric_logout(vha,
  2661. fcport->loop_id,
  2662. fcport->d_id.b.domain,
  2663. fcport->d_id.b.area,
  2664. fcport->d_id.b.al_pa);
  2665. if (IS_ALOGIO_CAPABLE(ha)) {
  2666. fcport->flags |= FCF_ASYNC_SENT;
  2667. data[0] = 0;
  2668. data[1] = QLA_LOGIO_LOGIN_RETRIED;
  2669. status = qla2x00_post_async_login_work(
  2670. vha, fcport, data);
  2671. if (status == QLA_SUCCESS)
  2672. continue;
  2673. /* Attempt a retry. */
  2674. status = 1;
  2675. } else
  2676. status = qla2x00_fabric_login(vha,
  2677. fcport, &next_loopid);
  2678. } else
  2679. status = qla2x00_local_device_login(vha,
  2680. fcport);
  2681. if (status == QLA_SUCCESS) {
  2682. fcport->old_loop_id = fcport->loop_id;
  2683. DEBUG(printk("scsi(%ld): port login OK: logged "
  2684. "in ID 0x%x\n", vha->host_no, fcport->loop_id));
  2685. qla2x00_update_fcport(vha, fcport);
  2686. } else if (status == 1) {
  2687. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2688. /* retry the login again */
  2689. DEBUG(printk("scsi(%ld): Retrying"
  2690. " %d login again loop_id 0x%x\n",
  2691. vha->host_no, fcport->login_retry,
  2692. fcport->loop_id));
  2693. } else {
  2694. fcport->login_retry = 0;
  2695. }
  2696. if (fcport->login_retry == 0 && status != QLA_SUCCESS)
  2697. fcport->loop_id = FC_NO_LOOP_ID;
  2698. }
  2699. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2700. break;
  2701. }
  2702. }
  2703. /**************************************************************************
  2704. * qla2x00_do_dpc
  2705. * This kernel thread is a task that is schedule by the interrupt handler
  2706. * to perform the background processing for interrupts.
  2707. *
  2708. * Notes:
  2709. * This task always run in the context of a kernel thread. It
  2710. * is kick-off by the driver's detect code and starts up
  2711. * up one per adapter. It immediately goes to sleep and waits for
  2712. * some fibre event. When either the interrupt handler or
  2713. * the timer routine detects a event it will one of the task
  2714. * bits then wake us up.
  2715. **************************************************************************/
  2716. static int
  2717. qla2x00_do_dpc(void *data)
  2718. {
  2719. int rval;
  2720. scsi_qla_host_t *base_vha;
  2721. struct qla_hw_data *ha;
  2722. ha = (struct qla_hw_data *)data;
  2723. base_vha = pci_get_drvdata(ha->pdev);
  2724. set_user_nice(current, -20);
  2725. while (!kthread_should_stop()) {
  2726. DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
  2727. set_current_state(TASK_INTERRUPTIBLE);
  2728. schedule();
  2729. __set_current_state(TASK_RUNNING);
  2730. DEBUG3(printk("qla2x00: DPC handler waking up\n"));
  2731. /* Initialization not yet finished. Don't do anything yet. */
  2732. if (!base_vha->flags.init_done)
  2733. continue;
  2734. if (ha->flags.eeh_busy) {
  2735. DEBUG17(qla_printk(KERN_WARNING, ha,
  2736. "qla2x00_do_dpc: dpc_flags: %lx\n",
  2737. base_vha->dpc_flags));
  2738. continue;
  2739. }
  2740. DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
  2741. ha->dpc_active = 1;
  2742. if (ha->flags.mbox_busy) {
  2743. ha->dpc_active = 0;
  2744. continue;
  2745. }
  2746. qla2x00_do_work(base_vha);
  2747. if (IS_QLA82XX(ha)) {
  2748. if (test_and_clear_bit(ISP_UNRECOVERABLE,
  2749. &base_vha->dpc_flags)) {
  2750. qla82xx_idc_lock(ha);
  2751. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  2752. QLA82XX_DEV_FAILED);
  2753. qla82xx_idc_unlock(ha);
  2754. qla_printk(KERN_INFO, ha,
  2755. "HW State: FAILED\n");
  2756. qla82xx_device_state_handler(base_vha);
  2757. continue;
  2758. }
  2759. if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
  2760. &base_vha->dpc_flags)) {
  2761. DEBUG(printk(KERN_INFO
  2762. "scsi(%ld): dpc: sched "
  2763. "qla82xx_fcoe_ctx_reset ha = %p\n",
  2764. base_vha->host_no, ha));
  2765. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2766. &base_vha->dpc_flags))) {
  2767. if (qla82xx_fcoe_ctx_reset(base_vha)) {
  2768. /* FCoE-ctx reset failed.
  2769. * Escalate to chip-reset
  2770. */
  2771. set_bit(ISP_ABORT_NEEDED,
  2772. &base_vha->dpc_flags);
  2773. }
  2774. clear_bit(ABORT_ISP_ACTIVE,
  2775. &base_vha->dpc_flags);
  2776. }
  2777. DEBUG(printk("scsi(%ld): dpc:"
  2778. " qla82xx_fcoe_ctx_reset end\n",
  2779. base_vha->host_no));
  2780. }
  2781. }
  2782. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  2783. &base_vha->dpc_flags)) {
  2784. DEBUG(printk("scsi(%ld): dpc: sched "
  2785. "qla2x00_abort_isp ha = %p\n",
  2786. base_vha->host_no, ha));
  2787. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2788. &base_vha->dpc_flags))) {
  2789. if (ha->isp_ops->abort_isp(base_vha)) {
  2790. /* failed. retry later */
  2791. set_bit(ISP_ABORT_NEEDED,
  2792. &base_vha->dpc_flags);
  2793. }
  2794. clear_bit(ABORT_ISP_ACTIVE,
  2795. &base_vha->dpc_flags);
  2796. }
  2797. DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
  2798. base_vha->host_no));
  2799. }
  2800. if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
  2801. qla2x00_update_fcports(base_vha);
  2802. clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2803. }
  2804. if (test_and_clear_bit(RESET_MARKER_NEEDED,
  2805. &base_vha->dpc_flags) &&
  2806. (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
  2807. DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
  2808. base_vha->host_no));
  2809. qla2x00_rst_aen(base_vha);
  2810. clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
  2811. }
  2812. /* Retry each device up to login retry count */
  2813. if ((test_and_clear_bit(RELOGIN_NEEDED,
  2814. &base_vha->dpc_flags)) &&
  2815. !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
  2816. atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
  2817. DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
  2818. base_vha->host_no));
  2819. qla2x00_relogin(base_vha);
  2820. DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
  2821. base_vha->host_no));
  2822. }
  2823. if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
  2824. &base_vha->dpc_flags)) {
  2825. DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
  2826. base_vha->host_no));
  2827. if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
  2828. &base_vha->dpc_flags))) {
  2829. rval = qla2x00_loop_resync(base_vha);
  2830. clear_bit(LOOP_RESYNC_ACTIVE,
  2831. &base_vha->dpc_flags);
  2832. }
  2833. DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
  2834. base_vha->host_no));
  2835. }
  2836. if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
  2837. atomic_read(&base_vha->loop_state) == LOOP_READY) {
  2838. clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
  2839. qla2xxx_flash_npiv_conf(base_vha);
  2840. }
  2841. if (!ha->interrupts_on)
  2842. ha->isp_ops->enable_intrs(ha);
  2843. if (test_and_clear_bit(BEACON_BLINK_NEEDED,
  2844. &base_vha->dpc_flags))
  2845. ha->isp_ops->beacon_blink(base_vha);
  2846. qla2x00_do_dpc_all_vps(base_vha);
  2847. ha->dpc_active = 0;
  2848. } /* End of while(1) */
  2849. DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
  2850. /*
  2851. * Make sure that nobody tries to wake us up again.
  2852. */
  2853. ha->dpc_active = 0;
  2854. /* Cleanup any residual CTX SRBs. */
  2855. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2856. return 0;
  2857. }
  2858. void
  2859. qla2xxx_wake_dpc(struct scsi_qla_host *vha)
  2860. {
  2861. struct qla_hw_data *ha = vha->hw;
  2862. struct task_struct *t = ha->dpc_thread;
  2863. if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
  2864. wake_up_process(t);
  2865. }
  2866. /*
  2867. * qla2x00_rst_aen
  2868. * Processes asynchronous reset.
  2869. *
  2870. * Input:
  2871. * ha = adapter block pointer.
  2872. */
  2873. static void
  2874. qla2x00_rst_aen(scsi_qla_host_t *vha)
  2875. {
  2876. if (vha->flags.online && !vha->flags.reset_active &&
  2877. !atomic_read(&vha->loop_down_timer) &&
  2878. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
  2879. do {
  2880. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2881. /*
  2882. * Issue marker command only when we are going to start
  2883. * the I/O.
  2884. */
  2885. vha->marker_needed = 1;
  2886. } while (!atomic_read(&vha->loop_down_timer) &&
  2887. (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
  2888. }
  2889. }
  2890. static void
  2891. qla2x00_sp_free_dma(srb_t *sp)
  2892. {
  2893. struct scsi_cmnd *cmd = sp->cmd;
  2894. if (sp->flags & SRB_DMA_VALID) {
  2895. scsi_dma_unmap(cmd);
  2896. sp->flags &= ~SRB_DMA_VALID;
  2897. }
  2898. CMD_SP(cmd) = NULL;
  2899. }
  2900. void
  2901. qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
  2902. {
  2903. struct scsi_cmnd *cmd = sp->cmd;
  2904. qla2x00_sp_free_dma(sp);
  2905. if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
  2906. struct ct6_dsd *ctx = sp->ctx;
  2907. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
  2908. ctx->fcp_cmnd_dma);
  2909. list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
  2910. ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
  2911. ha->gbl_dsd_avail += ctx->dsd_use_cnt;
  2912. mempool_free(sp->ctx, ha->ctx_mempool);
  2913. sp->ctx = NULL;
  2914. }
  2915. mempool_free(sp, ha->srb_mempool);
  2916. cmd->scsi_done(cmd);
  2917. }
  2918. /**************************************************************************
  2919. * qla2x00_timer
  2920. *
  2921. * Description:
  2922. * One second timer
  2923. *
  2924. * Context: Interrupt
  2925. ***************************************************************************/
  2926. void
  2927. qla2x00_timer(scsi_qla_host_t *vha)
  2928. {
  2929. unsigned long cpu_flags = 0;
  2930. fc_port_t *fcport;
  2931. int start_dpc = 0;
  2932. int index;
  2933. srb_t *sp;
  2934. int t;
  2935. uint16_t w;
  2936. struct qla_hw_data *ha = vha->hw;
  2937. struct req_que *req;
  2938. if (IS_QLA82XX(ha))
  2939. qla82xx_watchdog(vha);
  2940. /* Hardware read to raise pending EEH errors during mailbox waits. */
  2941. if (!pci_channel_offline(ha->pdev))
  2942. pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
  2943. /*
  2944. * Ports - Port down timer.
  2945. *
  2946. * Whenever, a port is in the LOST state we start decrementing its port
  2947. * down timer every second until it reaches zero. Once it reaches zero
  2948. * the port it marked DEAD.
  2949. */
  2950. t = 0;
  2951. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2952. if (fcport->port_type != FCT_TARGET)
  2953. continue;
  2954. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2955. if (atomic_read(&fcport->port_down_timer) == 0)
  2956. continue;
  2957. if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
  2958. atomic_set(&fcport->state, FCS_DEVICE_DEAD);
  2959. DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
  2960. "%d remaining\n",
  2961. vha->host_no,
  2962. t, atomic_read(&fcport->port_down_timer)));
  2963. }
  2964. t++;
  2965. } /* End of for fcport */
  2966. /* Loop down handler. */
  2967. if (atomic_read(&vha->loop_down_timer) > 0 &&
  2968. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
  2969. && vha->flags.online) {
  2970. if (atomic_read(&vha->loop_down_timer) ==
  2971. vha->loop_down_abort_time) {
  2972. DEBUG(printk("scsi(%ld): Loop Down - aborting the "
  2973. "queues before time expire\n",
  2974. vha->host_no));
  2975. if (!IS_QLA2100(ha) && vha->link_down_timeout)
  2976. atomic_set(&vha->loop_state, LOOP_DEAD);
  2977. /*
  2978. * Schedule an ISP abort to return any FCP2-device
  2979. * commands.
  2980. */
  2981. /* NPIV - scan physical port only */
  2982. if (!vha->vp_idx) {
  2983. spin_lock_irqsave(&ha->hardware_lock,
  2984. cpu_flags);
  2985. req = ha->req_q_map[0];
  2986. for (index = 1;
  2987. index < MAX_OUTSTANDING_COMMANDS;
  2988. index++) {
  2989. fc_port_t *sfcp;
  2990. sp = req->outstanding_cmds[index];
  2991. if (!sp)
  2992. continue;
  2993. if (sp->ctx)
  2994. continue;
  2995. sfcp = sp->fcport;
  2996. if (!(sfcp->flags & FCF_FCP2_DEVICE))
  2997. continue;
  2998. set_bit(ISP_ABORT_NEEDED,
  2999. &vha->dpc_flags);
  3000. break;
  3001. }
  3002. spin_unlock_irqrestore(&ha->hardware_lock,
  3003. cpu_flags);
  3004. }
  3005. start_dpc++;
  3006. }
  3007. /* if the loop has been down for 4 minutes, reinit adapter */
  3008. if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
  3009. if (!(vha->device_flags & DFLG_NO_CABLE)) {
  3010. DEBUG(printk("scsi(%ld): Loop down - "
  3011. "aborting ISP.\n",
  3012. vha->host_no));
  3013. qla_printk(KERN_WARNING, ha,
  3014. "Loop down - aborting ISP.\n");
  3015. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3016. }
  3017. }
  3018. DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
  3019. vha->host_no,
  3020. atomic_read(&vha->loop_down_timer)));
  3021. }
  3022. /* Check if beacon LED needs to be blinked */
  3023. if (ha->beacon_blink_led == 1) {
  3024. set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
  3025. start_dpc++;
  3026. }
  3027. /* Process any deferred work. */
  3028. if (!list_empty(&vha->work_list))
  3029. start_dpc++;
  3030. /* Schedule the DPC routine if needed */
  3031. if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
  3032. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
  3033. test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
  3034. start_dpc ||
  3035. test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
  3036. test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
  3037. test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
  3038. test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
  3039. test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
  3040. test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
  3041. qla2xxx_wake_dpc(vha);
  3042. qla2x00_restart_timer(vha, WATCH_INTERVAL);
  3043. }
  3044. /* Firmware interface routines. */
  3045. #define FW_BLOBS 8
  3046. #define FW_ISP21XX 0
  3047. #define FW_ISP22XX 1
  3048. #define FW_ISP2300 2
  3049. #define FW_ISP2322 3
  3050. #define FW_ISP24XX 4
  3051. #define FW_ISP25XX 5
  3052. #define FW_ISP81XX 6
  3053. #define FW_ISP82XX 7
  3054. #define FW_FILE_ISP21XX "ql2100_fw.bin"
  3055. #define FW_FILE_ISP22XX "ql2200_fw.bin"
  3056. #define FW_FILE_ISP2300 "ql2300_fw.bin"
  3057. #define FW_FILE_ISP2322 "ql2322_fw.bin"
  3058. #define FW_FILE_ISP24XX "ql2400_fw.bin"
  3059. #define FW_FILE_ISP25XX "ql2500_fw.bin"
  3060. #define FW_FILE_ISP81XX "ql8100_fw.bin"
  3061. #define FW_FILE_ISP82XX "ql8200_fw.bin"
  3062. static DEFINE_MUTEX(qla_fw_lock);
  3063. static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
  3064. { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
  3065. { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
  3066. { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
  3067. { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
  3068. { .name = FW_FILE_ISP24XX, },
  3069. { .name = FW_FILE_ISP25XX, },
  3070. { .name = FW_FILE_ISP81XX, },
  3071. { .name = FW_FILE_ISP82XX, },
  3072. };
  3073. struct fw_blob *
  3074. qla2x00_request_firmware(scsi_qla_host_t *vha)
  3075. {
  3076. struct qla_hw_data *ha = vha->hw;
  3077. struct fw_blob *blob;
  3078. blob = NULL;
  3079. if (IS_QLA2100(ha)) {
  3080. blob = &qla_fw_blobs[FW_ISP21XX];
  3081. } else if (IS_QLA2200(ha)) {
  3082. blob = &qla_fw_blobs[FW_ISP22XX];
  3083. } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  3084. blob = &qla_fw_blobs[FW_ISP2300];
  3085. } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  3086. blob = &qla_fw_blobs[FW_ISP2322];
  3087. } else if (IS_QLA24XX_TYPE(ha)) {
  3088. blob = &qla_fw_blobs[FW_ISP24XX];
  3089. } else if (IS_QLA25XX(ha)) {
  3090. blob = &qla_fw_blobs[FW_ISP25XX];
  3091. } else if (IS_QLA81XX(ha)) {
  3092. blob = &qla_fw_blobs[FW_ISP81XX];
  3093. } else if (IS_QLA82XX(ha)) {
  3094. blob = &qla_fw_blobs[FW_ISP82XX];
  3095. }
  3096. mutex_lock(&qla_fw_lock);
  3097. if (blob->fw)
  3098. goto out;
  3099. if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
  3100. DEBUG2(printk("scsi(%ld): Failed to load firmware image "
  3101. "(%s).\n", vha->host_no, blob->name));
  3102. blob->fw = NULL;
  3103. blob = NULL;
  3104. goto out;
  3105. }
  3106. out:
  3107. mutex_unlock(&qla_fw_lock);
  3108. return blob;
  3109. }
  3110. static void
  3111. qla2x00_release_firmware(void)
  3112. {
  3113. int idx;
  3114. mutex_lock(&qla_fw_lock);
  3115. for (idx = 0; idx < FW_BLOBS; idx++)
  3116. if (qla_fw_blobs[idx].fw)
  3117. release_firmware(qla_fw_blobs[idx].fw);
  3118. mutex_unlock(&qla_fw_lock);
  3119. }
  3120. static pci_ers_result_t
  3121. qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3122. {
  3123. scsi_qla_host_t *vha = pci_get_drvdata(pdev);
  3124. struct qla_hw_data *ha = vha->hw;
  3125. DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
  3126. state));
  3127. switch (state) {
  3128. case pci_channel_io_normal:
  3129. ha->flags.eeh_busy = 0;
  3130. return PCI_ERS_RESULT_CAN_RECOVER;
  3131. case pci_channel_io_frozen:
  3132. ha->flags.eeh_busy = 1;
  3133. qla2x00_free_irqs(vha);
  3134. pci_disable_device(pdev);
  3135. return PCI_ERS_RESULT_NEED_RESET;
  3136. case pci_channel_io_perm_failure:
  3137. ha->flags.pci_channel_io_perm_failure = 1;
  3138. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  3139. return PCI_ERS_RESULT_DISCONNECT;
  3140. }
  3141. return PCI_ERS_RESULT_NEED_RESET;
  3142. }
  3143. static pci_ers_result_t
  3144. qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
  3145. {
  3146. int risc_paused = 0;
  3147. uint32_t stat;
  3148. unsigned long flags;
  3149. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3150. struct qla_hw_data *ha = base_vha->hw;
  3151. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3152. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  3153. spin_lock_irqsave(&ha->hardware_lock, flags);
  3154. if (IS_QLA2100(ha) || IS_QLA2200(ha)){
  3155. stat = RD_REG_DWORD(&reg->hccr);
  3156. if (stat & HCCR_RISC_PAUSE)
  3157. risc_paused = 1;
  3158. } else if (IS_QLA23XX(ha)) {
  3159. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  3160. if (stat & HSR_RISC_PAUSED)
  3161. risc_paused = 1;
  3162. } else if (IS_FWI2_CAPABLE(ha)) {
  3163. stat = RD_REG_DWORD(&reg24->host_status);
  3164. if (stat & HSRX_RISC_PAUSED)
  3165. risc_paused = 1;
  3166. }
  3167. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3168. if (risc_paused) {
  3169. qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
  3170. "Dumping firmware!\n");
  3171. ha->isp_ops->fw_dump(base_vha, 0);
  3172. return PCI_ERS_RESULT_NEED_RESET;
  3173. } else
  3174. return PCI_ERS_RESULT_RECOVERED;
  3175. }
  3176. static pci_ers_result_t
  3177. qla2xxx_pci_slot_reset(struct pci_dev *pdev)
  3178. {
  3179. pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
  3180. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3181. struct qla_hw_data *ha = base_vha->hw;
  3182. struct rsp_que *rsp;
  3183. int rc, retries = 10;
  3184. DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
  3185. /* Workaround: qla2xxx driver which access hardware earlier
  3186. * needs error state to be pci_channel_io_online.
  3187. * Otherwise mailbox command timesout.
  3188. */
  3189. pdev->error_state = pci_channel_io_normal;
  3190. pci_restore_state(pdev);
  3191. /* pci_restore_state() clears the saved_state flag of the device
  3192. * save restored state which resets saved_state flag
  3193. */
  3194. pci_save_state(pdev);
  3195. if (ha->mem_only)
  3196. rc = pci_enable_device_mem(pdev);
  3197. else
  3198. rc = pci_enable_device(pdev);
  3199. if (rc) {
  3200. qla_printk(KERN_WARNING, ha,
  3201. "Can't re-enable PCI device after reset.\n");
  3202. return ret;
  3203. }
  3204. rsp = ha->rsp_q_map[0];
  3205. if (qla2x00_request_irqs(ha, rsp))
  3206. return ret;
  3207. if (ha->isp_ops->pci_config(base_vha))
  3208. return ret;
  3209. while (ha->flags.mbox_busy && retries--)
  3210. msleep(1000);
  3211. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3212. if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
  3213. ret = PCI_ERS_RESULT_RECOVERED;
  3214. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3215. DEBUG17(qla_printk(KERN_WARNING, ha,
  3216. "slot_reset-return:ret=%x\n", ret));
  3217. return ret;
  3218. }
  3219. static void
  3220. qla2xxx_pci_resume(struct pci_dev *pdev)
  3221. {
  3222. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3223. struct qla_hw_data *ha = base_vha->hw;
  3224. int ret;
  3225. DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
  3226. ret = qla2x00_wait_for_hba_online(base_vha);
  3227. if (ret != QLA_SUCCESS) {
  3228. qla_printk(KERN_ERR, ha,
  3229. "the device failed to resume I/O "
  3230. "from slot/link_reset");
  3231. }
  3232. pci_cleanup_aer_uncorrect_error_status(pdev);
  3233. ha->flags.eeh_busy = 0;
  3234. }
  3235. static struct pci_error_handlers qla2xxx_err_handler = {
  3236. .error_detected = qla2xxx_pci_error_detected,
  3237. .mmio_enabled = qla2xxx_pci_mmio_enabled,
  3238. .slot_reset = qla2xxx_pci_slot_reset,
  3239. .resume = qla2xxx_pci_resume,
  3240. };
  3241. static struct pci_device_id qla2xxx_pci_tbl[] = {
  3242. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
  3243. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
  3244. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
  3245. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
  3246. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
  3247. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
  3248. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
  3249. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
  3250. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
  3251. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
  3252. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
  3253. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
  3254. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
  3255. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
  3256. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
  3257. { 0 },
  3258. };
  3259. MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
  3260. static struct pci_driver qla2xxx_pci_driver = {
  3261. .name = QLA2XXX_DRIVER_NAME,
  3262. .driver = {
  3263. .owner = THIS_MODULE,
  3264. },
  3265. .id_table = qla2xxx_pci_tbl,
  3266. .probe = qla2x00_probe_one,
  3267. .remove = qla2x00_remove_one,
  3268. .err_handler = &qla2xxx_err_handler,
  3269. };
  3270. static struct file_operations apidev_fops = {
  3271. .owner = THIS_MODULE,
  3272. };
  3273. /**
  3274. * qla2x00_module_init - Module initialization.
  3275. **/
  3276. static int __init
  3277. qla2x00_module_init(void)
  3278. {
  3279. int ret = 0;
  3280. /* Allocate cache for SRBs. */
  3281. srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
  3282. SLAB_HWCACHE_ALIGN, NULL);
  3283. if (srb_cachep == NULL) {
  3284. printk(KERN_ERR
  3285. "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
  3286. return -ENOMEM;
  3287. }
  3288. /* Derive version string. */
  3289. strcpy(qla2x00_version_str, QLA2XXX_VERSION);
  3290. if (ql2xextended_error_logging)
  3291. strcat(qla2x00_version_str, "-debug");
  3292. qla2xxx_transport_template =
  3293. fc_attach_transport(&qla2xxx_transport_functions);
  3294. if (!qla2xxx_transport_template) {
  3295. kmem_cache_destroy(srb_cachep);
  3296. return -ENODEV;
  3297. }
  3298. apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
  3299. if (apidev_major < 0) {
  3300. printk(KERN_WARNING "qla2xxx: Unable to register char device "
  3301. "%s\n", QLA2XXX_APIDEV);
  3302. }
  3303. qla2xxx_transport_vport_template =
  3304. fc_attach_transport(&qla2xxx_transport_vport_functions);
  3305. if (!qla2xxx_transport_vport_template) {
  3306. kmem_cache_destroy(srb_cachep);
  3307. fc_release_transport(qla2xxx_transport_template);
  3308. return -ENODEV;
  3309. }
  3310. printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
  3311. qla2x00_version_str);
  3312. ret = pci_register_driver(&qla2xxx_pci_driver);
  3313. if (ret) {
  3314. kmem_cache_destroy(srb_cachep);
  3315. fc_release_transport(qla2xxx_transport_template);
  3316. fc_release_transport(qla2xxx_transport_vport_template);
  3317. }
  3318. return ret;
  3319. }
  3320. /**
  3321. * qla2x00_module_exit - Module cleanup.
  3322. **/
  3323. static void __exit
  3324. qla2x00_module_exit(void)
  3325. {
  3326. unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
  3327. pci_unregister_driver(&qla2xxx_pci_driver);
  3328. qla2x00_release_firmware();
  3329. kmem_cache_destroy(srb_cachep);
  3330. if (ctx_cachep)
  3331. kmem_cache_destroy(ctx_cachep);
  3332. fc_release_transport(qla2xxx_transport_template);
  3333. fc_release_transport(qla2xxx_transport_vport_template);
  3334. }
  3335. module_init(qla2x00_module_init);
  3336. module_exit(qla2x00_module_exit);
  3337. MODULE_AUTHOR("QLogic Corporation");
  3338. MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
  3339. MODULE_LICENSE("GPL");
  3340. MODULE_VERSION(QLA2XXX_VERSION);
  3341. MODULE_FIRMWARE(FW_FILE_ISP21XX);
  3342. MODULE_FIRMWARE(FW_FILE_ISP22XX);
  3343. MODULE_FIRMWARE(FW_FILE_ISP2300);
  3344. MODULE_FIRMWARE(FW_FILE_ISP2322);
  3345. MODULE_FIRMWARE(FW_FILE_ISP24XX);
  3346. MODULE_FIRMWARE(FW_FILE_ISP25XX);