qla_isr.c 68 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2011 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/slab.h>
  10. #include <scsi/scsi_tcq.h>
  11. #include <scsi/scsi_bsg_fc.h>
  12. #include <scsi/scsi_eh.h>
  13. static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
  14. static void qla2x00_process_completed_request(struct scsi_qla_host *,
  15. struct req_que *, uint32_t);
  16. static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
  17. static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
  18. static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
  19. sts_entry_t *);
  20. /**
  21. * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
  22. * @irq:
  23. * @dev_id: SCSI driver HA context
  24. *
  25. * Called by system whenever the host adapter generates an interrupt.
  26. *
  27. * Returns handled flag.
  28. */
  29. irqreturn_t
  30. qla2100_intr_handler(int irq, void *dev_id)
  31. {
  32. scsi_qla_host_t *vha;
  33. struct qla_hw_data *ha;
  34. struct device_reg_2xxx __iomem *reg;
  35. int status;
  36. unsigned long iter;
  37. uint16_t hccr;
  38. uint16_t mb[4];
  39. struct rsp_que *rsp;
  40. unsigned long flags;
  41. rsp = (struct rsp_que *) dev_id;
  42. if (!rsp) {
  43. printk(KERN_INFO
  44. "%s(): NULL response queue pointer.\n", __func__);
  45. return (IRQ_NONE);
  46. }
  47. ha = rsp->hw;
  48. reg = &ha->iobase->isp;
  49. status = 0;
  50. spin_lock_irqsave(&ha->hardware_lock, flags);
  51. vha = pci_get_drvdata(ha->pdev);
  52. for (iter = 50; iter--; ) {
  53. hccr = RD_REG_WORD(&reg->hccr);
  54. if (hccr & HCCR_RISC_PAUSE) {
  55. if (pci_channel_offline(ha->pdev))
  56. break;
  57. /*
  58. * Issue a "HARD" reset in order for the RISC interrupt
  59. * bit to be cleared. Schedule a big hammer to get
  60. * out of the RISC PAUSED state.
  61. */
  62. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  63. RD_REG_WORD(&reg->hccr);
  64. ha->isp_ops->fw_dump(vha, 1);
  65. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  66. break;
  67. } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
  68. break;
  69. if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
  70. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  71. RD_REG_WORD(&reg->hccr);
  72. /* Get mailbox data. */
  73. mb[0] = RD_MAILBOX_REG(ha, reg, 0);
  74. if (mb[0] > 0x3fff && mb[0] < 0x8000) {
  75. qla2x00_mbx_completion(vha, mb[0]);
  76. status |= MBX_INTERRUPT;
  77. } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
  78. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  79. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  80. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  81. qla2x00_async_event(vha, rsp, mb);
  82. } else {
  83. /*EMPTY*/
  84. ql_dbg(ql_dbg_async, vha, 0x5025,
  85. "Unrecognized interrupt type (%d).\n",
  86. mb[0]);
  87. }
  88. /* Release mailbox registers. */
  89. WRT_REG_WORD(&reg->semaphore, 0);
  90. RD_REG_WORD(&reg->semaphore);
  91. } else {
  92. qla2x00_process_response_queue(rsp);
  93. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  94. RD_REG_WORD(&reg->hccr);
  95. }
  96. }
  97. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  98. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  99. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  100. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  101. complete(&ha->mbx_intr_comp);
  102. }
  103. return (IRQ_HANDLED);
  104. }
  105. /**
  106. * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
  107. * @irq:
  108. * @dev_id: SCSI driver HA context
  109. *
  110. * Called by system whenever the host adapter generates an interrupt.
  111. *
  112. * Returns handled flag.
  113. */
  114. irqreturn_t
  115. qla2300_intr_handler(int irq, void *dev_id)
  116. {
  117. scsi_qla_host_t *vha;
  118. struct device_reg_2xxx __iomem *reg;
  119. int status;
  120. unsigned long iter;
  121. uint32_t stat;
  122. uint16_t hccr;
  123. uint16_t mb[4];
  124. struct rsp_que *rsp;
  125. struct qla_hw_data *ha;
  126. unsigned long flags;
  127. rsp = (struct rsp_que *) dev_id;
  128. if (!rsp) {
  129. printk(KERN_INFO
  130. "%s(): NULL response queue pointer.\n", __func__);
  131. return (IRQ_NONE);
  132. }
  133. ha = rsp->hw;
  134. reg = &ha->iobase->isp;
  135. status = 0;
  136. spin_lock_irqsave(&ha->hardware_lock, flags);
  137. vha = pci_get_drvdata(ha->pdev);
  138. for (iter = 50; iter--; ) {
  139. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  140. if (stat & HSR_RISC_PAUSED) {
  141. if (unlikely(pci_channel_offline(ha->pdev)))
  142. break;
  143. hccr = RD_REG_WORD(&reg->hccr);
  144. if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
  145. ql_log(ql_log_warn, vha, 0x5026,
  146. "Parity error -- HCCR=%x, Dumping "
  147. "firmware.\n", hccr);
  148. else
  149. ql_log(ql_log_warn, vha, 0x5027,
  150. "RISC paused -- HCCR=%x, Dumping "
  151. "firmware.\n", hccr);
  152. /*
  153. * Issue a "HARD" reset in order for the RISC
  154. * interrupt bit to be cleared. Schedule a big
  155. * hammer to get out of the RISC PAUSED state.
  156. */
  157. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  158. RD_REG_WORD(&reg->hccr);
  159. ha->isp_ops->fw_dump(vha, 1);
  160. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  161. break;
  162. } else if ((stat & HSR_RISC_INT) == 0)
  163. break;
  164. switch (stat & 0xff) {
  165. case 0x1:
  166. case 0x2:
  167. case 0x10:
  168. case 0x11:
  169. qla2x00_mbx_completion(vha, MSW(stat));
  170. status |= MBX_INTERRUPT;
  171. /* Release mailbox registers. */
  172. WRT_REG_WORD(&reg->semaphore, 0);
  173. break;
  174. case 0x12:
  175. mb[0] = MSW(stat);
  176. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  177. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  178. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  179. qla2x00_async_event(vha, rsp, mb);
  180. break;
  181. case 0x13:
  182. qla2x00_process_response_queue(rsp);
  183. break;
  184. case 0x15:
  185. mb[0] = MBA_CMPLT_1_16BIT;
  186. mb[1] = MSW(stat);
  187. qla2x00_async_event(vha, rsp, mb);
  188. break;
  189. case 0x16:
  190. mb[0] = MBA_SCSI_COMPLETION;
  191. mb[1] = MSW(stat);
  192. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  193. qla2x00_async_event(vha, rsp, mb);
  194. break;
  195. default:
  196. ql_dbg(ql_dbg_async, vha, 0x5028,
  197. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  198. break;
  199. }
  200. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  201. RD_REG_WORD_RELAXED(&reg->hccr);
  202. }
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  205. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  206. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  207. complete(&ha->mbx_intr_comp);
  208. }
  209. return (IRQ_HANDLED);
  210. }
  211. /**
  212. * qla2x00_mbx_completion() - Process mailbox command completions.
  213. * @ha: SCSI driver HA context
  214. * @mb0: Mailbox0 register
  215. */
  216. static void
  217. qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  218. {
  219. uint16_t cnt;
  220. uint32_t mboxes;
  221. uint16_t __iomem *wptr;
  222. struct qla_hw_data *ha = vha->hw;
  223. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  224. /* Read all mbox registers? */
  225. mboxes = (1 << ha->mbx_count) - 1;
  226. if (!ha->mcp)
  227. ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERRROR.\n");
  228. else
  229. mboxes = ha->mcp->in_mb;
  230. /* Load return mailbox registers. */
  231. ha->flags.mbox_int = 1;
  232. ha->mailbox_out[0] = mb0;
  233. mboxes >>= 1;
  234. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
  235. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  236. if (IS_QLA2200(ha) && cnt == 8)
  237. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
  238. if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
  239. ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
  240. else if (mboxes & BIT_0)
  241. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  242. wptr++;
  243. mboxes >>= 1;
  244. }
  245. }
  246. static void
  247. qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
  248. {
  249. static char *event[] =
  250. { "Complete", "Request Notification", "Time Extension" };
  251. int rval;
  252. struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
  253. uint16_t __iomem *wptr;
  254. uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
  255. /* Seed data -- mailbox1 -> mailbox7. */
  256. wptr = (uint16_t __iomem *)&reg24->mailbox1;
  257. for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
  258. mb[cnt] = RD_REG_WORD(wptr);
  259. ql_dbg(ql_dbg_async, vha, 0x5021,
  260. "Inter-Driver Communication %s -- "
  261. "%04x %04x %04x %04x %04x %04x %04x.\n",
  262. event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
  263. mb[4], mb[5], mb[6]);
  264. /* Acknowledgement needed? [Notify && non-zero timeout]. */
  265. timeout = (descr >> 8) & 0xf;
  266. if (aen != MBA_IDC_NOTIFY || !timeout)
  267. return;
  268. ql_dbg(ql_dbg_async, vha, 0x5022,
  269. "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
  270. vha->host_no, event[aen & 0xff], timeout);
  271. rval = qla2x00_post_idc_ack_work(vha, mb);
  272. if (rval != QLA_SUCCESS)
  273. ql_log(ql_log_warn, vha, 0x5023,
  274. "IDC failed to post ACK.\n");
  275. }
  276. /**
  277. * qla2x00_async_event() - Process aynchronous events.
  278. * @ha: SCSI driver HA context
  279. * @mb: Mailbox registers (0 - 3)
  280. */
  281. void
  282. qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
  283. {
  284. #define LS_UNKNOWN 2
  285. static char *link_speeds[] = { "1", "2", "?", "4", "8", "16", "10" };
  286. char *link_speed;
  287. uint16_t handle_cnt;
  288. uint16_t cnt, mbx;
  289. uint32_t handles[5];
  290. struct qla_hw_data *ha = vha->hw;
  291. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  292. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  293. struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
  294. uint32_t rscn_entry, host_pid;
  295. uint8_t rscn_queue_index;
  296. unsigned long flags;
  297. /* Setup to process RIO completion. */
  298. handle_cnt = 0;
  299. if (IS_CNA_CAPABLE(ha))
  300. goto skip_rio;
  301. switch (mb[0]) {
  302. case MBA_SCSI_COMPLETION:
  303. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  304. handle_cnt = 1;
  305. break;
  306. case MBA_CMPLT_1_16BIT:
  307. handles[0] = mb[1];
  308. handle_cnt = 1;
  309. mb[0] = MBA_SCSI_COMPLETION;
  310. break;
  311. case MBA_CMPLT_2_16BIT:
  312. handles[0] = mb[1];
  313. handles[1] = mb[2];
  314. handle_cnt = 2;
  315. mb[0] = MBA_SCSI_COMPLETION;
  316. break;
  317. case MBA_CMPLT_3_16BIT:
  318. handles[0] = mb[1];
  319. handles[1] = mb[2];
  320. handles[2] = mb[3];
  321. handle_cnt = 3;
  322. mb[0] = MBA_SCSI_COMPLETION;
  323. break;
  324. case MBA_CMPLT_4_16BIT:
  325. handles[0] = mb[1];
  326. handles[1] = mb[2];
  327. handles[2] = mb[3];
  328. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  329. handle_cnt = 4;
  330. mb[0] = MBA_SCSI_COMPLETION;
  331. break;
  332. case MBA_CMPLT_5_16BIT:
  333. handles[0] = mb[1];
  334. handles[1] = mb[2];
  335. handles[2] = mb[3];
  336. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  337. handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
  338. handle_cnt = 5;
  339. mb[0] = MBA_SCSI_COMPLETION;
  340. break;
  341. case MBA_CMPLT_2_32BIT:
  342. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  343. handles[1] = le32_to_cpu(
  344. ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
  345. RD_MAILBOX_REG(ha, reg, 6));
  346. handle_cnt = 2;
  347. mb[0] = MBA_SCSI_COMPLETION;
  348. break;
  349. default:
  350. break;
  351. }
  352. skip_rio:
  353. switch (mb[0]) {
  354. case MBA_SCSI_COMPLETION: /* Fast Post */
  355. if (!vha->flags.online)
  356. break;
  357. for (cnt = 0; cnt < handle_cnt; cnt++)
  358. qla2x00_process_completed_request(vha, rsp->req,
  359. handles[cnt]);
  360. break;
  361. case MBA_RESET: /* Reset */
  362. ql_dbg(ql_dbg_async, vha, 0x5002,
  363. "Asynchronous RESET.\n");
  364. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  365. break;
  366. case MBA_SYSTEM_ERR: /* System Error */
  367. mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha)) ?
  368. RD_REG_WORD(&reg24->mailbox7) : 0;
  369. ql_log(ql_log_warn, vha, 0x5003,
  370. "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
  371. "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
  372. ha->isp_ops->fw_dump(vha, 1);
  373. if (IS_FWI2_CAPABLE(ha)) {
  374. if (mb[1] == 0 && mb[2] == 0) {
  375. ql_log(ql_log_fatal, vha, 0x5004,
  376. "Unrecoverable Hardware Error: adapter "
  377. "marked OFFLINE!\n");
  378. vha->flags.online = 0;
  379. vha->device_flags |= DFLG_DEV_FAILED;
  380. } else {
  381. /* Check to see if MPI timeout occurred */
  382. if ((mbx & MBX_3) && (ha->flags.port0))
  383. set_bit(MPI_RESET_NEEDED,
  384. &vha->dpc_flags);
  385. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  386. }
  387. } else if (mb[1] == 0) {
  388. ql_log(ql_log_fatal, vha, 0x5005,
  389. "Unrecoverable Hardware Error: adapter marked "
  390. "OFFLINE!\n");
  391. vha->flags.online = 0;
  392. vha->device_flags |= DFLG_DEV_FAILED;
  393. } else
  394. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  395. break;
  396. case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
  397. ql_log(ql_log_warn, vha, 0x5006,
  398. "ISP Request Transfer Error (%x).\n", mb[1]);
  399. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  400. break;
  401. case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
  402. ql_log(ql_log_warn, vha, 0x5007,
  403. "ISP Response Transfer Error.\n");
  404. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  405. break;
  406. case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
  407. ql_dbg(ql_dbg_async, vha, 0x5008,
  408. "Asynchronous WAKEUP_THRES.\n");
  409. break;
  410. case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
  411. ql_dbg(ql_dbg_async, vha, 0x5009,
  412. "LIP occurred (%x).\n", mb[1]);
  413. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  414. atomic_set(&vha->loop_state, LOOP_DOWN);
  415. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  416. qla2x00_mark_all_devices_lost(vha, 1);
  417. }
  418. if (vha->vp_idx) {
  419. atomic_set(&vha->vp_state, VP_FAILED);
  420. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  421. }
  422. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  423. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  424. vha->flags.management_server_logged_in = 0;
  425. qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
  426. break;
  427. case MBA_LOOP_UP: /* Loop Up Event */
  428. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  429. link_speed = link_speeds[0];
  430. ha->link_data_rate = PORT_SPEED_1GB;
  431. } else {
  432. link_speed = link_speeds[LS_UNKNOWN];
  433. if (mb[1] < 6)
  434. link_speed = link_speeds[mb[1]];
  435. else if (mb[1] == 0x13)
  436. link_speed = link_speeds[6];
  437. ha->link_data_rate = mb[1];
  438. }
  439. ql_dbg(ql_dbg_async, vha, 0x500a,
  440. "LOOP UP detected (%s Gbps).\n", link_speed);
  441. vha->flags.management_server_logged_in = 0;
  442. qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
  443. break;
  444. case MBA_LOOP_DOWN: /* Loop Down Event */
  445. mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
  446. ? RD_REG_WORD(&reg24->mailbox4) : 0;
  447. mbx = IS_QLA82XX(ha) ? RD_REG_WORD(&reg82->mailbox_out[4]) : mbx;
  448. ql_dbg(ql_dbg_async, vha, 0x500b,
  449. "LOOP DOWN detected (%x %x %x %x).\n",
  450. mb[1], mb[2], mb[3], mbx);
  451. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  452. atomic_set(&vha->loop_state, LOOP_DOWN);
  453. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  454. vha->device_flags |= DFLG_NO_CABLE;
  455. qla2x00_mark_all_devices_lost(vha, 1);
  456. }
  457. if (vha->vp_idx) {
  458. atomic_set(&vha->vp_state, VP_FAILED);
  459. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  460. }
  461. vha->flags.management_server_logged_in = 0;
  462. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  463. qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
  464. break;
  465. case MBA_LIP_RESET: /* LIP reset occurred */
  466. ql_dbg(ql_dbg_async, vha, 0x500c,
  467. "LIP reset occurred (%x).\n", mb[1]);
  468. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  469. atomic_set(&vha->loop_state, LOOP_DOWN);
  470. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  471. qla2x00_mark_all_devices_lost(vha, 1);
  472. }
  473. if (vha->vp_idx) {
  474. atomic_set(&vha->vp_state, VP_FAILED);
  475. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  476. }
  477. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  478. ha->operating_mode = LOOP;
  479. vha->flags.management_server_logged_in = 0;
  480. qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
  481. break;
  482. /* case MBA_DCBX_COMPLETE: */
  483. case MBA_POINT_TO_POINT: /* Point-to-Point */
  484. if (IS_QLA2100(ha))
  485. break;
  486. if (IS_QLA81XX(ha) || IS_QLA82XX(ha) || IS_QLA8031(ha)) {
  487. ql_dbg(ql_dbg_async, vha, 0x500d,
  488. "DCBX Completed -- %04x %04x %04x.\n",
  489. mb[1], mb[2], mb[3]);
  490. if (ha->notify_dcbx_comp)
  491. complete(&ha->dcbx_comp);
  492. } else
  493. ql_dbg(ql_dbg_async, vha, 0x500e,
  494. "Asynchronous P2P MODE received.\n");
  495. /*
  496. * Until there's a transition from loop down to loop up, treat
  497. * this as loop down only.
  498. */
  499. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  500. atomic_set(&vha->loop_state, LOOP_DOWN);
  501. if (!atomic_read(&vha->loop_down_timer))
  502. atomic_set(&vha->loop_down_timer,
  503. LOOP_DOWN_TIME);
  504. qla2x00_mark_all_devices_lost(vha, 1);
  505. }
  506. if (vha->vp_idx) {
  507. atomic_set(&vha->vp_state, VP_FAILED);
  508. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  509. }
  510. if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
  511. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  512. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  513. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  514. ha->flags.gpsc_supported = 1;
  515. vha->flags.management_server_logged_in = 0;
  516. break;
  517. case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
  518. if (IS_QLA2100(ha))
  519. break;
  520. ql_dbg(ql_dbg_async, vha, 0x500f,
  521. "Configuration change detected: value=%x.\n", mb[1]);
  522. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  523. atomic_set(&vha->loop_state, LOOP_DOWN);
  524. if (!atomic_read(&vha->loop_down_timer))
  525. atomic_set(&vha->loop_down_timer,
  526. LOOP_DOWN_TIME);
  527. qla2x00_mark_all_devices_lost(vha, 1);
  528. }
  529. if (vha->vp_idx) {
  530. atomic_set(&vha->vp_state, VP_FAILED);
  531. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  532. }
  533. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  534. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  535. break;
  536. case MBA_PORT_UPDATE: /* Port database update */
  537. /*
  538. * Handle only global and vn-port update events
  539. *
  540. * Relevant inputs:
  541. * mb[1] = N_Port handle of changed port
  542. * OR 0xffff for global event
  543. * mb[2] = New login state
  544. * 7 = Port logged out
  545. * mb[3] = LSB is vp_idx, 0xff = all vps
  546. *
  547. * Skip processing if:
  548. * Event is global, vp_idx is NOT all vps,
  549. * vp_idx does not match
  550. * Event is not global, vp_idx does not match
  551. */
  552. if (IS_QLA2XXX_MIDTYPE(ha) &&
  553. ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
  554. (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
  555. break;
  556. /* Global event -- port logout or port unavailable. */
  557. if (mb[1] == 0xffff && mb[2] == 0x7) {
  558. ql_dbg(ql_dbg_async, vha, 0x5010,
  559. "Port unavailable %04x %04x %04x.\n",
  560. mb[1], mb[2], mb[3]);
  561. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  562. atomic_set(&vha->loop_state, LOOP_DOWN);
  563. atomic_set(&vha->loop_down_timer,
  564. LOOP_DOWN_TIME);
  565. vha->device_flags |= DFLG_NO_CABLE;
  566. qla2x00_mark_all_devices_lost(vha, 1);
  567. }
  568. if (vha->vp_idx) {
  569. atomic_set(&vha->vp_state, VP_FAILED);
  570. fc_vport_set_state(vha->fc_vport,
  571. FC_VPORT_FAILED);
  572. qla2x00_mark_all_devices_lost(vha, 1);
  573. }
  574. vha->flags.management_server_logged_in = 0;
  575. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  576. break;
  577. }
  578. /*
  579. * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
  580. * event etc. earlier indicating loop is down) then process
  581. * it. Otherwise ignore it and Wait for RSCN to come in.
  582. */
  583. atomic_set(&vha->loop_down_timer, 0);
  584. if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
  585. atomic_read(&vha->loop_state) != LOOP_DEAD) {
  586. ql_dbg(ql_dbg_async, vha, 0x5011,
  587. "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
  588. mb[1], mb[2], mb[3]);
  589. break;
  590. }
  591. ql_dbg(ql_dbg_async, vha, 0x5012,
  592. "Port database changed %04x %04x %04x.\n",
  593. mb[1], mb[2], mb[3]);
  594. /*
  595. * Mark all devices as missing so we will login again.
  596. */
  597. atomic_set(&vha->loop_state, LOOP_UP);
  598. qla2x00_mark_all_devices_lost(vha, 1);
  599. vha->flags.rscn_queue_overflow = 1;
  600. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  601. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  602. break;
  603. case MBA_RSCN_UPDATE: /* State Change Registration */
  604. /* Check if the Vport has issued a SCR */
  605. if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
  606. break;
  607. /* Only handle SCNs for our Vport index. */
  608. if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
  609. break;
  610. ql_dbg(ql_dbg_async, vha, 0x5013,
  611. "RSCN database changed -- %04x %04x %04x.\n",
  612. mb[1], mb[2], mb[3]);
  613. rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
  614. host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
  615. | vha->d_id.b.al_pa;
  616. if (rscn_entry == host_pid) {
  617. ql_dbg(ql_dbg_async, vha, 0x5014,
  618. "Ignoring RSCN update to local host "
  619. "port ID (%06x).\n", host_pid);
  620. break;
  621. }
  622. /* Ignore reserved bits from RSCN-payload. */
  623. rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
  624. rscn_queue_index = vha->rscn_in_ptr + 1;
  625. if (rscn_queue_index == MAX_RSCN_COUNT)
  626. rscn_queue_index = 0;
  627. if (rscn_queue_index != vha->rscn_out_ptr) {
  628. vha->rscn_queue[vha->rscn_in_ptr] = rscn_entry;
  629. vha->rscn_in_ptr = rscn_queue_index;
  630. } else {
  631. vha->flags.rscn_queue_overflow = 1;
  632. }
  633. atomic_set(&vha->loop_down_timer, 0);
  634. vha->flags.management_server_logged_in = 0;
  635. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  636. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  637. qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
  638. break;
  639. /* case MBA_RIO_RESPONSE: */
  640. case MBA_ZIO_RESPONSE:
  641. ql_dbg(ql_dbg_async, vha, 0x5015,
  642. "[R|Z]IO update completion.\n");
  643. if (IS_FWI2_CAPABLE(ha))
  644. qla24xx_process_response_queue(vha, rsp);
  645. else
  646. qla2x00_process_response_queue(rsp);
  647. break;
  648. case MBA_DISCARD_RND_FRAME:
  649. ql_dbg(ql_dbg_async, vha, 0x5016,
  650. "Discard RND Frame -- %04x %04x %04x.\n",
  651. mb[1], mb[2], mb[3]);
  652. break;
  653. case MBA_TRACE_NOTIFICATION:
  654. ql_dbg(ql_dbg_async, vha, 0x5017,
  655. "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
  656. break;
  657. case MBA_ISP84XX_ALERT:
  658. ql_dbg(ql_dbg_async, vha, 0x5018,
  659. "ISP84XX Alert Notification -- %04x %04x %04x.\n",
  660. mb[1], mb[2], mb[3]);
  661. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  662. switch (mb[1]) {
  663. case A84_PANIC_RECOVERY:
  664. ql_log(ql_log_info, vha, 0x5019,
  665. "Alert 84XX: panic recovery %04x %04x.\n",
  666. mb[2], mb[3]);
  667. break;
  668. case A84_OP_LOGIN_COMPLETE:
  669. ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
  670. ql_log(ql_log_info, vha, 0x501a,
  671. "Alert 84XX: firmware version %x.\n",
  672. ha->cs84xx->op_fw_version);
  673. break;
  674. case A84_DIAG_LOGIN_COMPLETE:
  675. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  676. ql_log(ql_log_info, vha, 0x501b,
  677. "Alert 84XX: diagnostic firmware version %x.\n",
  678. ha->cs84xx->diag_fw_version);
  679. break;
  680. case A84_GOLD_LOGIN_COMPLETE:
  681. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  682. ha->cs84xx->fw_update = 1;
  683. ql_log(ql_log_info, vha, 0x501c,
  684. "Alert 84XX: gold firmware version %x.\n",
  685. ha->cs84xx->gold_fw_version);
  686. break;
  687. default:
  688. ql_log(ql_log_warn, vha, 0x501d,
  689. "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
  690. mb[1], mb[2], mb[3]);
  691. }
  692. spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
  693. break;
  694. case MBA_DCBX_START:
  695. ql_dbg(ql_dbg_async, vha, 0x501e,
  696. "DCBX Started -- %04x %04x %04x.\n",
  697. mb[1], mb[2], mb[3]);
  698. break;
  699. case MBA_DCBX_PARAM_UPDATE:
  700. ql_dbg(ql_dbg_async, vha, 0x501f,
  701. "DCBX Parameters Updated -- %04x %04x %04x.\n",
  702. mb[1], mb[2], mb[3]);
  703. break;
  704. case MBA_FCF_CONF_ERR:
  705. ql_dbg(ql_dbg_async, vha, 0x5020,
  706. "FCF Configuration Error -- %04x %04x %04x.\n",
  707. mb[1], mb[2], mb[3]);
  708. break;
  709. case MBA_IDC_COMPLETE:
  710. case MBA_IDC_NOTIFY:
  711. case MBA_IDC_TIME_EXT:
  712. qla81xx_idc_event(vha, mb[0], mb[1]);
  713. break;
  714. default:
  715. ql_dbg(ql_dbg_async, vha, 0x5057,
  716. "Unknown AEN:%04x %04x %04x %04x\n",
  717. mb[0], mb[1], mb[2], mb[3]);
  718. }
  719. if (!vha->vp_idx && ha->num_vhosts)
  720. qla2x00_alert_all_vps(rsp, mb);
  721. }
  722. /**
  723. * qla2x00_process_completed_request() - Process a Fast Post response.
  724. * @ha: SCSI driver HA context
  725. * @index: SRB index
  726. */
  727. static void
  728. qla2x00_process_completed_request(struct scsi_qla_host *vha,
  729. struct req_que *req, uint32_t index)
  730. {
  731. srb_t *sp;
  732. struct qla_hw_data *ha = vha->hw;
  733. /* Validate handle. */
  734. if (index >= MAX_OUTSTANDING_COMMANDS) {
  735. ql_log(ql_log_warn, vha, 0x3014,
  736. "Invalid SCSI command index (%x).\n", index);
  737. if (IS_QLA82XX(ha))
  738. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  739. else
  740. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  741. return;
  742. }
  743. sp = req->outstanding_cmds[index];
  744. if (sp) {
  745. /* Free outstanding command slot. */
  746. req->outstanding_cmds[index] = NULL;
  747. /* Save ISP completion status */
  748. sp->done(ha, sp, DID_OK << 16);
  749. } else {
  750. ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
  751. if (IS_QLA82XX(ha))
  752. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  753. else
  754. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  755. }
  756. }
  757. static srb_t *
  758. qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
  759. struct req_que *req, void *iocb)
  760. {
  761. struct qla_hw_data *ha = vha->hw;
  762. sts_entry_t *pkt = iocb;
  763. srb_t *sp = NULL;
  764. uint16_t index;
  765. index = LSW(pkt->handle);
  766. if (index >= MAX_OUTSTANDING_COMMANDS) {
  767. ql_log(ql_log_warn, vha, 0x5031,
  768. "Invalid command index (%x).\n", index);
  769. if (IS_QLA82XX(ha))
  770. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  771. else
  772. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  773. goto done;
  774. }
  775. sp = req->outstanding_cmds[index];
  776. if (!sp) {
  777. ql_log(ql_log_warn, vha, 0x5032,
  778. "Invalid completion handle (%x) -- timed-out.\n", index);
  779. return sp;
  780. }
  781. if (sp->handle != index) {
  782. ql_log(ql_log_warn, vha, 0x5033,
  783. "SRB handle (%x) mismatch %x.\n", sp->handle, index);
  784. return NULL;
  785. }
  786. req->outstanding_cmds[index] = NULL;
  787. done:
  788. return sp;
  789. }
  790. static void
  791. qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  792. struct mbx_entry *mbx)
  793. {
  794. const char func[] = "MBX-IOCB";
  795. const char *type;
  796. fc_port_t *fcport;
  797. srb_t *sp;
  798. struct srb_iocb *lio;
  799. uint16_t *data;
  800. uint16_t status;
  801. sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
  802. if (!sp)
  803. return;
  804. lio = &sp->u.iocb_cmd;
  805. type = sp->name;
  806. fcport = sp->fcport;
  807. data = lio->u.logio.data;
  808. data[0] = MBS_COMMAND_ERROR;
  809. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  810. QLA_LOGIO_LOGIN_RETRIED : 0;
  811. if (mbx->entry_status) {
  812. ql_dbg(ql_dbg_async, vha, 0x5043,
  813. "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
  814. "entry-status=%x status=%x state-flag=%x "
  815. "status-flags=%x.\n", type, sp->handle,
  816. fcport->d_id.b.domain, fcport->d_id.b.area,
  817. fcport->d_id.b.al_pa, mbx->entry_status,
  818. le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
  819. le16_to_cpu(mbx->status_flags));
  820. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
  821. (uint8_t *)mbx, sizeof(*mbx));
  822. goto logio_done;
  823. }
  824. status = le16_to_cpu(mbx->status);
  825. if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
  826. le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
  827. status = 0;
  828. if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
  829. ql_dbg(ql_dbg_async, vha, 0x5045,
  830. "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
  831. type, sp->handle, fcport->d_id.b.domain,
  832. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  833. le16_to_cpu(mbx->mb1));
  834. data[0] = MBS_COMMAND_COMPLETE;
  835. if (sp->type == SRB_LOGIN_CMD) {
  836. fcport->port_type = FCT_TARGET;
  837. if (le16_to_cpu(mbx->mb1) & BIT_0)
  838. fcport->port_type = FCT_INITIATOR;
  839. else if (le16_to_cpu(mbx->mb1) & BIT_1)
  840. fcport->flags |= FCF_FCP2_DEVICE;
  841. }
  842. goto logio_done;
  843. }
  844. data[0] = le16_to_cpu(mbx->mb0);
  845. switch (data[0]) {
  846. case MBS_PORT_ID_USED:
  847. data[1] = le16_to_cpu(mbx->mb1);
  848. break;
  849. case MBS_LOOP_ID_USED:
  850. break;
  851. default:
  852. data[0] = MBS_COMMAND_ERROR;
  853. break;
  854. }
  855. ql_log(ql_log_warn, vha, 0x5046,
  856. "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
  857. "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
  858. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  859. status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
  860. le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
  861. le16_to_cpu(mbx->mb7));
  862. logio_done:
  863. sp->done(vha, sp, 0);
  864. }
  865. static void
  866. qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  867. sts_entry_t *pkt, int iocb_type)
  868. {
  869. const char func[] = "CT_IOCB";
  870. const char *type;
  871. srb_t *sp;
  872. struct fc_bsg_job *bsg_job;
  873. uint16_t comp_status;
  874. int res;
  875. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  876. if (!sp)
  877. return;
  878. bsg_job = sp->u.bsg_job;
  879. type = "ct pass-through";
  880. comp_status = le16_to_cpu(pkt->comp_status);
  881. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  882. * fc payload to the caller
  883. */
  884. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  885. bsg_job->reply_len = sizeof(struct fc_bsg_reply);
  886. if (comp_status != CS_COMPLETE) {
  887. if (comp_status == CS_DATA_UNDERRUN) {
  888. res = DID_OK << 16;
  889. bsg_job->reply->reply_payload_rcv_len =
  890. le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
  891. ql_log(ql_log_warn, vha, 0x5048,
  892. "CT pass-through-%s error "
  893. "comp_status-status=0x%x total_byte = 0x%x.\n",
  894. type, comp_status,
  895. bsg_job->reply->reply_payload_rcv_len);
  896. } else {
  897. ql_log(ql_log_warn, vha, 0x5049,
  898. "CT pass-through-%s error "
  899. "comp_status-status=0x%x.\n", type, comp_status);
  900. res = DID_ERROR << 16;
  901. bsg_job->reply->reply_payload_rcv_len = 0;
  902. }
  903. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
  904. (uint8_t *)pkt, sizeof(*pkt));
  905. } else {
  906. res = DID_OK << 16;
  907. bsg_job->reply->reply_payload_rcv_len =
  908. bsg_job->reply_payload.payload_len;
  909. bsg_job->reply_len = 0;
  910. }
  911. sp->done(vha, sp, res);
  912. }
  913. static void
  914. qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  915. struct sts_entry_24xx *pkt, int iocb_type)
  916. {
  917. const char func[] = "ELS_CT_IOCB";
  918. const char *type;
  919. srb_t *sp;
  920. struct fc_bsg_job *bsg_job;
  921. uint16_t comp_status;
  922. uint32_t fw_status[3];
  923. uint8_t* fw_sts_ptr;
  924. int res;
  925. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  926. if (!sp)
  927. return;
  928. bsg_job = sp->u.bsg_job;
  929. type = NULL;
  930. switch (sp->type) {
  931. case SRB_ELS_CMD_RPT:
  932. case SRB_ELS_CMD_HST:
  933. type = "els";
  934. break;
  935. case SRB_CT_CMD:
  936. type = "ct pass-through";
  937. break;
  938. default:
  939. ql_dbg(ql_dbg_user, vha, 0x503e,
  940. "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
  941. return;
  942. }
  943. comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
  944. fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
  945. fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
  946. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  947. * fc payload to the caller
  948. */
  949. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  950. bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
  951. if (comp_status != CS_COMPLETE) {
  952. if (comp_status == CS_DATA_UNDERRUN) {
  953. res = DID_OK << 16;
  954. bsg_job->reply->reply_payload_rcv_len =
  955. le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
  956. ql_dbg(ql_dbg_user, vha, 0x503f,
  957. "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
  958. "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
  959. type, sp->handle, comp_status, fw_status[1], fw_status[2],
  960. le16_to_cpu(((struct els_sts_entry_24xx *)
  961. pkt)->total_byte_count));
  962. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  963. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  964. }
  965. else {
  966. ql_dbg(ql_dbg_user, vha, 0x5040,
  967. "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
  968. "error subcode 1=0x%x error subcode 2=0x%x.\n",
  969. type, sp->handle, comp_status,
  970. le16_to_cpu(((struct els_sts_entry_24xx *)
  971. pkt)->error_subcode_1),
  972. le16_to_cpu(((struct els_sts_entry_24xx *)
  973. pkt)->error_subcode_2));
  974. res = DID_ERROR << 16;
  975. bsg_job->reply->reply_payload_rcv_len = 0;
  976. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  977. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  978. }
  979. ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
  980. (uint8_t *)pkt, sizeof(*pkt));
  981. }
  982. else {
  983. res = DID_OK << 16;
  984. bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
  985. bsg_job->reply_len = 0;
  986. }
  987. sp->done(vha, sp, res);
  988. }
  989. static void
  990. qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
  991. struct logio_entry_24xx *logio)
  992. {
  993. const char func[] = "LOGIO-IOCB";
  994. const char *type;
  995. fc_port_t *fcport;
  996. srb_t *sp;
  997. struct srb_iocb *lio;
  998. uint16_t *data;
  999. uint32_t iop[2];
  1000. sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
  1001. if (!sp)
  1002. return;
  1003. lio = &sp->u.iocb_cmd;
  1004. type = sp->name;
  1005. fcport = sp->fcport;
  1006. data = lio->u.logio.data;
  1007. data[0] = MBS_COMMAND_ERROR;
  1008. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  1009. QLA_LOGIO_LOGIN_RETRIED : 0;
  1010. if (logio->entry_status) {
  1011. ql_log(ql_log_warn, vha, 0x5034,
  1012. "Async-%s error entry - hdl=%x"
  1013. "portid=%02x%02x%02x entry-status=%x.\n",
  1014. type, sp->handle, fcport->d_id.b.domain,
  1015. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1016. logio->entry_status);
  1017. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
  1018. (uint8_t *)logio, sizeof(*logio));
  1019. goto logio_done;
  1020. }
  1021. if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
  1022. ql_dbg(ql_dbg_async, vha, 0x5036,
  1023. "Async-%s complete - hdl=%x portid=%02x%02x%02x "
  1024. "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain,
  1025. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1026. le32_to_cpu(logio->io_parameter[0]));
  1027. data[0] = MBS_COMMAND_COMPLETE;
  1028. if (sp->type != SRB_LOGIN_CMD)
  1029. goto logio_done;
  1030. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1031. if (iop[0] & BIT_4) {
  1032. fcport->port_type = FCT_TARGET;
  1033. if (iop[0] & BIT_8)
  1034. fcport->flags |= FCF_FCP2_DEVICE;
  1035. } else if (iop[0] & BIT_5)
  1036. fcport->port_type = FCT_INITIATOR;
  1037. if (logio->io_parameter[7] || logio->io_parameter[8])
  1038. fcport->supported_classes |= FC_COS_CLASS2;
  1039. if (logio->io_parameter[9] || logio->io_parameter[10])
  1040. fcport->supported_classes |= FC_COS_CLASS3;
  1041. goto logio_done;
  1042. }
  1043. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1044. iop[1] = le32_to_cpu(logio->io_parameter[1]);
  1045. switch (iop[0]) {
  1046. case LSC_SCODE_PORTID_USED:
  1047. data[0] = MBS_PORT_ID_USED;
  1048. data[1] = LSW(iop[1]);
  1049. break;
  1050. case LSC_SCODE_NPORT_USED:
  1051. data[0] = MBS_LOOP_ID_USED;
  1052. break;
  1053. default:
  1054. data[0] = MBS_COMMAND_ERROR;
  1055. break;
  1056. }
  1057. ql_dbg(ql_dbg_async, vha, 0x5037,
  1058. "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x "
  1059. "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain,
  1060. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1061. le16_to_cpu(logio->comp_status),
  1062. le32_to_cpu(logio->io_parameter[0]),
  1063. le32_to_cpu(logio->io_parameter[1]));
  1064. logio_done:
  1065. sp->done(vha, sp, 0);
  1066. }
  1067. static void
  1068. qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  1069. struct tsk_mgmt_entry *tsk)
  1070. {
  1071. const char func[] = "TMF-IOCB";
  1072. const char *type;
  1073. fc_port_t *fcport;
  1074. srb_t *sp;
  1075. struct srb_iocb *iocb;
  1076. struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
  1077. int error = 1;
  1078. sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
  1079. if (!sp)
  1080. return;
  1081. iocb = &sp->u.iocb_cmd;
  1082. type = sp->name;
  1083. fcport = sp->fcport;
  1084. if (sts->entry_status) {
  1085. ql_log(ql_log_warn, vha, 0x5038,
  1086. "Async-%s error - hdl=%x entry-status(%x).\n",
  1087. type, sp->handle, sts->entry_status);
  1088. } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1089. ql_log(ql_log_warn, vha, 0x5039,
  1090. "Async-%s error - hdl=%x completion status(%x).\n",
  1091. type, sp->handle, sts->comp_status);
  1092. } else if (!(le16_to_cpu(sts->scsi_status) &
  1093. SS_RESPONSE_INFO_LEN_VALID)) {
  1094. ql_log(ql_log_warn, vha, 0x503a,
  1095. "Async-%s error - hdl=%x no response info(%x).\n",
  1096. type, sp->handle, sts->scsi_status);
  1097. } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
  1098. ql_log(ql_log_warn, vha, 0x503b,
  1099. "Async-%s error - hdl=%x not enough response(%d).\n",
  1100. type, sp->handle, sts->rsp_data_len);
  1101. } else if (sts->data[3]) {
  1102. ql_log(ql_log_warn, vha, 0x503c,
  1103. "Async-%s error - hdl=%x response(%x).\n",
  1104. type, sp->handle, sts->data[3]);
  1105. } else {
  1106. error = 0;
  1107. }
  1108. if (error) {
  1109. iocb->u.tmf.data = error;
  1110. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
  1111. (uint8_t *)sts, sizeof(*sts));
  1112. }
  1113. sp->done(vha, sp, 0);
  1114. }
  1115. /**
  1116. * qla2x00_process_response_queue() - Process response queue entries.
  1117. * @ha: SCSI driver HA context
  1118. */
  1119. void
  1120. qla2x00_process_response_queue(struct rsp_que *rsp)
  1121. {
  1122. struct scsi_qla_host *vha;
  1123. struct qla_hw_data *ha = rsp->hw;
  1124. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1125. sts_entry_t *pkt;
  1126. uint16_t handle_cnt;
  1127. uint16_t cnt;
  1128. vha = pci_get_drvdata(ha->pdev);
  1129. if (!vha->flags.online)
  1130. return;
  1131. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1132. pkt = (sts_entry_t *)rsp->ring_ptr;
  1133. rsp->ring_index++;
  1134. if (rsp->ring_index == rsp->length) {
  1135. rsp->ring_index = 0;
  1136. rsp->ring_ptr = rsp->ring;
  1137. } else {
  1138. rsp->ring_ptr++;
  1139. }
  1140. if (pkt->entry_status != 0) {
  1141. qla2x00_error_entry(vha, rsp, pkt);
  1142. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1143. wmb();
  1144. continue;
  1145. }
  1146. switch (pkt->entry_type) {
  1147. case STATUS_TYPE:
  1148. qla2x00_status_entry(vha, rsp, pkt);
  1149. break;
  1150. case STATUS_TYPE_21:
  1151. handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
  1152. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1153. qla2x00_process_completed_request(vha, rsp->req,
  1154. ((sts21_entry_t *)pkt)->handle[cnt]);
  1155. }
  1156. break;
  1157. case STATUS_TYPE_22:
  1158. handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
  1159. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1160. qla2x00_process_completed_request(vha, rsp->req,
  1161. ((sts22_entry_t *)pkt)->handle[cnt]);
  1162. }
  1163. break;
  1164. case STATUS_CONT_TYPE:
  1165. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1166. break;
  1167. case MBX_IOCB_TYPE:
  1168. qla2x00_mbx_iocb_entry(vha, rsp->req,
  1169. (struct mbx_entry *)pkt);
  1170. break;
  1171. case CT_IOCB_TYPE:
  1172. qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1173. break;
  1174. default:
  1175. /* Type Not Supported. */
  1176. ql_log(ql_log_warn, vha, 0x504a,
  1177. "Received unknown response pkt type %x "
  1178. "entry status=%x.\n",
  1179. pkt->entry_type, pkt->entry_status);
  1180. break;
  1181. }
  1182. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1183. wmb();
  1184. }
  1185. /* Adjust ring index */
  1186. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
  1187. }
  1188. static inline void
  1189. qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
  1190. uint32_t sense_len, struct rsp_que *rsp, int res)
  1191. {
  1192. struct scsi_qla_host *vha = sp->fcport->vha;
  1193. struct scsi_cmnd *cp = GET_CMD_SP(sp);
  1194. uint32_t track_sense_len;
  1195. if (sense_len >= SCSI_SENSE_BUFFERSIZE)
  1196. sense_len = SCSI_SENSE_BUFFERSIZE;
  1197. SET_CMD_SENSE_LEN(sp, sense_len);
  1198. SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
  1199. track_sense_len = sense_len;
  1200. if (sense_len > par_sense_len)
  1201. sense_len = par_sense_len;
  1202. memcpy(cp->sense_buffer, sense_data, sense_len);
  1203. SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
  1204. track_sense_len -= sense_len;
  1205. SET_CMD_SENSE_LEN(sp, track_sense_len);
  1206. if (track_sense_len != 0) {
  1207. rsp->status_srb = sp;
  1208. cp->result = res;
  1209. }
  1210. if (sense_len) {
  1211. ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
  1212. "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
  1213. sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
  1214. cp);
  1215. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
  1216. cp->sense_buffer, sense_len);
  1217. }
  1218. }
  1219. struct scsi_dif_tuple {
  1220. __be16 guard; /* Checksum */
  1221. __be16 app_tag; /* APPL identifer */
  1222. __be32 ref_tag; /* Target LBA or indirect LBA */
  1223. };
  1224. /*
  1225. * Checks the guard or meta-data for the type of error
  1226. * detected by the HBA. In case of errors, we set the
  1227. * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
  1228. * to indicate to the kernel that the HBA detected error.
  1229. */
  1230. static inline int
  1231. qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
  1232. {
  1233. struct scsi_qla_host *vha = sp->fcport->vha;
  1234. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1235. uint8_t *ap = &sts24->data[12];
  1236. uint8_t *ep = &sts24->data[20];
  1237. uint32_t e_ref_tag, a_ref_tag;
  1238. uint16_t e_app_tag, a_app_tag;
  1239. uint16_t e_guard, a_guard;
  1240. /*
  1241. * swab32 of the "data" field in the beginning of qla2x00_status_entry()
  1242. * would make guard field appear at offset 2
  1243. */
  1244. a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
  1245. a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
  1246. a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
  1247. e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
  1248. e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
  1249. e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
  1250. ql_dbg(ql_dbg_io, vha, 0x3023,
  1251. "iocb(s) %p Returned STATUS.\n", sts24);
  1252. ql_dbg(ql_dbg_io, vha, 0x3024,
  1253. "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
  1254. " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
  1255. " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
  1256. cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
  1257. a_app_tag, e_app_tag, a_guard, e_guard);
  1258. /*
  1259. * Ignore sector if:
  1260. * For type 3: ref & app tag is all 'f's
  1261. * For type 0,1,2: app tag is all 'f's
  1262. */
  1263. if ((a_app_tag == 0xffff) &&
  1264. ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
  1265. (a_ref_tag == 0xffffffff))) {
  1266. uint32_t blocks_done, resid;
  1267. sector_t lba_s = scsi_get_lba(cmd);
  1268. /* 2TB boundary case covered automatically with this */
  1269. blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
  1270. resid = scsi_bufflen(cmd) - (blocks_done *
  1271. cmd->device->sector_size);
  1272. scsi_set_resid(cmd, resid);
  1273. cmd->result = DID_OK << 16;
  1274. /* Update protection tag */
  1275. if (scsi_prot_sg_count(cmd)) {
  1276. uint32_t i, j = 0, k = 0, num_ent;
  1277. struct scatterlist *sg;
  1278. struct sd_dif_tuple *spt;
  1279. /* Patch the corresponding protection tags */
  1280. scsi_for_each_prot_sg(cmd, sg,
  1281. scsi_prot_sg_count(cmd), i) {
  1282. num_ent = sg_dma_len(sg) / 8;
  1283. if (k + num_ent < blocks_done) {
  1284. k += num_ent;
  1285. continue;
  1286. }
  1287. j = blocks_done - k - 1;
  1288. k = blocks_done;
  1289. break;
  1290. }
  1291. if (k != blocks_done) {
  1292. ql_log(ql_log_warn, vha, 0x302f,
  1293. "unexpected tag values tag:lba=%x:%llx)\n",
  1294. e_ref_tag, (unsigned long long)lba_s);
  1295. return 1;
  1296. }
  1297. spt = page_address(sg_page(sg)) + sg->offset;
  1298. spt += j;
  1299. spt->app_tag = 0xffff;
  1300. if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
  1301. spt->ref_tag = 0xffffffff;
  1302. }
  1303. return 0;
  1304. }
  1305. /* check guard */
  1306. if (e_guard != a_guard) {
  1307. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1308. 0x10, 0x1);
  1309. set_driver_byte(cmd, DRIVER_SENSE);
  1310. set_host_byte(cmd, DID_ABORT);
  1311. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1312. return 1;
  1313. }
  1314. /* check ref tag */
  1315. if (e_ref_tag != a_ref_tag) {
  1316. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1317. 0x10, 0x3);
  1318. set_driver_byte(cmd, DRIVER_SENSE);
  1319. set_host_byte(cmd, DID_ABORT);
  1320. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1321. return 1;
  1322. }
  1323. /* check appl tag */
  1324. if (e_app_tag != a_app_tag) {
  1325. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1326. 0x10, 0x2);
  1327. set_driver_byte(cmd, DRIVER_SENSE);
  1328. set_host_byte(cmd, DID_ABORT);
  1329. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1330. return 1;
  1331. }
  1332. return 1;
  1333. }
  1334. /**
  1335. * qla2x00_status_entry() - Process a Status IOCB entry.
  1336. * @ha: SCSI driver HA context
  1337. * @pkt: Entry pointer
  1338. */
  1339. static void
  1340. qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
  1341. {
  1342. srb_t *sp;
  1343. fc_port_t *fcport;
  1344. struct scsi_cmnd *cp;
  1345. sts_entry_t *sts;
  1346. struct sts_entry_24xx *sts24;
  1347. uint16_t comp_status;
  1348. uint16_t scsi_status;
  1349. uint16_t ox_id;
  1350. uint8_t lscsi_status;
  1351. int32_t resid;
  1352. uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
  1353. fw_resid_len;
  1354. uint8_t *rsp_info, *sense_data;
  1355. struct qla_hw_data *ha = vha->hw;
  1356. uint32_t handle;
  1357. uint16_t que;
  1358. struct req_que *req;
  1359. int logit = 1;
  1360. int res = 0;
  1361. sts = (sts_entry_t *) pkt;
  1362. sts24 = (struct sts_entry_24xx *) pkt;
  1363. if (IS_FWI2_CAPABLE(ha)) {
  1364. comp_status = le16_to_cpu(sts24->comp_status);
  1365. scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
  1366. } else {
  1367. comp_status = le16_to_cpu(sts->comp_status);
  1368. scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
  1369. }
  1370. handle = (uint32_t) LSW(sts->handle);
  1371. que = MSW(sts->handle);
  1372. req = ha->req_q_map[que];
  1373. /* Fast path completion. */
  1374. if (comp_status == CS_COMPLETE && scsi_status == 0) {
  1375. qla2x00_process_completed_request(vha, req, handle);
  1376. return;
  1377. }
  1378. /* Validate handle. */
  1379. if (handle < MAX_OUTSTANDING_COMMANDS) {
  1380. sp = req->outstanding_cmds[handle];
  1381. req->outstanding_cmds[handle] = NULL;
  1382. } else
  1383. sp = NULL;
  1384. if (sp == NULL) {
  1385. ql_dbg(ql_dbg_io, vha, 0x3017,
  1386. "Invalid status handle (0x%x).\n", sts->handle);
  1387. if (IS_QLA82XX(ha))
  1388. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1389. else
  1390. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1391. qla2xxx_wake_dpc(vha);
  1392. return;
  1393. }
  1394. cp = GET_CMD_SP(sp);
  1395. if (cp == NULL) {
  1396. ql_dbg(ql_dbg_io, vha, 0x3018,
  1397. "Command already returned (0x%x/%p).\n",
  1398. sts->handle, sp);
  1399. return;
  1400. }
  1401. lscsi_status = scsi_status & STATUS_MASK;
  1402. fcport = sp->fcport;
  1403. ox_id = 0;
  1404. sense_len = par_sense_len = rsp_info_len = resid_len =
  1405. fw_resid_len = 0;
  1406. if (IS_FWI2_CAPABLE(ha)) {
  1407. if (scsi_status & SS_SENSE_LEN_VALID)
  1408. sense_len = le32_to_cpu(sts24->sense_len);
  1409. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1410. rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
  1411. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
  1412. resid_len = le32_to_cpu(sts24->rsp_residual_count);
  1413. if (comp_status == CS_DATA_UNDERRUN)
  1414. fw_resid_len = le32_to_cpu(sts24->residual_len);
  1415. rsp_info = sts24->data;
  1416. sense_data = sts24->data;
  1417. host_to_fcp_swap(sts24->data, sizeof(sts24->data));
  1418. ox_id = le16_to_cpu(sts24->ox_id);
  1419. par_sense_len = sizeof(sts24->data);
  1420. } else {
  1421. if (scsi_status & SS_SENSE_LEN_VALID)
  1422. sense_len = le16_to_cpu(sts->req_sense_length);
  1423. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1424. rsp_info_len = le16_to_cpu(sts->rsp_info_len);
  1425. resid_len = le32_to_cpu(sts->residual_length);
  1426. rsp_info = sts->rsp_info;
  1427. sense_data = sts->req_sense_data;
  1428. par_sense_len = sizeof(sts->req_sense_data);
  1429. }
  1430. /* Check for any FCP transport errors. */
  1431. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
  1432. /* Sense data lies beyond any FCP RESPONSE data. */
  1433. if (IS_FWI2_CAPABLE(ha)) {
  1434. sense_data += rsp_info_len;
  1435. par_sense_len -= rsp_info_len;
  1436. }
  1437. if (rsp_info_len > 3 && rsp_info[3]) {
  1438. ql_dbg(ql_dbg_io, vha, 0x3019,
  1439. "FCP I/O protocol failure (0x%x/0x%x).\n",
  1440. rsp_info_len, rsp_info[3]);
  1441. res = DID_BUS_BUSY << 16;
  1442. goto out;
  1443. }
  1444. }
  1445. /* Check for overrun. */
  1446. if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
  1447. scsi_status & SS_RESIDUAL_OVER)
  1448. comp_status = CS_DATA_OVERRUN;
  1449. /*
  1450. * Based on Host and scsi status generate status code for Linux
  1451. */
  1452. switch (comp_status) {
  1453. case CS_COMPLETE:
  1454. case CS_QUEUE_FULL:
  1455. if (scsi_status == 0) {
  1456. res = DID_OK << 16;
  1457. break;
  1458. }
  1459. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
  1460. resid = resid_len;
  1461. scsi_set_resid(cp, resid);
  1462. if (!lscsi_status &&
  1463. ((unsigned)(scsi_bufflen(cp) - resid) <
  1464. cp->underflow)) {
  1465. ql_dbg(ql_dbg_io, vha, 0x301a,
  1466. "Mid-layer underflow "
  1467. "detected (0x%x of 0x%x bytes).\n",
  1468. resid, scsi_bufflen(cp));
  1469. res = DID_ERROR << 16;
  1470. break;
  1471. }
  1472. }
  1473. res = DID_OK << 16 | lscsi_status;
  1474. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1475. ql_dbg(ql_dbg_io, vha, 0x301b,
  1476. "QUEUE FULL detected.\n");
  1477. break;
  1478. }
  1479. logit = 0;
  1480. if (lscsi_status != SS_CHECK_CONDITION)
  1481. break;
  1482. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1483. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1484. break;
  1485. qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
  1486. rsp, res);
  1487. break;
  1488. case CS_DATA_UNDERRUN:
  1489. /* Use F/W calculated residual length. */
  1490. resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
  1491. scsi_set_resid(cp, resid);
  1492. if (scsi_status & SS_RESIDUAL_UNDER) {
  1493. if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
  1494. ql_dbg(ql_dbg_io, vha, 0x301d,
  1495. "Dropped frame(s) detected "
  1496. "(0x%x of 0x%x bytes).\n",
  1497. resid, scsi_bufflen(cp));
  1498. res = DID_ERROR << 16 | lscsi_status;
  1499. goto check_scsi_status;
  1500. }
  1501. if (!lscsi_status &&
  1502. ((unsigned)(scsi_bufflen(cp) - resid) <
  1503. cp->underflow)) {
  1504. ql_dbg(ql_dbg_io, vha, 0x301e,
  1505. "Mid-layer underflow "
  1506. "detected (0x%x of 0x%x bytes).\n",
  1507. resid, scsi_bufflen(cp));
  1508. res = DID_ERROR << 16;
  1509. break;
  1510. }
  1511. } else {
  1512. ql_dbg(ql_dbg_io, vha, 0x301f,
  1513. "Dropped frame(s) detected (0x%x "
  1514. "of 0x%x bytes).\n", resid, scsi_bufflen(cp));
  1515. res = DID_ERROR << 16 | lscsi_status;
  1516. goto check_scsi_status;
  1517. }
  1518. res = DID_OK << 16 | lscsi_status;
  1519. logit = 0;
  1520. check_scsi_status:
  1521. /*
  1522. * Check to see if SCSI Status is non zero. If so report SCSI
  1523. * Status.
  1524. */
  1525. if (lscsi_status != 0) {
  1526. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1527. ql_dbg(ql_dbg_io, vha, 0x3020,
  1528. "QUEUE FULL detected.\n");
  1529. logit = 1;
  1530. break;
  1531. }
  1532. if (lscsi_status != SS_CHECK_CONDITION)
  1533. break;
  1534. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1535. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1536. break;
  1537. qla2x00_handle_sense(sp, sense_data, par_sense_len,
  1538. sense_len, rsp, res);
  1539. }
  1540. break;
  1541. case CS_PORT_LOGGED_OUT:
  1542. case CS_PORT_CONFIG_CHG:
  1543. case CS_PORT_BUSY:
  1544. case CS_INCOMPLETE:
  1545. case CS_PORT_UNAVAILABLE:
  1546. case CS_TIMEOUT:
  1547. case CS_RESET:
  1548. /*
  1549. * We are going to have the fc class block the rport
  1550. * while we try to recover so instruct the mid layer
  1551. * to requeue until the class decides how to handle this.
  1552. */
  1553. res = DID_TRANSPORT_DISRUPTED << 16;
  1554. if (comp_status == CS_TIMEOUT) {
  1555. if (IS_FWI2_CAPABLE(ha))
  1556. break;
  1557. else if ((le16_to_cpu(sts->status_flags) &
  1558. SF_LOGOUT_SENT) == 0)
  1559. break;
  1560. }
  1561. ql_dbg(ql_dbg_io, vha, 0x3021,
  1562. "Port down status: port-state=0x%x.\n",
  1563. atomic_read(&fcport->state));
  1564. if (atomic_read(&fcport->state) == FCS_ONLINE)
  1565. qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
  1566. break;
  1567. case CS_ABORTED:
  1568. res = DID_RESET << 16;
  1569. break;
  1570. case CS_DIF_ERROR:
  1571. logit = qla2x00_handle_dif_error(sp, sts24);
  1572. break;
  1573. default:
  1574. res = DID_ERROR << 16;
  1575. break;
  1576. }
  1577. out:
  1578. if (logit)
  1579. ql_dbg(ql_dbg_io, vha, 0x3022,
  1580. "FCP command status: 0x%x-0x%x (0x%x) "
  1581. "nexus=%ld:%d:%d portid=%02x%02x%02x oxid=0x%x "
  1582. "cdb=%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x len=0x%x "
  1583. "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n",
  1584. comp_status, scsi_status, res, vha->host_no,
  1585. cp->device->id, cp->device->lun, fcport->d_id.b.domain,
  1586. fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
  1587. cp->cmnd[0], cp->cmnd[1], cp->cmnd[2], cp->cmnd[3],
  1588. cp->cmnd[4], cp->cmnd[5], cp->cmnd[6], cp->cmnd[7],
  1589. cp->cmnd[8], cp->cmnd[9], scsi_bufflen(cp), rsp_info_len,
  1590. resid_len, fw_resid_len);
  1591. if (rsp->status_srb == NULL)
  1592. sp->done(ha, sp, res);
  1593. }
  1594. /**
  1595. * qla2x00_status_cont_entry() - Process a Status Continuations entry.
  1596. * @ha: SCSI driver HA context
  1597. * @pkt: Entry pointer
  1598. *
  1599. * Extended sense data.
  1600. */
  1601. static void
  1602. qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
  1603. {
  1604. uint8_t sense_sz = 0;
  1605. struct qla_hw_data *ha = rsp->hw;
  1606. struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
  1607. srb_t *sp = rsp->status_srb;
  1608. struct scsi_cmnd *cp;
  1609. uint32_t sense_len;
  1610. uint8_t *sense_ptr;
  1611. if (!sp || !GET_CMD_SENSE_LEN(sp))
  1612. return;
  1613. sense_len = GET_CMD_SENSE_LEN(sp);
  1614. sense_ptr = GET_CMD_SENSE_PTR(sp);
  1615. cp = GET_CMD_SP(sp);
  1616. if (cp == NULL) {
  1617. ql_log(ql_log_warn, vha, 0x3025,
  1618. "cmd is NULL: already returned to OS (sp=%p).\n", sp);
  1619. rsp->status_srb = NULL;
  1620. return;
  1621. }
  1622. if (sense_len > sizeof(pkt->data))
  1623. sense_sz = sizeof(pkt->data);
  1624. else
  1625. sense_sz = sense_len;
  1626. /* Move sense data. */
  1627. if (IS_FWI2_CAPABLE(ha))
  1628. host_to_fcp_swap(pkt->data, sizeof(pkt->data));
  1629. memcpy(sense_ptr, pkt->data, sense_sz);
  1630. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
  1631. sense_ptr, sense_sz);
  1632. sense_len -= sense_sz;
  1633. sense_ptr += sense_sz;
  1634. SET_CMD_SENSE_PTR(sp, sense_ptr);
  1635. SET_CMD_SENSE_LEN(sp, sense_len);
  1636. /* Place command on done queue. */
  1637. if (sense_len == 0) {
  1638. rsp->status_srb = NULL;
  1639. sp->done(ha, sp, cp->result);
  1640. }
  1641. }
  1642. /**
  1643. * qla2x00_error_entry() - Process an error entry.
  1644. * @ha: SCSI driver HA context
  1645. * @pkt: Entry pointer
  1646. */
  1647. static void
  1648. qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
  1649. {
  1650. srb_t *sp;
  1651. struct qla_hw_data *ha = vha->hw;
  1652. const char func[] = "ERROR-IOCB";
  1653. uint16_t que = MSW(pkt->handle);
  1654. struct req_que *req = ha->req_q_map[que];
  1655. int res = DID_ERROR << 16;
  1656. ql_dbg(ql_dbg_async, vha, 0x502a,
  1657. "type of error status in response: 0x%x\n", pkt->entry_status);
  1658. if (pkt->entry_status & RF_BUSY)
  1659. res = DID_BUS_BUSY << 16;
  1660. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  1661. if (sp)
  1662. sp->done(ha, sp, res);
  1663. else {
  1664. ql_log(ql_log_warn, vha, 0x5030,
  1665. "Error entry - invalid handle.\n");
  1666. if (IS_QLA82XX(ha))
  1667. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1668. else
  1669. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1670. qla2xxx_wake_dpc(vha);
  1671. }
  1672. }
  1673. /**
  1674. * qla24xx_mbx_completion() - Process mailbox command completions.
  1675. * @ha: SCSI driver HA context
  1676. * @mb0: Mailbox0 register
  1677. */
  1678. static void
  1679. qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  1680. {
  1681. uint16_t cnt;
  1682. uint32_t mboxes;
  1683. uint16_t __iomem *wptr;
  1684. struct qla_hw_data *ha = vha->hw;
  1685. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1686. /* Read all mbox registers? */
  1687. mboxes = (1 << ha->mbx_count) - 1;
  1688. if (!ha->mcp)
  1689. ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERRROR.\n");
  1690. else
  1691. mboxes = ha->mcp->in_mb;
  1692. /* Load return mailbox registers. */
  1693. ha->flags.mbox_int = 1;
  1694. ha->mailbox_out[0] = mb0;
  1695. mboxes >>= 1;
  1696. wptr = (uint16_t __iomem *)&reg->mailbox1;
  1697. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  1698. if (mboxes & BIT_0)
  1699. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  1700. mboxes >>= 1;
  1701. wptr++;
  1702. }
  1703. }
  1704. /**
  1705. * qla24xx_process_response_queue() - Process response queue entries.
  1706. * @ha: SCSI driver HA context
  1707. */
  1708. void qla24xx_process_response_queue(struct scsi_qla_host *vha,
  1709. struct rsp_que *rsp)
  1710. {
  1711. struct sts_entry_24xx *pkt;
  1712. struct qla_hw_data *ha = vha->hw;
  1713. if (!vha->flags.online)
  1714. return;
  1715. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1716. pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
  1717. rsp->ring_index++;
  1718. if (rsp->ring_index == rsp->length) {
  1719. rsp->ring_index = 0;
  1720. rsp->ring_ptr = rsp->ring;
  1721. } else {
  1722. rsp->ring_ptr++;
  1723. }
  1724. if (pkt->entry_status != 0) {
  1725. qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
  1726. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1727. wmb();
  1728. continue;
  1729. }
  1730. switch (pkt->entry_type) {
  1731. case STATUS_TYPE:
  1732. qla2x00_status_entry(vha, rsp, pkt);
  1733. break;
  1734. case STATUS_CONT_TYPE:
  1735. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1736. break;
  1737. case VP_RPT_ID_IOCB_TYPE:
  1738. qla24xx_report_id_acquisition(vha,
  1739. (struct vp_rpt_id_entry_24xx *)pkt);
  1740. break;
  1741. case LOGINOUT_PORT_IOCB_TYPE:
  1742. qla24xx_logio_entry(vha, rsp->req,
  1743. (struct logio_entry_24xx *)pkt);
  1744. break;
  1745. case TSK_MGMT_IOCB_TYPE:
  1746. qla24xx_tm_iocb_entry(vha, rsp->req,
  1747. (struct tsk_mgmt_entry *)pkt);
  1748. break;
  1749. case CT_IOCB_TYPE:
  1750. qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1751. break;
  1752. case ELS_IOCB_TYPE:
  1753. qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
  1754. break;
  1755. case MARKER_TYPE:
  1756. /* Do nothing in this case, this check is to prevent it
  1757. * from falling into default case
  1758. */
  1759. break;
  1760. default:
  1761. /* Type Not Supported. */
  1762. ql_dbg(ql_dbg_async, vha, 0x5042,
  1763. "Received unknown response pkt type %x "
  1764. "entry status=%x.\n",
  1765. pkt->entry_type, pkt->entry_status);
  1766. break;
  1767. }
  1768. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1769. wmb();
  1770. }
  1771. /* Adjust ring index */
  1772. if (IS_QLA82XX(ha)) {
  1773. struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
  1774. WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
  1775. } else
  1776. WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
  1777. }
  1778. static void
  1779. qla2xxx_check_risc_status(scsi_qla_host_t *vha)
  1780. {
  1781. int rval;
  1782. uint32_t cnt;
  1783. struct qla_hw_data *ha = vha->hw;
  1784. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1785. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
  1786. return;
  1787. rval = QLA_SUCCESS;
  1788. WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
  1789. RD_REG_DWORD(&reg->iobase_addr);
  1790. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1791. for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1792. rval == QLA_SUCCESS; cnt--) {
  1793. if (cnt) {
  1794. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1795. udelay(10);
  1796. } else
  1797. rval = QLA_FUNCTION_TIMEOUT;
  1798. }
  1799. if (rval == QLA_SUCCESS)
  1800. goto next_test;
  1801. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1802. for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1803. rval == QLA_SUCCESS; cnt--) {
  1804. if (cnt) {
  1805. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1806. udelay(10);
  1807. } else
  1808. rval = QLA_FUNCTION_TIMEOUT;
  1809. }
  1810. if (rval != QLA_SUCCESS)
  1811. goto done;
  1812. next_test:
  1813. if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
  1814. ql_log(ql_log_info, vha, 0x504c,
  1815. "Additional code -- 0x55AA.\n");
  1816. done:
  1817. WRT_REG_DWORD(&reg->iobase_window, 0x0000);
  1818. RD_REG_DWORD(&reg->iobase_window);
  1819. }
  1820. /**
  1821. * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
  1822. * @irq:
  1823. * @dev_id: SCSI driver HA context
  1824. *
  1825. * Called by system whenever the host adapter generates an interrupt.
  1826. *
  1827. * Returns handled flag.
  1828. */
  1829. irqreturn_t
  1830. qla24xx_intr_handler(int irq, void *dev_id)
  1831. {
  1832. scsi_qla_host_t *vha;
  1833. struct qla_hw_data *ha;
  1834. struct device_reg_24xx __iomem *reg;
  1835. int status;
  1836. unsigned long iter;
  1837. uint32_t stat;
  1838. uint32_t hccr;
  1839. uint16_t mb[4];
  1840. struct rsp_que *rsp;
  1841. unsigned long flags;
  1842. rsp = (struct rsp_que *) dev_id;
  1843. if (!rsp) {
  1844. printk(KERN_INFO
  1845. "%s(): NULL response queue pointer.\n", __func__);
  1846. return IRQ_NONE;
  1847. }
  1848. ha = rsp->hw;
  1849. reg = &ha->iobase->isp24;
  1850. status = 0;
  1851. if (unlikely(pci_channel_offline(ha->pdev)))
  1852. return IRQ_HANDLED;
  1853. spin_lock_irqsave(&ha->hardware_lock, flags);
  1854. vha = pci_get_drvdata(ha->pdev);
  1855. for (iter = 50; iter--; ) {
  1856. stat = RD_REG_DWORD(&reg->host_status);
  1857. if (stat & HSRX_RISC_PAUSED) {
  1858. if (unlikely(pci_channel_offline(ha->pdev)))
  1859. break;
  1860. hccr = RD_REG_DWORD(&reg->hccr);
  1861. ql_log(ql_log_warn, vha, 0x504b,
  1862. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  1863. hccr);
  1864. qla2xxx_check_risc_status(vha);
  1865. ha->isp_ops->fw_dump(vha, 1);
  1866. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1867. break;
  1868. } else if ((stat & HSRX_RISC_INT) == 0)
  1869. break;
  1870. switch (stat & 0xff) {
  1871. case 0x1:
  1872. case 0x2:
  1873. case 0x10:
  1874. case 0x11:
  1875. qla24xx_mbx_completion(vha, MSW(stat));
  1876. status |= MBX_INTERRUPT;
  1877. break;
  1878. case 0x12:
  1879. mb[0] = MSW(stat);
  1880. mb[1] = RD_REG_WORD(&reg->mailbox1);
  1881. mb[2] = RD_REG_WORD(&reg->mailbox2);
  1882. mb[3] = RD_REG_WORD(&reg->mailbox3);
  1883. qla2x00_async_event(vha, rsp, mb);
  1884. break;
  1885. case 0x13:
  1886. case 0x14:
  1887. qla24xx_process_response_queue(vha, rsp);
  1888. break;
  1889. default:
  1890. ql_dbg(ql_dbg_async, vha, 0x504f,
  1891. "Unrecognized interrupt type (%d).\n", stat * 0xff);
  1892. break;
  1893. }
  1894. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1895. RD_REG_DWORD_RELAXED(&reg->hccr);
  1896. }
  1897. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1898. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  1899. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  1900. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  1901. complete(&ha->mbx_intr_comp);
  1902. }
  1903. return IRQ_HANDLED;
  1904. }
  1905. static irqreturn_t
  1906. qla24xx_msix_rsp_q(int irq, void *dev_id)
  1907. {
  1908. struct qla_hw_data *ha;
  1909. struct rsp_que *rsp;
  1910. struct device_reg_24xx __iomem *reg;
  1911. struct scsi_qla_host *vha;
  1912. unsigned long flags;
  1913. rsp = (struct rsp_que *) dev_id;
  1914. if (!rsp) {
  1915. printk(KERN_INFO
  1916. "%s(): NULL response queue pointer.\n", __func__);
  1917. return IRQ_NONE;
  1918. }
  1919. ha = rsp->hw;
  1920. reg = &ha->iobase->isp24;
  1921. spin_lock_irqsave(&ha->hardware_lock, flags);
  1922. vha = pci_get_drvdata(ha->pdev);
  1923. qla24xx_process_response_queue(vha, rsp);
  1924. if (!ha->flags.disable_msix_handshake) {
  1925. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1926. RD_REG_DWORD_RELAXED(&reg->hccr);
  1927. }
  1928. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1929. return IRQ_HANDLED;
  1930. }
  1931. static irqreturn_t
  1932. qla25xx_msix_rsp_q(int irq, void *dev_id)
  1933. {
  1934. struct qla_hw_data *ha;
  1935. struct rsp_que *rsp;
  1936. struct device_reg_24xx __iomem *reg;
  1937. unsigned long flags;
  1938. rsp = (struct rsp_que *) dev_id;
  1939. if (!rsp) {
  1940. printk(KERN_INFO
  1941. "%s(): NULL response queue pointer.\n", __func__);
  1942. return IRQ_NONE;
  1943. }
  1944. ha = rsp->hw;
  1945. /* Clear the interrupt, if enabled, for this response queue */
  1946. if (!ha->flags.disable_msix_handshake) {
  1947. reg = &ha->iobase->isp24;
  1948. spin_lock_irqsave(&ha->hardware_lock, flags);
  1949. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1950. RD_REG_DWORD_RELAXED(&reg->hccr);
  1951. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1952. }
  1953. queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
  1954. return IRQ_HANDLED;
  1955. }
  1956. static irqreturn_t
  1957. qla24xx_msix_default(int irq, void *dev_id)
  1958. {
  1959. scsi_qla_host_t *vha;
  1960. struct qla_hw_data *ha;
  1961. struct rsp_que *rsp;
  1962. struct device_reg_24xx __iomem *reg;
  1963. int status;
  1964. uint32_t stat;
  1965. uint32_t hccr;
  1966. uint16_t mb[4];
  1967. unsigned long flags;
  1968. rsp = (struct rsp_que *) dev_id;
  1969. if (!rsp) {
  1970. printk(KERN_INFO
  1971. "%s(): NULL response queue pointer.\n", __func__);
  1972. return IRQ_NONE;
  1973. }
  1974. ha = rsp->hw;
  1975. reg = &ha->iobase->isp24;
  1976. status = 0;
  1977. spin_lock_irqsave(&ha->hardware_lock, flags);
  1978. vha = pci_get_drvdata(ha->pdev);
  1979. do {
  1980. stat = RD_REG_DWORD(&reg->host_status);
  1981. if (stat & HSRX_RISC_PAUSED) {
  1982. if (unlikely(pci_channel_offline(ha->pdev)))
  1983. break;
  1984. hccr = RD_REG_DWORD(&reg->hccr);
  1985. ql_log(ql_log_info, vha, 0x5050,
  1986. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  1987. hccr);
  1988. qla2xxx_check_risc_status(vha);
  1989. ha->isp_ops->fw_dump(vha, 1);
  1990. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1991. break;
  1992. } else if ((stat & HSRX_RISC_INT) == 0)
  1993. break;
  1994. switch (stat & 0xff) {
  1995. case 0x1:
  1996. case 0x2:
  1997. case 0x10:
  1998. case 0x11:
  1999. qla24xx_mbx_completion(vha, MSW(stat));
  2000. status |= MBX_INTERRUPT;
  2001. break;
  2002. case 0x12:
  2003. mb[0] = MSW(stat);
  2004. mb[1] = RD_REG_WORD(&reg->mailbox1);
  2005. mb[2] = RD_REG_WORD(&reg->mailbox2);
  2006. mb[3] = RD_REG_WORD(&reg->mailbox3);
  2007. qla2x00_async_event(vha, rsp, mb);
  2008. break;
  2009. case 0x13:
  2010. case 0x14:
  2011. qla24xx_process_response_queue(vha, rsp);
  2012. break;
  2013. default:
  2014. ql_dbg(ql_dbg_async, vha, 0x5051,
  2015. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  2016. break;
  2017. }
  2018. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  2019. } while (0);
  2020. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2021. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  2022. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  2023. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  2024. complete(&ha->mbx_intr_comp);
  2025. }
  2026. return IRQ_HANDLED;
  2027. }
  2028. /* Interrupt handling helpers. */
  2029. struct qla_init_msix_entry {
  2030. const char *name;
  2031. irq_handler_t handler;
  2032. };
  2033. static struct qla_init_msix_entry msix_entries[3] = {
  2034. { "qla2xxx (default)", qla24xx_msix_default },
  2035. { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
  2036. { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
  2037. };
  2038. static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
  2039. { "qla2xxx (default)", qla82xx_msix_default },
  2040. { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
  2041. };
  2042. static void
  2043. qla24xx_disable_msix(struct qla_hw_data *ha)
  2044. {
  2045. int i;
  2046. struct qla_msix_entry *qentry;
  2047. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2048. for (i = 0; i < ha->msix_count; i++) {
  2049. qentry = &ha->msix_entries[i];
  2050. if (qentry->have_irq)
  2051. free_irq(qentry->vector, qentry->rsp);
  2052. }
  2053. pci_disable_msix(ha->pdev);
  2054. kfree(ha->msix_entries);
  2055. ha->msix_entries = NULL;
  2056. ha->flags.msix_enabled = 0;
  2057. ql_dbg(ql_dbg_init, vha, 0x0042,
  2058. "Disabled the MSI.\n");
  2059. }
  2060. static int
  2061. qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
  2062. {
  2063. #define MIN_MSIX_COUNT 2
  2064. int i, ret;
  2065. struct msix_entry *entries;
  2066. struct qla_msix_entry *qentry;
  2067. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2068. entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
  2069. GFP_KERNEL);
  2070. if (!entries) {
  2071. ql_log(ql_log_warn, vha, 0x00bc,
  2072. "Failed to allocate memory for msix_entry.\n");
  2073. return -ENOMEM;
  2074. }
  2075. for (i = 0; i < ha->msix_count; i++)
  2076. entries[i].entry = i;
  2077. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2078. if (ret) {
  2079. if (ret < MIN_MSIX_COUNT)
  2080. goto msix_failed;
  2081. ql_log(ql_log_warn, vha, 0x00c6,
  2082. "MSI-X: Failed to enable support "
  2083. "-- %d/%d\n Retry with %d vectors.\n",
  2084. ha->msix_count, ret, ret);
  2085. ha->msix_count = ret;
  2086. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2087. if (ret) {
  2088. msix_failed:
  2089. ql_log(ql_log_fatal, vha, 0x00c7,
  2090. "MSI-X: Failed to enable support, "
  2091. "giving up -- %d/%d.\n",
  2092. ha->msix_count, ret);
  2093. goto msix_out;
  2094. }
  2095. ha->max_rsp_queues = ha->msix_count - 1;
  2096. }
  2097. ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
  2098. ha->msix_count, GFP_KERNEL);
  2099. if (!ha->msix_entries) {
  2100. ql_log(ql_log_fatal, vha, 0x00c8,
  2101. "Failed to allocate memory for ha->msix_entries.\n");
  2102. ret = -ENOMEM;
  2103. goto msix_out;
  2104. }
  2105. ha->flags.msix_enabled = 1;
  2106. for (i = 0; i < ha->msix_count; i++) {
  2107. qentry = &ha->msix_entries[i];
  2108. qentry->vector = entries[i].vector;
  2109. qentry->entry = entries[i].entry;
  2110. qentry->have_irq = 0;
  2111. qentry->rsp = NULL;
  2112. }
  2113. /* Enable MSI-X vectors for the base queue */
  2114. for (i = 0; i < 2; i++) {
  2115. qentry = &ha->msix_entries[i];
  2116. if (IS_QLA82XX(ha)) {
  2117. ret = request_irq(qentry->vector,
  2118. qla82xx_msix_entries[i].handler,
  2119. 0, qla82xx_msix_entries[i].name, rsp);
  2120. } else {
  2121. ret = request_irq(qentry->vector,
  2122. msix_entries[i].handler,
  2123. 0, msix_entries[i].name, rsp);
  2124. }
  2125. if (ret) {
  2126. ql_log(ql_log_fatal, vha, 0x00cb,
  2127. "MSI-X: unable to register handler -- %x/%d.\n",
  2128. qentry->vector, ret);
  2129. qla24xx_disable_msix(ha);
  2130. ha->mqenable = 0;
  2131. goto msix_out;
  2132. }
  2133. qentry->have_irq = 1;
  2134. qentry->rsp = rsp;
  2135. rsp->msix = qentry;
  2136. }
  2137. /* Enable MSI-X vector for response queue update for queue 0 */
  2138. if (IS_QLA83XX(ha)) {
  2139. if (ha->msixbase && ha->mqiobase &&
  2140. (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
  2141. ha->mqenable = 1;
  2142. } else
  2143. if (ha->mqiobase
  2144. && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
  2145. ha->mqenable = 1;
  2146. ql_dbg(ql_dbg_multiq, vha, 0xc005,
  2147. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2148. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2149. ql_dbg(ql_dbg_init, vha, 0x0055,
  2150. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2151. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2152. msix_out:
  2153. kfree(entries);
  2154. return ret;
  2155. }
  2156. int
  2157. qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
  2158. {
  2159. int ret;
  2160. device_reg_t __iomem *reg = ha->iobase;
  2161. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2162. /* If possible, enable MSI-X. */
  2163. if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
  2164. !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha))
  2165. goto skip_msi;
  2166. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
  2167. (ha->pdev->subsystem_device == 0x7040 ||
  2168. ha->pdev->subsystem_device == 0x7041 ||
  2169. ha->pdev->subsystem_device == 0x1705)) {
  2170. ql_log(ql_log_warn, vha, 0x0034,
  2171. "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
  2172. ha->pdev->subsystem_vendor,
  2173. ha->pdev->subsystem_device);
  2174. goto skip_msi;
  2175. }
  2176. if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
  2177. ql_log(ql_log_warn, vha, 0x0035,
  2178. "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
  2179. ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
  2180. goto skip_msix;
  2181. }
  2182. ret = qla24xx_enable_msix(ha, rsp);
  2183. if (!ret) {
  2184. ql_dbg(ql_dbg_init, vha, 0x0036,
  2185. "MSI-X: Enabled (0x%X, 0x%X).\n",
  2186. ha->chip_revision, ha->fw_attributes);
  2187. goto clear_risc_ints;
  2188. }
  2189. ql_log(ql_log_info, vha, 0x0037,
  2190. "MSI-X Falling back-to MSI mode -%d.\n", ret);
  2191. skip_msix:
  2192. if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
  2193. !IS_QLA8001(ha))
  2194. goto skip_msi;
  2195. ret = pci_enable_msi(ha->pdev);
  2196. if (!ret) {
  2197. ql_dbg(ql_dbg_init, vha, 0x0038,
  2198. "MSI: Enabled.\n");
  2199. ha->flags.msi_enabled = 1;
  2200. } else
  2201. ql_log(ql_log_warn, vha, 0x0039,
  2202. "MSI-X; Falling back-to INTa mode -- %d.\n", ret);
  2203. skip_msi:
  2204. ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
  2205. ha->flags.msi_enabled ? 0 : IRQF_SHARED,
  2206. QLA2XXX_DRIVER_NAME, rsp);
  2207. if (ret) {
  2208. ql_log(ql_log_warn, vha, 0x003a,
  2209. "Failed to reserve interrupt %d already in use.\n",
  2210. ha->pdev->irq);
  2211. goto fail;
  2212. }
  2213. clear_risc_ints:
  2214. /*
  2215. * FIXME: Noted that 8014s were being dropped during NK testing.
  2216. * Timing deltas during MSI-X/INTa transitions?
  2217. */
  2218. if (IS_QLA81XX(ha) || IS_QLA82XX(ha) || IS_QLA83XX(ha))
  2219. goto fail;
  2220. spin_lock_irq(&ha->hardware_lock);
  2221. if (IS_FWI2_CAPABLE(ha)) {
  2222. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_HOST_INT);
  2223. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_RISC_INT);
  2224. } else {
  2225. WRT_REG_WORD(&reg->isp.semaphore, 0);
  2226. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_RISC_INT);
  2227. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_HOST_INT);
  2228. }
  2229. spin_unlock_irq(&ha->hardware_lock);
  2230. fail:
  2231. return ret;
  2232. }
  2233. void
  2234. qla2x00_free_irqs(scsi_qla_host_t *vha)
  2235. {
  2236. struct qla_hw_data *ha = vha->hw;
  2237. struct rsp_que *rsp = ha->rsp_q_map[0];
  2238. if (ha->flags.msix_enabled)
  2239. qla24xx_disable_msix(ha);
  2240. else if (ha->flags.msi_enabled) {
  2241. free_irq(ha->pdev->irq, rsp);
  2242. pci_disable_msi(ha->pdev);
  2243. } else
  2244. free_irq(ha->pdev->irq, rsp);
  2245. }
  2246. int qla25xx_request_irq(struct rsp_que *rsp)
  2247. {
  2248. struct qla_hw_data *ha = rsp->hw;
  2249. struct qla_init_msix_entry *intr = &msix_entries[2];
  2250. struct qla_msix_entry *msix = rsp->msix;
  2251. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2252. int ret;
  2253. ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
  2254. if (ret) {
  2255. ql_log(ql_log_fatal, vha, 0x00e6,
  2256. "MSI-X: Unable to register handler -- %x/%d.\n",
  2257. msix->vector, ret);
  2258. return ret;
  2259. }
  2260. msix->have_irq = 1;
  2261. msix->rsp = rsp;
  2262. return ret;
  2263. }