uartlite.c 16 KB

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  1. /*
  2. * uartlite.c: Serial driver for Xilinx uartlite serial controller
  3. *
  4. * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
  5. * Copyright (C) 2007 Secret Lab Technologies Ltd.
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. */
  11. #include <linux/platform_device.h>
  12. #include <linux/module.h>
  13. #include <linux/console.h>
  14. #include <linux/serial.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/tty.h>
  17. #include <linux/delay.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/init.h>
  20. #include <asm/io.h>
  21. #if defined(CONFIG_OF)
  22. #include <linux/of.h>
  23. #include <linux/of_device.h>
  24. #include <linux/of_platform.h>
  25. /* Match table for of_platform binding */
  26. static struct of_device_id ulite_of_match[] __devinitdata = {
  27. { .compatible = "xlnx,opb-uartlite-1.00.b", },
  28. { .compatible = "xlnx,xps-uartlite-1.00.a", },
  29. {}
  30. };
  31. MODULE_DEVICE_TABLE(of, ulite_of_match);
  32. #endif
  33. #define ULITE_NAME "ttyUL"
  34. #define ULITE_MAJOR 204
  35. #define ULITE_MINOR 187
  36. #define ULITE_NR_UARTS 4
  37. /* ---------------------------------------------------------------------
  38. * Register definitions
  39. *
  40. * For register details see datasheet:
  41. * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
  42. */
  43. #define ULITE_RX 0x00
  44. #define ULITE_TX 0x04
  45. #define ULITE_STATUS 0x08
  46. #define ULITE_CONTROL 0x0c
  47. #define ULITE_REGION 16
  48. #define ULITE_STATUS_RXVALID 0x01
  49. #define ULITE_STATUS_RXFULL 0x02
  50. #define ULITE_STATUS_TXEMPTY 0x04
  51. #define ULITE_STATUS_TXFULL 0x08
  52. #define ULITE_STATUS_IE 0x10
  53. #define ULITE_STATUS_OVERRUN 0x20
  54. #define ULITE_STATUS_FRAME 0x40
  55. #define ULITE_STATUS_PARITY 0x80
  56. #define ULITE_CONTROL_RST_TX 0x01
  57. #define ULITE_CONTROL_RST_RX 0x02
  58. #define ULITE_CONTROL_IE 0x10
  59. static struct uart_port ulite_ports[ULITE_NR_UARTS];
  60. /* ---------------------------------------------------------------------
  61. * Core UART driver operations
  62. */
  63. static int ulite_receive(struct uart_port *port, int stat)
  64. {
  65. struct tty_struct *tty = port->info->tty;
  66. unsigned char ch = 0;
  67. char flag = TTY_NORMAL;
  68. if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  69. | ULITE_STATUS_FRAME)) == 0)
  70. return 0;
  71. /* stats */
  72. if (stat & ULITE_STATUS_RXVALID) {
  73. port->icount.rx++;
  74. ch = readb(port->membase + ULITE_RX);
  75. if (stat & ULITE_STATUS_PARITY)
  76. port->icount.parity++;
  77. }
  78. if (stat & ULITE_STATUS_OVERRUN)
  79. port->icount.overrun++;
  80. if (stat & ULITE_STATUS_FRAME)
  81. port->icount.frame++;
  82. /* drop byte with parity error if IGNPAR specificed */
  83. if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
  84. stat &= ~ULITE_STATUS_RXVALID;
  85. stat &= port->read_status_mask;
  86. if (stat & ULITE_STATUS_PARITY)
  87. flag = TTY_PARITY;
  88. stat &= ~port->ignore_status_mask;
  89. if (stat & ULITE_STATUS_RXVALID)
  90. tty_insert_flip_char(tty, ch, flag);
  91. if (stat & ULITE_STATUS_FRAME)
  92. tty_insert_flip_char(tty, 0, TTY_FRAME);
  93. if (stat & ULITE_STATUS_OVERRUN)
  94. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  95. return 1;
  96. }
  97. static int ulite_transmit(struct uart_port *port, int stat)
  98. {
  99. struct circ_buf *xmit = &port->info->xmit;
  100. if (stat & ULITE_STATUS_TXFULL)
  101. return 0;
  102. if (port->x_char) {
  103. writeb(port->x_char, port->membase + ULITE_TX);
  104. port->x_char = 0;
  105. port->icount.tx++;
  106. return 1;
  107. }
  108. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  109. return 0;
  110. writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX);
  111. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
  112. port->icount.tx++;
  113. /* wake up */
  114. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  115. uart_write_wakeup(port);
  116. return 1;
  117. }
  118. static irqreturn_t ulite_isr(int irq, void *dev_id)
  119. {
  120. struct uart_port *port = dev_id;
  121. int busy;
  122. do {
  123. int stat = readb(port->membase + ULITE_STATUS);
  124. busy = ulite_receive(port, stat);
  125. busy |= ulite_transmit(port, stat);
  126. } while (busy);
  127. tty_flip_buffer_push(port->info->tty);
  128. return IRQ_HANDLED;
  129. }
  130. static unsigned int ulite_tx_empty(struct uart_port *port)
  131. {
  132. unsigned long flags;
  133. unsigned int ret;
  134. spin_lock_irqsave(&port->lock, flags);
  135. ret = readb(port->membase + ULITE_STATUS);
  136. spin_unlock_irqrestore(&port->lock, flags);
  137. return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
  138. }
  139. static unsigned int ulite_get_mctrl(struct uart_port *port)
  140. {
  141. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  142. }
  143. static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
  144. {
  145. /* N/A */
  146. }
  147. static void ulite_stop_tx(struct uart_port *port)
  148. {
  149. /* N/A */
  150. }
  151. static void ulite_start_tx(struct uart_port *port)
  152. {
  153. ulite_transmit(port, readb(port->membase + ULITE_STATUS));
  154. }
  155. static void ulite_stop_rx(struct uart_port *port)
  156. {
  157. /* don't forward any more data (like !CREAD) */
  158. port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
  159. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  160. }
  161. static void ulite_enable_ms(struct uart_port *port)
  162. {
  163. /* N/A */
  164. }
  165. static void ulite_break_ctl(struct uart_port *port, int ctl)
  166. {
  167. /* N/A */
  168. }
  169. static int ulite_startup(struct uart_port *port)
  170. {
  171. int ret;
  172. ret = request_irq(port->irq, ulite_isr,
  173. IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
  174. if (ret)
  175. return ret;
  176. writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
  177. port->membase + ULITE_CONTROL);
  178. writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
  179. return 0;
  180. }
  181. static void ulite_shutdown(struct uart_port *port)
  182. {
  183. writeb(0, port->membase + ULITE_CONTROL);
  184. readb(port->membase + ULITE_CONTROL); /* dummy */
  185. free_irq(port->irq, port);
  186. }
  187. static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
  188. struct ktermios *old)
  189. {
  190. unsigned long flags;
  191. unsigned int baud;
  192. spin_lock_irqsave(&port->lock, flags);
  193. port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
  194. | ULITE_STATUS_TXFULL;
  195. if (termios->c_iflag & INPCK)
  196. port->read_status_mask |=
  197. ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
  198. port->ignore_status_mask = 0;
  199. if (termios->c_iflag & IGNPAR)
  200. port->ignore_status_mask |= ULITE_STATUS_PARITY
  201. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  202. /* ignore all characters if CREAD is not set */
  203. if ((termios->c_cflag & CREAD) == 0)
  204. port->ignore_status_mask |=
  205. ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
  206. | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
  207. /* update timeout */
  208. baud = uart_get_baud_rate(port, termios, old, 0, 460800);
  209. uart_update_timeout(port, termios->c_cflag, baud);
  210. spin_unlock_irqrestore(&port->lock, flags);
  211. }
  212. static const char *ulite_type(struct uart_port *port)
  213. {
  214. return port->type == PORT_UARTLITE ? "uartlite" : NULL;
  215. }
  216. static void ulite_release_port(struct uart_port *port)
  217. {
  218. release_mem_region(port->mapbase, ULITE_REGION);
  219. iounmap(port->membase);
  220. port->membase = NULL;
  221. }
  222. static int ulite_request_port(struct uart_port *port)
  223. {
  224. pr_debug("ulite console: port=%p; port->mapbase=%x\n",
  225. port, port->mapbase);
  226. if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
  227. dev_err(port->dev, "Memory region busy\n");
  228. return -EBUSY;
  229. }
  230. port->membase = ioremap(port->mapbase, ULITE_REGION);
  231. if (!port->membase) {
  232. dev_err(port->dev, "Unable to map registers\n");
  233. release_mem_region(port->mapbase, ULITE_REGION);
  234. return -EBUSY;
  235. }
  236. return 0;
  237. }
  238. static void ulite_config_port(struct uart_port *port, int flags)
  239. {
  240. if (!ulite_request_port(port))
  241. port->type = PORT_UARTLITE;
  242. }
  243. static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
  244. {
  245. /* we don't want the core code to modify any port params */
  246. return -EINVAL;
  247. }
  248. static struct uart_ops ulite_ops = {
  249. .tx_empty = ulite_tx_empty,
  250. .set_mctrl = ulite_set_mctrl,
  251. .get_mctrl = ulite_get_mctrl,
  252. .stop_tx = ulite_stop_tx,
  253. .start_tx = ulite_start_tx,
  254. .stop_rx = ulite_stop_rx,
  255. .enable_ms = ulite_enable_ms,
  256. .break_ctl = ulite_break_ctl,
  257. .startup = ulite_startup,
  258. .shutdown = ulite_shutdown,
  259. .set_termios = ulite_set_termios,
  260. .type = ulite_type,
  261. .release_port = ulite_release_port,
  262. .request_port = ulite_request_port,
  263. .config_port = ulite_config_port,
  264. .verify_port = ulite_verify_port
  265. };
  266. /* ---------------------------------------------------------------------
  267. * Console driver operations
  268. */
  269. #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
  270. static void ulite_console_wait_tx(struct uart_port *port)
  271. {
  272. int i;
  273. u8 val;
  274. /* Spin waiting for TX fifo to have space available */
  275. for (i = 0; i < 100000; i++) {
  276. val = readb(port->membase + ULITE_STATUS);
  277. if ((val & ULITE_STATUS_TXFULL) == 0)
  278. break;
  279. cpu_relax();
  280. }
  281. }
  282. static void ulite_console_putchar(struct uart_port *port, int ch)
  283. {
  284. ulite_console_wait_tx(port);
  285. writeb(ch, port->membase + ULITE_TX);
  286. }
  287. static void ulite_console_write(struct console *co, const char *s,
  288. unsigned int count)
  289. {
  290. struct uart_port *port = &ulite_ports[co->index];
  291. unsigned long flags;
  292. unsigned int ier;
  293. int locked = 1;
  294. if (oops_in_progress) {
  295. locked = spin_trylock_irqsave(&port->lock, flags);
  296. } else
  297. spin_lock_irqsave(&port->lock, flags);
  298. /* save and disable interrupt */
  299. ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
  300. writeb(0, port->membase + ULITE_CONTROL);
  301. uart_console_write(port, s, count, ulite_console_putchar);
  302. ulite_console_wait_tx(port);
  303. /* restore interrupt state */
  304. if (ier)
  305. writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL);
  306. if (locked)
  307. spin_unlock_irqrestore(&port->lock, flags);
  308. }
  309. static int __init ulite_console_setup(struct console *co, char *options)
  310. {
  311. struct uart_port *port;
  312. int baud = 9600;
  313. int bits = 8;
  314. int parity = 'n';
  315. int flow = 'n';
  316. if (co->index < 0 || co->index >= ULITE_NR_UARTS)
  317. return -EINVAL;
  318. port = &ulite_ports[co->index];
  319. /* Has the device been initialized yet? */
  320. if (!port->mapbase) {
  321. pr_debug("console on ttyUL%i not present\n", co->index);
  322. return -ENODEV;
  323. }
  324. /* not initialized yet? */
  325. if (!port->membase) {
  326. if (ulite_request_port(port))
  327. return -ENODEV;
  328. }
  329. if (options)
  330. uart_parse_options(options, &baud, &parity, &bits, &flow);
  331. return uart_set_options(port, co, baud, parity, bits, flow);
  332. }
  333. static struct uart_driver ulite_uart_driver;
  334. static struct console ulite_console = {
  335. .name = ULITE_NAME,
  336. .write = ulite_console_write,
  337. .device = uart_console_device,
  338. .setup = ulite_console_setup,
  339. .flags = CON_PRINTBUFFER,
  340. .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
  341. .data = &ulite_uart_driver,
  342. };
  343. static int __init ulite_console_init(void)
  344. {
  345. register_console(&ulite_console);
  346. return 0;
  347. }
  348. console_initcall(ulite_console_init);
  349. #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
  350. static struct uart_driver ulite_uart_driver = {
  351. .owner = THIS_MODULE,
  352. .driver_name = "uartlite",
  353. .dev_name = ULITE_NAME,
  354. .major = ULITE_MAJOR,
  355. .minor = ULITE_MINOR,
  356. .nr = ULITE_NR_UARTS,
  357. #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
  358. .cons = &ulite_console,
  359. #endif
  360. };
  361. /* ---------------------------------------------------------------------
  362. * Port assignment functions (mapping devices to uart_port structures)
  363. */
  364. /** ulite_assign: register a uartlite device with the driver
  365. *
  366. * @dev: pointer to device structure
  367. * @id: requested id number. Pass -1 for automatic port assignment
  368. * @base: base address of uartlite registers
  369. * @irq: irq number for uartlite
  370. *
  371. * Returns: 0 on success, <0 otherwise
  372. */
  373. static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq)
  374. {
  375. struct uart_port *port;
  376. int rc;
  377. /* if id = -1; then scan for a free id and use that */
  378. if (id < 0) {
  379. for (id = 0; id < ULITE_NR_UARTS; id++)
  380. if (ulite_ports[id].mapbase == 0)
  381. break;
  382. }
  383. if (id < 0 || id >= ULITE_NR_UARTS) {
  384. dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
  385. return -EINVAL;
  386. }
  387. if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
  388. dev_err(dev, "cannot assign to %s%i; it is already in use\n",
  389. ULITE_NAME, id);
  390. return -EBUSY;
  391. }
  392. port = &ulite_ports[id];
  393. spin_lock_init(&port->lock);
  394. port->fifosize = 16;
  395. port->regshift = 2;
  396. port->iotype = UPIO_MEM;
  397. port->iobase = 1; /* mark port in use */
  398. port->mapbase = base;
  399. port->membase = NULL;
  400. port->ops = &ulite_ops;
  401. port->irq = irq;
  402. port->flags = UPF_BOOT_AUTOCONF;
  403. port->dev = dev;
  404. port->type = PORT_UNKNOWN;
  405. port->line = id;
  406. dev_set_drvdata(dev, port);
  407. /* Register the port */
  408. rc = uart_add_one_port(&ulite_uart_driver, port);
  409. if (rc) {
  410. dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
  411. port->mapbase = 0;
  412. dev_set_drvdata(dev, NULL);
  413. return rc;
  414. }
  415. return 0;
  416. }
  417. /** ulite_release: register a uartlite device with the driver
  418. *
  419. * @dev: pointer to device structure
  420. */
  421. static int __devexit ulite_release(struct device *dev)
  422. {
  423. struct uart_port *port = dev_get_drvdata(dev);
  424. int rc = 0;
  425. if (port) {
  426. rc = uart_remove_one_port(&ulite_uart_driver, port);
  427. dev_set_drvdata(dev, NULL);
  428. port->mapbase = 0;
  429. }
  430. return rc;
  431. }
  432. /* ---------------------------------------------------------------------
  433. * Platform bus binding
  434. */
  435. static int __devinit ulite_probe(struct platform_device *pdev)
  436. {
  437. struct resource *res, *res2;
  438. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  439. if (!res)
  440. return -ENODEV;
  441. res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  442. if (!res2)
  443. return -ENODEV;
  444. return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start);
  445. }
  446. static int __devexit ulite_remove(struct platform_device *pdev)
  447. {
  448. return ulite_release(&pdev->dev);
  449. }
  450. static struct platform_driver ulite_platform_driver = {
  451. .probe = ulite_probe,
  452. .remove = __devexit_p(ulite_remove),
  453. .driver = {
  454. .owner = THIS_MODULE,
  455. .name = "uartlite",
  456. },
  457. };
  458. /* ---------------------------------------------------------------------
  459. * OF bus bindings
  460. */
  461. #if defined(CONFIG_OF)
  462. static int __devinit
  463. ulite_of_probe(struct of_device *op, const struct of_device_id *match)
  464. {
  465. struct resource res;
  466. const unsigned int *id;
  467. int irq, rc;
  468. dev_dbg(&op->dev, "%s(%p, %p)\n", __FUNCTION__, op, match);
  469. rc = of_address_to_resource(op->node, 0, &res);
  470. if (rc) {
  471. dev_err(&op->dev, "invalid address\n");
  472. return rc;
  473. }
  474. irq = irq_of_parse_and_map(op->node, 0);
  475. id = of_get_property(op->node, "port-number", NULL);
  476. return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq);
  477. }
  478. static int __devexit ulite_of_remove(struct of_device *op)
  479. {
  480. return ulite_release(&op->dev);
  481. }
  482. static struct of_platform_driver ulite_of_driver = {
  483. .owner = THIS_MODULE,
  484. .name = "uartlite",
  485. .match_table = ulite_of_match,
  486. .probe = ulite_of_probe,
  487. .remove = __devexit_p(ulite_of_remove),
  488. .driver = {
  489. .name = "uartlite",
  490. },
  491. };
  492. /* Registration helpers to keep the number of #ifdefs to a minimum */
  493. static inline int __init ulite_of_register(void)
  494. {
  495. pr_debug("uartlite: calling of_register_platform_driver()\n");
  496. return of_register_platform_driver(&ulite_of_driver);
  497. }
  498. static inline void __exit ulite_of_unregister(void)
  499. {
  500. of_unregister_platform_driver(&ulite_of_driver);
  501. }
  502. #else /* CONFIG_OF */
  503. /* CONFIG_OF not enabled; do nothing helpers */
  504. static inline int __init ulite_of_register(void) { return 0; }
  505. static inline void __exit ulite_of_unregister(void) { }
  506. #endif /* CONFIG_OF */
  507. /* ---------------------------------------------------------------------
  508. * Module setup/teardown
  509. */
  510. int __init ulite_init(void)
  511. {
  512. int ret;
  513. pr_debug("uartlite: calling uart_register_driver()\n");
  514. ret = uart_register_driver(&ulite_uart_driver);
  515. if (ret)
  516. goto err_uart;
  517. ret = ulite_of_register();
  518. if (ret)
  519. goto err_of;
  520. pr_debug("uartlite: calling platform_driver_register()\n");
  521. ret = platform_driver_register(&ulite_platform_driver);
  522. if (ret)
  523. goto err_plat;
  524. return 0;
  525. err_plat:
  526. ulite_of_unregister();
  527. err_of:
  528. uart_unregister_driver(&ulite_uart_driver);
  529. err_uart:
  530. printk(KERN_ERR "registering uartlite driver failed: err=%i", ret);
  531. return ret;
  532. }
  533. void __exit ulite_exit(void)
  534. {
  535. platform_driver_unregister(&ulite_platform_driver);
  536. ulite_of_unregister();
  537. uart_unregister_driver(&ulite_uart_driver);
  538. }
  539. module_init(ulite_init);
  540. module_exit(ulite_exit);
  541. MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
  542. MODULE_DESCRIPTION("Xilinx uartlite serial driver");
  543. MODULE_LICENSE("GPL");