atmel_lcdfb.c 30 KB

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  1. /*
  2. * Driver for AT91/AT32 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <asm/arch/board.h>
  20. #include <asm/arch/cpu.h>
  21. #include <asm/arch/gpio.h>
  22. #include <video/atmel_lcdc.h>
  23. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  24. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  25. /* configurable parameters */
  26. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  27. #define ATMEL_LCDC_DMA_BURST_LEN 8
  28. #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
  29. defined(CONFIG_ARCH_AT91SAM9RL)
  30. #define ATMEL_LCDC_FIFO_SIZE 2048
  31. #else
  32. #define ATMEL_LCDC_FIFO_SIZE 512
  33. #endif
  34. #if defined(CONFIG_ARCH_AT91)
  35. #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
  36. static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  37. struct fb_var_screeninfo *var)
  38. {
  39. }
  40. #elif defined(CONFIG_AVR32)
  41. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  42. | FBINFO_PARTIAL_PAN_OK \
  43. | FBINFO_HWACCEL_XPAN \
  44. | FBINFO_HWACCEL_YPAN)
  45. static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  46. struct fb_var_screeninfo *var)
  47. {
  48. u32 dma2dcfg;
  49. u32 pixeloff;
  50. pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
  51. dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
  52. dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  53. lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  54. /* Update configuration */
  55. lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  56. lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  57. | ATMEL_LCDC_DMAUPDT);
  58. }
  59. #endif
  60. static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  61. | ATMEL_LCDC_POL_POSITIVE
  62. | ATMEL_LCDC_ENA_PWMENABLE;
  63. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  64. /* some bl->props field just changed */
  65. static int atmel_bl_update_status(struct backlight_device *bl)
  66. {
  67. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  68. int power = sinfo->bl_power;
  69. int brightness = bl->props.brightness;
  70. /* REVISIT there may be a meaningful difference between
  71. * fb_blank and power ... there seem to be some cases
  72. * this doesn't handle correctly.
  73. */
  74. if (bl->props.fb_blank != sinfo->bl_power)
  75. power = bl->props.fb_blank;
  76. else if (bl->props.power != sinfo->bl_power)
  77. power = bl->props.power;
  78. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  79. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  80. else if (power != FB_BLANK_UNBLANK)
  81. brightness = 0;
  82. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  83. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  84. brightness ? contrast_ctr : 0);
  85. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  86. return 0;
  87. }
  88. static int atmel_bl_get_brightness(struct backlight_device *bl)
  89. {
  90. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  91. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  92. }
  93. static struct backlight_ops atmel_lcdc_bl_ops = {
  94. .update_status = atmel_bl_update_status,
  95. .get_brightness = atmel_bl_get_brightness,
  96. };
  97. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  98. {
  99. struct backlight_device *bl;
  100. sinfo->bl_power = FB_BLANK_UNBLANK;
  101. if (sinfo->backlight)
  102. return;
  103. bl = backlight_device_register("backlight", &sinfo->pdev->dev,
  104. sinfo, &atmel_lcdc_bl_ops);
  105. if (IS_ERR(sinfo->backlight)) {
  106. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  107. PTR_ERR(bl));
  108. return;
  109. }
  110. sinfo->backlight = bl;
  111. bl->props.power = FB_BLANK_UNBLANK;
  112. bl->props.fb_blank = FB_BLANK_UNBLANK;
  113. bl->props.max_brightness = 0xff;
  114. bl->props.brightness = atmel_bl_get_brightness(bl);
  115. }
  116. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  117. {
  118. if (sinfo->backlight)
  119. backlight_device_unregister(sinfo->backlight);
  120. }
  121. #else
  122. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  123. {
  124. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  125. }
  126. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  127. {
  128. }
  129. #endif
  130. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  131. {
  132. /* have some default contrast/backlight settings */
  133. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  134. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  135. if (sinfo->lcdcon_is_backlight)
  136. init_backlight(sinfo);
  137. }
  138. static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
  139. .type = FB_TYPE_PACKED_PIXELS,
  140. .visual = FB_VISUAL_TRUECOLOR,
  141. .xpanstep = 0,
  142. .ypanstep = 0,
  143. .ywrapstep = 0,
  144. .accel = FB_ACCEL_NONE,
  145. };
  146. static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
  147. {
  148. unsigned long value;
  149. if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
  150. return xres;
  151. value = xres;
  152. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  153. /* STN display */
  154. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  155. value *= 3;
  156. }
  157. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  158. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  159. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  160. value = DIV_ROUND_UP(value, 4);
  161. else
  162. value = DIV_ROUND_UP(value, 8);
  163. }
  164. return value;
  165. }
  166. static void atmel_lcdfb_update_dma(struct fb_info *info,
  167. struct fb_var_screeninfo *var)
  168. {
  169. struct atmel_lcdfb_info *sinfo = info->par;
  170. struct fb_fix_screeninfo *fix = &info->fix;
  171. unsigned long dma_addr;
  172. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  173. + var->xoffset * var->bits_per_pixel / 8);
  174. dma_addr &= ~3UL;
  175. /* Set framebuffer DMA base address and pixel offset */
  176. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  177. atmel_lcdfb_update_dma2d(sinfo, var);
  178. }
  179. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  180. {
  181. struct fb_info *info = sinfo->info;
  182. dma_free_writecombine(info->device, info->fix.smem_len,
  183. info->screen_base, info->fix.smem_start);
  184. }
  185. /**
  186. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  187. * @sinfo: the frame buffer to allocate memory for
  188. */
  189. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  190. {
  191. struct fb_info *info = sinfo->info;
  192. struct fb_var_screeninfo *var = &info->var;
  193. info->fix.smem_len = (var->xres_virtual * var->yres_virtual
  194. * ((var->bits_per_pixel + 7) / 8));
  195. info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
  196. (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
  197. if (!info->screen_base) {
  198. return -ENOMEM;
  199. }
  200. memset(info->screen_base, 0, info->fix.smem_len);
  201. return 0;
  202. }
  203. static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
  204. struct fb_info *info)
  205. {
  206. struct fb_videomode varfbmode;
  207. const struct fb_videomode *fbmode = NULL;
  208. fb_var_to_videomode(&varfbmode, var);
  209. fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
  210. if (fbmode)
  211. fb_videomode_to_var(var, fbmode);
  212. return fbmode;
  213. }
  214. /**
  215. * atmel_lcdfb_check_var - Validates a var passed in.
  216. * @var: frame buffer variable screen structure
  217. * @info: frame buffer structure that represents a single frame buffer
  218. *
  219. * Checks to see if the hardware supports the state requested by
  220. * var passed in. This function does not alter the hardware
  221. * state!!! This means the data stored in struct fb_info and
  222. * struct atmel_lcdfb_info do not change. This includes the var
  223. * inside of struct fb_info. Do NOT change these. This function
  224. * can be called on its own if we intent to only test a mode and
  225. * not actually set it. The stuff in modedb.c is a example of
  226. * this. If the var passed in is slightly off by what the
  227. * hardware can support then we alter the var PASSED in to what
  228. * we can do. If the hardware doesn't support mode change a
  229. * -EINVAL will be returned by the upper layers. You don't need
  230. * to implement this function then. If you hardware doesn't
  231. * support changing the resolution then this function is not
  232. * needed. In this case the driver would just provide a var that
  233. * represents the static state the screen is in.
  234. *
  235. * Returns negative errno on error, or zero on success.
  236. */
  237. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  238. struct fb_info *info)
  239. {
  240. struct device *dev = info->device;
  241. struct atmel_lcdfb_info *sinfo = info->par;
  242. unsigned long clk_value_khz;
  243. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  244. dev_dbg(dev, "%s:\n", __func__);
  245. if (!(var->pixclock && var->bits_per_pixel)) {
  246. /* choose a suitable mode if possible */
  247. if (!atmel_lcdfb_choose_mode(var, info)) {
  248. dev_err(dev, "needed value not specified\n");
  249. return -EINVAL;
  250. }
  251. }
  252. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  253. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  254. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  255. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  256. if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
  257. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  258. return -EINVAL;
  259. }
  260. /* Do not allow to have real resoulution larger than virtual */
  261. if (var->xres > var->xres_virtual)
  262. var->xres_virtual = var->xres;
  263. if (var->yres > var->yres_virtual)
  264. var->yres_virtual = var->yres;
  265. /* Force same alignment for each line */
  266. var->xres = (var->xres + 3) & ~3UL;
  267. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  268. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  269. var->transp.msb_right = 0;
  270. var->transp.offset = var->transp.length = 0;
  271. var->xoffset = var->yoffset = 0;
  272. /* Saturate vertical and horizontal timings at maximum values */
  273. var->vsync_len = min_t(u32, var->vsync_len,
  274. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  275. var->upper_margin = min_t(u32, var->upper_margin,
  276. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  277. var->lower_margin = min_t(u32, var->lower_margin,
  278. ATMEL_LCDC_VFP);
  279. var->right_margin = min_t(u32, var->right_margin,
  280. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  281. var->hsync_len = min_t(u32, var->hsync_len,
  282. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  283. var->left_margin = min_t(u32, var->left_margin,
  284. ATMEL_LCDC_HBP + 1);
  285. /* Some parameters can't be zero */
  286. var->vsync_len = max_t(u32, var->vsync_len, 1);
  287. var->right_margin = max_t(u32, var->right_margin, 1);
  288. var->hsync_len = max_t(u32, var->hsync_len, 1);
  289. var->left_margin = max_t(u32, var->left_margin, 1);
  290. switch (var->bits_per_pixel) {
  291. case 1:
  292. case 2:
  293. case 4:
  294. case 8:
  295. var->red.offset = var->green.offset = var->blue.offset = 0;
  296. var->red.length = var->green.length = var->blue.length
  297. = var->bits_per_pixel;
  298. break;
  299. case 15:
  300. case 16:
  301. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  302. /* RGB:565 mode */
  303. var->red.offset = 11;
  304. var->blue.offset = 0;
  305. var->green.length = 6;
  306. } else {
  307. /* BGR:555 mode */
  308. var->red.offset = 0;
  309. var->blue.offset = 10;
  310. var->green.length = 5;
  311. }
  312. var->green.offset = 5;
  313. var->red.length = var->blue.length = 5;
  314. break;
  315. case 32:
  316. var->transp.offset = 24;
  317. var->transp.length = 8;
  318. /* fall through */
  319. case 24:
  320. if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
  321. /* RGB:888 mode */
  322. var->red.offset = 16;
  323. var->blue.offset = 0;
  324. } else {
  325. /* BGR:888 mode */
  326. var->red.offset = 0;
  327. var->blue.offset = 16;
  328. }
  329. var->green.offset = 8;
  330. var->red.length = var->green.length = var->blue.length = 8;
  331. break;
  332. default:
  333. dev_err(dev, "color depth %d not supported\n",
  334. var->bits_per_pixel);
  335. return -EINVAL;
  336. }
  337. return 0;
  338. }
  339. /*
  340. * LCD reset sequence
  341. */
  342. static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
  343. {
  344. might_sleep();
  345. /* LCD power off */
  346. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  347. /* wait for the LCDC core to become idle */
  348. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  349. msleep(10);
  350. /* DMA disable */
  351. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  352. /* wait for DMA engine to become idle */
  353. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  354. msleep(10);
  355. /* LCD power on */
  356. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  357. (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
  358. /* DMA enable */
  359. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
  360. }
  361. /**
  362. * atmel_lcdfb_set_par - Alters the hardware state.
  363. * @info: frame buffer structure that represents a single frame buffer
  364. *
  365. * Using the fb_var_screeninfo in fb_info we set the resolution
  366. * of the this particular framebuffer. This function alters the
  367. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  368. * not alter var in fb_info since we are using that data. This
  369. * means we depend on the data in var inside fb_info to be
  370. * supported by the hardware. atmel_lcdfb_check_var is always called
  371. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  372. * change the resolution you don't need this function.
  373. *
  374. */
  375. static int atmel_lcdfb_set_par(struct fb_info *info)
  376. {
  377. struct atmel_lcdfb_info *sinfo = info->par;
  378. unsigned long hozval_linesz;
  379. unsigned long value;
  380. unsigned long clk_value_khz;
  381. unsigned long bits_per_line;
  382. might_sleep();
  383. dev_dbg(info->device, "%s:\n", __func__);
  384. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  385. info->var.xres, info->var.yres,
  386. info->var.xres_virtual, info->var.yres_virtual);
  387. /* Turn off the LCD controller and the DMA controller */
  388. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  389. /* Wait for the LCDC core to become idle */
  390. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  391. msleep(10);
  392. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  393. if (info->var.bits_per_pixel == 1)
  394. info->fix.visual = FB_VISUAL_MONO01;
  395. else if (info->var.bits_per_pixel <= 8)
  396. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  397. else
  398. info->fix.visual = FB_VISUAL_TRUECOLOR;
  399. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  400. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  401. /* Re-initialize the DMA engine... */
  402. dev_dbg(info->device, " * update DMA engine\n");
  403. atmel_lcdfb_update_dma(info, &info->var);
  404. /* ...set frame size and burst length = 8 words (?) */
  405. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  406. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  407. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  408. /* Now, the LCDC core... */
  409. /* Set pixel clock */
  410. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  411. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  412. if (value < 2) {
  413. dev_notice(info->device, "Bypassing pixel clock divider\n");
  414. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  415. } else {
  416. value = (value / 2) - 1;
  417. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
  418. value);
  419. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
  420. value << ATMEL_LCDC_CLKVAL_OFFSET);
  421. info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
  422. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  423. PICOS2KHZ(info->var.pixclock));
  424. }
  425. /* Initialize control register 2 */
  426. value = sinfo->default_lcdcon2;
  427. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  428. value |= ATMEL_LCDC_INVLINE_INVERTED;
  429. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  430. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  431. switch (info->var.bits_per_pixel) {
  432. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  433. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  434. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  435. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  436. case 15: /* fall through */
  437. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  438. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  439. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  440. default: BUG(); break;
  441. }
  442. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  443. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  444. /* Vertical timing */
  445. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  446. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  447. value |= info->var.lower_margin;
  448. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  449. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  450. /* Horizontal timing */
  451. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  452. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  453. value |= (info->var.left_margin - 1);
  454. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  455. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  456. /* Horizontal value (aka line size) */
  457. hozval_linesz = compute_hozval(info->var.xres,
  458. lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
  459. /* Display size */
  460. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  461. value |= info->var.yres - 1;
  462. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  463. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  464. /* FIFO Threshold: Use formula from data sheet */
  465. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  466. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  467. /* Toggle LCD_MODE every frame */
  468. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  469. /* Disable all interrupts */
  470. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  471. /* Enable FIFO & DMA errors */
  472. lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
  473. /* ...wait for DMA engine to become idle... */
  474. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  475. msleep(10);
  476. dev_dbg(info->device, " * re-enable DMA engine\n");
  477. /* ...and enable it with updated configuration */
  478. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
  479. dev_dbg(info->device, " * re-enable LCDC core\n");
  480. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  481. (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
  482. dev_dbg(info->device, " * DONE\n");
  483. return 0;
  484. }
  485. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  486. {
  487. chan &= 0xffff;
  488. chan >>= 16 - bf->length;
  489. return chan << bf->offset;
  490. }
  491. /**
  492. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  493. * @regno: Which register in the CLUT we are programming
  494. * @red: The red value which can be up to 16 bits wide
  495. * @green: The green value which can be up to 16 bits wide
  496. * @blue: The blue value which can be up to 16 bits wide.
  497. * @transp: If supported the alpha value which can be up to 16 bits wide.
  498. * @info: frame buffer info structure
  499. *
  500. * Set a single color register. The values supplied have a 16 bit
  501. * magnitude which needs to be scaled in this function for the hardware.
  502. * Things to take into consideration are how many color registers, if
  503. * any, are supported with the current color visual. With truecolor mode
  504. * no color palettes are supported. Here a psuedo palette is created
  505. * which we store the value in pseudo_palette in struct fb_info. For
  506. * pseudocolor mode we have a limited color palette. To deal with this
  507. * we can program what color is displayed for a particular pixel value.
  508. * DirectColor is similar in that we can program each color field. If
  509. * we have a static colormap we don't need to implement this function.
  510. *
  511. * Returns negative errno on error, or zero on success. In an
  512. * ideal world, this would have been the case, but as it turns
  513. * out, the other drivers return 1 on failure, so that's what
  514. * we're going to do.
  515. */
  516. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  517. unsigned int green, unsigned int blue,
  518. unsigned int transp, struct fb_info *info)
  519. {
  520. struct atmel_lcdfb_info *sinfo = info->par;
  521. unsigned int val;
  522. u32 *pal;
  523. int ret = 1;
  524. if (info->var.grayscale)
  525. red = green = blue = (19595 * red + 38470 * green
  526. + 7471 * blue) >> 16;
  527. switch (info->fix.visual) {
  528. case FB_VISUAL_TRUECOLOR:
  529. if (regno < 16) {
  530. pal = info->pseudo_palette;
  531. val = chan_to_field(red, &info->var.red);
  532. val |= chan_to_field(green, &info->var.green);
  533. val |= chan_to_field(blue, &info->var.blue);
  534. pal[regno] = val;
  535. ret = 0;
  536. }
  537. break;
  538. case FB_VISUAL_PSEUDOCOLOR:
  539. if (regno < 256) {
  540. val = ((red >> 11) & 0x001f);
  541. val |= ((green >> 6) & 0x03e0);
  542. val |= ((blue >> 1) & 0x7c00);
  543. /*
  544. * TODO: intensity bit. Maybe something like
  545. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  546. */
  547. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  548. ret = 0;
  549. }
  550. break;
  551. case FB_VISUAL_MONO01:
  552. if (regno < 2) {
  553. val = (regno == 0) ? 0x00 : 0x1F;
  554. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  555. ret = 0;
  556. }
  557. break;
  558. }
  559. return ret;
  560. }
  561. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  562. struct fb_info *info)
  563. {
  564. dev_dbg(info->device, "%s\n", __func__);
  565. atmel_lcdfb_update_dma(info, var);
  566. return 0;
  567. }
  568. static struct fb_ops atmel_lcdfb_ops = {
  569. .owner = THIS_MODULE,
  570. .fb_check_var = atmel_lcdfb_check_var,
  571. .fb_set_par = atmel_lcdfb_set_par,
  572. .fb_setcolreg = atmel_lcdfb_setcolreg,
  573. .fb_pan_display = atmel_lcdfb_pan_display,
  574. .fb_fillrect = cfb_fillrect,
  575. .fb_copyarea = cfb_copyarea,
  576. .fb_imageblit = cfb_imageblit,
  577. };
  578. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  579. {
  580. struct fb_info *info = dev_id;
  581. struct atmel_lcdfb_info *sinfo = info->par;
  582. u32 status;
  583. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  584. if (status & ATMEL_LCDC_UFLWI) {
  585. dev_warn(info->device, "FIFO underflow %#x\n", status);
  586. /* reset DMA and FIFO to avoid screen shifting */
  587. schedule_work(&sinfo->task);
  588. }
  589. lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
  590. return IRQ_HANDLED;
  591. }
  592. /*
  593. * LCD controller task (to reset the LCD)
  594. */
  595. static void atmel_lcdfb_task(struct work_struct *work)
  596. {
  597. struct atmel_lcdfb_info *sinfo =
  598. container_of(work, struct atmel_lcdfb_info, task);
  599. atmel_lcdfb_reset(sinfo);
  600. }
  601. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  602. {
  603. struct fb_info *info = sinfo->info;
  604. int ret = 0;
  605. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  606. dev_info(info->device,
  607. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  608. (unsigned long)info->fix.smem_len / 1024,
  609. (unsigned long)info->fix.smem_start,
  610. info->screen_base);
  611. /* Allocate colormap */
  612. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  613. if (ret < 0)
  614. dev_err(info->device, "Alloc color map failed\n");
  615. return ret;
  616. }
  617. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  618. {
  619. if (sinfo->bus_clk)
  620. clk_enable(sinfo->bus_clk);
  621. clk_enable(sinfo->lcdc_clk);
  622. }
  623. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  624. {
  625. if (sinfo->bus_clk)
  626. clk_disable(sinfo->bus_clk);
  627. clk_disable(sinfo->lcdc_clk);
  628. }
  629. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  630. {
  631. struct device *dev = &pdev->dev;
  632. struct fb_info *info;
  633. struct atmel_lcdfb_info *sinfo;
  634. struct atmel_lcdfb_info *pdata_sinfo;
  635. struct fb_videomode fbmode;
  636. struct resource *regs = NULL;
  637. struct resource *map = NULL;
  638. int ret;
  639. dev_dbg(dev, "%s BEGIN\n", __func__);
  640. ret = -ENOMEM;
  641. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  642. if (!info) {
  643. dev_err(dev, "cannot allocate memory\n");
  644. goto out;
  645. }
  646. sinfo = info->par;
  647. if (dev->platform_data) {
  648. pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
  649. sinfo->default_bpp = pdata_sinfo->default_bpp;
  650. sinfo->default_dmacon = pdata_sinfo->default_dmacon;
  651. sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
  652. sinfo->default_monspecs = pdata_sinfo->default_monspecs;
  653. sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
  654. sinfo->guard_time = pdata_sinfo->guard_time;
  655. sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
  656. sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
  657. } else {
  658. dev_err(dev, "cannot get default configuration\n");
  659. goto free_info;
  660. }
  661. sinfo->info = info;
  662. sinfo->pdev = pdev;
  663. strcpy(info->fix.id, sinfo->pdev->name);
  664. info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
  665. info->pseudo_palette = sinfo->pseudo_palette;
  666. info->fbops = &atmel_lcdfb_ops;
  667. memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
  668. info->fix = atmel_lcdfb_fix;
  669. /* Enable LCDC Clocks */
  670. if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
  671. sinfo->bus_clk = clk_get(dev, "hck1");
  672. if (IS_ERR(sinfo->bus_clk)) {
  673. ret = PTR_ERR(sinfo->bus_clk);
  674. goto free_info;
  675. }
  676. }
  677. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  678. if (IS_ERR(sinfo->lcdc_clk)) {
  679. ret = PTR_ERR(sinfo->lcdc_clk);
  680. goto put_bus_clk;
  681. }
  682. atmel_lcdfb_start_clock(sinfo);
  683. ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
  684. info->monspecs.modedb_len, info->monspecs.modedb,
  685. sinfo->default_bpp);
  686. if (!ret) {
  687. dev_err(dev, "no suitable video mode found\n");
  688. goto stop_clk;
  689. }
  690. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  691. if (!regs) {
  692. dev_err(dev, "resources unusable\n");
  693. ret = -ENXIO;
  694. goto stop_clk;
  695. }
  696. sinfo->irq_base = platform_get_irq(pdev, 0);
  697. if (sinfo->irq_base < 0) {
  698. dev_err(dev, "unable to get irq\n");
  699. ret = sinfo->irq_base;
  700. goto stop_clk;
  701. }
  702. /* Initialize video memory */
  703. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  704. if (map) {
  705. /* use a pre-allocated memory buffer */
  706. info->fix.smem_start = map->start;
  707. info->fix.smem_len = map->end - map->start + 1;
  708. if (!request_mem_region(info->fix.smem_start,
  709. info->fix.smem_len, pdev->name)) {
  710. ret = -EBUSY;
  711. goto stop_clk;
  712. }
  713. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  714. if (!info->screen_base)
  715. goto release_intmem;
  716. /*
  717. * Don't clear the framebuffer -- someone may have set
  718. * up a splash image.
  719. */
  720. } else {
  721. /* alocate memory buffer */
  722. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  723. if (ret < 0) {
  724. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  725. goto stop_clk;
  726. }
  727. }
  728. /* LCDC registers */
  729. info->fix.mmio_start = regs->start;
  730. info->fix.mmio_len = regs->end - regs->start + 1;
  731. if (!request_mem_region(info->fix.mmio_start,
  732. info->fix.mmio_len, pdev->name)) {
  733. ret = -EBUSY;
  734. goto free_fb;
  735. }
  736. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  737. if (!sinfo->mmio) {
  738. dev_err(dev, "cannot map LCDC registers\n");
  739. goto release_mem;
  740. }
  741. /* Initialize PWM for contrast or backlight ("off") */
  742. init_contrast(sinfo);
  743. /* interrupt */
  744. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  745. if (ret) {
  746. dev_err(dev, "request_irq failed: %d\n", ret);
  747. goto unmap_mmio;
  748. }
  749. /* Some operations on the LCDC might sleep and
  750. * require a preemptible task context */
  751. INIT_WORK(&sinfo->task, atmel_lcdfb_task);
  752. ret = atmel_lcdfb_init_fbinfo(sinfo);
  753. if (ret < 0) {
  754. dev_err(dev, "init fbinfo failed: %d\n", ret);
  755. goto unregister_irqs;
  756. }
  757. /*
  758. * This makes sure that our colour bitfield
  759. * descriptors are correctly initialised.
  760. */
  761. atmel_lcdfb_check_var(&info->var, info);
  762. ret = fb_set_var(info, &info->var);
  763. if (ret) {
  764. dev_warn(dev, "unable to set display parameters\n");
  765. goto free_cmap;
  766. }
  767. dev_set_drvdata(dev, info);
  768. /*
  769. * Tell the world that we're ready to go
  770. */
  771. ret = register_framebuffer(info);
  772. if (ret < 0) {
  773. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  774. goto free_cmap;
  775. }
  776. /* add selected videomode to modelist */
  777. fb_var_to_videomode(&fbmode, &info->var);
  778. fb_add_videomode(&fbmode, &info->modelist);
  779. /* Power up the LCDC screen */
  780. if (sinfo->atmel_lcdfb_power_control)
  781. sinfo->atmel_lcdfb_power_control(1);
  782. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
  783. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  784. return 0;
  785. free_cmap:
  786. fb_dealloc_cmap(&info->cmap);
  787. unregister_irqs:
  788. cancel_work_sync(&sinfo->task);
  789. free_irq(sinfo->irq_base, info);
  790. unmap_mmio:
  791. exit_backlight(sinfo);
  792. iounmap(sinfo->mmio);
  793. release_mem:
  794. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  795. free_fb:
  796. if (map)
  797. iounmap(info->screen_base);
  798. else
  799. atmel_lcdfb_free_video_memory(sinfo);
  800. release_intmem:
  801. if (map)
  802. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  803. stop_clk:
  804. atmel_lcdfb_stop_clock(sinfo);
  805. clk_put(sinfo->lcdc_clk);
  806. put_bus_clk:
  807. if (sinfo->bus_clk)
  808. clk_put(sinfo->bus_clk);
  809. free_info:
  810. framebuffer_release(info);
  811. out:
  812. dev_dbg(dev, "%s FAILED\n", __func__);
  813. return ret;
  814. }
  815. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  816. {
  817. struct device *dev = &pdev->dev;
  818. struct fb_info *info = dev_get_drvdata(dev);
  819. struct atmel_lcdfb_info *sinfo = info->par;
  820. if (!sinfo)
  821. return 0;
  822. cancel_work_sync(&sinfo->task);
  823. exit_backlight(sinfo);
  824. if (sinfo->atmel_lcdfb_power_control)
  825. sinfo->atmel_lcdfb_power_control(0);
  826. unregister_framebuffer(info);
  827. atmel_lcdfb_stop_clock(sinfo);
  828. clk_put(sinfo->lcdc_clk);
  829. if (sinfo->bus_clk)
  830. clk_put(sinfo->bus_clk);
  831. fb_dealloc_cmap(&info->cmap);
  832. free_irq(sinfo->irq_base, info);
  833. iounmap(sinfo->mmio);
  834. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  835. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  836. iounmap(info->screen_base);
  837. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  838. } else {
  839. atmel_lcdfb_free_video_memory(sinfo);
  840. }
  841. dev_set_drvdata(dev, NULL);
  842. framebuffer_release(info);
  843. return 0;
  844. }
  845. #ifdef CONFIG_PM
  846. static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
  847. {
  848. struct fb_info *info = platform_get_drvdata(pdev);
  849. struct atmel_lcdfb_info *sinfo = info->par;
  850. sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  851. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
  852. if (sinfo->atmel_lcdfb_power_control)
  853. sinfo->atmel_lcdfb_power_control(0);
  854. atmel_lcdfb_stop_clock(sinfo);
  855. return 0;
  856. }
  857. static int atmel_lcdfb_resume(struct platform_device *pdev)
  858. {
  859. struct fb_info *info = platform_get_drvdata(pdev);
  860. struct atmel_lcdfb_info *sinfo = info->par;
  861. atmel_lcdfb_start_clock(sinfo);
  862. if (sinfo->atmel_lcdfb_power_control)
  863. sinfo->atmel_lcdfb_power_control(1);
  864. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
  865. return 0;
  866. }
  867. #else
  868. #define atmel_lcdfb_suspend NULL
  869. #define atmel_lcdfb_resume NULL
  870. #endif
  871. static struct platform_driver atmel_lcdfb_driver = {
  872. .remove = __exit_p(atmel_lcdfb_remove),
  873. .suspend = atmel_lcdfb_suspend,
  874. .resume = atmel_lcdfb_resume,
  875. .driver = {
  876. .name = "atmel_lcdfb",
  877. .owner = THIS_MODULE,
  878. },
  879. };
  880. static int __init atmel_lcdfb_init(void)
  881. {
  882. return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
  883. }
  884. static void __exit atmel_lcdfb_exit(void)
  885. {
  886. platform_driver_unregister(&atmel_lcdfb_driver);
  887. }
  888. module_init(atmel_lcdfb_init);
  889. module_exit(atmel_lcdfb_exit);
  890. MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
  891. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  892. MODULE_LICENSE("GPL");