qla_init.c 107 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158
  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. #ifdef CONFIG_SPARC
  12. #include <asm/prom.h>
  13. #endif
  14. /*
  15. * QLogic ISP2x00 Hardware Support Function Prototypes.
  16. */
  17. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  18. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  50. {
  51. int rval;
  52. /* Clear adapter flags. */
  53. ha->flags.online = 0;
  54. ha->flags.reset_active = 0;
  55. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  56. atomic_set(&ha->loop_state, LOOP_DOWN);
  57. ha->device_flags = DFLG_NO_CABLE;
  58. ha->dpc_flags = 0;
  59. ha->flags.management_server_logged_in = 0;
  60. ha->marker_needed = 0;
  61. ha->mbx_flags = 0;
  62. ha->isp_abort_cnt = 0;
  63. ha->beacon_blink_led = 0;
  64. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  65. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  66. rval = ha->isp_ops->pci_config(ha);
  67. if (rval) {
  68. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  69. ha->host_no));
  70. return (rval);
  71. }
  72. ha->isp_ops->reset_chip(ha);
  73. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  74. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  75. ha->isp_ops->nvram_config(ha);
  76. if (ha->flags.disable_serdes) {
  77. /* Mask HBA via NVRAM settings? */
  78. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  79. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  80. ha->port_name[0], ha->port_name[1],
  81. ha->port_name[2], ha->port_name[3],
  82. ha->port_name[4], ha->port_name[5],
  83. ha->port_name[6], ha->port_name[7]);
  84. return QLA_FUNCTION_FAILED;
  85. }
  86. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  87. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  88. rval = ha->isp_ops->chip_diag(ha);
  89. if (rval)
  90. return (rval);
  91. rval = qla2x00_setup_chip(ha);
  92. if (rval)
  93. return (rval);
  94. qla2xxx_get_flash_info(ha);
  95. }
  96. if (IS_QLA84XX(ha)) {
  97. ha->cs84xx = qla84xx_get_chip(ha);
  98. if (!ha->cs84xx) {
  99. qla_printk(KERN_ERR, ha,
  100. "Unable to configure ISP84XX.\n");
  101. return QLA_FUNCTION_FAILED;
  102. }
  103. }
  104. rval = qla2x00_init_rings(ha);
  105. return (rval);
  106. }
  107. /**
  108. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  109. * @ha: HA context
  110. *
  111. * Returns 0 on success.
  112. */
  113. int
  114. qla2100_pci_config(scsi_qla_host_t *ha)
  115. {
  116. uint16_t w;
  117. uint32_t d;
  118. unsigned long flags;
  119. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  120. pci_set_master(ha->pdev);
  121. pci_try_set_mwi(ha->pdev);
  122. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  123. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  124. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  125. /* Reset expansion ROM address decode enable */
  126. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  127. d &= ~PCI_ROM_ADDRESS_ENABLE;
  128. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  129. /* Get PCI bus information. */
  130. spin_lock_irqsave(&ha->hardware_lock, flags);
  131. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  132. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  133. return QLA_SUCCESS;
  134. }
  135. /**
  136. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  137. * @ha: HA context
  138. *
  139. * Returns 0 on success.
  140. */
  141. int
  142. qla2300_pci_config(scsi_qla_host_t *ha)
  143. {
  144. uint16_t w;
  145. uint32_t d;
  146. unsigned long flags = 0;
  147. uint32_t cnt;
  148. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  149. pci_set_master(ha->pdev);
  150. pci_try_set_mwi(ha->pdev);
  151. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  152. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  153. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  154. w &= ~PCI_COMMAND_INTX_DISABLE;
  155. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  156. /*
  157. * If this is a 2300 card and not 2312, reset the
  158. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  159. * the 2310 also reports itself as a 2300 so we need to get the
  160. * fb revision level -- a 6 indicates it really is a 2300 and
  161. * not a 2310.
  162. */
  163. if (IS_QLA2300(ha)) {
  164. spin_lock_irqsave(&ha->hardware_lock, flags);
  165. /* Pause RISC. */
  166. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  167. for (cnt = 0; cnt < 30000; cnt++) {
  168. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  169. break;
  170. udelay(10);
  171. }
  172. /* Select FPM registers. */
  173. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  174. RD_REG_WORD(&reg->ctrl_status);
  175. /* Get the fb rev level */
  176. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  177. if (ha->fb_rev == FPM_2300)
  178. pci_clear_mwi(ha->pdev);
  179. /* Deselect FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Release RISC module. */
  183. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  184. for (cnt = 0; cnt < 30000; cnt++) {
  185. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  186. break;
  187. udelay(10);
  188. }
  189. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  190. }
  191. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  192. /* Reset expansion ROM address decode enable */
  193. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  194. d &= ~PCI_ROM_ADDRESS_ENABLE;
  195. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  196. /* Get PCI bus information. */
  197. spin_lock_irqsave(&ha->hardware_lock, flags);
  198. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  199. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  200. return QLA_SUCCESS;
  201. }
  202. /**
  203. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  204. * @ha: HA context
  205. *
  206. * Returns 0 on success.
  207. */
  208. int
  209. qla24xx_pci_config(scsi_qla_host_t *ha)
  210. {
  211. uint16_t w;
  212. uint32_t d;
  213. unsigned long flags = 0;
  214. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  215. pci_set_master(ha->pdev);
  216. pci_try_set_mwi(ha->pdev);
  217. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  218. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  219. w &= ~PCI_COMMAND_INTX_DISABLE;
  220. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  221. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  222. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  223. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  224. pcix_set_mmrbc(ha->pdev, 2048);
  225. /* PCIe -- adjust Maximum Read Request Size (2048). */
  226. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  227. pcie_set_readrq(ha->pdev, 2048);
  228. /* Reset expansion ROM address decode enable */
  229. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  230. d &= ~PCI_ROM_ADDRESS_ENABLE;
  231. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  232. ha->chip_revision = ha->pdev->revision;
  233. /* Get PCI bus information. */
  234. spin_lock_irqsave(&ha->hardware_lock, flags);
  235. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  236. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  237. return QLA_SUCCESS;
  238. }
  239. /**
  240. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  241. * @ha: HA context
  242. *
  243. * Returns 0 on success.
  244. */
  245. int
  246. qla25xx_pci_config(scsi_qla_host_t *ha)
  247. {
  248. uint16_t w;
  249. uint32_t d;
  250. pci_set_master(ha->pdev);
  251. pci_try_set_mwi(ha->pdev);
  252. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  253. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  254. w &= ~PCI_COMMAND_INTX_DISABLE;
  255. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  256. /* PCIe -- adjust Maximum Read Request Size (2048). */
  257. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  258. pcie_set_readrq(ha->pdev, 2048);
  259. /* Reset expansion ROM address decode enable */
  260. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  261. d &= ~PCI_ROM_ADDRESS_ENABLE;
  262. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  263. ha->chip_revision = ha->pdev->revision;
  264. return QLA_SUCCESS;
  265. }
  266. /**
  267. * qla2x00_isp_firmware() - Choose firmware image.
  268. * @ha: HA context
  269. *
  270. * Returns 0 on success.
  271. */
  272. static int
  273. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  274. {
  275. int rval;
  276. uint16_t loop_id, topo, sw_cap;
  277. uint8_t domain, area, al_pa;
  278. /* Assume loading risc code */
  279. rval = QLA_FUNCTION_FAILED;
  280. if (ha->flags.disable_risc_code_load) {
  281. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  282. ha->host_no));
  283. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  284. /* Verify checksum of loaded RISC code. */
  285. rval = qla2x00_verify_checksum(ha, ha->fw_srisc_address);
  286. if (rval == QLA_SUCCESS) {
  287. /* And, verify we are not in ROM code. */
  288. rval = qla2x00_get_adapter_id(ha, &loop_id, &al_pa,
  289. &area, &domain, &topo, &sw_cap);
  290. }
  291. }
  292. if (rval) {
  293. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  294. ha->host_no));
  295. }
  296. return (rval);
  297. }
  298. /**
  299. * qla2x00_reset_chip() - Reset ISP chip.
  300. * @ha: HA context
  301. *
  302. * Returns 0 on success.
  303. */
  304. void
  305. qla2x00_reset_chip(scsi_qla_host_t *ha)
  306. {
  307. unsigned long flags = 0;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *ha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  425. uint32_t cnt, d2;
  426. uint16_t wd;
  427. spin_lock_irqsave(&ha->hardware_lock, flags);
  428. /* Reset RISC. */
  429. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. for (cnt = 0; cnt < 30000; cnt++) {
  431. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  432. break;
  433. udelay(10);
  434. }
  435. WRT_REG_DWORD(&reg->ctrl_status,
  436. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  437. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  438. udelay(100);
  439. /* Wait for firmware to complete NVRAM accesses. */
  440. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  441. for (cnt = 10000 ; cnt && d2; cnt--) {
  442. udelay(5);
  443. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  444. barrier();
  445. }
  446. if (cnt == 0)
  447. hw_evt = 1;
  448. /* Wait for soft-reset to complete. */
  449. d2 = RD_REG_DWORD(&reg->ctrl_status);
  450. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  451. udelay(5);
  452. d2 = RD_REG_DWORD(&reg->ctrl_status);
  453. barrier();
  454. }
  455. if (cnt == 0 || hw_evt)
  456. qla2xxx_hw_event_log(ha, HW_EVENT_RESET_ERR,
  457. RD_REG_WORD(&reg->mailbox1), RD_REG_WORD(&reg->mailbox2),
  458. RD_REG_WORD(&reg->mailbox3));
  459. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  460. RD_REG_DWORD(&reg->hccr);
  461. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  462. RD_REG_DWORD(&reg->hccr);
  463. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  464. RD_REG_DWORD(&reg->hccr);
  465. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  466. for (cnt = 6000000 ; cnt && d2; cnt--) {
  467. udelay(5);
  468. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  469. barrier();
  470. }
  471. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  472. }
  473. /**
  474. * qla24xx_reset_chip() - Reset ISP24xx chip.
  475. * @ha: HA context
  476. *
  477. * Returns 0 on success.
  478. */
  479. void
  480. qla24xx_reset_chip(scsi_qla_host_t *ha)
  481. {
  482. ha->isp_ops->disable_intrs(ha);
  483. /* Perform RISC reset. */
  484. qla24xx_reset_risc(ha);
  485. }
  486. /**
  487. * qla2x00_chip_diag() - Test chip for proper operation.
  488. * @ha: HA context
  489. *
  490. * Returns 0 on success.
  491. */
  492. int
  493. qla2x00_chip_diag(scsi_qla_host_t *ha)
  494. {
  495. int rval;
  496. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  497. unsigned long flags = 0;
  498. uint16_t data;
  499. uint32_t cnt;
  500. uint16_t mb[5];
  501. /* Assume a failed state */
  502. rval = QLA_FUNCTION_FAILED;
  503. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  504. ha->host_no, (u_long)&reg->flash_address));
  505. spin_lock_irqsave(&ha->hardware_lock, flags);
  506. /* Reset ISP chip. */
  507. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  508. /*
  509. * We need to have a delay here since the card will not respond while
  510. * in reset causing an MCA on some architectures.
  511. */
  512. udelay(20);
  513. data = qla2x00_debounce_register(&reg->ctrl_status);
  514. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  515. udelay(5);
  516. data = RD_REG_WORD(&reg->ctrl_status);
  517. barrier();
  518. }
  519. if (!cnt)
  520. goto chip_diag_failed;
  521. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  522. ha->host_no));
  523. /* Reset RISC processor. */
  524. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  525. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  526. /* Workaround for QLA2312 PCI parity error */
  527. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  528. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  529. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  530. udelay(5);
  531. data = RD_MAILBOX_REG(ha, reg, 0);
  532. barrier();
  533. }
  534. } else
  535. udelay(10);
  536. if (!cnt)
  537. goto chip_diag_failed;
  538. /* Check product ID of chip */
  539. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  540. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  541. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  542. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  543. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  544. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  545. mb[3] != PROD_ID_3) {
  546. qla_printk(KERN_WARNING, ha,
  547. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  548. goto chip_diag_failed;
  549. }
  550. ha->product_id[0] = mb[1];
  551. ha->product_id[1] = mb[2];
  552. ha->product_id[2] = mb[3];
  553. ha->product_id[3] = mb[4];
  554. /* Adjust fw RISC transfer size */
  555. if (ha->request_q_length > 1024)
  556. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  557. else
  558. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  559. ha->request_q_length;
  560. if (IS_QLA2200(ha) &&
  561. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  562. /* Limit firmware transfer size with a 2200A */
  563. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  564. ha->host_no));
  565. ha->device_type |= DT_ISP2200A;
  566. ha->fw_transfer_size = 128;
  567. }
  568. /* Wrap Incoming Mailboxes Test. */
  569. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  570. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  571. rval = qla2x00_mbx_reg_test(ha);
  572. if (rval) {
  573. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  574. ha->host_no));
  575. qla_printk(KERN_WARNING, ha,
  576. "Failed mailbox send register test\n");
  577. }
  578. else {
  579. /* Flag a successful rval */
  580. rval = QLA_SUCCESS;
  581. }
  582. spin_lock_irqsave(&ha->hardware_lock, flags);
  583. chip_diag_failed:
  584. if (rval)
  585. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  586. "****\n", ha->host_no));
  587. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  588. return (rval);
  589. }
  590. /**
  591. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  592. * @ha: HA context
  593. *
  594. * Returns 0 on success.
  595. */
  596. int
  597. qla24xx_chip_diag(scsi_qla_host_t *ha)
  598. {
  599. int rval;
  600. /* Perform RISC reset. */
  601. qla24xx_reset_risc(ha);
  602. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * ha->request_q_length;
  603. rval = qla2x00_mbx_reg_test(ha);
  604. if (rval) {
  605. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  606. ha->host_no));
  607. qla_printk(KERN_WARNING, ha,
  608. "Failed mailbox send register test\n");
  609. } else {
  610. /* Flag a successful rval */
  611. rval = QLA_SUCCESS;
  612. }
  613. return rval;
  614. }
  615. void
  616. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  617. {
  618. int rval;
  619. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  620. eft_size, fce_size;
  621. dma_addr_t tc_dma;
  622. void *tc;
  623. if (ha->fw_dump) {
  624. qla_printk(KERN_WARNING, ha,
  625. "Firmware dump previously allocated.\n");
  626. return;
  627. }
  628. ha->fw_dumped = 0;
  629. fixed_size = mem_size = eft_size = fce_size = 0;
  630. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  631. fixed_size = sizeof(struct qla2100_fw_dump);
  632. } else if (IS_QLA23XX(ha)) {
  633. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  634. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  635. sizeof(uint16_t);
  636. } else if (IS_FWI2_CAPABLE(ha)) {
  637. fixed_size = IS_QLA25XX(ha) ?
  638. offsetof(struct qla25xx_fw_dump, ext_mem):
  639. offsetof(struct qla24xx_fw_dump, ext_mem);
  640. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  641. sizeof(uint32_t);
  642. /* Allocate memory for Fibre Channel Event Buffer. */
  643. if (!IS_QLA25XX(ha))
  644. goto try_eft;
  645. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  646. GFP_KERNEL);
  647. if (!tc) {
  648. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  649. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  650. goto try_eft;
  651. }
  652. memset(tc, 0, FCE_SIZE);
  653. rval = qla2x00_enable_fce_trace(ha, tc_dma, FCE_NUM_BUFFERS,
  654. ha->fce_mb, &ha->fce_bufs);
  655. if (rval) {
  656. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  657. "FCE (%d).\n", rval);
  658. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  659. tc_dma);
  660. ha->flags.fce_enabled = 0;
  661. goto try_eft;
  662. }
  663. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  664. FCE_SIZE / 1024);
  665. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  666. ha->flags.fce_enabled = 1;
  667. ha->fce_dma = tc_dma;
  668. ha->fce = tc;
  669. try_eft:
  670. /* Allocate memory for Extended Trace Buffer. */
  671. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  672. GFP_KERNEL);
  673. if (!tc) {
  674. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  675. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  676. goto cont_alloc;
  677. }
  678. memset(tc, 0, EFT_SIZE);
  679. rval = qla2x00_enable_eft_trace(ha, tc_dma, EFT_NUM_BUFFERS);
  680. if (rval) {
  681. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  682. "EFT (%d).\n", rval);
  683. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  684. tc_dma);
  685. goto cont_alloc;
  686. }
  687. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  688. EFT_SIZE / 1024);
  689. eft_size = EFT_SIZE;
  690. ha->eft_dma = tc_dma;
  691. ha->eft = tc;
  692. }
  693. cont_alloc:
  694. req_q_size = ha->request_q_length * sizeof(request_t);
  695. rsp_q_size = ha->response_q_length * sizeof(response_t);
  696. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  697. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  698. eft_size + fce_size;
  699. ha->fw_dump = vmalloc(dump_size);
  700. if (!ha->fw_dump) {
  701. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  702. "firmware dump!!!\n", dump_size / 1024);
  703. if (ha->eft) {
  704. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  705. ha->eft_dma);
  706. ha->eft = NULL;
  707. ha->eft_dma = 0;
  708. }
  709. return;
  710. }
  711. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  712. dump_size / 1024);
  713. ha->fw_dump_len = dump_size;
  714. ha->fw_dump->signature[0] = 'Q';
  715. ha->fw_dump->signature[1] = 'L';
  716. ha->fw_dump->signature[2] = 'G';
  717. ha->fw_dump->signature[3] = 'C';
  718. ha->fw_dump->version = __constant_htonl(1);
  719. ha->fw_dump->fixed_size = htonl(fixed_size);
  720. ha->fw_dump->mem_size = htonl(mem_size);
  721. ha->fw_dump->req_q_size = htonl(req_q_size);
  722. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  723. ha->fw_dump->eft_size = htonl(eft_size);
  724. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  725. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  726. ha->fw_dump->header_size =
  727. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  728. }
  729. /**
  730. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  731. * @ha: HA context
  732. *
  733. * Returns 0 on success.
  734. */
  735. static void
  736. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  737. {
  738. int rval;
  739. uint16_t fw_iocb_cnt = 0;
  740. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  741. dma_addr_t request_dma;
  742. request_t *request_ring;
  743. /* Valid only on recent ISPs. */
  744. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  745. return;
  746. /* Retrieve IOCB counts available to the firmware. */
  747. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt,
  748. &ha->max_npiv_vports);
  749. if (rval)
  750. return;
  751. /* No point in continuing if current settings are sufficient. */
  752. if (fw_iocb_cnt < 1024)
  753. return;
  754. if (ha->request_q_length >= request_q_length)
  755. return;
  756. /* Attempt to claim larger area for request queue. */
  757. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  758. (request_q_length + 1) * sizeof(request_t), &request_dma,
  759. GFP_KERNEL);
  760. if (request_ring == NULL)
  761. return;
  762. /* Resize successful, report extensions. */
  763. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  764. (ha->fw_memory_size + 1) / 1024);
  765. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  766. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  767. /* Clear old allocations. */
  768. dma_free_coherent(&ha->pdev->dev,
  769. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  770. ha->request_dma);
  771. /* Begin using larger queue. */
  772. ha->request_q_length = request_q_length;
  773. ha->request_ring = request_ring;
  774. ha->request_dma = request_dma;
  775. }
  776. /**
  777. * qla2x00_setup_chip() - Load and start RISC firmware.
  778. * @ha: HA context
  779. *
  780. * Returns 0 on success.
  781. */
  782. static int
  783. qla2x00_setup_chip(scsi_qla_host_t *ha)
  784. {
  785. int rval;
  786. uint32_t srisc_address = 0;
  787. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  788. unsigned long flags;
  789. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  790. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  791. spin_lock_irqsave(&ha->hardware_lock, flags);
  792. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  793. RD_REG_WORD(&reg->hccr);
  794. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  795. }
  796. /* Load firmware sequences */
  797. rval = ha->isp_ops->load_risc(ha, &srisc_address);
  798. if (rval == QLA_SUCCESS) {
  799. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  800. "code.\n", ha->host_no));
  801. rval = qla2x00_verify_checksum(ha, srisc_address);
  802. if (rval == QLA_SUCCESS) {
  803. /* Start firmware execution. */
  804. DEBUG(printk("scsi(%ld): Checksum OK, start "
  805. "firmware.\n", ha->host_no));
  806. rval = qla2x00_execute_fw(ha, srisc_address);
  807. /* Retrieve firmware information. */
  808. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  809. qla2x00_get_fw_version(ha,
  810. &ha->fw_major_version,
  811. &ha->fw_minor_version,
  812. &ha->fw_subminor_version,
  813. &ha->fw_attributes, &ha->fw_memory_size);
  814. qla2x00_resize_request_q(ha);
  815. ha->flags.npiv_supported = 0;
  816. if ((IS_QLA24XX(ha) || IS_QLA25XX(ha)) &&
  817. (ha->fw_attributes & BIT_2)) {
  818. ha->flags.npiv_supported = 1;
  819. if ((!ha->max_npiv_vports) ||
  820. ((ha->max_npiv_vports + 1) %
  821. MIN_MULTI_ID_FABRIC))
  822. ha->max_npiv_vports =
  823. MIN_MULTI_ID_FABRIC - 1;
  824. }
  825. if (ql2xallocfwdump)
  826. qla2x00_alloc_fw_dump(ha);
  827. }
  828. } else {
  829. DEBUG2(printk(KERN_INFO
  830. "scsi(%ld): ISP Firmware failed checksum.\n",
  831. ha->host_no));
  832. }
  833. }
  834. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  835. /* Enable proper parity. */
  836. spin_lock_irqsave(&ha->hardware_lock, flags);
  837. if (IS_QLA2300(ha))
  838. /* SRAM parity */
  839. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  840. else
  841. /* SRAM, Instruction RAM and GP RAM parity */
  842. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  843. RD_REG_WORD(&reg->hccr);
  844. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  845. }
  846. if (rval) {
  847. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  848. ha->host_no));
  849. }
  850. return (rval);
  851. }
  852. /**
  853. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  854. * @ha: HA context
  855. *
  856. * Beginning of request ring has initialization control block already built
  857. * by nvram config routine.
  858. *
  859. * Returns 0 on success.
  860. */
  861. static void
  862. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  863. {
  864. uint16_t cnt;
  865. response_t *pkt;
  866. pkt = ha->response_ring_ptr;
  867. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  868. pkt->signature = RESPONSE_PROCESSED;
  869. pkt++;
  870. }
  871. }
  872. /**
  873. * qla2x00_update_fw_options() - Read and process firmware options.
  874. * @ha: HA context
  875. *
  876. * Returns 0 on success.
  877. */
  878. void
  879. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  880. {
  881. uint16_t swing, emphasis, tx_sens, rx_sens;
  882. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  883. qla2x00_get_fw_options(ha, ha->fw_options);
  884. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  885. return;
  886. /* Serial Link options. */
  887. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  888. ha->host_no));
  889. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  890. sizeof(ha->fw_seriallink_options)));
  891. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  892. if (ha->fw_seriallink_options[3] & BIT_2) {
  893. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  894. /* 1G settings */
  895. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  896. emphasis = (ha->fw_seriallink_options[2] &
  897. (BIT_4 | BIT_3)) >> 3;
  898. tx_sens = ha->fw_seriallink_options[0] &
  899. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  900. rx_sens = (ha->fw_seriallink_options[0] &
  901. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  902. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  903. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  904. if (rx_sens == 0x0)
  905. rx_sens = 0x3;
  906. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  907. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  908. ha->fw_options[10] |= BIT_5 |
  909. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  910. (tx_sens & (BIT_1 | BIT_0));
  911. /* 2G settings */
  912. swing = (ha->fw_seriallink_options[2] &
  913. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  914. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  915. tx_sens = ha->fw_seriallink_options[1] &
  916. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  917. rx_sens = (ha->fw_seriallink_options[1] &
  918. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  919. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  920. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  921. if (rx_sens == 0x0)
  922. rx_sens = 0x3;
  923. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  924. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  925. ha->fw_options[11] |= BIT_5 |
  926. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  927. (tx_sens & (BIT_1 | BIT_0));
  928. }
  929. /* FCP2 options. */
  930. /* Return command IOCBs without waiting for an ABTS to complete. */
  931. ha->fw_options[3] |= BIT_13;
  932. /* LED scheme. */
  933. if (ha->flags.enable_led_scheme)
  934. ha->fw_options[2] |= BIT_12;
  935. /* Detect ISP6312. */
  936. if (IS_QLA6312(ha))
  937. ha->fw_options[2] |= BIT_13;
  938. /* Update firmware options. */
  939. qla2x00_set_fw_options(ha, ha->fw_options);
  940. }
  941. void
  942. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  943. {
  944. int rval;
  945. /* Update Serial Link options. */
  946. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  947. return;
  948. rval = qla2x00_set_serdes_params(ha,
  949. le16_to_cpu(ha->fw_seriallink_options24[1]),
  950. le16_to_cpu(ha->fw_seriallink_options24[2]),
  951. le16_to_cpu(ha->fw_seriallink_options24[3]));
  952. if (rval != QLA_SUCCESS) {
  953. qla_printk(KERN_WARNING, ha,
  954. "Unable to update Serial Link options (%x).\n", rval);
  955. }
  956. }
  957. void
  958. qla2x00_config_rings(struct scsi_qla_host *ha)
  959. {
  960. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  961. /* Setup ring parameters in initialization control block. */
  962. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  963. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  964. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  965. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  966. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  967. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  968. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  969. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  970. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  971. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  972. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  973. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  974. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  975. }
  976. void
  977. qla24xx_config_rings(struct scsi_qla_host *ha)
  978. {
  979. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  980. struct init_cb_24xx *icb;
  981. /* Setup ring parameters in initialization control block. */
  982. icb = (struct init_cb_24xx *)ha->init_cb;
  983. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  984. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  985. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  986. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  987. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  988. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  989. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  990. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  991. WRT_REG_DWORD(&reg->req_q_in, 0);
  992. WRT_REG_DWORD(&reg->req_q_out, 0);
  993. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  994. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  995. RD_REG_DWORD(&reg->rsp_q_out);
  996. }
  997. /**
  998. * qla2x00_init_rings() - Initializes firmware.
  999. * @ha: HA context
  1000. *
  1001. * Beginning of request ring has initialization control block already built
  1002. * by nvram config routine.
  1003. *
  1004. * Returns 0 on success.
  1005. */
  1006. static int
  1007. qla2x00_init_rings(scsi_qla_host_t *ha)
  1008. {
  1009. int rval;
  1010. unsigned long flags = 0;
  1011. int cnt;
  1012. struct mid_init_cb_24xx *mid_init_cb =
  1013. (struct mid_init_cb_24xx *) ha->init_cb;
  1014. spin_lock_irqsave(&ha->hardware_lock, flags);
  1015. /* Clear outstanding commands array. */
  1016. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1017. ha->outstanding_cmds[cnt] = NULL;
  1018. ha->current_outstanding_cmd = 0;
  1019. /* Clear RSCN queue. */
  1020. ha->rscn_in_ptr = 0;
  1021. ha->rscn_out_ptr = 0;
  1022. /* Initialize firmware. */
  1023. ha->request_ring_ptr = ha->request_ring;
  1024. ha->req_ring_index = 0;
  1025. ha->req_q_cnt = ha->request_q_length;
  1026. ha->response_ring_ptr = ha->response_ring;
  1027. ha->rsp_ring_index = 0;
  1028. /* Initialize response queue entries */
  1029. qla2x00_init_response_q_entries(ha);
  1030. ha->isp_ops->config_rings(ha);
  1031. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1032. /* Update any ISP specific firmware options before initialization. */
  1033. ha->isp_ops->update_fw_options(ha);
  1034. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  1035. if (ha->flags.npiv_supported)
  1036. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1037. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1038. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  1039. if (rval) {
  1040. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1041. ha->host_no));
  1042. } else {
  1043. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1044. ha->host_no));
  1045. }
  1046. return (rval);
  1047. }
  1048. /**
  1049. * qla2x00_fw_ready() - Waits for firmware ready.
  1050. * @ha: HA context
  1051. *
  1052. * Returns 0 on success.
  1053. */
  1054. static int
  1055. qla2x00_fw_ready(scsi_qla_host_t *ha)
  1056. {
  1057. int rval;
  1058. unsigned long wtime, mtime, cs84xx_time;
  1059. uint16_t min_wait; /* Minimum wait time if loop is down */
  1060. uint16_t wait_time; /* Wait time if loop is coming ready */
  1061. uint16_t state[3];
  1062. rval = QLA_SUCCESS;
  1063. /* 20 seconds for loop down. */
  1064. min_wait = 20;
  1065. /*
  1066. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1067. * our own processing.
  1068. */
  1069. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1070. wait_time = min_wait;
  1071. }
  1072. /* Min wait time if loop down */
  1073. mtime = jiffies + (min_wait * HZ);
  1074. /* wait time before firmware ready */
  1075. wtime = jiffies + (wait_time * HZ);
  1076. /* Wait for ISP to finish LIP */
  1077. if (!ha->flags.init_done)
  1078. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1079. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1080. ha->host_no));
  1081. do {
  1082. rval = qla2x00_get_firmware_state(ha, state);
  1083. if (rval == QLA_SUCCESS) {
  1084. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1085. ha->device_flags &= ~DFLG_NO_CABLE;
  1086. }
  1087. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1088. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1089. "84xx=%x.\n", ha->host_no, state[0],
  1090. state[2]));
  1091. if ((state[2] & FSTATE_LOGGED_IN) &&
  1092. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1093. DEBUG16(printk("scsi(%ld): Sending "
  1094. "verify iocb.\n", ha->host_no));
  1095. cs84xx_time = jiffies;
  1096. rval = qla84xx_init_chip(ha);
  1097. if (rval != QLA_SUCCESS)
  1098. break;
  1099. /* Add time taken to initialize. */
  1100. cs84xx_time = jiffies - cs84xx_time;
  1101. wtime += cs84xx_time;
  1102. mtime += cs84xx_time;
  1103. DEBUG16(printk("scsi(%ld): Increasing "
  1104. "wait time by %ld. New time %ld\n",
  1105. ha->host_no, cs84xx_time, wtime));
  1106. }
  1107. } else if (state[0] == FSTATE_READY) {
  1108. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1109. ha->host_no));
  1110. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  1111. &ha->login_timeout, &ha->r_a_tov);
  1112. rval = QLA_SUCCESS;
  1113. break;
  1114. }
  1115. rval = QLA_FUNCTION_FAILED;
  1116. if (atomic_read(&ha->loop_down_timer) &&
  1117. state[0] != FSTATE_READY) {
  1118. /* Loop down. Timeout on min_wait for states
  1119. * other than Wait for Login.
  1120. */
  1121. if (time_after_eq(jiffies, mtime)) {
  1122. qla_printk(KERN_INFO, ha,
  1123. "Cable is unplugged...\n");
  1124. ha->device_flags |= DFLG_NO_CABLE;
  1125. break;
  1126. }
  1127. }
  1128. } else {
  1129. /* Mailbox cmd failed. Timeout on min_wait. */
  1130. if (time_after_eq(jiffies, mtime))
  1131. break;
  1132. }
  1133. if (time_after_eq(jiffies, wtime))
  1134. break;
  1135. /* Delay for a while */
  1136. msleep(500);
  1137. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1138. ha->host_no, state[0], jiffies));
  1139. } while (1);
  1140. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1141. ha->host_no, state[0], jiffies));
  1142. if (rval) {
  1143. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1144. ha->host_no));
  1145. }
  1146. return (rval);
  1147. }
  1148. /*
  1149. * qla2x00_configure_hba
  1150. * Setup adapter context.
  1151. *
  1152. * Input:
  1153. * ha = adapter state pointer.
  1154. *
  1155. * Returns:
  1156. * 0 = success
  1157. *
  1158. * Context:
  1159. * Kernel context.
  1160. */
  1161. static int
  1162. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1163. {
  1164. int rval;
  1165. uint16_t loop_id;
  1166. uint16_t topo;
  1167. uint16_t sw_cap;
  1168. uint8_t al_pa;
  1169. uint8_t area;
  1170. uint8_t domain;
  1171. char connect_type[22];
  1172. /* Get host addresses. */
  1173. rval = qla2x00_get_adapter_id(ha,
  1174. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1175. if (rval != QLA_SUCCESS) {
  1176. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1177. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1178. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1179. __func__, ha->host_no));
  1180. } else {
  1181. qla_printk(KERN_WARNING, ha,
  1182. "ERROR -- Unable to get host loop ID.\n");
  1183. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1184. }
  1185. return (rval);
  1186. }
  1187. if (topo == 4) {
  1188. qla_printk(KERN_INFO, ha,
  1189. "Cannot get topology - retrying.\n");
  1190. return (QLA_FUNCTION_FAILED);
  1191. }
  1192. ha->loop_id = loop_id;
  1193. /* initialize */
  1194. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1195. ha->operating_mode = LOOP;
  1196. ha->switch_cap = 0;
  1197. switch (topo) {
  1198. case 0:
  1199. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1200. ha->host_no));
  1201. ha->current_topology = ISP_CFG_NL;
  1202. strcpy(connect_type, "(Loop)");
  1203. break;
  1204. case 1:
  1205. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1206. ha->host_no));
  1207. ha->switch_cap = sw_cap;
  1208. ha->current_topology = ISP_CFG_FL;
  1209. strcpy(connect_type, "(FL_Port)");
  1210. break;
  1211. case 2:
  1212. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1213. ha->host_no));
  1214. ha->operating_mode = P2P;
  1215. ha->current_topology = ISP_CFG_N;
  1216. strcpy(connect_type, "(N_Port-to-N_Port)");
  1217. break;
  1218. case 3:
  1219. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1220. ha->host_no));
  1221. ha->switch_cap = sw_cap;
  1222. ha->operating_mode = P2P;
  1223. ha->current_topology = ISP_CFG_F;
  1224. strcpy(connect_type, "(F_Port)");
  1225. break;
  1226. default:
  1227. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1228. "Using NL.\n",
  1229. ha->host_no, topo));
  1230. ha->current_topology = ISP_CFG_NL;
  1231. strcpy(connect_type, "(Loop)");
  1232. break;
  1233. }
  1234. /* Save Host port and loop ID. */
  1235. /* byte order - Big Endian */
  1236. ha->d_id.b.domain = domain;
  1237. ha->d_id.b.area = area;
  1238. ha->d_id.b.al_pa = al_pa;
  1239. if (!ha->flags.init_done)
  1240. qla_printk(KERN_INFO, ha,
  1241. "Topology - %s, Host Loop address 0x%x\n",
  1242. connect_type, ha->loop_id);
  1243. if (rval) {
  1244. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1245. } else {
  1246. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1247. }
  1248. return(rval);
  1249. }
  1250. static inline void
  1251. qla2x00_set_model_info(scsi_qla_host_t *ha, uint8_t *model, size_t len, char *def)
  1252. {
  1253. char *st, *en;
  1254. uint16_t index;
  1255. if (memcmp(model, BINZERO, len) != 0) {
  1256. strncpy(ha->model_number, model, len);
  1257. st = en = ha->model_number;
  1258. en += len - 1;
  1259. while (en > st) {
  1260. if (*en != 0x20 && *en != 0x00)
  1261. break;
  1262. *en-- = '\0';
  1263. }
  1264. index = (ha->pdev->subsystem_device & 0xff);
  1265. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1266. index < QLA_MODEL_NAMES)
  1267. strncpy(ha->model_desc,
  1268. qla2x00_model_name[index * 2 + 1],
  1269. sizeof(ha->model_desc) - 1);
  1270. } else {
  1271. index = (ha->pdev->subsystem_device & 0xff);
  1272. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1273. index < QLA_MODEL_NAMES) {
  1274. strcpy(ha->model_number,
  1275. qla2x00_model_name[index * 2]);
  1276. strncpy(ha->model_desc,
  1277. qla2x00_model_name[index * 2 + 1],
  1278. sizeof(ha->model_desc) - 1);
  1279. } else {
  1280. strcpy(ha->model_number, def);
  1281. }
  1282. }
  1283. if (IS_FWI2_CAPABLE(ha))
  1284. qla2xxx_get_vpd_field(ha, "\x82", ha->model_desc,
  1285. sizeof(ha->model_desc));
  1286. }
  1287. /* On sparc systems, obtain port and node WWN from firmware
  1288. * properties.
  1289. */
  1290. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, nvram_t *nv)
  1291. {
  1292. #ifdef CONFIG_SPARC
  1293. struct pci_dev *pdev = ha->pdev;
  1294. struct device_node *dp = pci_device_to_OF_node(pdev);
  1295. const u8 *val;
  1296. int len;
  1297. val = of_get_property(dp, "port-wwn", &len);
  1298. if (val && len >= WWN_SIZE)
  1299. memcpy(nv->port_name, val, WWN_SIZE);
  1300. val = of_get_property(dp, "node-wwn", &len);
  1301. if (val && len >= WWN_SIZE)
  1302. memcpy(nv->node_name, val, WWN_SIZE);
  1303. #endif
  1304. }
  1305. /*
  1306. * NVRAM configuration for ISP 2xxx
  1307. *
  1308. * Input:
  1309. * ha = adapter block pointer.
  1310. *
  1311. * Output:
  1312. * initialization control block in response_ring
  1313. * host adapters parameters in host adapter block
  1314. *
  1315. * Returns:
  1316. * 0 = success.
  1317. */
  1318. int
  1319. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1320. {
  1321. int rval;
  1322. uint8_t chksum = 0;
  1323. uint16_t cnt;
  1324. uint8_t *dptr1, *dptr2;
  1325. init_cb_t *icb = ha->init_cb;
  1326. nvram_t *nv = ha->nvram;
  1327. uint8_t *ptr = ha->nvram;
  1328. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1329. rval = QLA_SUCCESS;
  1330. /* Determine NVRAM starting address. */
  1331. ha->nvram_size = sizeof(nvram_t);
  1332. ha->nvram_base = 0;
  1333. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1334. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1335. ha->nvram_base = 0x80;
  1336. /* Get NVRAM data and calculate checksum. */
  1337. ha->isp_ops->read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1338. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1339. chksum += *ptr++;
  1340. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1341. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1342. /* Bad NVRAM data, set defaults parameters. */
  1343. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1344. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1345. /* Reset NVRAM data. */
  1346. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1347. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1348. nv->nvram_version);
  1349. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1350. "invalid -- WWPN) defaults.\n");
  1351. if (chksum)
  1352. qla2xxx_hw_event_log(ha, HW_EVENT_NVRAM_CHKSUM_ERR, 0,
  1353. MSW(chksum), LSW(chksum));
  1354. /*
  1355. * Set default initialization control block.
  1356. */
  1357. memset(nv, 0, ha->nvram_size);
  1358. nv->parameter_block_version = ICB_VERSION;
  1359. if (IS_QLA23XX(ha)) {
  1360. nv->firmware_options[0] = BIT_2 | BIT_1;
  1361. nv->firmware_options[1] = BIT_7 | BIT_5;
  1362. nv->add_firmware_options[0] = BIT_5;
  1363. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1364. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1365. nv->special_options[1] = BIT_7;
  1366. } else if (IS_QLA2200(ha)) {
  1367. nv->firmware_options[0] = BIT_2 | BIT_1;
  1368. nv->firmware_options[1] = BIT_7 | BIT_5;
  1369. nv->add_firmware_options[0] = BIT_5;
  1370. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1371. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1372. } else if (IS_QLA2100(ha)) {
  1373. nv->firmware_options[0] = BIT_3 | BIT_1;
  1374. nv->firmware_options[1] = BIT_5;
  1375. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1376. }
  1377. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1378. nv->execution_throttle = __constant_cpu_to_le16(16);
  1379. nv->retry_count = 8;
  1380. nv->retry_delay = 1;
  1381. nv->port_name[0] = 33;
  1382. nv->port_name[3] = 224;
  1383. nv->port_name[4] = 139;
  1384. qla2xxx_nvram_wwn_from_ofw(ha, nv);
  1385. nv->login_timeout = 4;
  1386. /*
  1387. * Set default host adapter parameters
  1388. */
  1389. nv->host_p[1] = BIT_2;
  1390. nv->reset_delay = 5;
  1391. nv->port_down_retry_count = 8;
  1392. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1393. nv->link_down_timeout = 60;
  1394. rval = 1;
  1395. }
  1396. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1397. /*
  1398. * The SN2 does not provide BIOS emulation which means you can't change
  1399. * potentially bogus BIOS settings. Force the use of default settings
  1400. * for link rate and frame size. Hope that the rest of the settings
  1401. * are valid.
  1402. */
  1403. if (ia64_platform_is("sn2")) {
  1404. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1405. if (IS_QLA23XX(ha))
  1406. nv->special_options[1] = BIT_7;
  1407. }
  1408. #endif
  1409. /* Reset Initialization control block */
  1410. memset(icb, 0, ha->init_cb_size);
  1411. /*
  1412. * Setup driver NVRAM options.
  1413. */
  1414. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1415. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1416. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1417. nv->firmware_options[1] &= ~BIT_4;
  1418. if (IS_QLA23XX(ha)) {
  1419. nv->firmware_options[0] |= BIT_2;
  1420. nv->firmware_options[0] &= ~BIT_3;
  1421. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1422. if (IS_QLA2300(ha)) {
  1423. if (ha->fb_rev == FPM_2310) {
  1424. strcpy(ha->model_number, "QLA2310");
  1425. } else {
  1426. strcpy(ha->model_number, "QLA2300");
  1427. }
  1428. } else {
  1429. qla2x00_set_model_info(ha, nv->model_number,
  1430. sizeof(nv->model_number), "QLA23xx");
  1431. }
  1432. } else if (IS_QLA2200(ha)) {
  1433. nv->firmware_options[0] |= BIT_2;
  1434. /*
  1435. * 'Point-to-point preferred, else loop' is not a safe
  1436. * connection mode setting.
  1437. */
  1438. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1439. (BIT_5 | BIT_4)) {
  1440. /* Force 'loop preferred, else point-to-point'. */
  1441. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1442. nv->add_firmware_options[0] |= BIT_5;
  1443. }
  1444. strcpy(ha->model_number, "QLA22xx");
  1445. } else /*if (IS_QLA2100(ha))*/ {
  1446. strcpy(ha->model_number, "QLA2100");
  1447. }
  1448. /*
  1449. * Copy over NVRAM RISC parameter block to initialization control block.
  1450. */
  1451. dptr1 = (uint8_t *)icb;
  1452. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1453. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1454. while (cnt--)
  1455. *dptr1++ = *dptr2++;
  1456. /* Copy 2nd half. */
  1457. dptr1 = (uint8_t *)icb->add_firmware_options;
  1458. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1459. while (cnt--)
  1460. *dptr1++ = *dptr2++;
  1461. /* Use alternate WWN? */
  1462. if (nv->host_p[1] & BIT_7) {
  1463. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1464. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1465. }
  1466. /* Prepare nodename */
  1467. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1468. /*
  1469. * Firmware will apply the following mask if the nodename was
  1470. * not provided.
  1471. */
  1472. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1473. icb->node_name[0] &= 0xF0;
  1474. }
  1475. /*
  1476. * Set host adapter parameters.
  1477. */
  1478. if (nv->host_p[0] & BIT_7)
  1479. ql2xextended_error_logging = 1;
  1480. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1481. /* Always load RISC code on non ISP2[12]00 chips. */
  1482. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1483. ha->flags.disable_risc_code_load = 0;
  1484. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1485. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1486. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1487. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1488. ha->flags.disable_serdes = 0;
  1489. ha->operating_mode =
  1490. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1491. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1492. sizeof(ha->fw_seriallink_options));
  1493. /* save HBA serial number */
  1494. ha->serial0 = icb->port_name[5];
  1495. ha->serial1 = icb->port_name[6];
  1496. ha->serial2 = icb->port_name[7];
  1497. ha->node_name = icb->node_name;
  1498. ha->port_name = icb->port_name;
  1499. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1500. ha->retry_count = nv->retry_count;
  1501. /* Set minimum login_timeout to 4 seconds. */
  1502. if (nv->login_timeout < ql2xlogintimeout)
  1503. nv->login_timeout = ql2xlogintimeout;
  1504. if (nv->login_timeout < 4)
  1505. nv->login_timeout = 4;
  1506. ha->login_timeout = nv->login_timeout;
  1507. icb->login_timeout = nv->login_timeout;
  1508. /* Set minimum RATOV to 100 tenths of a second. */
  1509. ha->r_a_tov = 100;
  1510. ha->loop_reset_delay = nv->reset_delay;
  1511. /* Link Down Timeout = 0:
  1512. *
  1513. * When Port Down timer expires we will start returning
  1514. * I/O's to OS with "DID_NO_CONNECT".
  1515. *
  1516. * Link Down Timeout != 0:
  1517. *
  1518. * The driver waits for the link to come up after link down
  1519. * before returning I/Os to OS with "DID_NO_CONNECT".
  1520. */
  1521. if (nv->link_down_timeout == 0) {
  1522. ha->loop_down_abort_time =
  1523. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1524. } else {
  1525. ha->link_down_timeout = nv->link_down_timeout;
  1526. ha->loop_down_abort_time =
  1527. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1528. }
  1529. /*
  1530. * Need enough time to try and get the port back.
  1531. */
  1532. ha->port_down_retry_count = nv->port_down_retry_count;
  1533. if (qlport_down_retry)
  1534. ha->port_down_retry_count = qlport_down_retry;
  1535. /* Set login_retry_count */
  1536. ha->login_retry_count = nv->retry_count;
  1537. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1538. ha->port_down_retry_count > 3)
  1539. ha->login_retry_count = ha->port_down_retry_count;
  1540. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1541. ha->login_retry_count = ha->port_down_retry_count;
  1542. if (ql2xloginretrycount)
  1543. ha->login_retry_count = ql2xloginretrycount;
  1544. icb->lun_enables = __constant_cpu_to_le16(0);
  1545. icb->command_resource_count = 0;
  1546. icb->immediate_notify_resource_count = 0;
  1547. icb->timeout = __constant_cpu_to_le16(0);
  1548. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1549. /* Enable RIO */
  1550. icb->firmware_options[0] &= ~BIT_3;
  1551. icb->add_firmware_options[0] &=
  1552. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1553. icb->add_firmware_options[0] |= BIT_2;
  1554. icb->response_accumulation_timer = 3;
  1555. icb->interrupt_delay_timer = 5;
  1556. ha->flags.process_response_queue = 1;
  1557. } else {
  1558. /* Enable ZIO. */
  1559. if (!ha->flags.init_done) {
  1560. ha->zio_mode = icb->add_firmware_options[0] &
  1561. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1562. ha->zio_timer = icb->interrupt_delay_timer ?
  1563. icb->interrupt_delay_timer: 2;
  1564. }
  1565. icb->add_firmware_options[0] &=
  1566. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1567. ha->flags.process_response_queue = 0;
  1568. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1569. ha->zio_mode = QLA_ZIO_MODE_6;
  1570. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1571. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1572. ha->zio_timer * 100));
  1573. qla_printk(KERN_INFO, ha,
  1574. "ZIO mode %d enabled; timer delay (%d us).\n",
  1575. ha->zio_mode, ha->zio_timer * 100);
  1576. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1577. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1578. ha->flags.process_response_queue = 1;
  1579. }
  1580. }
  1581. if (rval) {
  1582. DEBUG2_3(printk(KERN_WARNING
  1583. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1584. }
  1585. return (rval);
  1586. }
  1587. static void
  1588. qla2x00_rport_del(void *data)
  1589. {
  1590. fc_port_t *fcport = data;
  1591. struct fc_rport *rport;
  1592. spin_lock_irq(fcport->ha->host->host_lock);
  1593. rport = fcport->drport;
  1594. fcport->drport = NULL;
  1595. spin_unlock_irq(fcport->ha->host->host_lock);
  1596. if (rport)
  1597. fc_remote_port_delete(rport);
  1598. }
  1599. /**
  1600. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1601. * @ha: HA context
  1602. * @flags: allocation flags
  1603. *
  1604. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1605. */
  1606. static fc_port_t *
  1607. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1608. {
  1609. fc_port_t *fcport;
  1610. fcport = kzalloc(sizeof(fc_port_t), flags);
  1611. if (!fcport)
  1612. return NULL;
  1613. /* Setup fcport template structure. */
  1614. fcport->ha = ha;
  1615. fcport->vp_idx = ha->vp_idx;
  1616. fcport->port_type = FCT_UNKNOWN;
  1617. fcport->loop_id = FC_NO_LOOP_ID;
  1618. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1619. fcport->flags = FCF_RLC_SUPPORT;
  1620. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1621. return fcport;
  1622. }
  1623. /*
  1624. * qla2x00_configure_loop
  1625. * Updates Fibre Channel Device Database with what is actually on loop.
  1626. *
  1627. * Input:
  1628. * ha = adapter block pointer.
  1629. *
  1630. * Returns:
  1631. * 0 = success.
  1632. * 1 = error.
  1633. * 2 = database was full and device was not configured.
  1634. */
  1635. static int
  1636. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1637. {
  1638. int rval;
  1639. unsigned long flags, save_flags;
  1640. rval = QLA_SUCCESS;
  1641. /* Get Initiator ID */
  1642. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1643. rval = qla2x00_configure_hba(ha);
  1644. if (rval != QLA_SUCCESS) {
  1645. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1646. ha->host_no));
  1647. return (rval);
  1648. }
  1649. }
  1650. save_flags = flags = ha->dpc_flags;
  1651. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1652. ha->host_no, flags));
  1653. /*
  1654. * If we have both an RSCN and PORT UPDATE pending then handle them
  1655. * both at the same time.
  1656. */
  1657. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1658. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1659. /* Determine what we need to do */
  1660. if (ha->current_topology == ISP_CFG_FL &&
  1661. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1662. ha->flags.rscn_queue_overflow = 1;
  1663. set_bit(RSCN_UPDATE, &flags);
  1664. } else if (ha->current_topology == ISP_CFG_F &&
  1665. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1666. ha->flags.rscn_queue_overflow = 1;
  1667. set_bit(RSCN_UPDATE, &flags);
  1668. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1669. } else if (ha->current_topology == ISP_CFG_N) {
  1670. clear_bit(RSCN_UPDATE, &flags);
  1671. } else if (!ha->flags.online ||
  1672. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1673. ha->flags.rscn_queue_overflow = 1;
  1674. set_bit(RSCN_UPDATE, &flags);
  1675. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1676. }
  1677. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1678. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1679. rval = QLA_FUNCTION_FAILED;
  1680. } else {
  1681. rval = qla2x00_configure_local_loop(ha);
  1682. }
  1683. }
  1684. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1685. if (LOOP_TRANSITION(ha)) {
  1686. rval = QLA_FUNCTION_FAILED;
  1687. } else {
  1688. rval = qla2x00_configure_fabric(ha);
  1689. }
  1690. }
  1691. if (rval == QLA_SUCCESS) {
  1692. if (atomic_read(&ha->loop_down_timer) ||
  1693. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1694. rval = QLA_FUNCTION_FAILED;
  1695. } else {
  1696. atomic_set(&ha->loop_state, LOOP_READY);
  1697. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1698. }
  1699. }
  1700. if (rval) {
  1701. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1702. __func__, ha->host_no));
  1703. } else {
  1704. DEBUG3(printk("%s: exiting normally\n", __func__));
  1705. }
  1706. /* Restore state if a resync event occured during processing */
  1707. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1708. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1709. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1710. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1711. ha->flags.rscn_queue_overflow = 1;
  1712. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1713. }
  1714. }
  1715. return (rval);
  1716. }
  1717. /*
  1718. * qla2x00_configure_local_loop
  1719. * Updates Fibre Channel Device Database with local loop devices.
  1720. *
  1721. * Input:
  1722. * ha = adapter block pointer.
  1723. *
  1724. * Returns:
  1725. * 0 = success.
  1726. */
  1727. static int
  1728. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1729. {
  1730. int rval, rval2;
  1731. int found_devs;
  1732. int found;
  1733. fc_port_t *fcport, *new_fcport;
  1734. uint16_t index;
  1735. uint16_t entries;
  1736. char *id_iter;
  1737. uint16_t loop_id;
  1738. uint8_t domain, area, al_pa;
  1739. scsi_qla_host_t *pha = to_qla_parent(ha);
  1740. found_devs = 0;
  1741. new_fcport = NULL;
  1742. entries = MAX_FIBRE_DEVICES;
  1743. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1744. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1745. /* Get list of logged in devices. */
  1746. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1747. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1748. &entries);
  1749. if (rval != QLA_SUCCESS)
  1750. goto cleanup_allocation;
  1751. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1752. ha->host_no, entries));
  1753. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1754. entries * sizeof(struct gid_list_info)));
  1755. /* Allocate temporary fcport for any new fcports discovered. */
  1756. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1757. if (new_fcport == NULL) {
  1758. rval = QLA_MEMORY_ALLOC_FAILED;
  1759. goto cleanup_allocation;
  1760. }
  1761. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1762. /*
  1763. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1764. */
  1765. list_for_each_entry(fcport, &pha->fcports, list) {
  1766. if (fcport->vp_idx != ha->vp_idx)
  1767. continue;
  1768. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1769. fcport->port_type != FCT_BROADCAST &&
  1770. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1771. DEBUG(printk("scsi(%ld): Marking port lost, "
  1772. "loop_id=0x%04x\n",
  1773. ha->host_no, fcport->loop_id));
  1774. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1775. fcport->flags &= ~FCF_FARP_DONE;
  1776. }
  1777. }
  1778. /* Add devices to port list. */
  1779. id_iter = (char *)ha->gid_list;
  1780. for (index = 0; index < entries; index++) {
  1781. domain = ((struct gid_list_info *)id_iter)->domain;
  1782. area = ((struct gid_list_info *)id_iter)->area;
  1783. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1784. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1785. loop_id = (uint16_t)
  1786. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1787. else
  1788. loop_id = le16_to_cpu(
  1789. ((struct gid_list_info *)id_iter)->loop_id);
  1790. id_iter += ha->gid_list_info_size;
  1791. /* Bypass reserved domain fields. */
  1792. if ((domain & 0xf0) == 0xf0)
  1793. continue;
  1794. /* Bypass if not same domain and area of adapter. */
  1795. if (area && domain &&
  1796. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1797. continue;
  1798. /* Bypass invalid local loop ID. */
  1799. if (loop_id > LAST_LOCAL_LOOP_ID)
  1800. continue;
  1801. /* Fill in member data. */
  1802. new_fcport->d_id.b.domain = domain;
  1803. new_fcport->d_id.b.area = area;
  1804. new_fcport->d_id.b.al_pa = al_pa;
  1805. new_fcport->loop_id = loop_id;
  1806. new_fcport->vp_idx = ha->vp_idx;
  1807. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1808. if (rval2 != QLA_SUCCESS) {
  1809. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1810. "information -- get_port_database=%x, "
  1811. "loop_id=0x%04x\n",
  1812. ha->host_no, rval2, new_fcport->loop_id));
  1813. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1814. ha->host_no));
  1815. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1816. continue;
  1817. }
  1818. /* Check for matching device in port list. */
  1819. found = 0;
  1820. fcport = NULL;
  1821. list_for_each_entry(fcport, &pha->fcports, list) {
  1822. if (fcport->vp_idx != ha->vp_idx)
  1823. continue;
  1824. if (memcmp(new_fcport->port_name, fcport->port_name,
  1825. WWN_SIZE))
  1826. continue;
  1827. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1828. FCF_PERSISTENT_BOUND);
  1829. fcport->loop_id = new_fcport->loop_id;
  1830. fcport->port_type = new_fcport->port_type;
  1831. fcport->d_id.b24 = new_fcport->d_id.b24;
  1832. memcpy(fcport->node_name, new_fcport->node_name,
  1833. WWN_SIZE);
  1834. found++;
  1835. break;
  1836. }
  1837. if (!found) {
  1838. /* New device, add to fcports list. */
  1839. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1840. if (ha->parent) {
  1841. new_fcport->ha = ha;
  1842. new_fcport->vp_idx = ha->vp_idx;
  1843. list_add_tail(&new_fcport->vp_fcport,
  1844. &ha->vp_fcports);
  1845. }
  1846. list_add_tail(&new_fcport->list, &pha->fcports);
  1847. /* Allocate a new replacement fcport. */
  1848. fcport = new_fcport;
  1849. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1850. if (new_fcport == NULL) {
  1851. rval = QLA_MEMORY_ALLOC_FAILED;
  1852. goto cleanup_allocation;
  1853. }
  1854. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1855. }
  1856. /* Base iIDMA settings on HBA port speed. */
  1857. fcport->fp_speed = ha->link_data_rate;
  1858. qla2x00_update_fcport(ha, fcport);
  1859. found_devs++;
  1860. }
  1861. cleanup_allocation:
  1862. kfree(new_fcport);
  1863. if (rval != QLA_SUCCESS) {
  1864. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1865. "rval=%x\n", ha->host_no, rval));
  1866. }
  1867. if (found_devs) {
  1868. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1869. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1870. }
  1871. return (rval);
  1872. }
  1873. static void
  1874. qla2x00_iidma_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1875. {
  1876. #define LS_UNKNOWN 2
  1877. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1878. int rval;
  1879. uint16_t mb[6];
  1880. if (!IS_IIDMA_CAPABLE(ha))
  1881. return;
  1882. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1883. fcport->fp_speed > ha->link_data_rate)
  1884. return;
  1885. rval = qla2x00_set_idma_speed(ha, fcport->loop_id, fcport->fp_speed,
  1886. mb);
  1887. if (rval != QLA_SUCCESS) {
  1888. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1889. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1890. ha->host_no, fcport->port_name[0], fcport->port_name[1],
  1891. fcport->port_name[2], fcport->port_name[3],
  1892. fcport->port_name[4], fcport->port_name[5],
  1893. fcport->port_name[6], fcport->port_name[7], rval,
  1894. fcport->fp_speed, mb[0], mb[1]));
  1895. } else {
  1896. DEBUG2(qla_printk(KERN_INFO, ha,
  1897. "iIDMA adjusted to %s GB/s on "
  1898. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1899. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1900. fcport->port_name[1], fcport->port_name[2],
  1901. fcport->port_name[3], fcport->port_name[4],
  1902. fcport->port_name[5], fcport->port_name[6],
  1903. fcport->port_name[7]));
  1904. }
  1905. }
  1906. static void
  1907. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1908. {
  1909. struct fc_rport_identifiers rport_ids;
  1910. struct fc_rport *rport;
  1911. if (fcport->drport)
  1912. qla2x00_rport_del(fcport);
  1913. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1914. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1915. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1916. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1917. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1918. fcport->rport = rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1919. if (!rport) {
  1920. qla_printk(KERN_WARNING, ha,
  1921. "Unable to allocate fc remote port!\n");
  1922. return;
  1923. }
  1924. spin_lock_irq(fcport->ha->host->host_lock);
  1925. *((fc_port_t **)rport->dd_data) = fcport;
  1926. spin_unlock_irq(fcport->ha->host->host_lock);
  1927. rport->supported_classes = fcport->supported_classes;
  1928. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1929. if (fcport->port_type == FCT_INITIATOR)
  1930. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1931. if (fcport->port_type == FCT_TARGET)
  1932. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1933. fc_remote_port_rolechg(rport, rport_ids.roles);
  1934. }
  1935. /*
  1936. * qla2x00_update_fcport
  1937. * Updates device on list.
  1938. *
  1939. * Input:
  1940. * ha = adapter block pointer.
  1941. * fcport = port structure pointer.
  1942. *
  1943. * Return:
  1944. * 0 - Success
  1945. * BIT_0 - error
  1946. *
  1947. * Context:
  1948. * Kernel context.
  1949. */
  1950. void
  1951. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1952. {
  1953. scsi_qla_host_t *pha = to_qla_parent(ha);
  1954. fcport->ha = ha;
  1955. fcport->login_retry = 0;
  1956. fcport->port_login_retry_count = pha->port_down_retry_count *
  1957. PORT_RETRY_TIME;
  1958. atomic_set(&fcport->port_down_timer, pha->port_down_retry_count *
  1959. PORT_RETRY_TIME);
  1960. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1961. qla2x00_iidma_fcport(ha, fcport);
  1962. atomic_set(&fcport->state, FCS_ONLINE);
  1963. qla2x00_reg_remote_port(ha, fcport);
  1964. }
  1965. /*
  1966. * qla2x00_configure_fabric
  1967. * Setup SNS devices with loop ID's.
  1968. *
  1969. * Input:
  1970. * ha = adapter block pointer.
  1971. *
  1972. * Returns:
  1973. * 0 = success.
  1974. * BIT_0 = error
  1975. */
  1976. static int
  1977. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1978. {
  1979. int rval, rval2;
  1980. fc_port_t *fcport, *fcptemp;
  1981. uint16_t next_loopid;
  1982. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1983. uint16_t loop_id;
  1984. LIST_HEAD(new_fcports);
  1985. scsi_qla_host_t *pha = to_qla_parent(ha);
  1986. /* If FL port exists, then SNS is present */
  1987. if (IS_FWI2_CAPABLE(ha))
  1988. loop_id = NPH_F_PORT;
  1989. else
  1990. loop_id = SNS_FL_PORT;
  1991. rval = qla2x00_get_port_name(ha, loop_id, ha->fabric_node_name, 1);
  1992. if (rval != QLA_SUCCESS) {
  1993. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  1994. "Port\n", ha->host_no));
  1995. ha->device_flags &= ~SWITCH_FOUND;
  1996. return (QLA_SUCCESS);
  1997. }
  1998. ha->device_flags |= SWITCH_FOUND;
  1999. /* Mark devices that need re-synchronization. */
  2000. rval2 = qla2x00_device_resync(ha);
  2001. if (rval2 == QLA_RSCNS_HANDLED) {
  2002. /* No point doing the scan, just continue. */
  2003. return (QLA_SUCCESS);
  2004. }
  2005. do {
  2006. /* FDMI support. */
  2007. if (ql2xfdmienable &&
  2008. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  2009. qla2x00_fdmi_register(ha);
  2010. /* Ensure we are logged into the SNS. */
  2011. if (IS_FWI2_CAPABLE(ha))
  2012. loop_id = NPH_SNS;
  2013. else
  2014. loop_id = SIMPLE_NAME_SERVER;
  2015. ha->isp_ops->fabric_login(ha, loop_id, 0xff, 0xff,
  2016. 0xfc, mb, BIT_1 | BIT_0);
  2017. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2018. DEBUG2(qla_printk(KERN_INFO, ha,
  2019. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2020. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2021. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2022. return (QLA_SUCCESS);
  2023. }
  2024. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  2025. if (qla2x00_rft_id(ha)) {
  2026. /* EMPTY */
  2027. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2028. "TYPE failed.\n", ha->host_no));
  2029. }
  2030. if (qla2x00_rff_id(ha)) {
  2031. /* EMPTY */
  2032. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2033. "Features failed.\n", ha->host_no));
  2034. }
  2035. if (qla2x00_rnn_id(ha)) {
  2036. /* EMPTY */
  2037. DEBUG2(printk("scsi(%ld): Register Node Name "
  2038. "failed.\n", ha->host_no));
  2039. } else if (qla2x00_rsnn_nn(ha)) {
  2040. /* EMPTY */
  2041. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2042. "Node Name failed.\n", ha->host_no));
  2043. }
  2044. }
  2045. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  2046. if (rval != QLA_SUCCESS)
  2047. break;
  2048. /*
  2049. * Logout all previous fabric devices marked lost, except
  2050. * tape devices.
  2051. */
  2052. list_for_each_entry(fcport, &pha->fcports, list) {
  2053. if (fcport->vp_idx !=ha->vp_idx)
  2054. continue;
  2055. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2056. break;
  2057. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2058. continue;
  2059. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2060. qla2x00_mark_device_lost(ha, fcport,
  2061. ql2xplogiabsentdevice, 0);
  2062. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2063. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2064. fcport->port_type != FCT_INITIATOR &&
  2065. fcport->port_type != FCT_BROADCAST) {
  2066. ha->isp_ops->fabric_logout(ha,
  2067. fcport->loop_id,
  2068. fcport->d_id.b.domain,
  2069. fcport->d_id.b.area,
  2070. fcport->d_id.b.al_pa);
  2071. fcport->loop_id = FC_NO_LOOP_ID;
  2072. }
  2073. }
  2074. }
  2075. /* Starting free loop ID. */
  2076. next_loopid = pha->min_external_loopid;
  2077. /*
  2078. * Scan through our port list and login entries that need to be
  2079. * logged in.
  2080. */
  2081. list_for_each_entry(fcport, &pha->fcports, list) {
  2082. if (fcport->vp_idx != ha->vp_idx)
  2083. continue;
  2084. if (atomic_read(&ha->loop_down_timer) ||
  2085. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2086. break;
  2087. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2088. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2089. continue;
  2090. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2091. fcport->loop_id = next_loopid;
  2092. rval = qla2x00_find_new_loop_id(
  2093. to_qla_parent(ha), fcport);
  2094. if (rval != QLA_SUCCESS) {
  2095. /* Ran out of IDs to use */
  2096. break;
  2097. }
  2098. }
  2099. /* Login and update database */
  2100. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2101. }
  2102. /* Exit if out of loop IDs. */
  2103. if (rval != QLA_SUCCESS) {
  2104. break;
  2105. }
  2106. /*
  2107. * Login and add the new devices to our port list.
  2108. */
  2109. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2110. if (atomic_read(&ha->loop_down_timer) ||
  2111. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2112. break;
  2113. /* Find a new loop ID to use. */
  2114. fcport->loop_id = next_loopid;
  2115. rval = qla2x00_find_new_loop_id(to_qla_parent(ha),
  2116. fcport);
  2117. if (rval != QLA_SUCCESS) {
  2118. /* Ran out of IDs to use */
  2119. break;
  2120. }
  2121. /* Login and update database */
  2122. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2123. if (ha->parent) {
  2124. fcport->ha = ha;
  2125. fcport->vp_idx = ha->vp_idx;
  2126. list_add_tail(&fcport->vp_fcport,
  2127. &ha->vp_fcports);
  2128. list_move_tail(&fcport->list,
  2129. &ha->parent->fcports);
  2130. } else
  2131. list_move_tail(&fcport->list, &ha->fcports);
  2132. }
  2133. } while (0);
  2134. /* Free all new device structures not processed. */
  2135. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2136. list_del(&fcport->list);
  2137. kfree(fcport);
  2138. }
  2139. if (rval) {
  2140. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2141. "rval=%d\n", ha->host_no, rval));
  2142. }
  2143. return (rval);
  2144. }
  2145. /*
  2146. * qla2x00_find_all_fabric_devs
  2147. *
  2148. * Input:
  2149. * ha = adapter block pointer.
  2150. * dev = database device entry pointer.
  2151. *
  2152. * Returns:
  2153. * 0 = success.
  2154. *
  2155. * Context:
  2156. * Kernel context.
  2157. */
  2158. static int
  2159. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  2160. {
  2161. int rval;
  2162. uint16_t loop_id;
  2163. fc_port_t *fcport, *new_fcport, *fcptemp;
  2164. int found;
  2165. sw_info_t *swl;
  2166. int swl_idx;
  2167. int first_dev, last_dev;
  2168. port_id_t wrap, nxt_d_id;
  2169. int vp_index;
  2170. int empty_vp_index;
  2171. int found_vp;
  2172. scsi_qla_host_t *vha;
  2173. scsi_qla_host_t *pha = to_qla_parent(ha);
  2174. rval = QLA_SUCCESS;
  2175. /* Try GID_PT to get device list, else GAN. */
  2176. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_ATOMIC);
  2177. if (!swl) {
  2178. /*EMPTY*/
  2179. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2180. "on GA_NXT\n", ha->host_no));
  2181. } else {
  2182. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  2183. kfree(swl);
  2184. swl = NULL;
  2185. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  2186. kfree(swl);
  2187. swl = NULL;
  2188. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  2189. kfree(swl);
  2190. swl = NULL;
  2191. } else if (ql2xiidmaenable &&
  2192. qla2x00_gfpn_id(ha, swl) == QLA_SUCCESS) {
  2193. qla2x00_gpsc(ha, swl);
  2194. }
  2195. }
  2196. swl_idx = 0;
  2197. /* Allocate temporary fcport for any new fcports discovered. */
  2198. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2199. if (new_fcport == NULL) {
  2200. kfree(swl);
  2201. return (QLA_MEMORY_ALLOC_FAILED);
  2202. }
  2203. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2204. new_fcport->vp_idx = ha->vp_idx;
  2205. /* Set start port ID scan at adapter ID. */
  2206. first_dev = 1;
  2207. last_dev = 0;
  2208. /* Starting free loop ID. */
  2209. loop_id = pha->min_external_loopid;
  2210. for (; loop_id <= ha->last_loop_id; loop_id++) {
  2211. if (qla2x00_is_reserved_id(ha, loop_id))
  2212. continue;
  2213. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  2214. break;
  2215. if (swl != NULL) {
  2216. if (last_dev) {
  2217. wrap.b24 = new_fcport->d_id.b24;
  2218. } else {
  2219. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2220. memcpy(new_fcport->node_name,
  2221. swl[swl_idx].node_name, WWN_SIZE);
  2222. memcpy(new_fcport->port_name,
  2223. swl[swl_idx].port_name, WWN_SIZE);
  2224. memcpy(new_fcport->fabric_port_name,
  2225. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2226. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2227. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2228. last_dev = 1;
  2229. }
  2230. swl_idx++;
  2231. }
  2232. } else {
  2233. /* Send GA_NXT to the switch */
  2234. rval = qla2x00_ga_nxt(ha, new_fcport);
  2235. if (rval != QLA_SUCCESS) {
  2236. qla_printk(KERN_WARNING, ha,
  2237. "SNS scan failed -- assuming zero-entry "
  2238. "result...\n");
  2239. list_for_each_entry_safe(fcport, fcptemp,
  2240. new_fcports, list) {
  2241. list_del(&fcport->list);
  2242. kfree(fcport);
  2243. }
  2244. rval = QLA_SUCCESS;
  2245. break;
  2246. }
  2247. }
  2248. /* If wrap on switch device list, exit. */
  2249. if (first_dev) {
  2250. wrap.b24 = new_fcport->d_id.b24;
  2251. first_dev = 0;
  2252. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2253. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2254. ha->host_no, new_fcport->d_id.b.domain,
  2255. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2256. break;
  2257. }
  2258. /* Bypass if same physical adapter. */
  2259. if (new_fcport->d_id.b24 == pha->d_id.b24)
  2260. continue;
  2261. /* Bypass virtual ports of the same host. */
  2262. if (pha->num_vhosts) {
  2263. for_each_mapped_vp_idx(pha, vp_index) {
  2264. empty_vp_index = 1;
  2265. found_vp = 0;
  2266. list_for_each_entry(vha, &pha->vp_list,
  2267. vp_list) {
  2268. if (vp_index == vha->vp_idx) {
  2269. empty_vp_index = 0;
  2270. found_vp = 1;
  2271. break;
  2272. }
  2273. }
  2274. if (empty_vp_index)
  2275. continue;
  2276. if (found_vp &&
  2277. new_fcport->d_id.b24 == vha->d_id.b24)
  2278. break;
  2279. }
  2280. if (vp_index <= pha->max_npiv_vports)
  2281. continue;
  2282. }
  2283. /* Bypass if same domain and area of adapter. */
  2284. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2285. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2286. ISP_CFG_FL)
  2287. continue;
  2288. /* Bypass reserved domain fields. */
  2289. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2290. continue;
  2291. /* Locate matching device in database. */
  2292. found = 0;
  2293. list_for_each_entry(fcport, &pha->fcports, list) {
  2294. if (new_fcport->vp_idx != fcport->vp_idx)
  2295. continue;
  2296. if (memcmp(new_fcport->port_name, fcport->port_name,
  2297. WWN_SIZE))
  2298. continue;
  2299. found++;
  2300. /* Update port state. */
  2301. memcpy(fcport->fabric_port_name,
  2302. new_fcport->fabric_port_name, WWN_SIZE);
  2303. fcport->fp_speed = new_fcport->fp_speed;
  2304. /*
  2305. * If address the same and state FCS_ONLINE, nothing
  2306. * changed.
  2307. */
  2308. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2309. atomic_read(&fcport->state) == FCS_ONLINE) {
  2310. break;
  2311. }
  2312. /*
  2313. * If device was not a fabric device before.
  2314. */
  2315. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2316. fcport->d_id.b24 = new_fcport->d_id.b24;
  2317. fcport->loop_id = FC_NO_LOOP_ID;
  2318. fcport->flags |= (FCF_FABRIC_DEVICE |
  2319. FCF_LOGIN_NEEDED);
  2320. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2321. break;
  2322. }
  2323. /*
  2324. * Port ID changed or device was marked to be updated;
  2325. * Log it out if still logged in and mark it for
  2326. * relogin later.
  2327. */
  2328. fcport->d_id.b24 = new_fcport->d_id.b24;
  2329. fcport->flags |= FCF_LOGIN_NEEDED;
  2330. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2331. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2332. fcport->port_type != FCT_INITIATOR &&
  2333. fcport->port_type != FCT_BROADCAST) {
  2334. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2335. fcport->d_id.b.domain, fcport->d_id.b.area,
  2336. fcport->d_id.b.al_pa);
  2337. fcport->loop_id = FC_NO_LOOP_ID;
  2338. }
  2339. break;
  2340. }
  2341. if (found)
  2342. continue;
  2343. /* If device was not in our fcports list, then add it. */
  2344. list_add_tail(&new_fcport->list, new_fcports);
  2345. /* Allocate a new replacement fcport. */
  2346. nxt_d_id.b24 = new_fcport->d_id.b24;
  2347. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2348. if (new_fcport == NULL) {
  2349. kfree(swl);
  2350. return (QLA_MEMORY_ALLOC_FAILED);
  2351. }
  2352. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2353. new_fcport->d_id.b24 = nxt_d_id.b24;
  2354. new_fcport->vp_idx = ha->vp_idx;
  2355. }
  2356. kfree(swl);
  2357. kfree(new_fcport);
  2358. if (!list_empty(new_fcports))
  2359. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2360. return (rval);
  2361. }
  2362. /*
  2363. * qla2x00_find_new_loop_id
  2364. * Scan through our port list and find a new usable loop ID.
  2365. *
  2366. * Input:
  2367. * ha: adapter state pointer.
  2368. * dev: port structure pointer.
  2369. *
  2370. * Returns:
  2371. * qla2x00 local function return status code.
  2372. *
  2373. * Context:
  2374. * Kernel context.
  2375. */
  2376. static int
  2377. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2378. {
  2379. int rval;
  2380. int found;
  2381. fc_port_t *fcport;
  2382. uint16_t first_loop_id;
  2383. scsi_qla_host_t *pha = to_qla_parent(ha);
  2384. rval = QLA_SUCCESS;
  2385. /* Save starting loop ID. */
  2386. first_loop_id = dev->loop_id;
  2387. for (;;) {
  2388. /* Skip loop ID if already used by adapter. */
  2389. if (dev->loop_id == ha->loop_id) {
  2390. dev->loop_id++;
  2391. }
  2392. /* Skip reserved loop IDs. */
  2393. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2394. dev->loop_id++;
  2395. }
  2396. /* Reset loop ID if passed the end. */
  2397. if (dev->loop_id > ha->last_loop_id) {
  2398. /* first loop ID. */
  2399. dev->loop_id = ha->min_external_loopid;
  2400. }
  2401. /* Check for loop ID being already in use. */
  2402. found = 0;
  2403. fcport = NULL;
  2404. list_for_each_entry(fcport, &pha->fcports, list) {
  2405. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2406. /* ID possibly in use */
  2407. found++;
  2408. break;
  2409. }
  2410. }
  2411. /* If not in use then it is free to use. */
  2412. if (!found) {
  2413. break;
  2414. }
  2415. /* ID in use. Try next value. */
  2416. dev->loop_id++;
  2417. /* If wrap around. No free ID to use. */
  2418. if (dev->loop_id == first_loop_id) {
  2419. dev->loop_id = FC_NO_LOOP_ID;
  2420. rval = QLA_FUNCTION_FAILED;
  2421. break;
  2422. }
  2423. }
  2424. return (rval);
  2425. }
  2426. /*
  2427. * qla2x00_device_resync
  2428. * Marks devices in the database that needs resynchronization.
  2429. *
  2430. * Input:
  2431. * ha = adapter block pointer.
  2432. *
  2433. * Context:
  2434. * Kernel context.
  2435. */
  2436. static int
  2437. qla2x00_device_resync(scsi_qla_host_t *ha)
  2438. {
  2439. int rval;
  2440. uint32_t mask;
  2441. fc_port_t *fcport;
  2442. uint32_t rscn_entry;
  2443. uint8_t rscn_out_iter;
  2444. uint8_t format;
  2445. port_id_t d_id;
  2446. scsi_qla_host_t *pha = to_qla_parent(ha);
  2447. rval = QLA_RSCNS_HANDLED;
  2448. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2449. ha->flags.rscn_queue_overflow) {
  2450. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2451. format = MSB(MSW(rscn_entry));
  2452. d_id.b.domain = LSB(MSW(rscn_entry));
  2453. d_id.b.area = MSB(LSW(rscn_entry));
  2454. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2455. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2456. "[%02x/%02x%02x%02x].\n",
  2457. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2458. d_id.b.area, d_id.b.al_pa));
  2459. ha->rscn_out_ptr++;
  2460. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2461. ha->rscn_out_ptr = 0;
  2462. /* Skip duplicate entries. */
  2463. for (rscn_out_iter = ha->rscn_out_ptr;
  2464. !ha->flags.rscn_queue_overflow &&
  2465. rscn_out_iter != ha->rscn_in_ptr;
  2466. rscn_out_iter = (rscn_out_iter ==
  2467. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2468. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2469. break;
  2470. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2471. "entry found at [%d].\n", ha->host_no,
  2472. rscn_out_iter));
  2473. ha->rscn_out_ptr = rscn_out_iter;
  2474. }
  2475. /* Queue overflow, set switch default case. */
  2476. if (ha->flags.rscn_queue_overflow) {
  2477. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2478. "overflow.\n", ha->host_no));
  2479. format = 3;
  2480. ha->flags.rscn_queue_overflow = 0;
  2481. }
  2482. switch (format) {
  2483. case 0:
  2484. mask = 0xffffff;
  2485. break;
  2486. case 1:
  2487. mask = 0xffff00;
  2488. break;
  2489. case 2:
  2490. mask = 0xff0000;
  2491. break;
  2492. default:
  2493. mask = 0x0;
  2494. d_id.b24 = 0;
  2495. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2496. break;
  2497. }
  2498. rval = QLA_SUCCESS;
  2499. list_for_each_entry(fcport, &pha->fcports, list) {
  2500. if (fcport->vp_idx != ha->vp_idx)
  2501. continue;
  2502. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2503. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2504. fcport->port_type == FCT_BROADCAST)
  2505. continue;
  2506. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2507. if (format != 3 ||
  2508. fcport->port_type != FCT_INITIATOR) {
  2509. qla2x00_mark_device_lost(ha, fcport,
  2510. 0, 0);
  2511. }
  2512. }
  2513. fcport->flags &= ~FCF_FARP_DONE;
  2514. }
  2515. }
  2516. return (rval);
  2517. }
  2518. /*
  2519. * qla2x00_fabric_dev_login
  2520. * Login fabric target device and update FC port database.
  2521. *
  2522. * Input:
  2523. * ha: adapter state pointer.
  2524. * fcport: port structure list pointer.
  2525. * next_loopid: contains value of a new loop ID that can be used
  2526. * by the next login attempt.
  2527. *
  2528. * Returns:
  2529. * qla2x00 local function return status code.
  2530. *
  2531. * Context:
  2532. * Kernel context.
  2533. */
  2534. static int
  2535. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2536. uint16_t *next_loopid)
  2537. {
  2538. int rval;
  2539. int retry;
  2540. uint8_t opts;
  2541. rval = QLA_SUCCESS;
  2542. retry = 0;
  2543. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2544. if (rval == QLA_SUCCESS) {
  2545. /* Send an ADISC to tape devices.*/
  2546. opts = 0;
  2547. if (fcport->flags & FCF_TAPE_PRESENT)
  2548. opts |= BIT_1;
  2549. rval = qla2x00_get_port_database(ha, fcport, opts);
  2550. if (rval != QLA_SUCCESS) {
  2551. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2552. fcport->d_id.b.domain, fcport->d_id.b.area,
  2553. fcport->d_id.b.al_pa);
  2554. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2555. } else {
  2556. qla2x00_update_fcport(ha, fcport);
  2557. }
  2558. }
  2559. return (rval);
  2560. }
  2561. /*
  2562. * qla2x00_fabric_login
  2563. * Issue fabric login command.
  2564. *
  2565. * Input:
  2566. * ha = adapter block pointer.
  2567. * device = pointer to FC device type structure.
  2568. *
  2569. * Returns:
  2570. * 0 - Login successfully
  2571. * 1 - Login failed
  2572. * 2 - Initiator device
  2573. * 3 - Fatal error
  2574. */
  2575. int
  2576. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2577. uint16_t *next_loopid)
  2578. {
  2579. int rval;
  2580. int retry;
  2581. uint16_t tmp_loopid;
  2582. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2583. retry = 0;
  2584. tmp_loopid = 0;
  2585. for (;;) {
  2586. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2587. "for port %02x%02x%02x.\n",
  2588. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2589. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2590. /* Login fcport on switch. */
  2591. ha->isp_ops->fabric_login(ha, fcport->loop_id,
  2592. fcport->d_id.b.domain, fcport->d_id.b.area,
  2593. fcport->d_id.b.al_pa, mb, BIT_0);
  2594. if (mb[0] == MBS_PORT_ID_USED) {
  2595. /*
  2596. * Device has another loop ID. The firmware team
  2597. * recommends the driver perform an implicit login with
  2598. * the specified ID again. The ID we just used is save
  2599. * here so we return with an ID that can be tried by
  2600. * the next login.
  2601. */
  2602. retry++;
  2603. tmp_loopid = fcport->loop_id;
  2604. fcport->loop_id = mb[1];
  2605. DEBUG(printk("Fabric Login: port in use - next "
  2606. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2607. fcport->loop_id, fcport->d_id.b.domain,
  2608. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2609. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2610. /*
  2611. * Login succeeded.
  2612. */
  2613. if (retry) {
  2614. /* A retry occurred before. */
  2615. *next_loopid = tmp_loopid;
  2616. } else {
  2617. /*
  2618. * No retry occurred before. Just increment the
  2619. * ID value for next login.
  2620. */
  2621. *next_loopid = (fcport->loop_id + 1);
  2622. }
  2623. if (mb[1] & BIT_0) {
  2624. fcport->port_type = FCT_INITIATOR;
  2625. } else {
  2626. fcport->port_type = FCT_TARGET;
  2627. if (mb[1] & BIT_1) {
  2628. fcport->flags |= FCF_TAPE_PRESENT;
  2629. }
  2630. }
  2631. if (mb[10] & BIT_0)
  2632. fcport->supported_classes |= FC_COS_CLASS2;
  2633. if (mb[10] & BIT_1)
  2634. fcport->supported_classes |= FC_COS_CLASS3;
  2635. rval = QLA_SUCCESS;
  2636. break;
  2637. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2638. /*
  2639. * Loop ID already used, try next loop ID.
  2640. */
  2641. fcport->loop_id++;
  2642. rval = qla2x00_find_new_loop_id(ha, fcport);
  2643. if (rval != QLA_SUCCESS) {
  2644. /* Ran out of loop IDs to use */
  2645. break;
  2646. }
  2647. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2648. /*
  2649. * Firmware possibly timed out during login. If NO
  2650. * retries are left to do then the device is declared
  2651. * dead.
  2652. */
  2653. *next_loopid = fcport->loop_id;
  2654. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2655. fcport->d_id.b.domain, fcport->d_id.b.area,
  2656. fcport->d_id.b.al_pa);
  2657. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2658. rval = 1;
  2659. break;
  2660. } else {
  2661. /*
  2662. * unrecoverable / not handled error
  2663. */
  2664. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2665. "loop_id=%x jiffies=%lx.\n",
  2666. __func__, ha->host_no, mb[0],
  2667. fcport->d_id.b.domain, fcport->d_id.b.area,
  2668. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2669. *next_loopid = fcport->loop_id;
  2670. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2671. fcport->d_id.b.domain, fcport->d_id.b.area,
  2672. fcport->d_id.b.al_pa);
  2673. fcport->loop_id = FC_NO_LOOP_ID;
  2674. fcport->login_retry = 0;
  2675. rval = 3;
  2676. break;
  2677. }
  2678. }
  2679. return (rval);
  2680. }
  2681. /*
  2682. * qla2x00_local_device_login
  2683. * Issue local device login command.
  2684. *
  2685. * Input:
  2686. * ha = adapter block pointer.
  2687. * loop_id = loop id of device to login to.
  2688. *
  2689. * Returns (Where's the #define!!!!):
  2690. * 0 - Login successfully
  2691. * 1 - Login failed
  2692. * 3 - Fatal error
  2693. */
  2694. int
  2695. qla2x00_local_device_login(scsi_qla_host_t *ha, fc_port_t *fcport)
  2696. {
  2697. int rval;
  2698. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2699. memset(mb, 0, sizeof(mb));
  2700. rval = qla2x00_login_local_device(ha, fcport, mb, BIT_0);
  2701. if (rval == QLA_SUCCESS) {
  2702. /* Interrogate mailbox registers for any errors */
  2703. if (mb[0] == MBS_COMMAND_ERROR)
  2704. rval = 1;
  2705. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2706. /* device not in PCB table */
  2707. rval = 3;
  2708. }
  2709. return (rval);
  2710. }
  2711. /*
  2712. * qla2x00_loop_resync
  2713. * Resync with fibre channel devices.
  2714. *
  2715. * Input:
  2716. * ha = adapter block pointer.
  2717. *
  2718. * Returns:
  2719. * 0 = success
  2720. */
  2721. int
  2722. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2723. {
  2724. int rval;
  2725. uint32_t wait_time;
  2726. rval = QLA_SUCCESS;
  2727. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2728. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2729. if (ha->flags.online) {
  2730. if (!(rval = qla2x00_fw_ready(ha))) {
  2731. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2732. wait_time = 256;
  2733. do {
  2734. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2735. /* Issue a marker after FW becomes ready. */
  2736. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2737. ha->marker_needed = 0;
  2738. /* Remap devices on Loop. */
  2739. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2740. qla2x00_configure_loop(ha);
  2741. wait_time--;
  2742. } while (!atomic_read(&ha->loop_down_timer) &&
  2743. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2744. wait_time &&
  2745. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2746. }
  2747. }
  2748. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2749. return (QLA_FUNCTION_FAILED);
  2750. }
  2751. if (rval) {
  2752. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2753. }
  2754. return (rval);
  2755. }
  2756. void
  2757. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2758. {
  2759. fc_port_t *fcport;
  2760. /* Go with deferred removal of rport references. */
  2761. list_for_each_entry(fcport, &ha->fcports, list)
  2762. if (fcport->drport &&
  2763. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2764. qla2x00_rport_del(fcport);
  2765. }
  2766. /*
  2767. * qla2x00_abort_isp
  2768. * Resets ISP and aborts all outstanding commands.
  2769. *
  2770. * Input:
  2771. * ha = adapter block pointer.
  2772. *
  2773. * Returns:
  2774. * 0 = success
  2775. */
  2776. int
  2777. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2778. {
  2779. int rval;
  2780. uint8_t status = 0;
  2781. if (ha->flags.online) {
  2782. ha->flags.online = 0;
  2783. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2784. ha->qla_stats.total_isp_aborts++;
  2785. qla_printk(KERN_INFO, ha,
  2786. "Performing ISP error recovery - ha= %p.\n", ha);
  2787. ha->isp_ops->reset_chip(ha);
  2788. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2789. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2790. atomic_set(&ha->loop_state, LOOP_DOWN);
  2791. qla2x00_mark_all_devices_lost(ha, 0);
  2792. } else {
  2793. if (!atomic_read(&ha->loop_down_timer))
  2794. atomic_set(&ha->loop_down_timer,
  2795. LOOP_DOWN_TIME);
  2796. }
  2797. /* Requeue all commands in outstanding command list. */
  2798. qla2x00_abort_all_cmds(ha, DID_RESET << 16);
  2799. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  2800. ha->isp_ops->nvram_config(ha);
  2801. if (!qla2x00_restart_isp(ha)) {
  2802. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2803. if (!atomic_read(&ha->loop_down_timer)) {
  2804. /*
  2805. * Issue marker command only when we are going
  2806. * to start the I/O .
  2807. */
  2808. ha->marker_needed = 1;
  2809. }
  2810. ha->flags.online = 1;
  2811. ha->isp_ops->enable_intrs(ha);
  2812. ha->isp_abort_cnt = 0;
  2813. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2814. if (ha->fce) {
  2815. ha->flags.fce_enabled = 1;
  2816. memset(ha->fce, 0,
  2817. fce_calc_size(ha->fce_bufs));
  2818. rval = qla2x00_enable_fce_trace(ha,
  2819. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2820. &ha->fce_bufs);
  2821. if (rval) {
  2822. qla_printk(KERN_WARNING, ha,
  2823. "Unable to reinitialize FCE "
  2824. "(%d).\n", rval);
  2825. ha->flags.fce_enabled = 0;
  2826. }
  2827. }
  2828. if (ha->eft) {
  2829. memset(ha->eft, 0, EFT_SIZE);
  2830. rval = qla2x00_enable_eft_trace(ha,
  2831. ha->eft_dma, EFT_NUM_BUFFERS);
  2832. if (rval) {
  2833. qla_printk(KERN_WARNING, ha,
  2834. "Unable to reinitialize EFT "
  2835. "(%d).\n", rval);
  2836. }
  2837. }
  2838. } else { /* failed the ISP abort */
  2839. ha->flags.online = 1;
  2840. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2841. if (ha->isp_abort_cnt == 0) {
  2842. qla_printk(KERN_WARNING, ha,
  2843. "ISP error recovery failed - "
  2844. "board disabled\n");
  2845. /*
  2846. * The next call disables the board
  2847. * completely.
  2848. */
  2849. ha->isp_ops->reset_adapter(ha);
  2850. ha->flags.online = 0;
  2851. clear_bit(ISP_ABORT_RETRY,
  2852. &ha->dpc_flags);
  2853. status = 0;
  2854. } else { /* schedule another ISP abort */
  2855. ha->isp_abort_cnt--;
  2856. DEBUG(printk("qla%ld: ISP abort - "
  2857. "retry remaining %d\n",
  2858. ha->host_no, ha->isp_abort_cnt));
  2859. status = 1;
  2860. }
  2861. } else {
  2862. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2863. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2864. "- retrying (%d) more times\n",
  2865. ha->host_no, ha->isp_abort_cnt));
  2866. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2867. status = 1;
  2868. }
  2869. }
  2870. }
  2871. if (status) {
  2872. qla_printk(KERN_INFO, ha,
  2873. "qla2x00_abort_isp: **** FAILED ****\n");
  2874. } else {
  2875. DEBUG(printk(KERN_INFO
  2876. "qla2x00_abort_isp(%ld): exiting.\n",
  2877. ha->host_no));
  2878. }
  2879. return(status);
  2880. }
  2881. /*
  2882. * qla2x00_restart_isp
  2883. * restarts the ISP after a reset
  2884. *
  2885. * Input:
  2886. * ha = adapter block pointer.
  2887. *
  2888. * Returns:
  2889. * 0 = success
  2890. */
  2891. static int
  2892. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2893. {
  2894. uint8_t status = 0;
  2895. uint32_t wait_time;
  2896. /* If firmware needs to be loaded */
  2897. if (qla2x00_isp_firmware(ha)) {
  2898. ha->flags.online = 0;
  2899. if (!(status = ha->isp_ops->chip_diag(ha)))
  2900. status = qla2x00_setup_chip(ha);
  2901. }
  2902. if (!status && !(status = qla2x00_init_rings(ha))) {
  2903. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2904. if (!(status = qla2x00_fw_ready(ha))) {
  2905. DEBUG(printk("%s(): Start configure loop, "
  2906. "status = %d\n", __func__, status));
  2907. /* Issue a marker after FW becomes ready. */
  2908. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2909. ha->flags.online = 1;
  2910. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2911. wait_time = 256;
  2912. do {
  2913. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2914. qla2x00_configure_loop(ha);
  2915. wait_time--;
  2916. } while (!atomic_read(&ha->loop_down_timer) &&
  2917. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2918. wait_time &&
  2919. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2920. }
  2921. /* if no cable then assume it's good */
  2922. if ((ha->device_flags & DFLG_NO_CABLE))
  2923. status = 0;
  2924. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2925. __func__,
  2926. status));
  2927. }
  2928. return (status);
  2929. }
  2930. /*
  2931. * qla2x00_reset_adapter
  2932. * Reset adapter.
  2933. *
  2934. * Input:
  2935. * ha = adapter block pointer.
  2936. */
  2937. void
  2938. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2939. {
  2940. unsigned long flags = 0;
  2941. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2942. ha->flags.online = 0;
  2943. ha->isp_ops->disable_intrs(ha);
  2944. spin_lock_irqsave(&ha->hardware_lock, flags);
  2945. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2946. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2947. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2948. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2949. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2950. }
  2951. void
  2952. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2953. {
  2954. unsigned long flags = 0;
  2955. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2956. ha->flags.online = 0;
  2957. ha->isp_ops->disable_intrs(ha);
  2958. spin_lock_irqsave(&ha->hardware_lock, flags);
  2959. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2960. RD_REG_DWORD(&reg->hccr);
  2961. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2962. RD_REG_DWORD(&reg->hccr);
  2963. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2964. }
  2965. /* On sparc systems, obtain port and node WWN from firmware
  2966. * properties.
  2967. */
  2968. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, struct nvram_24xx *nv)
  2969. {
  2970. #ifdef CONFIG_SPARC
  2971. struct pci_dev *pdev = ha->pdev;
  2972. struct device_node *dp = pci_device_to_OF_node(pdev);
  2973. const u8 *val;
  2974. int len;
  2975. val = of_get_property(dp, "port-wwn", &len);
  2976. if (val && len >= WWN_SIZE)
  2977. memcpy(nv->port_name, val, WWN_SIZE);
  2978. val = of_get_property(dp, "node-wwn", &len);
  2979. if (val && len >= WWN_SIZE)
  2980. memcpy(nv->node_name, val, WWN_SIZE);
  2981. #endif
  2982. }
  2983. int
  2984. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2985. {
  2986. int rval;
  2987. struct init_cb_24xx *icb;
  2988. struct nvram_24xx *nv;
  2989. uint32_t *dptr;
  2990. uint8_t *dptr1, *dptr2;
  2991. uint32_t chksum;
  2992. uint16_t cnt;
  2993. rval = QLA_SUCCESS;
  2994. icb = (struct init_cb_24xx *)ha->init_cb;
  2995. nv = ha->nvram;
  2996. /* Determine NVRAM starting address. */
  2997. ha->nvram_size = sizeof(struct nvram_24xx);
  2998. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  2999. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3000. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3001. if (PCI_FUNC(ha->pdev->devfn)) {
  3002. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3003. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3004. }
  3005. /* Get VPD data into cache */
  3006. ha->vpd = ha->nvram + VPD_OFFSET;
  3007. ha->isp_ops->read_nvram(ha, (uint8_t *)ha->vpd,
  3008. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3009. /* Get NVRAM data into cache and calculate checksum. */
  3010. dptr = (uint32_t *)nv;
  3011. ha->isp_ops->read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  3012. ha->nvram_size);
  3013. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3014. chksum += le32_to_cpu(*dptr++);
  3015. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3016. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3017. /* Bad NVRAM data, set defaults parameters. */
  3018. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3019. || nv->id[3] != ' ' ||
  3020. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3021. /* Reset NVRAM data. */
  3022. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3023. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3024. le16_to_cpu(nv->nvram_version));
  3025. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3026. "invalid -- WWPN) defaults.\n");
  3027. /*
  3028. * Set default initialization control block.
  3029. */
  3030. memset(nv, 0, ha->nvram_size);
  3031. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3032. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3033. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3034. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3035. nv->exchange_count = __constant_cpu_to_le16(0);
  3036. nv->hard_address = __constant_cpu_to_le16(124);
  3037. nv->port_name[0] = 0x21;
  3038. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3039. nv->port_name[2] = 0x00;
  3040. nv->port_name[3] = 0xe0;
  3041. nv->port_name[4] = 0x8b;
  3042. nv->port_name[5] = 0x1c;
  3043. nv->port_name[6] = 0x55;
  3044. nv->port_name[7] = 0x86;
  3045. nv->node_name[0] = 0x20;
  3046. nv->node_name[1] = 0x00;
  3047. nv->node_name[2] = 0x00;
  3048. nv->node_name[3] = 0xe0;
  3049. nv->node_name[4] = 0x8b;
  3050. nv->node_name[5] = 0x1c;
  3051. nv->node_name[6] = 0x55;
  3052. nv->node_name[7] = 0x86;
  3053. qla24xx_nvram_wwn_from_ofw(ha, nv);
  3054. nv->login_retry_count = __constant_cpu_to_le16(8);
  3055. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3056. nv->login_timeout = __constant_cpu_to_le16(0);
  3057. nv->firmware_options_1 =
  3058. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3059. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3060. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3061. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3062. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3063. nv->efi_parameters = __constant_cpu_to_le32(0);
  3064. nv->reset_delay = 5;
  3065. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3066. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3067. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3068. rval = 1;
  3069. }
  3070. /* Reset Initialization control block */
  3071. memset(icb, 0, sizeof(struct init_cb_24xx));
  3072. /* Copy 1st segment. */
  3073. dptr1 = (uint8_t *)icb;
  3074. dptr2 = (uint8_t *)&nv->version;
  3075. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3076. while (cnt--)
  3077. *dptr1++ = *dptr2++;
  3078. icb->login_retry_count = nv->login_retry_count;
  3079. icb->link_down_on_nos = nv->link_down_on_nos;
  3080. /* Copy 2nd segment. */
  3081. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3082. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3083. cnt = (uint8_t *)&icb->reserved_3 -
  3084. (uint8_t *)&icb->interrupt_delay_timer;
  3085. while (cnt--)
  3086. *dptr1++ = *dptr2++;
  3087. /*
  3088. * Setup driver NVRAM options.
  3089. */
  3090. qla2x00_set_model_info(ha, nv->model_name, sizeof(nv->model_name),
  3091. "QLA2462");
  3092. /* Use alternate WWN? */
  3093. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3094. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3095. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3096. }
  3097. /* Prepare nodename */
  3098. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3099. /*
  3100. * Firmware will apply the following mask if the nodename was
  3101. * not provided.
  3102. */
  3103. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3104. icb->node_name[0] &= 0xF0;
  3105. }
  3106. /* Set host adapter parameters. */
  3107. ha->flags.disable_risc_code_load = 0;
  3108. ha->flags.enable_lip_reset = 0;
  3109. ha->flags.enable_lip_full_login =
  3110. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3111. ha->flags.enable_target_reset =
  3112. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3113. ha->flags.enable_led_scheme = 0;
  3114. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3115. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3116. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3117. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3118. sizeof(ha->fw_seriallink_options24));
  3119. /* save HBA serial number */
  3120. ha->serial0 = icb->port_name[5];
  3121. ha->serial1 = icb->port_name[6];
  3122. ha->serial2 = icb->port_name[7];
  3123. ha->node_name = icb->node_name;
  3124. ha->port_name = icb->port_name;
  3125. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3126. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3127. /* Set minimum login_timeout to 4 seconds. */
  3128. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3129. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3130. if (le16_to_cpu(nv->login_timeout) < 4)
  3131. nv->login_timeout = __constant_cpu_to_le16(4);
  3132. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3133. icb->login_timeout = nv->login_timeout;
  3134. /* Set minimum RATOV to 100 tenths of a second. */
  3135. ha->r_a_tov = 100;
  3136. ha->loop_reset_delay = nv->reset_delay;
  3137. /* Link Down Timeout = 0:
  3138. *
  3139. * When Port Down timer expires we will start returning
  3140. * I/O's to OS with "DID_NO_CONNECT".
  3141. *
  3142. * Link Down Timeout != 0:
  3143. *
  3144. * The driver waits for the link to come up after link down
  3145. * before returning I/Os to OS with "DID_NO_CONNECT".
  3146. */
  3147. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3148. ha->loop_down_abort_time =
  3149. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3150. } else {
  3151. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3152. ha->loop_down_abort_time =
  3153. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3154. }
  3155. /* Need enough time to try and get the port back. */
  3156. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3157. if (qlport_down_retry)
  3158. ha->port_down_retry_count = qlport_down_retry;
  3159. /* Set login_retry_count */
  3160. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3161. if (ha->port_down_retry_count ==
  3162. le16_to_cpu(nv->port_down_retry_count) &&
  3163. ha->port_down_retry_count > 3)
  3164. ha->login_retry_count = ha->port_down_retry_count;
  3165. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3166. ha->login_retry_count = ha->port_down_retry_count;
  3167. if (ql2xloginretrycount)
  3168. ha->login_retry_count = ql2xloginretrycount;
  3169. /* Enable ZIO. */
  3170. if (!ha->flags.init_done) {
  3171. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3172. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3173. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3174. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3175. }
  3176. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3177. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3178. ha->flags.process_response_queue = 0;
  3179. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3180. ha->zio_mode = QLA_ZIO_MODE_6;
  3181. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3182. "(%d us).\n", ha->host_no, ha->zio_mode,
  3183. ha->zio_timer * 100));
  3184. qla_printk(KERN_INFO, ha,
  3185. "ZIO mode %d enabled; timer delay (%d us).\n",
  3186. ha->zio_mode, ha->zio_timer * 100);
  3187. icb->firmware_options_2 |= cpu_to_le32(
  3188. (uint32_t)ha->zio_mode);
  3189. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3190. ha->flags.process_response_queue = 1;
  3191. }
  3192. if (rval) {
  3193. DEBUG2_3(printk(KERN_WARNING
  3194. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  3195. }
  3196. return (rval);
  3197. }
  3198. static int
  3199. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3200. {
  3201. int rval;
  3202. int segments, fragment;
  3203. uint32_t faddr;
  3204. uint32_t *dcode, dlen;
  3205. uint32_t risc_addr;
  3206. uint32_t risc_size;
  3207. uint32_t i;
  3208. rval = QLA_SUCCESS;
  3209. segments = FA_RISC_CODE_SEGMENTS;
  3210. faddr = FA_RISC_CODE_ADDR;
  3211. dcode = (uint32_t *)ha->request_ring;
  3212. *srisc_addr = 0;
  3213. /* Validate firmware image by checking version. */
  3214. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  3215. for (i = 0; i < 4; i++)
  3216. dcode[i] = be32_to_cpu(dcode[i]);
  3217. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3218. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3219. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3220. dcode[3] == 0)) {
  3221. qla_printk(KERN_WARNING, ha,
  3222. "Unable to verify integrity of flash firmware image!\n");
  3223. qla_printk(KERN_WARNING, ha,
  3224. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3225. dcode[1], dcode[2], dcode[3]);
  3226. return QLA_FUNCTION_FAILED;
  3227. }
  3228. while (segments && rval == QLA_SUCCESS) {
  3229. /* Read segment's load information. */
  3230. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3231. risc_addr = be32_to_cpu(dcode[2]);
  3232. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3233. risc_size = be32_to_cpu(dcode[3]);
  3234. fragment = 0;
  3235. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3236. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3237. if (dlen > risc_size)
  3238. dlen = risc_size;
  3239. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3240. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3241. ha->host_no, risc_addr, dlen, faddr));
  3242. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3243. for (i = 0; i < dlen; i++)
  3244. dcode[i] = swab32(dcode[i]);
  3245. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3246. dlen);
  3247. if (rval) {
  3248. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3249. "segment %d of firmware\n", ha->host_no,
  3250. fragment));
  3251. qla_printk(KERN_WARNING, ha,
  3252. "[ERROR] Failed to load segment %d of "
  3253. "firmware\n", fragment);
  3254. break;
  3255. }
  3256. faddr += dlen;
  3257. risc_addr += dlen;
  3258. risc_size -= dlen;
  3259. fragment++;
  3260. }
  3261. /* Next segment. */
  3262. segments--;
  3263. }
  3264. return rval;
  3265. }
  3266. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3267. int
  3268. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3269. {
  3270. int rval;
  3271. int i, fragment;
  3272. uint16_t *wcode, *fwcode;
  3273. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3274. struct fw_blob *blob;
  3275. /* Load firmware blob. */
  3276. blob = qla2x00_request_firmware(ha);
  3277. if (!blob) {
  3278. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3279. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3280. "from: " QLA_FW_URL ".\n");
  3281. return QLA_FUNCTION_FAILED;
  3282. }
  3283. rval = QLA_SUCCESS;
  3284. wcode = (uint16_t *)ha->request_ring;
  3285. *srisc_addr = 0;
  3286. fwcode = (uint16_t *)blob->fw->data;
  3287. fwclen = 0;
  3288. /* Validate firmware image by checking version. */
  3289. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3290. qla_printk(KERN_WARNING, ha,
  3291. "Unable to verify integrity of firmware image (%Zd)!\n",
  3292. blob->fw->size);
  3293. goto fail_fw_integrity;
  3294. }
  3295. for (i = 0; i < 4; i++)
  3296. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3297. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3298. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3299. wcode[2] == 0 && wcode[3] == 0)) {
  3300. qla_printk(KERN_WARNING, ha,
  3301. "Unable to verify integrity of firmware image!\n");
  3302. qla_printk(KERN_WARNING, ha,
  3303. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3304. wcode[1], wcode[2], wcode[3]);
  3305. goto fail_fw_integrity;
  3306. }
  3307. seg = blob->segs;
  3308. while (*seg && rval == QLA_SUCCESS) {
  3309. risc_addr = *seg;
  3310. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3311. risc_size = be16_to_cpu(fwcode[3]);
  3312. /* Validate firmware image size. */
  3313. fwclen += risc_size * sizeof(uint16_t);
  3314. if (blob->fw->size < fwclen) {
  3315. qla_printk(KERN_WARNING, ha,
  3316. "Unable to verify integrity of firmware image "
  3317. "(%Zd)!\n", blob->fw->size);
  3318. goto fail_fw_integrity;
  3319. }
  3320. fragment = 0;
  3321. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3322. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3323. if (wlen > risc_size)
  3324. wlen = risc_size;
  3325. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3326. "addr %x, number of words 0x%x.\n", ha->host_no,
  3327. risc_addr, wlen));
  3328. for (i = 0; i < wlen; i++)
  3329. wcode[i] = swab16(fwcode[i]);
  3330. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3331. wlen);
  3332. if (rval) {
  3333. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3334. "segment %d of firmware\n", ha->host_no,
  3335. fragment));
  3336. qla_printk(KERN_WARNING, ha,
  3337. "[ERROR] Failed to load segment %d of "
  3338. "firmware\n", fragment);
  3339. break;
  3340. }
  3341. fwcode += wlen;
  3342. risc_addr += wlen;
  3343. risc_size -= wlen;
  3344. fragment++;
  3345. }
  3346. /* Next segment. */
  3347. seg++;
  3348. }
  3349. return rval;
  3350. fail_fw_integrity:
  3351. return QLA_FUNCTION_FAILED;
  3352. }
  3353. int
  3354. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3355. {
  3356. int rval;
  3357. int segments, fragment;
  3358. uint32_t *dcode, dlen;
  3359. uint32_t risc_addr;
  3360. uint32_t risc_size;
  3361. uint32_t i;
  3362. struct fw_blob *blob;
  3363. uint32_t *fwcode, fwclen;
  3364. /* Load firmware blob. */
  3365. blob = qla2x00_request_firmware(ha);
  3366. if (!blob) {
  3367. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3368. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3369. "from: " QLA_FW_URL ".\n");
  3370. /* Try to load RISC code from flash. */
  3371. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3372. "outdated) firmware from flash.\n");
  3373. return qla24xx_load_risc_flash(ha, srisc_addr);
  3374. }
  3375. rval = QLA_SUCCESS;
  3376. segments = FA_RISC_CODE_SEGMENTS;
  3377. dcode = (uint32_t *)ha->request_ring;
  3378. *srisc_addr = 0;
  3379. fwcode = (uint32_t *)blob->fw->data;
  3380. fwclen = 0;
  3381. /* Validate firmware image by checking version. */
  3382. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3383. qla_printk(KERN_WARNING, ha,
  3384. "Unable to verify integrity of firmware image (%Zd)!\n",
  3385. blob->fw->size);
  3386. goto fail_fw_integrity;
  3387. }
  3388. for (i = 0; i < 4; i++)
  3389. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3390. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3391. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3392. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3393. dcode[3] == 0)) {
  3394. qla_printk(KERN_WARNING, ha,
  3395. "Unable to verify integrity of firmware image!\n");
  3396. qla_printk(KERN_WARNING, ha,
  3397. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3398. dcode[1], dcode[2], dcode[3]);
  3399. goto fail_fw_integrity;
  3400. }
  3401. while (segments && rval == QLA_SUCCESS) {
  3402. risc_addr = be32_to_cpu(fwcode[2]);
  3403. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3404. risc_size = be32_to_cpu(fwcode[3]);
  3405. /* Validate firmware image size. */
  3406. fwclen += risc_size * sizeof(uint32_t);
  3407. if (blob->fw->size < fwclen) {
  3408. qla_printk(KERN_WARNING, ha,
  3409. "Unable to verify integrity of firmware image "
  3410. "(%Zd)!\n", blob->fw->size);
  3411. goto fail_fw_integrity;
  3412. }
  3413. fragment = 0;
  3414. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3415. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3416. if (dlen > risc_size)
  3417. dlen = risc_size;
  3418. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3419. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3420. risc_addr, dlen));
  3421. for (i = 0; i < dlen; i++)
  3422. dcode[i] = swab32(fwcode[i]);
  3423. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3424. dlen);
  3425. if (rval) {
  3426. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3427. "segment %d of firmware\n", ha->host_no,
  3428. fragment));
  3429. qla_printk(KERN_WARNING, ha,
  3430. "[ERROR] Failed to load segment %d of "
  3431. "firmware\n", fragment);
  3432. break;
  3433. }
  3434. fwcode += dlen;
  3435. risc_addr += dlen;
  3436. risc_size -= dlen;
  3437. fragment++;
  3438. }
  3439. /* Next segment. */
  3440. segments--;
  3441. }
  3442. return rval;
  3443. fail_fw_integrity:
  3444. return QLA_FUNCTION_FAILED;
  3445. }
  3446. void
  3447. qla2x00_try_to_stop_firmware(scsi_qla_host_t *ha)
  3448. {
  3449. int ret, retries;
  3450. if (!IS_FWI2_CAPABLE(ha))
  3451. return;
  3452. if (!ha->fw_major_version)
  3453. return;
  3454. ret = qla2x00_stop_firmware(ha);
  3455. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3456. retries ; retries--) {
  3457. ha->isp_ops->reset_chip(ha);
  3458. if (ha->isp_ops->chip_diag(ha) != QLA_SUCCESS)
  3459. continue;
  3460. if (qla2x00_setup_chip(ha) != QLA_SUCCESS)
  3461. continue;
  3462. qla_printk(KERN_INFO, ha,
  3463. "Attempting retry of stop-firmware command...\n");
  3464. ret = qla2x00_stop_firmware(ha);
  3465. }
  3466. }
  3467. int
  3468. qla24xx_configure_vhba(scsi_qla_host_t *ha)
  3469. {
  3470. int rval = QLA_SUCCESS;
  3471. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3472. if (!ha->parent)
  3473. return -EINVAL;
  3474. rval = qla2x00_fw_ready(ha->parent);
  3475. if (rval == QLA_SUCCESS) {
  3476. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  3477. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  3478. }
  3479. ha->flags.management_server_logged_in = 0;
  3480. /* Login to SNS first */
  3481. qla24xx_login_fabric(ha->parent, NPH_SNS, 0xff, 0xff, 0xfc,
  3482. mb, BIT_1);
  3483. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3484. DEBUG15(qla_printk(KERN_INFO, ha,
  3485. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3486. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3487. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3488. return (QLA_FUNCTION_FAILED);
  3489. }
  3490. atomic_set(&ha->loop_down_timer, 0);
  3491. atomic_set(&ha->loop_state, LOOP_UP);
  3492. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3493. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3494. rval = qla2x00_loop_resync(ha->parent);
  3495. return rval;
  3496. }
  3497. /* 84XX Support **************************************************************/
  3498. static LIST_HEAD(qla_cs84xx_list);
  3499. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3500. static struct qla_chip_state_84xx *
  3501. qla84xx_get_chip(struct scsi_qla_host *ha)
  3502. {
  3503. struct qla_chip_state_84xx *cs84xx;
  3504. mutex_lock(&qla_cs84xx_mutex);
  3505. /* Find any shared 84xx chip. */
  3506. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3507. if (cs84xx->bus == ha->pdev->bus) {
  3508. kref_get(&cs84xx->kref);
  3509. goto done;
  3510. }
  3511. }
  3512. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3513. if (!cs84xx)
  3514. goto done;
  3515. kref_init(&cs84xx->kref);
  3516. spin_lock_init(&cs84xx->access_lock);
  3517. mutex_init(&cs84xx->fw_update_mutex);
  3518. cs84xx->bus = ha->pdev->bus;
  3519. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3520. done:
  3521. mutex_unlock(&qla_cs84xx_mutex);
  3522. return cs84xx;
  3523. }
  3524. static void
  3525. __qla84xx_chip_release(struct kref *kref)
  3526. {
  3527. struct qla_chip_state_84xx *cs84xx =
  3528. container_of(kref, struct qla_chip_state_84xx, kref);
  3529. mutex_lock(&qla_cs84xx_mutex);
  3530. list_del(&cs84xx->list);
  3531. mutex_unlock(&qla_cs84xx_mutex);
  3532. kfree(cs84xx);
  3533. }
  3534. void
  3535. qla84xx_put_chip(struct scsi_qla_host *ha)
  3536. {
  3537. if (ha->cs84xx)
  3538. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3539. }
  3540. static int
  3541. qla84xx_init_chip(scsi_qla_host_t *ha)
  3542. {
  3543. int rval;
  3544. uint16_t status[2];
  3545. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3546. rval = qla84xx_verify_chip(ha, status);
  3547. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3548. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3549. QLA_SUCCESS;
  3550. }