mxser.c 72 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  18. * - Fixed x86_64 cleanness
  19. */
  20. #include <linux/module.h>
  21. #include <linux/errno.h>
  22. #include <linux/signal.h>
  23. #include <linux/sched.h>
  24. #include <linux/timer.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/tty.h>
  27. #include <linux/tty_flip.h>
  28. #include <linux/serial.h>
  29. #include <linux/serial_reg.h>
  30. #include <linux/major.h>
  31. #include <linux/string.h>
  32. #include <linux/fcntl.h>
  33. #include <linux/ptrace.h>
  34. #include <linux/gfp.h>
  35. #include <linux/ioport.h>
  36. #include <linux/mm.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/bitops.h>
  40. #include <asm/system.h>
  41. #include <asm/io.h>
  42. #include <asm/irq.h>
  43. #include <asm/uaccess.h>
  44. #include "mxser.h"
  45. #define MXSER_VERSION "2.0.4" /* 1.12 */
  46. #define MXSERMAJOR 174
  47. #define MXSER_BOARDS 4 /* Max. boards */
  48. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  49. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  50. #define MXSER_ISR_PASS_LIMIT 100
  51. /*CheckIsMoxaMust return value*/
  52. #define MOXA_OTHER_UART 0x00
  53. #define MOXA_MUST_MU150_HWID 0x01
  54. #define MOXA_MUST_MU860_HWID 0x02
  55. #define WAKEUP_CHARS 256
  56. #define UART_MCR_AFE 0x20
  57. #define UART_LSR_SPECIAL 0x1E
  58. #define PCI_DEVICE_ID_POS104UL 0x1044
  59. #define PCI_DEVICE_ID_CB108 0x1080
  60. #define PCI_DEVICE_ID_CP102UF 0x1023
  61. #define PCI_DEVICE_ID_CB114 0x1142
  62. #define PCI_DEVICE_ID_CP114UL 0x1143
  63. #define PCI_DEVICE_ID_CB134I 0x1341
  64. #define PCI_DEVICE_ID_CP138U 0x1380
  65. #define C168_ASIC_ID 1
  66. #define C104_ASIC_ID 2
  67. #define C102_ASIC_ID 0xB
  68. #define CI132_ASIC_ID 4
  69. #define CI134_ASIC_ID 3
  70. #define CI104J_ASIC_ID 5
  71. #define MXSER_HIGHBAUD 1
  72. #define MXSER_HAS2 2
  73. /* This is only for PCI */
  74. static const struct {
  75. int type;
  76. int tx_fifo;
  77. int rx_fifo;
  78. int xmit_fifo_size;
  79. int rx_high_water;
  80. int rx_trigger;
  81. int rx_low_water;
  82. long max_baud;
  83. } Gpci_uart_info[] = {
  84. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  85. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  86. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  87. };
  88. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  89. struct mxser_cardinfo {
  90. char *name;
  91. unsigned int nports;
  92. unsigned int flags;
  93. };
  94. static const struct mxser_cardinfo mxser_cards[] = {
  95. /* 0*/ { "C168 series", 8, },
  96. { "C104 series", 4, },
  97. { "CI-104J series", 4, },
  98. { "C168H/PCI series", 8, },
  99. { "C104H/PCI series", 4, },
  100. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  101. { "CI-132 series", 4, MXSER_HAS2 },
  102. { "CI-134 series", 4, },
  103. { "CP-132 series", 2, },
  104. { "CP-114 series", 4, },
  105. /*10*/ { "CT-114 series", 4, },
  106. { "CP-102 series", 2, MXSER_HIGHBAUD },
  107. { "CP-104U series", 4, },
  108. { "CP-168U series", 8, },
  109. { "CP-132U series", 2, },
  110. /*15*/ { "CP-134U series", 4, },
  111. { "CP-104JU series", 4, },
  112. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  113. { "CP-118U series", 8, },
  114. { "CP-102UL series", 2, },
  115. /*20*/ { "CP-102U series", 2, },
  116. { "CP-118EL series", 8, },
  117. { "CP-168EL series", 8, },
  118. { "CP-104EL series", 4, },
  119. { "CB-108 series", 8, },
  120. /*25*/ { "CB-114 series", 4, },
  121. { "CB-134I series", 4, },
  122. { "CP-138U series", 8, },
  123. { "POS-104UL series", 4, },
  124. { "CP-114UL series", 4, },
  125. /*30*/ { "CP-102UF series", 2, }
  126. };
  127. /* driver_data correspond to the lines in the structure above
  128. see also ISA probe function before you change something */
  129. static struct pci_device_id mxser_pcibrds[] = {
  130. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  131. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  132. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  155. { }
  156. };
  157. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  158. static unsigned long ioaddr[MXSER_BOARDS];
  159. static int ttymajor = MXSERMAJOR;
  160. /* Variables for insmod */
  161. MODULE_AUTHOR("Casper Yang");
  162. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  163. module_param_array(ioaddr, ulong, NULL, 0);
  164. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  165. module_param(ttymajor, int, 0);
  166. MODULE_LICENSE("GPL");
  167. struct mxser_log {
  168. int tick;
  169. unsigned long rxcnt[MXSER_PORTS];
  170. unsigned long txcnt[MXSER_PORTS];
  171. };
  172. struct mxser_mon {
  173. unsigned long rxcnt;
  174. unsigned long txcnt;
  175. unsigned long up_rxcnt;
  176. unsigned long up_txcnt;
  177. int modem_status;
  178. unsigned char hold_reason;
  179. };
  180. struct mxser_mon_ext {
  181. unsigned long rx_cnt[32];
  182. unsigned long tx_cnt[32];
  183. unsigned long up_rxcnt[32];
  184. unsigned long up_txcnt[32];
  185. int modem_status[32];
  186. long baudrate[32];
  187. int databits[32];
  188. int stopbits[32];
  189. int parity[32];
  190. int flowctrl[32];
  191. int fifo[32];
  192. int iftype[32];
  193. };
  194. struct mxser_board;
  195. struct mxser_port {
  196. struct tty_port port;
  197. struct mxser_board *board;
  198. unsigned long ioaddr;
  199. unsigned long opmode_ioaddr;
  200. int max_baud;
  201. int rx_high_water;
  202. int rx_trigger; /* Rx fifo trigger level */
  203. int rx_low_water;
  204. int baud_base; /* max. speed */
  205. int type; /* UART type */
  206. int x_char; /* xon/xoff character */
  207. int IER; /* Interrupt Enable Register */
  208. int MCR; /* Modem control register */
  209. unsigned char stop_rx;
  210. unsigned char ldisc_stop_rx;
  211. int custom_divisor;
  212. unsigned char err_shadow;
  213. struct async_icount icount; /* kernel counters for 4 input interrupts */
  214. int timeout;
  215. int read_status_mask;
  216. int ignore_status_mask;
  217. int xmit_fifo_size;
  218. int xmit_head;
  219. int xmit_tail;
  220. int xmit_cnt;
  221. struct ktermios normal_termios;
  222. struct mxser_mon mon_data;
  223. spinlock_t slock;
  224. wait_queue_head_t delta_msr_wait;
  225. };
  226. struct mxser_board {
  227. unsigned int idx;
  228. int irq;
  229. const struct mxser_cardinfo *info;
  230. unsigned long vector;
  231. unsigned long vector_mask;
  232. int chip_flag;
  233. int uart_type;
  234. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  235. };
  236. struct mxser_mstatus {
  237. tcflag_t cflag;
  238. int cts;
  239. int dsr;
  240. int ri;
  241. int dcd;
  242. };
  243. static struct mxser_board mxser_boards[MXSER_BOARDS];
  244. static struct tty_driver *mxvar_sdriver;
  245. static struct mxser_log mxvar_log;
  246. static int mxser_set_baud_method[MXSER_PORTS + 1];
  247. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  248. {
  249. u8 oldlcr;
  250. u8 efr;
  251. oldlcr = inb(baseio + UART_LCR);
  252. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  253. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  254. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  255. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  256. outb(oldlcr, baseio + UART_LCR);
  257. }
  258. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  259. {
  260. u8 oldlcr;
  261. u8 efr;
  262. oldlcr = inb(baseio + UART_LCR);
  263. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  264. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  265. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  266. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  267. outb(oldlcr, baseio + UART_LCR);
  268. }
  269. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  270. {
  271. u8 oldlcr;
  272. u8 efr;
  273. oldlcr = inb(baseio + UART_LCR);
  274. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  275. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  276. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  277. efr |= MOXA_MUST_EFR_BANK0;
  278. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  279. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  280. outb(oldlcr, baseio + UART_LCR);
  281. }
  282. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  283. {
  284. u8 oldlcr;
  285. u8 efr;
  286. oldlcr = inb(baseio + UART_LCR);
  287. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  288. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  289. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  290. efr |= MOXA_MUST_EFR_BANK0;
  291. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  292. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  293. outb(oldlcr, baseio + UART_LCR);
  294. }
  295. static void mxser_set_must_fifo_value(struct mxser_port *info)
  296. {
  297. u8 oldlcr;
  298. u8 efr;
  299. oldlcr = inb(info->ioaddr + UART_LCR);
  300. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  301. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  302. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  303. efr |= MOXA_MUST_EFR_BANK1;
  304. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  305. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  306. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  307. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  308. outb(oldlcr, info->ioaddr + UART_LCR);
  309. }
  310. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  311. {
  312. u8 oldlcr;
  313. u8 efr;
  314. oldlcr = inb(baseio + UART_LCR);
  315. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  316. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  317. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  318. efr |= MOXA_MUST_EFR_BANK2;
  319. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  320. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  321. outb(oldlcr, baseio + UART_LCR);
  322. }
  323. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  324. {
  325. u8 oldlcr;
  326. u8 efr;
  327. oldlcr = inb(baseio + UART_LCR);
  328. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  329. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  330. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  331. efr |= MOXA_MUST_EFR_BANK2;
  332. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  333. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  334. outb(oldlcr, baseio + UART_LCR);
  335. }
  336. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  337. {
  338. u8 oldlcr;
  339. u8 efr;
  340. oldlcr = inb(baseio + UART_LCR);
  341. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  342. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  343. efr &= ~MOXA_MUST_EFR_SF_MASK;
  344. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  345. outb(oldlcr, baseio + UART_LCR);
  346. }
  347. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  348. {
  349. u8 oldlcr;
  350. u8 efr;
  351. oldlcr = inb(baseio + UART_LCR);
  352. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  353. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  354. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  355. efr |= MOXA_MUST_EFR_SF_TX1;
  356. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  357. outb(oldlcr, baseio + UART_LCR);
  358. }
  359. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  360. {
  361. u8 oldlcr;
  362. u8 efr;
  363. oldlcr = inb(baseio + UART_LCR);
  364. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  365. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  366. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  367. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  368. outb(oldlcr, baseio + UART_LCR);
  369. }
  370. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  371. {
  372. u8 oldlcr;
  373. u8 efr;
  374. oldlcr = inb(baseio + UART_LCR);
  375. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  376. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  377. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  378. efr |= MOXA_MUST_EFR_SF_RX1;
  379. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  380. outb(oldlcr, baseio + UART_LCR);
  381. }
  382. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  383. {
  384. u8 oldlcr;
  385. u8 efr;
  386. oldlcr = inb(baseio + UART_LCR);
  387. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  388. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  389. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  390. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  391. outb(oldlcr, baseio + UART_LCR);
  392. }
  393. #ifdef CONFIG_PCI
  394. static int __devinit CheckIsMoxaMust(unsigned long io)
  395. {
  396. u8 oldmcr, hwid;
  397. int i;
  398. outb(0, io + UART_LCR);
  399. mxser_disable_must_enchance_mode(io);
  400. oldmcr = inb(io + UART_MCR);
  401. outb(0, io + UART_MCR);
  402. mxser_set_must_xon1_value(io, 0x11);
  403. if ((hwid = inb(io + UART_MCR)) != 0) {
  404. outb(oldmcr, io + UART_MCR);
  405. return MOXA_OTHER_UART;
  406. }
  407. mxser_get_must_hardware_id(io, &hwid);
  408. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  409. if (hwid == Gpci_uart_info[i].type)
  410. return (int)hwid;
  411. }
  412. return MOXA_OTHER_UART;
  413. }
  414. #endif
  415. static void process_txrx_fifo(struct mxser_port *info)
  416. {
  417. int i;
  418. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  419. info->rx_trigger = 1;
  420. info->rx_high_water = 1;
  421. info->rx_low_water = 1;
  422. info->xmit_fifo_size = 1;
  423. } else
  424. for (i = 0; i < UART_INFO_NUM; i++)
  425. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  426. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  427. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  428. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  429. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  430. break;
  431. }
  432. }
  433. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  434. {
  435. static unsigned char mxser_msr[MXSER_PORTS + 1];
  436. unsigned char status = 0;
  437. status = inb(baseaddr + UART_MSR);
  438. mxser_msr[port] &= 0x0F;
  439. mxser_msr[port] |= status;
  440. status = mxser_msr[port];
  441. if (mode)
  442. mxser_msr[port] = 0;
  443. return status;
  444. }
  445. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  446. struct mxser_port *port)
  447. {
  448. DECLARE_WAITQUEUE(wait, current);
  449. int retval;
  450. int do_clocal = 0;
  451. unsigned long flags;
  452. /*
  453. * If non-blocking mode is set, or the port is not enabled,
  454. * then make the check up front and then exit.
  455. */
  456. if ((filp->f_flags & O_NONBLOCK) ||
  457. test_bit(TTY_IO_ERROR, &tty->flags)) {
  458. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  459. return 0;
  460. }
  461. if (tty->termios->c_cflag & CLOCAL)
  462. do_clocal = 1;
  463. /*
  464. * Block waiting for the carrier detect and the line to become
  465. * free (i.e., not in use by the callout). While we are in
  466. * this loop, port->port.count is dropped by one, so that
  467. * mxser_close() knows when to free things. We restore it upon
  468. * exit, either normal or abnormal.
  469. */
  470. retval = 0;
  471. add_wait_queue(&port->port.open_wait, &wait);
  472. spin_lock_irqsave(&port->slock, flags);
  473. if (!tty_hung_up_p(filp))
  474. port->port.count--;
  475. spin_unlock_irqrestore(&port->slock, flags);
  476. port->port.blocked_open++;
  477. while (1) {
  478. spin_lock_irqsave(&port->slock, flags);
  479. outb(inb(port->ioaddr + UART_MCR) |
  480. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  481. spin_unlock_irqrestore(&port->slock, flags);
  482. set_current_state(TASK_INTERRUPTIBLE);
  483. if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
  484. if (port->port.flags & ASYNC_HUP_NOTIFY)
  485. retval = -EAGAIN;
  486. else
  487. retval = -ERESTARTSYS;
  488. break;
  489. }
  490. if (!(port->port.flags & ASYNC_CLOSING) &&
  491. (do_clocal ||
  492. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  493. break;
  494. if (signal_pending(current)) {
  495. retval = -ERESTARTSYS;
  496. break;
  497. }
  498. schedule();
  499. }
  500. set_current_state(TASK_RUNNING);
  501. remove_wait_queue(&port->port.open_wait, &wait);
  502. if (!tty_hung_up_p(filp))
  503. port->port.count++;
  504. port->port.blocked_open--;
  505. if (retval)
  506. return retval;
  507. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  508. return 0;
  509. }
  510. static int mxser_set_baud(struct mxser_port *info, long newspd)
  511. {
  512. int quot = 0, baud;
  513. unsigned char cval;
  514. if (!info->port.tty || !info->port.tty->termios)
  515. return -1;
  516. if (!(info->ioaddr))
  517. return -1;
  518. if (newspd > info->max_baud)
  519. return -1;
  520. if (newspd == 134) {
  521. quot = 2 * info->baud_base / 269;
  522. tty_encode_baud_rate(info->port.tty, 134, 134);
  523. } else if (newspd) {
  524. quot = info->baud_base / newspd;
  525. if (quot == 0)
  526. quot = 1;
  527. baud = info->baud_base/quot;
  528. tty_encode_baud_rate(info->port.tty, baud, baud);
  529. } else {
  530. quot = 0;
  531. }
  532. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  533. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  534. if (quot) {
  535. info->MCR |= UART_MCR_DTR;
  536. outb(info->MCR, info->ioaddr + UART_MCR);
  537. } else {
  538. info->MCR &= ~UART_MCR_DTR;
  539. outb(info->MCR, info->ioaddr + UART_MCR);
  540. return 0;
  541. }
  542. cval = inb(info->ioaddr + UART_LCR);
  543. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  544. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  545. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  546. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  547. #ifdef BOTHER
  548. if (C_BAUD(info->port.tty) == BOTHER) {
  549. quot = info->baud_base % newspd;
  550. quot *= 8;
  551. if (quot % newspd > newspd / 2) {
  552. quot /= newspd;
  553. quot++;
  554. } else
  555. quot /= newspd;
  556. mxser_set_must_enum_value(info->ioaddr, quot);
  557. } else
  558. #endif
  559. mxser_set_must_enum_value(info->ioaddr, 0);
  560. return 0;
  561. }
  562. /*
  563. * This routine is called to set the UART divisor registers to match
  564. * the specified baud rate for a serial port.
  565. */
  566. static int mxser_change_speed(struct mxser_port *info,
  567. struct ktermios *old_termios)
  568. {
  569. unsigned cflag, cval, fcr;
  570. int ret = 0;
  571. unsigned char status;
  572. if (!info->port.tty || !info->port.tty->termios)
  573. return ret;
  574. cflag = info->port.tty->termios->c_cflag;
  575. if (!(info->ioaddr))
  576. return ret;
  577. if (mxser_set_baud_method[info->port.tty->index] == 0)
  578. mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
  579. /* byte size and parity */
  580. switch (cflag & CSIZE) {
  581. case CS5:
  582. cval = 0x00;
  583. break;
  584. case CS6:
  585. cval = 0x01;
  586. break;
  587. case CS7:
  588. cval = 0x02;
  589. break;
  590. case CS8:
  591. cval = 0x03;
  592. break;
  593. default:
  594. cval = 0x00;
  595. break; /* too keep GCC shut... */
  596. }
  597. if (cflag & CSTOPB)
  598. cval |= 0x04;
  599. if (cflag & PARENB)
  600. cval |= UART_LCR_PARITY;
  601. if (!(cflag & PARODD))
  602. cval |= UART_LCR_EPAR;
  603. if (cflag & CMSPAR)
  604. cval |= UART_LCR_SPAR;
  605. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  606. if (info->board->chip_flag) {
  607. fcr = UART_FCR_ENABLE_FIFO;
  608. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  609. mxser_set_must_fifo_value(info);
  610. } else
  611. fcr = 0;
  612. } else {
  613. fcr = UART_FCR_ENABLE_FIFO;
  614. if (info->board->chip_flag) {
  615. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  616. mxser_set_must_fifo_value(info);
  617. } else {
  618. switch (info->rx_trigger) {
  619. case 1:
  620. fcr |= UART_FCR_TRIGGER_1;
  621. break;
  622. case 4:
  623. fcr |= UART_FCR_TRIGGER_4;
  624. break;
  625. case 8:
  626. fcr |= UART_FCR_TRIGGER_8;
  627. break;
  628. default:
  629. fcr |= UART_FCR_TRIGGER_14;
  630. break;
  631. }
  632. }
  633. }
  634. /* CTS flow control flag and modem status interrupts */
  635. info->IER &= ~UART_IER_MSI;
  636. info->MCR &= ~UART_MCR_AFE;
  637. if (cflag & CRTSCTS) {
  638. info->port.flags |= ASYNC_CTS_FLOW;
  639. info->IER |= UART_IER_MSI;
  640. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  641. info->MCR |= UART_MCR_AFE;
  642. } else {
  643. status = inb(info->ioaddr + UART_MSR);
  644. if (info->port.tty->hw_stopped) {
  645. if (status & UART_MSR_CTS) {
  646. info->port.tty->hw_stopped = 0;
  647. if (info->type != PORT_16550A &&
  648. !info->board->chip_flag) {
  649. outb(info->IER & ~UART_IER_THRI,
  650. info->ioaddr +
  651. UART_IER);
  652. info->IER |= UART_IER_THRI;
  653. outb(info->IER, info->ioaddr +
  654. UART_IER);
  655. }
  656. tty_wakeup(info->port.tty);
  657. }
  658. } else {
  659. if (!(status & UART_MSR_CTS)) {
  660. info->port.tty->hw_stopped = 1;
  661. if ((info->type != PORT_16550A) &&
  662. (!info->board->chip_flag)) {
  663. info->IER &= ~UART_IER_THRI;
  664. outb(info->IER, info->ioaddr +
  665. UART_IER);
  666. }
  667. }
  668. }
  669. }
  670. } else {
  671. info->port.flags &= ~ASYNC_CTS_FLOW;
  672. }
  673. outb(info->MCR, info->ioaddr + UART_MCR);
  674. if (cflag & CLOCAL) {
  675. info->port.flags &= ~ASYNC_CHECK_CD;
  676. } else {
  677. info->port.flags |= ASYNC_CHECK_CD;
  678. info->IER |= UART_IER_MSI;
  679. }
  680. outb(info->IER, info->ioaddr + UART_IER);
  681. /*
  682. * Set up parity check flag
  683. */
  684. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  685. if (I_INPCK(info->port.tty))
  686. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  687. if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
  688. info->read_status_mask |= UART_LSR_BI;
  689. info->ignore_status_mask = 0;
  690. if (I_IGNBRK(info->port.tty)) {
  691. info->ignore_status_mask |= UART_LSR_BI;
  692. info->read_status_mask |= UART_LSR_BI;
  693. /*
  694. * If we're ignore parity and break indicators, ignore
  695. * overruns too. (For real raw support).
  696. */
  697. if (I_IGNPAR(info->port.tty)) {
  698. info->ignore_status_mask |=
  699. UART_LSR_OE |
  700. UART_LSR_PE |
  701. UART_LSR_FE;
  702. info->read_status_mask |=
  703. UART_LSR_OE |
  704. UART_LSR_PE |
  705. UART_LSR_FE;
  706. }
  707. }
  708. if (info->board->chip_flag) {
  709. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
  710. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
  711. if (I_IXON(info->port.tty)) {
  712. mxser_enable_must_rx_software_flow_control(
  713. info->ioaddr);
  714. } else {
  715. mxser_disable_must_rx_software_flow_control(
  716. info->ioaddr);
  717. }
  718. if (I_IXOFF(info->port.tty)) {
  719. mxser_enable_must_tx_software_flow_control(
  720. info->ioaddr);
  721. } else {
  722. mxser_disable_must_tx_software_flow_control(
  723. info->ioaddr);
  724. }
  725. }
  726. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  727. outb(cval, info->ioaddr + UART_LCR);
  728. return ret;
  729. }
  730. static void mxser_check_modem_status(struct mxser_port *port, int status)
  731. {
  732. /* update input line counters */
  733. if (status & UART_MSR_TERI)
  734. port->icount.rng++;
  735. if (status & UART_MSR_DDSR)
  736. port->icount.dsr++;
  737. if (status & UART_MSR_DDCD)
  738. port->icount.dcd++;
  739. if (status & UART_MSR_DCTS)
  740. port->icount.cts++;
  741. port->mon_data.modem_status = status;
  742. wake_up_interruptible(&port->delta_msr_wait);
  743. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  744. if (status & UART_MSR_DCD)
  745. wake_up_interruptible(&port->port.open_wait);
  746. }
  747. if (port->port.flags & ASYNC_CTS_FLOW) {
  748. if (port->port.tty->hw_stopped) {
  749. if (status & UART_MSR_CTS) {
  750. port->port.tty->hw_stopped = 0;
  751. if ((port->type != PORT_16550A) &&
  752. (!port->board->chip_flag)) {
  753. outb(port->IER & ~UART_IER_THRI,
  754. port->ioaddr + UART_IER);
  755. port->IER |= UART_IER_THRI;
  756. outb(port->IER, port->ioaddr +
  757. UART_IER);
  758. }
  759. tty_wakeup(port->port.tty);
  760. }
  761. } else {
  762. if (!(status & UART_MSR_CTS)) {
  763. port->port.tty->hw_stopped = 1;
  764. if (port->type != PORT_16550A &&
  765. !port->board->chip_flag) {
  766. port->IER &= ~UART_IER_THRI;
  767. outb(port->IER, port->ioaddr +
  768. UART_IER);
  769. }
  770. }
  771. }
  772. }
  773. }
  774. static int mxser_startup(struct mxser_port *info)
  775. {
  776. unsigned long page;
  777. unsigned long flags;
  778. page = __get_free_page(GFP_KERNEL);
  779. if (!page)
  780. return -ENOMEM;
  781. spin_lock_irqsave(&info->slock, flags);
  782. if (info->port.flags & ASYNC_INITIALIZED) {
  783. free_page(page);
  784. spin_unlock_irqrestore(&info->slock, flags);
  785. return 0;
  786. }
  787. if (!info->ioaddr || !info->type) {
  788. if (info->port.tty)
  789. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  790. free_page(page);
  791. spin_unlock_irqrestore(&info->slock, flags);
  792. return 0;
  793. }
  794. if (info->port.xmit_buf)
  795. free_page(page);
  796. else
  797. info->port.xmit_buf = (unsigned char *) page;
  798. /*
  799. * Clear the FIFO buffers and disable them
  800. * (they will be reenabled in mxser_change_speed())
  801. */
  802. if (info->board->chip_flag)
  803. outb((UART_FCR_CLEAR_RCVR |
  804. UART_FCR_CLEAR_XMIT |
  805. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  806. else
  807. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  808. info->ioaddr + UART_FCR);
  809. /*
  810. * At this point there's no way the LSR could still be 0xFF;
  811. * if it is, then bail out, because there's likely no UART
  812. * here.
  813. */
  814. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  815. spin_unlock_irqrestore(&info->slock, flags);
  816. if (capable(CAP_SYS_ADMIN)) {
  817. if (info->port.tty)
  818. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  819. return 0;
  820. } else
  821. return -ENODEV;
  822. }
  823. /*
  824. * Clear the interrupt registers.
  825. */
  826. (void) inb(info->ioaddr + UART_LSR);
  827. (void) inb(info->ioaddr + UART_RX);
  828. (void) inb(info->ioaddr + UART_IIR);
  829. (void) inb(info->ioaddr + UART_MSR);
  830. /*
  831. * Now, initialize the UART
  832. */
  833. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  834. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  835. outb(info->MCR, info->ioaddr + UART_MCR);
  836. /*
  837. * Finally, enable interrupts
  838. */
  839. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  840. if (info->board->chip_flag)
  841. info->IER |= MOXA_MUST_IER_EGDAI;
  842. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  843. /*
  844. * And clear the interrupt registers again for luck.
  845. */
  846. (void) inb(info->ioaddr + UART_LSR);
  847. (void) inb(info->ioaddr + UART_RX);
  848. (void) inb(info->ioaddr + UART_IIR);
  849. (void) inb(info->ioaddr + UART_MSR);
  850. if (info->port.tty)
  851. clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
  852. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  853. /*
  854. * and set the speed of the serial port
  855. */
  856. mxser_change_speed(info, NULL);
  857. info->port.flags |= ASYNC_INITIALIZED;
  858. spin_unlock_irqrestore(&info->slock, flags);
  859. return 0;
  860. }
  861. /*
  862. * This routine will shutdown a serial port; interrupts maybe disabled, and
  863. * DTR is dropped if the hangup on close termio flag is on.
  864. */
  865. static void mxser_shutdown(struct mxser_port *info)
  866. {
  867. unsigned long flags;
  868. if (!(info->port.flags & ASYNC_INITIALIZED))
  869. return;
  870. spin_lock_irqsave(&info->slock, flags);
  871. /*
  872. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  873. * here so the queue might never be waken up
  874. */
  875. wake_up_interruptible(&info->delta_msr_wait);
  876. /*
  877. * Free the IRQ, if necessary
  878. */
  879. if (info->port.xmit_buf) {
  880. free_page((unsigned long) info->port.xmit_buf);
  881. info->port.xmit_buf = NULL;
  882. }
  883. info->IER = 0;
  884. outb(0x00, info->ioaddr + UART_IER);
  885. if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
  886. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  887. outb(info->MCR, info->ioaddr + UART_MCR);
  888. /* clear Rx/Tx FIFO's */
  889. if (info->board->chip_flag)
  890. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  891. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  892. info->ioaddr + UART_FCR);
  893. else
  894. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  895. info->ioaddr + UART_FCR);
  896. /* read data port to reset things */
  897. (void) inb(info->ioaddr + UART_RX);
  898. if (info->port.tty)
  899. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  900. info->port.flags &= ~ASYNC_INITIALIZED;
  901. if (info->board->chip_flag)
  902. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  903. spin_unlock_irqrestore(&info->slock, flags);
  904. }
  905. /*
  906. * This routine is called whenever a serial port is opened. It
  907. * enables interrupts for a serial port, linking in its async structure into
  908. * the IRQ chain. It also performs the serial-specific
  909. * initialization for the tty structure.
  910. */
  911. static int mxser_open(struct tty_struct *tty, struct file *filp)
  912. {
  913. struct mxser_port *info;
  914. unsigned long flags;
  915. int retval, line;
  916. line = tty->index;
  917. if (line == MXSER_PORTS)
  918. return 0;
  919. if (line < 0 || line > MXSER_PORTS)
  920. return -ENODEV;
  921. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  922. if (!info->ioaddr)
  923. return -ENODEV;
  924. tty->driver_data = info;
  925. info->port.tty = tty;
  926. /*
  927. * Start up serial port
  928. */
  929. spin_lock_irqsave(&info->slock, flags);
  930. info->port.count++;
  931. spin_unlock_irqrestore(&info->slock, flags);
  932. retval = mxser_startup(info);
  933. if (retval)
  934. return retval;
  935. retval = mxser_block_til_ready(tty, filp, info);
  936. if (retval)
  937. return retval;
  938. /* unmark here for very high baud rate (ex. 921600 bps) used */
  939. tty->low_latency = 1;
  940. return 0;
  941. }
  942. static void mxser_flush_buffer(struct tty_struct *tty)
  943. {
  944. struct mxser_port *info = tty->driver_data;
  945. char fcr;
  946. unsigned long flags;
  947. spin_lock_irqsave(&info->slock, flags);
  948. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  949. fcr = inb(info->ioaddr + UART_FCR);
  950. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  951. info->ioaddr + UART_FCR);
  952. outb(fcr, info->ioaddr + UART_FCR);
  953. spin_unlock_irqrestore(&info->slock, flags);
  954. tty_wakeup(tty);
  955. }
  956. /*
  957. * This routine is called when the serial port gets closed. First, we
  958. * wait for the last remaining data to be sent. Then, we unlink its
  959. * async structure from the interrupt chain if necessary, and we free
  960. * that IRQ if nothing is left in the chain.
  961. */
  962. static void mxser_close(struct tty_struct *tty, struct file *filp)
  963. {
  964. struct mxser_port *info = tty->driver_data;
  965. unsigned long timeout;
  966. unsigned long flags;
  967. if (tty->index == MXSER_PORTS)
  968. return;
  969. if (!info)
  970. return;
  971. spin_lock_irqsave(&info->slock, flags);
  972. if (tty_hung_up_p(filp)) {
  973. spin_unlock_irqrestore(&info->slock, flags);
  974. return;
  975. }
  976. if ((tty->count == 1) && (info->port.count != 1)) {
  977. /*
  978. * Uh, oh. tty->count is 1, which means that the tty
  979. * structure will be freed. Info->port.count should always
  980. * be one in these conditions. If it's greater than
  981. * one, we've got real problems, since it means the
  982. * serial port won't be shutdown.
  983. */
  984. printk(KERN_ERR "mxser_close: bad serial port count; "
  985. "tty->count is 1, info->port.count is %d\n", info->port.count);
  986. info->port.count = 1;
  987. }
  988. if (--info->port.count < 0) {
  989. printk(KERN_ERR "mxser_close: bad serial port count for "
  990. "ttys%d: %d\n", tty->index, info->port.count);
  991. info->port.count = 0;
  992. }
  993. if (info->port.count) {
  994. spin_unlock_irqrestore(&info->slock, flags);
  995. return;
  996. }
  997. info->port.flags |= ASYNC_CLOSING;
  998. spin_unlock_irqrestore(&info->slock, flags);
  999. /*
  1000. * Save the termios structure, since this port may have
  1001. * separate termios for callout and dialin.
  1002. */
  1003. if (info->port.flags & ASYNC_NORMAL_ACTIVE)
  1004. info->normal_termios = *tty->termios;
  1005. /*
  1006. * Now we wait for the transmit buffer to clear; and we notify
  1007. * the line discipline to only process XON/XOFF characters.
  1008. */
  1009. tty->closing = 1;
  1010. if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1011. tty_wait_until_sent(tty, info->port.closing_wait);
  1012. /*
  1013. * At this point we stop accepting input. To do this, we
  1014. * disable the receive line status interrupts, and tell the
  1015. * interrupt driver to stop checking the data ready bit in the
  1016. * line status register.
  1017. */
  1018. info->IER &= ~UART_IER_RLSI;
  1019. if (info->board->chip_flag)
  1020. info->IER &= ~MOXA_MUST_RECV_ISR;
  1021. if (info->port.flags & ASYNC_INITIALIZED) {
  1022. outb(info->IER, info->ioaddr + UART_IER);
  1023. /*
  1024. * Before we drop DTR, make sure the UART transmitter
  1025. * has completely drained; this is especially
  1026. * important if there is a transmit FIFO!
  1027. */
  1028. timeout = jiffies + HZ;
  1029. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  1030. schedule_timeout_interruptible(5);
  1031. if (time_after(jiffies, timeout))
  1032. break;
  1033. }
  1034. }
  1035. mxser_shutdown(info);
  1036. mxser_flush_buffer(tty);
  1037. tty_ldisc_flush(tty);
  1038. tty->closing = 0;
  1039. info->port.tty = NULL;
  1040. if (info->port.blocked_open) {
  1041. if (info->port.close_delay)
  1042. schedule_timeout_interruptible(info->port.close_delay);
  1043. wake_up_interruptible(&info->port.open_wait);
  1044. }
  1045. info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  1046. }
  1047. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  1048. {
  1049. int c, total = 0;
  1050. struct mxser_port *info = tty->driver_data;
  1051. unsigned long flags;
  1052. if (!info->port.xmit_buf)
  1053. return 0;
  1054. while (1) {
  1055. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1056. SERIAL_XMIT_SIZE - info->xmit_head));
  1057. if (c <= 0)
  1058. break;
  1059. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  1060. spin_lock_irqsave(&info->slock, flags);
  1061. info->xmit_head = (info->xmit_head + c) &
  1062. (SERIAL_XMIT_SIZE - 1);
  1063. info->xmit_cnt += c;
  1064. spin_unlock_irqrestore(&info->slock, flags);
  1065. buf += c;
  1066. count -= c;
  1067. total += c;
  1068. }
  1069. if (info->xmit_cnt && !tty->stopped) {
  1070. if (!tty->hw_stopped ||
  1071. (info->type == PORT_16550A) ||
  1072. (info->board->chip_flag)) {
  1073. spin_lock_irqsave(&info->slock, flags);
  1074. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  1075. UART_IER);
  1076. info->IER |= UART_IER_THRI;
  1077. outb(info->IER, info->ioaddr + UART_IER);
  1078. spin_unlock_irqrestore(&info->slock, flags);
  1079. }
  1080. }
  1081. return total;
  1082. }
  1083. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1084. {
  1085. struct mxser_port *info = tty->driver_data;
  1086. unsigned long flags;
  1087. if (!info->port.xmit_buf)
  1088. return 0;
  1089. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1090. return 0;
  1091. spin_lock_irqsave(&info->slock, flags);
  1092. info->port.xmit_buf[info->xmit_head++] = ch;
  1093. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1094. info->xmit_cnt++;
  1095. spin_unlock_irqrestore(&info->slock, flags);
  1096. if (!tty->stopped) {
  1097. if (!tty->hw_stopped ||
  1098. (info->type == PORT_16550A) ||
  1099. info->board->chip_flag) {
  1100. spin_lock_irqsave(&info->slock, flags);
  1101. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1102. info->IER |= UART_IER_THRI;
  1103. outb(info->IER, info->ioaddr + UART_IER);
  1104. spin_unlock_irqrestore(&info->slock, flags);
  1105. }
  1106. }
  1107. return 1;
  1108. }
  1109. static void mxser_flush_chars(struct tty_struct *tty)
  1110. {
  1111. struct mxser_port *info = tty->driver_data;
  1112. unsigned long flags;
  1113. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  1114. (tty->hw_stopped && info->type != PORT_16550A &&
  1115. !info->board->chip_flag))
  1116. return;
  1117. spin_lock_irqsave(&info->slock, flags);
  1118. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1119. info->IER |= UART_IER_THRI;
  1120. outb(info->IER, info->ioaddr + UART_IER);
  1121. spin_unlock_irqrestore(&info->slock, flags);
  1122. }
  1123. static int mxser_write_room(struct tty_struct *tty)
  1124. {
  1125. struct mxser_port *info = tty->driver_data;
  1126. int ret;
  1127. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1128. return ret < 0 ? 0 : ret;
  1129. }
  1130. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1131. {
  1132. struct mxser_port *info = tty->driver_data;
  1133. return info->xmit_cnt;
  1134. }
  1135. /*
  1136. * ------------------------------------------------------------
  1137. * friends of mxser_ioctl()
  1138. * ------------------------------------------------------------
  1139. */
  1140. static int mxser_get_serial_info(struct mxser_port *info,
  1141. struct serial_struct __user *retinfo)
  1142. {
  1143. struct serial_struct tmp = {
  1144. .type = info->type,
  1145. .line = info->port.tty->index,
  1146. .port = info->ioaddr,
  1147. .irq = info->board->irq,
  1148. .flags = info->port.flags,
  1149. .baud_base = info->baud_base,
  1150. .close_delay = info->port.close_delay,
  1151. .closing_wait = info->port.closing_wait,
  1152. .custom_divisor = info->custom_divisor,
  1153. .hub6 = 0
  1154. };
  1155. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1156. return -EFAULT;
  1157. return 0;
  1158. }
  1159. static int mxser_set_serial_info(struct mxser_port *info,
  1160. struct serial_struct __user *new_info)
  1161. {
  1162. struct serial_struct new_serial;
  1163. speed_t baud;
  1164. unsigned long sl_flags;
  1165. unsigned int flags;
  1166. int retval = 0;
  1167. if (!new_info || !info->ioaddr)
  1168. return -ENODEV;
  1169. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1170. return -EFAULT;
  1171. if (new_serial.irq != info->board->irq ||
  1172. new_serial.port != info->ioaddr)
  1173. return -EINVAL;
  1174. flags = info->port.flags & ASYNC_SPD_MASK;
  1175. if (!capable(CAP_SYS_ADMIN)) {
  1176. if ((new_serial.baud_base != info->baud_base) ||
  1177. (new_serial.close_delay != info->port.close_delay) ||
  1178. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1179. return -EPERM;
  1180. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1181. (new_serial.flags & ASYNC_USR_MASK));
  1182. } else {
  1183. /*
  1184. * OK, past this point, all the error checking has been done.
  1185. * At this point, we start making changes.....
  1186. */
  1187. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1188. (new_serial.flags & ASYNC_FLAGS));
  1189. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1190. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1191. info->port.tty->low_latency =
  1192. (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1193. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1194. (new_serial.baud_base != info->baud_base ||
  1195. new_serial.custom_divisor !=
  1196. info->custom_divisor)) {
  1197. baud = new_serial.baud_base / new_serial.custom_divisor;
  1198. tty_encode_baud_rate(info->port.tty, baud, baud);
  1199. }
  1200. }
  1201. info->type = new_serial.type;
  1202. process_txrx_fifo(info);
  1203. if (info->port.flags & ASYNC_INITIALIZED) {
  1204. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1205. spin_lock_irqsave(&info->slock, sl_flags);
  1206. mxser_change_speed(info, NULL);
  1207. spin_unlock_irqrestore(&info->slock, sl_flags);
  1208. }
  1209. } else
  1210. retval = mxser_startup(info);
  1211. return retval;
  1212. }
  1213. /*
  1214. * mxser_get_lsr_info - get line status register info
  1215. *
  1216. * Purpose: Let user call ioctl() to get info when the UART physically
  1217. * is emptied. On bus types like RS485, the transmitter must
  1218. * release the bus after transmitting. This must be done when
  1219. * the transmit shift register is empty, not be done when the
  1220. * transmit holding register is empty. This functionality
  1221. * allows an RS485 driver to be written in user space.
  1222. */
  1223. static int mxser_get_lsr_info(struct mxser_port *info,
  1224. unsigned int __user *value)
  1225. {
  1226. unsigned char status;
  1227. unsigned int result;
  1228. unsigned long flags;
  1229. spin_lock_irqsave(&info->slock, flags);
  1230. status = inb(info->ioaddr + UART_LSR);
  1231. spin_unlock_irqrestore(&info->slock, flags);
  1232. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1233. return put_user(result, value);
  1234. }
  1235. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1236. {
  1237. struct mxser_port *info = tty->driver_data;
  1238. unsigned char control, status;
  1239. unsigned long flags;
  1240. if (tty->index == MXSER_PORTS)
  1241. return -ENOIOCTLCMD;
  1242. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1243. return -EIO;
  1244. control = info->MCR;
  1245. spin_lock_irqsave(&info->slock, flags);
  1246. status = inb(info->ioaddr + UART_MSR);
  1247. if (status & UART_MSR_ANY_DELTA)
  1248. mxser_check_modem_status(info, status);
  1249. spin_unlock_irqrestore(&info->slock, flags);
  1250. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1251. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1252. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1253. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1254. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1255. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1256. }
  1257. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1258. unsigned int set, unsigned int clear)
  1259. {
  1260. struct mxser_port *info = tty->driver_data;
  1261. unsigned long flags;
  1262. if (tty->index == MXSER_PORTS)
  1263. return -ENOIOCTLCMD;
  1264. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1265. return -EIO;
  1266. spin_lock_irqsave(&info->slock, flags);
  1267. if (set & TIOCM_RTS)
  1268. info->MCR |= UART_MCR_RTS;
  1269. if (set & TIOCM_DTR)
  1270. info->MCR |= UART_MCR_DTR;
  1271. if (clear & TIOCM_RTS)
  1272. info->MCR &= ~UART_MCR_RTS;
  1273. if (clear & TIOCM_DTR)
  1274. info->MCR &= ~UART_MCR_DTR;
  1275. outb(info->MCR, info->ioaddr + UART_MCR);
  1276. spin_unlock_irqrestore(&info->slock, flags);
  1277. return 0;
  1278. }
  1279. static int __init mxser_program_mode(int port)
  1280. {
  1281. int id, i, j, n;
  1282. outb(0, port);
  1283. outb(0, port);
  1284. outb(0, port);
  1285. (void)inb(port);
  1286. (void)inb(port);
  1287. outb(0, port);
  1288. (void)inb(port);
  1289. id = inb(port + 1) & 0x1F;
  1290. if ((id != C168_ASIC_ID) &&
  1291. (id != C104_ASIC_ID) &&
  1292. (id != C102_ASIC_ID) &&
  1293. (id != CI132_ASIC_ID) &&
  1294. (id != CI134_ASIC_ID) &&
  1295. (id != CI104J_ASIC_ID))
  1296. return -1;
  1297. for (i = 0, j = 0; i < 4; i++) {
  1298. n = inb(port + 2);
  1299. if (n == 'M') {
  1300. j = 1;
  1301. } else if ((j == 1) && (n == 1)) {
  1302. j = 2;
  1303. break;
  1304. } else
  1305. j = 0;
  1306. }
  1307. if (j != 2)
  1308. id = -2;
  1309. return id;
  1310. }
  1311. static void __init mxser_normal_mode(int port)
  1312. {
  1313. int i, n;
  1314. outb(0xA5, port + 1);
  1315. outb(0x80, port + 3);
  1316. outb(12, port + 0); /* 9600 bps */
  1317. outb(0, port + 1);
  1318. outb(0x03, port + 3); /* 8 data bits */
  1319. outb(0x13, port + 4); /* loop back mode */
  1320. for (i = 0; i < 16; i++) {
  1321. n = inb(port + 5);
  1322. if ((n & 0x61) == 0x60)
  1323. break;
  1324. if ((n & 1) == 1)
  1325. (void)inb(port);
  1326. }
  1327. outb(0x00, port + 4);
  1328. }
  1329. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1330. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1331. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1332. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1333. #define EN_CCMD 0x000 /* Chip's command register */
  1334. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1335. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1336. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1337. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1338. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1339. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1340. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1341. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1342. static int __init mxser_read_register(int port, unsigned short *regs)
  1343. {
  1344. int i, k, value, id;
  1345. unsigned int j;
  1346. id = mxser_program_mode(port);
  1347. if (id < 0)
  1348. return id;
  1349. for (i = 0; i < 14; i++) {
  1350. k = (i & 0x3F) | 0x180;
  1351. for (j = 0x100; j > 0; j >>= 1) {
  1352. outb(CHIP_CS, port);
  1353. if (k & j) {
  1354. outb(CHIP_CS | CHIP_DO, port);
  1355. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1356. } else {
  1357. outb(CHIP_CS, port);
  1358. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1359. }
  1360. }
  1361. (void)inb(port);
  1362. value = 0;
  1363. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1364. outb(CHIP_CS, port);
  1365. outb(CHIP_CS | CHIP_SK, port);
  1366. if (inb(port) & CHIP_DI)
  1367. value |= j;
  1368. }
  1369. regs[i] = value;
  1370. outb(0, port);
  1371. }
  1372. mxser_normal_mode(port);
  1373. return id;
  1374. }
  1375. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1376. {
  1377. struct mxser_port *port;
  1378. int result, status;
  1379. unsigned int i, j;
  1380. int ret = 0;
  1381. switch (cmd) {
  1382. case MOXA_GET_MAJOR:
  1383. printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl %x, fix "
  1384. "your userspace\n", current->comm, cmd);
  1385. return put_user(ttymajor, (int __user *)argp);
  1386. case MOXA_CHKPORTENABLE:
  1387. result = 0;
  1388. lock_kernel();
  1389. for (i = 0; i < MXSER_BOARDS; i++)
  1390. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1391. if (mxser_boards[i].ports[j].ioaddr)
  1392. result |= (1 << i);
  1393. unlock_kernel();
  1394. return put_user(result, (unsigned long __user *)argp);
  1395. case MOXA_GETDATACOUNT:
  1396. lock_kernel();
  1397. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1398. ret = -EFAULT;
  1399. unlock_kernel();
  1400. return ret;
  1401. case MOXA_GETMSTATUS: {
  1402. struct mxser_mstatus ms, __user *msu = argp;
  1403. lock_kernel();
  1404. for (i = 0; i < MXSER_BOARDS; i++)
  1405. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1406. port = &mxser_boards[i].ports[j];
  1407. memset(&ms, 0, sizeof(ms));
  1408. if (!port->ioaddr)
  1409. goto copy;
  1410. if (!port->port.tty || !port->port.tty->termios)
  1411. ms.cflag = port->normal_termios.c_cflag;
  1412. else
  1413. ms.cflag = port->port.tty->termios->c_cflag;
  1414. status = inb(port->ioaddr + UART_MSR);
  1415. if (status & UART_MSR_DCD)
  1416. ms.dcd = 1;
  1417. if (status & UART_MSR_DSR)
  1418. ms.dsr = 1;
  1419. if (status & UART_MSR_CTS)
  1420. ms.cts = 1;
  1421. copy:
  1422. if (copy_to_user(msu, &ms, sizeof(ms))) {
  1423. unlock_kernel();
  1424. return -EFAULT;
  1425. }
  1426. msu++;
  1427. }
  1428. unlock_kernel();
  1429. return 0;
  1430. }
  1431. case MOXA_ASPP_MON_EXT: {
  1432. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1433. unsigned int cflag, iflag, p;
  1434. u8 opmode;
  1435. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1436. if (!me)
  1437. return -ENOMEM;
  1438. lock_kernel();
  1439. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1440. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1441. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1442. i = MXSER_BOARDS;
  1443. break;
  1444. }
  1445. port = &mxser_boards[i].ports[j];
  1446. if (!port->ioaddr)
  1447. continue;
  1448. status = mxser_get_msr(port->ioaddr, 0, p);
  1449. if (status & UART_MSR_TERI)
  1450. port->icount.rng++;
  1451. if (status & UART_MSR_DDSR)
  1452. port->icount.dsr++;
  1453. if (status & UART_MSR_DDCD)
  1454. port->icount.dcd++;
  1455. if (status & UART_MSR_DCTS)
  1456. port->icount.cts++;
  1457. port->mon_data.modem_status = status;
  1458. me->rx_cnt[p] = port->mon_data.rxcnt;
  1459. me->tx_cnt[p] = port->mon_data.txcnt;
  1460. me->up_rxcnt[p] = port->mon_data.up_rxcnt;
  1461. me->up_txcnt[p] = port->mon_data.up_txcnt;
  1462. me->modem_status[p] =
  1463. port->mon_data.modem_status;
  1464. me->baudrate[p] = tty_get_baud_rate(port->port.tty);
  1465. if (!port->port.tty || !port->port.tty->termios) {
  1466. cflag = port->normal_termios.c_cflag;
  1467. iflag = port->normal_termios.c_iflag;
  1468. } else {
  1469. cflag = port->port.tty->termios->c_cflag;
  1470. iflag = port->port.tty->termios->c_iflag;
  1471. }
  1472. me->databits[p] = cflag & CSIZE;
  1473. me->stopbits[p] = cflag & CSTOPB;
  1474. me->parity[p] = cflag & (PARENB | PARODD |
  1475. CMSPAR);
  1476. if (cflag & CRTSCTS)
  1477. me->flowctrl[p] |= 0x03;
  1478. if (iflag & (IXON | IXOFF))
  1479. me->flowctrl[p] |= 0x0C;
  1480. if (port->type == PORT_16550A)
  1481. me->fifo[p] = 1;
  1482. opmode = inb(port->opmode_ioaddr) >>
  1483. ((p % 4) * 2);
  1484. opmode &= OP_MODE_MASK;
  1485. me->iftype[p] = opmode;
  1486. }
  1487. }
  1488. unlock_kernel();
  1489. if (copy_to_user(argp, me, sizeof(*me)))
  1490. ret = -EFAULT;
  1491. kfree(me);
  1492. return ret;
  1493. }
  1494. default:
  1495. return -ENOIOCTLCMD;
  1496. }
  1497. return 0;
  1498. }
  1499. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1500. struct async_icount *cprev)
  1501. {
  1502. struct async_icount cnow;
  1503. unsigned long flags;
  1504. int ret;
  1505. spin_lock_irqsave(&info->slock, flags);
  1506. cnow = info->icount; /* atomic copy */
  1507. spin_unlock_irqrestore(&info->slock, flags);
  1508. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1509. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1510. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1511. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1512. *cprev = cnow;
  1513. return ret;
  1514. }
  1515. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1516. unsigned int cmd, unsigned long arg)
  1517. {
  1518. struct mxser_port *info = tty->driver_data;
  1519. struct async_icount cnow;
  1520. unsigned long flags;
  1521. void __user *argp = (void __user *)arg;
  1522. int retval;
  1523. if (tty->index == MXSER_PORTS)
  1524. return mxser_ioctl_special(cmd, argp);
  1525. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1526. int p;
  1527. unsigned long opmode;
  1528. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1529. int shiftbit;
  1530. unsigned char val, mask;
  1531. p = tty->index % 4;
  1532. if (cmd == MOXA_SET_OP_MODE) {
  1533. if (get_user(opmode, (int __user *) argp))
  1534. return -EFAULT;
  1535. if (opmode != RS232_MODE &&
  1536. opmode != RS485_2WIRE_MODE &&
  1537. opmode != RS422_MODE &&
  1538. opmode != RS485_4WIRE_MODE)
  1539. return -EFAULT;
  1540. lock_kernel();
  1541. mask = ModeMask[p];
  1542. shiftbit = p * 2;
  1543. val = inb(info->opmode_ioaddr);
  1544. val &= mask;
  1545. val |= (opmode << shiftbit);
  1546. outb(val, info->opmode_ioaddr);
  1547. unlock_kernel();
  1548. } else {
  1549. lock_kernel();
  1550. shiftbit = p * 2;
  1551. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1552. opmode &= OP_MODE_MASK;
  1553. unlock_kernel();
  1554. if (put_user(opmode, (int __user *)argp))
  1555. return -EFAULT;
  1556. }
  1557. return 0;
  1558. }
  1559. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1560. test_bit(TTY_IO_ERROR, &tty->flags))
  1561. return -EIO;
  1562. switch (cmd) {
  1563. case TIOCGSERIAL:
  1564. lock_kernel();
  1565. retval = mxser_get_serial_info(info, argp);
  1566. unlock_kernel();
  1567. return retval;
  1568. case TIOCSSERIAL:
  1569. lock_kernel();
  1570. retval = mxser_set_serial_info(info, argp);
  1571. unlock_kernel();
  1572. return retval;
  1573. case TIOCSERGETLSR: /* Get line status register */
  1574. return mxser_get_lsr_info(info, argp);
  1575. /*
  1576. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1577. * - mask passed in arg for lines of interest
  1578. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1579. * Caller should use TIOCGICOUNT to see which one it was
  1580. */
  1581. case TIOCMIWAIT:
  1582. spin_lock_irqsave(&info->slock, flags);
  1583. cnow = info->icount; /* note the counters on entry */
  1584. spin_unlock_irqrestore(&info->slock, flags);
  1585. return wait_event_interruptible(info->delta_msr_wait,
  1586. mxser_cflags_changed(info, arg, &cnow));
  1587. /*
  1588. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1589. * Return: write counters to the user passed counter struct
  1590. * NB: both 1->0 and 0->1 transitions are counted except for
  1591. * RI where only 0->1 is counted.
  1592. */
  1593. case TIOCGICOUNT: {
  1594. struct serial_icounter_struct icnt = { 0 };
  1595. spin_lock_irqsave(&info->slock, flags);
  1596. cnow = info->icount;
  1597. spin_unlock_irqrestore(&info->slock, flags);
  1598. icnt.frame = cnow.frame;
  1599. icnt.brk = cnow.brk;
  1600. icnt.overrun = cnow.overrun;
  1601. icnt.buf_overrun = cnow.buf_overrun;
  1602. icnt.parity = cnow.parity;
  1603. icnt.rx = cnow.rx;
  1604. icnt.tx = cnow.tx;
  1605. icnt.cts = cnow.cts;
  1606. icnt.dsr = cnow.dsr;
  1607. icnt.rng = cnow.rng;
  1608. icnt.dcd = cnow.dcd;
  1609. return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
  1610. }
  1611. case MOXA_HighSpeedOn:
  1612. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1613. case MOXA_SDS_RSTICOUNTER:
  1614. lock_kernel();
  1615. info->mon_data.rxcnt = 0;
  1616. info->mon_data.txcnt = 0;
  1617. unlock_kernel();
  1618. return 0;
  1619. case MOXA_ASPP_OQUEUE:{
  1620. int len, lsr;
  1621. lock_kernel();
  1622. len = mxser_chars_in_buffer(tty);
  1623. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1624. len += (lsr ? 0 : 1);
  1625. unlock_kernel();
  1626. return put_user(len, (int __user *)argp);
  1627. }
  1628. case MOXA_ASPP_MON: {
  1629. int mcr, status;
  1630. lock_kernel();
  1631. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1632. mxser_check_modem_status(info, status);
  1633. mcr = inb(info->ioaddr + UART_MCR);
  1634. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1635. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1636. else
  1637. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1638. if (mcr & MOXA_MUST_MCR_TX_XON)
  1639. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1640. else
  1641. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1642. if (info->port.tty->hw_stopped)
  1643. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1644. else
  1645. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1646. unlock_kernel();
  1647. if (copy_to_user(argp, &info->mon_data,
  1648. sizeof(struct mxser_mon)))
  1649. return -EFAULT;
  1650. return 0;
  1651. }
  1652. case MOXA_ASPP_LSTATUS: {
  1653. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1654. return -EFAULT;
  1655. info->err_shadow = 0;
  1656. return 0;
  1657. }
  1658. case MOXA_SET_BAUD_METHOD: {
  1659. int method;
  1660. if (get_user(method, (int __user *)argp))
  1661. return -EFAULT;
  1662. mxser_set_baud_method[tty->index] = method;
  1663. return put_user(method, (int __user *)argp);
  1664. }
  1665. default:
  1666. return -ENOIOCTLCMD;
  1667. }
  1668. return 0;
  1669. }
  1670. static void mxser_stoprx(struct tty_struct *tty)
  1671. {
  1672. struct mxser_port *info = tty->driver_data;
  1673. info->ldisc_stop_rx = 1;
  1674. if (I_IXOFF(tty)) {
  1675. if (info->board->chip_flag) {
  1676. info->IER &= ~MOXA_MUST_RECV_ISR;
  1677. outb(info->IER, info->ioaddr + UART_IER);
  1678. } else {
  1679. info->x_char = STOP_CHAR(tty);
  1680. outb(0, info->ioaddr + UART_IER);
  1681. info->IER |= UART_IER_THRI;
  1682. outb(info->IER, info->ioaddr + UART_IER);
  1683. }
  1684. }
  1685. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1686. info->MCR &= ~UART_MCR_RTS;
  1687. outb(info->MCR, info->ioaddr + UART_MCR);
  1688. }
  1689. }
  1690. /*
  1691. * This routine is called by the upper-layer tty layer to signal that
  1692. * incoming characters should be throttled.
  1693. */
  1694. static void mxser_throttle(struct tty_struct *tty)
  1695. {
  1696. mxser_stoprx(tty);
  1697. }
  1698. static void mxser_unthrottle(struct tty_struct *tty)
  1699. {
  1700. struct mxser_port *info = tty->driver_data;
  1701. /* startrx */
  1702. info->ldisc_stop_rx = 0;
  1703. if (I_IXOFF(tty)) {
  1704. if (info->x_char)
  1705. info->x_char = 0;
  1706. else {
  1707. if (info->board->chip_flag) {
  1708. info->IER |= MOXA_MUST_RECV_ISR;
  1709. outb(info->IER, info->ioaddr + UART_IER);
  1710. } else {
  1711. info->x_char = START_CHAR(tty);
  1712. outb(0, info->ioaddr + UART_IER);
  1713. info->IER |= UART_IER_THRI;
  1714. outb(info->IER, info->ioaddr + UART_IER);
  1715. }
  1716. }
  1717. }
  1718. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1719. info->MCR |= UART_MCR_RTS;
  1720. outb(info->MCR, info->ioaddr + UART_MCR);
  1721. }
  1722. }
  1723. /*
  1724. * mxser_stop() and mxser_start()
  1725. *
  1726. * This routines are called before setting or resetting tty->stopped.
  1727. * They enable or disable transmitter interrupts, as necessary.
  1728. */
  1729. static void mxser_stop(struct tty_struct *tty)
  1730. {
  1731. struct mxser_port *info = tty->driver_data;
  1732. unsigned long flags;
  1733. spin_lock_irqsave(&info->slock, flags);
  1734. if (info->IER & UART_IER_THRI) {
  1735. info->IER &= ~UART_IER_THRI;
  1736. outb(info->IER, info->ioaddr + UART_IER);
  1737. }
  1738. spin_unlock_irqrestore(&info->slock, flags);
  1739. }
  1740. static void mxser_start(struct tty_struct *tty)
  1741. {
  1742. struct mxser_port *info = tty->driver_data;
  1743. unsigned long flags;
  1744. spin_lock_irqsave(&info->slock, flags);
  1745. if (info->xmit_cnt && info->port.xmit_buf) {
  1746. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1747. info->IER |= UART_IER_THRI;
  1748. outb(info->IER, info->ioaddr + UART_IER);
  1749. }
  1750. spin_unlock_irqrestore(&info->slock, flags);
  1751. }
  1752. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1753. {
  1754. struct mxser_port *info = tty->driver_data;
  1755. unsigned long flags;
  1756. spin_lock_irqsave(&info->slock, flags);
  1757. mxser_change_speed(info, old_termios);
  1758. spin_unlock_irqrestore(&info->slock, flags);
  1759. if ((old_termios->c_cflag & CRTSCTS) &&
  1760. !(tty->termios->c_cflag & CRTSCTS)) {
  1761. tty->hw_stopped = 0;
  1762. mxser_start(tty);
  1763. }
  1764. /* Handle sw stopped */
  1765. if ((old_termios->c_iflag & IXON) &&
  1766. !(tty->termios->c_iflag & IXON)) {
  1767. tty->stopped = 0;
  1768. if (info->board->chip_flag) {
  1769. spin_lock_irqsave(&info->slock, flags);
  1770. mxser_disable_must_rx_software_flow_control(
  1771. info->ioaddr);
  1772. spin_unlock_irqrestore(&info->slock, flags);
  1773. }
  1774. mxser_start(tty);
  1775. }
  1776. }
  1777. /*
  1778. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1779. */
  1780. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1781. {
  1782. struct mxser_port *info = tty->driver_data;
  1783. unsigned long orig_jiffies, char_time;
  1784. int lsr;
  1785. if (info->type == PORT_UNKNOWN)
  1786. return;
  1787. if (info->xmit_fifo_size == 0)
  1788. return; /* Just in case.... */
  1789. orig_jiffies = jiffies;
  1790. /*
  1791. * Set the check interval to be 1/5 of the estimated time to
  1792. * send a single character, and make it at least 1. The check
  1793. * interval should also be less than the timeout.
  1794. *
  1795. * Note: we have to use pretty tight timings here to satisfy
  1796. * the NIST-PCTS.
  1797. */
  1798. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1799. char_time = char_time / 5;
  1800. if (char_time == 0)
  1801. char_time = 1;
  1802. if (timeout && timeout < char_time)
  1803. char_time = timeout;
  1804. /*
  1805. * If the transmitter hasn't cleared in twice the approximate
  1806. * amount of time to send the entire FIFO, it probably won't
  1807. * ever clear. This assumes the UART isn't doing flow
  1808. * control, which is currently the case. Hence, if it ever
  1809. * takes longer than info->timeout, this is probably due to a
  1810. * UART bug of some kind. So, we clamp the timeout parameter at
  1811. * 2*info->timeout.
  1812. */
  1813. if (!timeout || timeout > 2 * info->timeout)
  1814. timeout = 2 * info->timeout;
  1815. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1816. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1817. timeout, char_time);
  1818. printk("jiff=%lu...", jiffies);
  1819. #endif
  1820. lock_kernel();
  1821. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1822. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1823. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1824. #endif
  1825. schedule_timeout_interruptible(char_time);
  1826. if (signal_pending(current))
  1827. break;
  1828. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1829. break;
  1830. }
  1831. set_current_state(TASK_RUNNING);
  1832. unlock_kernel();
  1833. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1834. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1835. #endif
  1836. }
  1837. /*
  1838. * This routine is called by tty_hangup() when a hangup is signaled.
  1839. */
  1840. static void mxser_hangup(struct tty_struct *tty)
  1841. {
  1842. struct mxser_port *info = tty->driver_data;
  1843. mxser_flush_buffer(tty);
  1844. mxser_shutdown(info);
  1845. info->port.count = 0;
  1846. info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
  1847. info->port.tty = NULL;
  1848. wake_up_interruptible(&info->port.open_wait);
  1849. }
  1850. /*
  1851. * mxser_rs_break() --- routine which turns the break handling on or off
  1852. */
  1853. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1854. {
  1855. struct mxser_port *info = tty->driver_data;
  1856. unsigned long flags;
  1857. spin_lock_irqsave(&info->slock, flags);
  1858. if (break_state == -1)
  1859. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1860. info->ioaddr + UART_LCR);
  1861. else
  1862. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1863. info->ioaddr + UART_LCR);
  1864. spin_unlock_irqrestore(&info->slock, flags);
  1865. return 0;
  1866. }
  1867. static void mxser_receive_chars(struct mxser_port *port, int *status)
  1868. {
  1869. struct tty_struct *tty = port->port.tty;
  1870. unsigned char ch, gdl;
  1871. int ignored = 0;
  1872. int cnt = 0;
  1873. int recv_room;
  1874. int max = 256;
  1875. recv_room = tty->receive_room;
  1876. if ((recv_room == 0) && (!port->ldisc_stop_rx))
  1877. mxser_stoprx(tty);
  1878. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1879. if (*status & UART_LSR_SPECIAL)
  1880. goto intr_old;
  1881. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1882. (*status & MOXA_MUST_LSR_RERR))
  1883. goto intr_old;
  1884. if (*status & MOXA_MUST_LSR_RERR)
  1885. goto intr_old;
  1886. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1887. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1888. gdl &= MOXA_MUST_GDL_MASK;
  1889. if (gdl >= recv_room) {
  1890. if (!port->ldisc_stop_rx)
  1891. mxser_stoprx(tty);
  1892. }
  1893. while (gdl--) {
  1894. ch = inb(port->ioaddr + UART_RX);
  1895. tty_insert_flip_char(tty, ch, 0);
  1896. cnt++;
  1897. }
  1898. goto end_intr;
  1899. }
  1900. intr_old:
  1901. do {
  1902. if (max-- < 0)
  1903. break;
  1904. ch = inb(port->ioaddr + UART_RX);
  1905. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1906. outb(0x23, port->ioaddr + UART_FCR);
  1907. *status &= port->read_status_mask;
  1908. if (*status & port->ignore_status_mask) {
  1909. if (++ignored > 100)
  1910. break;
  1911. } else {
  1912. char flag = 0;
  1913. if (*status & UART_LSR_SPECIAL) {
  1914. if (*status & UART_LSR_BI) {
  1915. flag = TTY_BREAK;
  1916. port->icount.brk++;
  1917. if (port->port.flags & ASYNC_SAK)
  1918. do_SAK(tty);
  1919. } else if (*status & UART_LSR_PE) {
  1920. flag = TTY_PARITY;
  1921. port->icount.parity++;
  1922. } else if (*status & UART_LSR_FE) {
  1923. flag = TTY_FRAME;
  1924. port->icount.frame++;
  1925. } else if (*status & UART_LSR_OE) {
  1926. flag = TTY_OVERRUN;
  1927. port->icount.overrun++;
  1928. } else
  1929. flag = TTY_BREAK;
  1930. }
  1931. tty_insert_flip_char(tty, ch, flag);
  1932. cnt++;
  1933. if (cnt >= recv_room) {
  1934. if (!port->ldisc_stop_rx)
  1935. mxser_stoprx(tty);
  1936. break;
  1937. }
  1938. }
  1939. if (port->board->chip_flag)
  1940. break;
  1941. *status = inb(port->ioaddr + UART_LSR);
  1942. } while (*status & UART_LSR_DR);
  1943. end_intr:
  1944. mxvar_log.rxcnt[port->port.tty->index] += cnt;
  1945. port->mon_data.rxcnt += cnt;
  1946. port->mon_data.up_rxcnt += cnt;
  1947. /*
  1948. * We are called from an interrupt context with &port->slock
  1949. * being held. Drop it temporarily in order to prevent
  1950. * recursive locking.
  1951. */
  1952. spin_unlock(&port->slock);
  1953. tty_flip_buffer_push(tty);
  1954. spin_lock(&port->slock);
  1955. }
  1956. static void mxser_transmit_chars(struct mxser_port *port)
  1957. {
  1958. int count, cnt;
  1959. if (port->x_char) {
  1960. outb(port->x_char, port->ioaddr + UART_TX);
  1961. port->x_char = 0;
  1962. mxvar_log.txcnt[port->port.tty->index]++;
  1963. port->mon_data.txcnt++;
  1964. port->mon_data.up_txcnt++;
  1965. port->icount.tx++;
  1966. return;
  1967. }
  1968. if (port->port.xmit_buf == NULL)
  1969. return;
  1970. if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
  1971. (port->port.tty->hw_stopped &&
  1972. (port->type != PORT_16550A) &&
  1973. (!port->board->chip_flag))) {
  1974. port->IER &= ~UART_IER_THRI;
  1975. outb(port->IER, port->ioaddr + UART_IER);
  1976. return;
  1977. }
  1978. cnt = port->xmit_cnt;
  1979. count = port->xmit_fifo_size;
  1980. do {
  1981. outb(port->port.xmit_buf[port->xmit_tail++],
  1982. port->ioaddr + UART_TX);
  1983. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1984. if (--port->xmit_cnt <= 0)
  1985. break;
  1986. } while (--count > 0);
  1987. mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
  1988. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1989. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1990. port->icount.tx += (cnt - port->xmit_cnt);
  1991. if (port->xmit_cnt < WAKEUP_CHARS)
  1992. tty_wakeup(port->port.tty);
  1993. if (port->xmit_cnt <= 0) {
  1994. port->IER &= ~UART_IER_THRI;
  1995. outb(port->IER, port->ioaddr + UART_IER);
  1996. }
  1997. }
  1998. /*
  1999. * This is the serial driver's generic interrupt routine
  2000. */
  2001. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  2002. {
  2003. int status, iir, i;
  2004. struct mxser_board *brd = NULL;
  2005. struct mxser_port *port;
  2006. int max, irqbits, bits, msr;
  2007. unsigned int int_cnt, pass_counter = 0;
  2008. int handled = IRQ_NONE;
  2009. for (i = 0; i < MXSER_BOARDS; i++)
  2010. if (dev_id == &mxser_boards[i]) {
  2011. brd = dev_id;
  2012. break;
  2013. }
  2014. if (i == MXSER_BOARDS)
  2015. goto irq_stop;
  2016. if (brd == NULL)
  2017. goto irq_stop;
  2018. max = brd->info->nports;
  2019. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  2020. irqbits = inb(brd->vector) & brd->vector_mask;
  2021. if (irqbits == brd->vector_mask)
  2022. break;
  2023. handled = IRQ_HANDLED;
  2024. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  2025. if (irqbits == brd->vector_mask)
  2026. break;
  2027. if (bits & irqbits)
  2028. continue;
  2029. port = &brd->ports[i];
  2030. int_cnt = 0;
  2031. spin_lock(&port->slock);
  2032. do {
  2033. iir = inb(port->ioaddr + UART_IIR);
  2034. if (iir & UART_IIR_NO_INT)
  2035. break;
  2036. iir &= MOXA_MUST_IIR_MASK;
  2037. if (!port->port.tty ||
  2038. (port->port.flags & ASYNC_CLOSING) ||
  2039. !(port->port.flags &
  2040. ASYNC_INITIALIZED)) {
  2041. status = inb(port->ioaddr + UART_LSR);
  2042. outb(0x27, port->ioaddr + UART_FCR);
  2043. inb(port->ioaddr + UART_MSR);
  2044. break;
  2045. }
  2046. status = inb(port->ioaddr + UART_LSR);
  2047. if (status & UART_LSR_PE)
  2048. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2049. if (status & UART_LSR_FE)
  2050. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2051. if (status & UART_LSR_OE)
  2052. port->err_shadow |=
  2053. NPPI_NOTIFY_HW_OVERRUN;
  2054. if (status & UART_LSR_BI)
  2055. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2056. if (port->board->chip_flag) {
  2057. if (iir == MOXA_MUST_IIR_GDA ||
  2058. iir == MOXA_MUST_IIR_RDA ||
  2059. iir == MOXA_MUST_IIR_RTO ||
  2060. iir == MOXA_MUST_IIR_LSR)
  2061. mxser_receive_chars(port,
  2062. &status);
  2063. } else {
  2064. status &= port->read_status_mask;
  2065. if (status & UART_LSR_DR)
  2066. mxser_receive_chars(port,
  2067. &status);
  2068. }
  2069. msr = inb(port->ioaddr + UART_MSR);
  2070. if (msr & UART_MSR_ANY_DELTA)
  2071. mxser_check_modem_status(port, msr);
  2072. if (port->board->chip_flag) {
  2073. if (iir == 0x02 && (status &
  2074. UART_LSR_THRE))
  2075. mxser_transmit_chars(port);
  2076. } else {
  2077. if (status & UART_LSR_THRE)
  2078. mxser_transmit_chars(port);
  2079. }
  2080. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2081. spin_unlock(&port->slock);
  2082. }
  2083. }
  2084. irq_stop:
  2085. return handled;
  2086. }
  2087. static const struct tty_operations mxser_ops = {
  2088. .open = mxser_open,
  2089. .close = mxser_close,
  2090. .write = mxser_write,
  2091. .put_char = mxser_put_char,
  2092. .flush_chars = mxser_flush_chars,
  2093. .write_room = mxser_write_room,
  2094. .chars_in_buffer = mxser_chars_in_buffer,
  2095. .flush_buffer = mxser_flush_buffer,
  2096. .ioctl = mxser_ioctl,
  2097. .throttle = mxser_throttle,
  2098. .unthrottle = mxser_unthrottle,
  2099. .set_termios = mxser_set_termios,
  2100. .stop = mxser_stop,
  2101. .start = mxser_start,
  2102. .hangup = mxser_hangup,
  2103. .break_ctl = mxser_rs_break,
  2104. .wait_until_sent = mxser_wait_until_sent,
  2105. .tiocmget = mxser_tiocmget,
  2106. .tiocmset = mxser_tiocmset,
  2107. };
  2108. /*
  2109. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2110. */
  2111. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2112. unsigned int irq)
  2113. {
  2114. if (irq)
  2115. free_irq(brd->irq, brd);
  2116. if (pdev != NULL) { /* PCI */
  2117. #ifdef CONFIG_PCI
  2118. pci_release_region(pdev, 2);
  2119. pci_release_region(pdev, 3);
  2120. #endif
  2121. } else {
  2122. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2123. release_region(brd->vector, 1);
  2124. }
  2125. }
  2126. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2127. struct pci_dev *pdev)
  2128. {
  2129. struct mxser_port *info;
  2130. unsigned int i;
  2131. int retval;
  2132. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2133. brd->ports[0].max_baud);
  2134. for (i = 0; i < brd->info->nports; i++) {
  2135. info = &brd->ports[i];
  2136. tty_port_init(&info->port);
  2137. info->board = brd;
  2138. info->stop_rx = 0;
  2139. info->ldisc_stop_rx = 0;
  2140. /* Enhance mode enabled here */
  2141. if (brd->chip_flag != MOXA_OTHER_UART)
  2142. mxser_enable_must_enchance_mode(info->ioaddr);
  2143. info->port.flags = ASYNC_SHARE_IRQ;
  2144. info->type = brd->uart_type;
  2145. process_txrx_fifo(info);
  2146. info->custom_divisor = info->baud_base * 16;
  2147. info->port.close_delay = 5 * HZ / 10;
  2148. info->port.closing_wait = 30 * HZ;
  2149. info->normal_termios = mxvar_sdriver->init_termios;
  2150. init_waitqueue_head(&info->delta_msr_wait);
  2151. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2152. info->err_shadow = 0;
  2153. spin_lock_init(&info->slock);
  2154. /* before set INT ISR, disable all int */
  2155. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2156. info->ioaddr + UART_IER);
  2157. }
  2158. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2159. brd);
  2160. if (retval) {
  2161. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2162. "conflict with another device.\n",
  2163. brd->info->name, brd->irq);
  2164. /* We hold resources, we need to release them. */
  2165. mxser_release_res(brd, pdev, 0);
  2166. }
  2167. return retval;
  2168. }
  2169. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2170. {
  2171. int id, i, bits;
  2172. unsigned short regs[16], irq;
  2173. unsigned char scratch, scratch2;
  2174. brd->chip_flag = MOXA_OTHER_UART;
  2175. id = mxser_read_register(cap, regs);
  2176. switch (id) {
  2177. case C168_ASIC_ID:
  2178. brd->info = &mxser_cards[0];
  2179. break;
  2180. case C104_ASIC_ID:
  2181. brd->info = &mxser_cards[1];
  2182. break;
  2183. case CI104J_ASIC_ID:
  2184. brd->info = &mxser_cards[2];
  2185. break;
  2186. case C102_ASIC_ID:
  2187. brd->info = &mxser_cards[5];
  2188. break;
  2189. case CI132_ASIC_ID:
  2190. brd->info = &mxser_cards[6];
  2191. break;
  2192. case CI134_ASIC_ID:
  2193. brd->info = &mxser_cards[7];
  2194. break;
  2195. default:
  2196. return 0;
  2197. }
  2198. irq = 0;
  2199. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2200. Flag-hack checks if configuration should be read as 2-port here. */
  2201. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2202. irq = regs[9] & 0xF000;
  2203. irq = irq | (irq >> 4);
  2204. if (irq != (regs[9] & 0xFF00))
  2205. goto err_irqconflict;
  2206. } else if (brd->info->nports == 4) {
  2207. irq = regs[9] & 0xF000;
  2208. irq = irq | (irq >> 4);
  2209. irq = irq | (irq >> 8);
  2210. if (irq != regs[9])
  2211. goto err_irqconflict;
  2212. } else if (brd->info->nports == 8) {
  2213. irq = regs[9] & 0xF000;
  2214. irq = irq | (irq >> 4);
  2215. irq = irq | (irq >> 8);
  2216. if ((irq != regs[9]) || (irq != regs[10]))
  2217. goto err_irqconflict;
  2218. }
  2219. if (!irq) {
  2220. printk(KERN_ERR "mxser: interrupt number unset\n");
  2221. return -EIO;
  2222. }
  2223. brd->irq = ((int)(irq & 0xF000) >> 12);
  2224. for (i = 0; i < 8; i++)
  2225. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2226. if ((regs[12] & 0x80) == 0) {
  2227. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2228. return -EIO;
  2229. }
  2230. brd->vector = (int)regs[11]; /* interrupt vector */
  2231. if (id == 1)
  2232. brd->vector_mask = 0x00FF;
  2233. else
  2234. brd->vector_mask = 0x000F;
  2235. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2236. if (regs[12] & bits) {
  2237. brd->ports[i].baud_base = 921600;
  2238. brd->ports[i].max_baud = 921600;
  2239. } else {
  2240. brd->ports[i].baud_base = 115200;
  2241. brd->ports[i].max_baud = 115200;
  2242. }
  2243. }
  2244. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2245. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2246. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2247. outb(scratch2, cap + UART_LCR);
  2248. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2249. scratch = inb(cap + UART_IIR);
  2250. if (scratch & 0xC0)
  2251. brd->uart_type = PORT_16550A;
  2252. else
  2253. brd->uart_type = PORT_16450;
  2254. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2255. "mxser(IO)")) {
  2256. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2257. "0x%.8lx-0x%.8lx\n",
  2258. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2259. 8 * brd->info->nports - 1);
  2260. return -EIO;
  2261. }
  2262. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2263. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2264. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2265. "0x%.8lx-0x%.8lx\n",
  2266. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2267. 8 * brd->info->nports - 1);
  2268. return -EIO;
  2269. }
  2270. return brd->info->nports;
  2271. err_irqconflict:
  2272. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2273. return -EIO;
  2274. }
  2275. static int __devinit mxser_probe(struct pci_dev *pdev,
  2276. const struct pci_device_id *ent)
  2277. {
  2278. #ifdef CONFIG_PCI
  2279. struct mxser_board *brd;
  2280. unsigned int i, j;
  2281. unsigned long ioaddress;
  2282. int retval = -EINVAL;
  2283. for (i = 0; i < MXSER_BOARDS; i++)
  2284. if (mxser_boards[i].info == NULL)
  2285. break;
  2286. if (i >= MXSER_BOARDS) {
  2287. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2288. "not configured\n", MXSER_BOARDS);
  2289. goto err;
  2290. }
  2291. brd = &mxser_boards[i];
  2292. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2293. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2294. mxser_cards[ent->driver_data].name,
  2295. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2296. retval = pci_enable_device(pdev);
  2297. if (retval) {
  2298. dev_err(&pdev->dev, "PCI enable failed\n");
  2299. goto err;
  2300. }
  2301. /* io address */
  2302. ioaddress = pci_resource_start(pdev, 2);
  2303. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2304. if (retval)
  2305. goto err;
  2306. brd->info = &mxser_cards[ent->driver_data];
  2307. for (i = 0; i < brd->info->nports; i++)
  2308. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2309. /* vector */
  2310. ioaddress = pci_resource_start(pdev, 3);
  2311. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2312. if (retval)
  2313. goto err_relio;
  2314. brd->vector = ioaddress;
  2315. /* irq */
  2316. brd->irq = pdev->irq;
  2317. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2318. brd->uart_type = PORT_16550A;
  2319. brd->vector_mask = 0;
  2320. for (i = 0; i < brd->info->nports; i++) {
  2321. for (j = 0; j < UART_INFO_NUM; j++) {
  2322. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2323. brd->ports[i].max_baud =
  2324. Gpci_uart_info[j].max_baud;
  2325. /* exception....CP-102 */
  2326. if (brd->info->flags & MXSER_HIGHBAUD)
  2327. brd->ports[i].max_baud = 921600;
  2328. break;
  2329. }
  2330. }
  2331. }
  2332. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2333. for (i = 0; i < brd->info->nports; i++) {
  2334. if (i < 4)
  2335. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2336. else
  2337. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2338. }
  2339. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2340. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2341. }
  2342. for (i = 0; i < brd->info->nports; i++) {
  2343. brd->vector_mask |= (1 << i);
  2344. brd->ports[i].baud_base = 921600;
  2345. }
  2346. /* mxser_initbrd will hook ISR. */
  2347. retval = mxser_initbrd(brd, pdev);
  2348. if (retval)
  2349. goto err_null;
  2350. for (i = 0; i < brd->info->nports; i++)
  2351. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2352. pci_set_drvdata(pdev, brd);
  2353. return 0;
  2354. err_relio:
  2355. pci_release_region(pdev, 2);
  2356. err_null:
  2357. brd->info = NULL;
  2358. err:
  2359. return retval;
  2360. #else
  2361. return -ENODEV;
  2362. #endif
  2363. }
  2364. static void __devexit mxser_remove(struct pci_dev *pdev)
  2365. {
  2366. struct mxser_board *brd = pci_get_drvdata(pdev);
  2367. unsigned int i;
  2368. for (i = 0; i < brd->info->nports; i++)
  2369. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2370. mxser_release_res(brd, pdev, 1);
  2371. brd->info = NULL;
  2372. }
  2373. static struct pci_driver mxser_driver = {
  2374. .name = "mxser",
  2375. .id_table = mxser_pcibrds,
  2376. .probe = mxser_probe,
  2377. .remove = __devexit_p(mxser_remove)
  2378. };
  2379. static int __init mxser_module_init(void)
  2380. {
  2381. struct mxser_board *brd;
  2382. unsigned int b, i, m;
  2383. int retval;
  2384. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2385. if (!mxvar_sdriver)
  2386. return -ENOMEM;
  2387. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2388. MXSER_VERSION);
  2389. /* Initialize the tty_driver structure */
  2390. mxvar_sdriver->owner = THIS_MODULE;
  2391. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2392. mxvar_sdriver->name = "ttyMI";
  2393. mxvar_sdriver->major = ttymajor;
  2394. mxvar_sdriver->minor_start = 0;
  2395. mxvar_sdriver->num = MXSER_PORTS + 1;
  2396. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2397. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2398. mxvar_sdriver->init_termios = tty_std_termios;
  2399. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2400. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2401. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2402. retval = tty_register_driver(mxvar_sdriver);
  2403. if (retval) {
  2404. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2405. "tty driver !\n");
  2406. goto err_put;
  2407. }
  2408. /* Start finding ISA boards here */
  2409. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2410. if (!ioaddr[b])
  2411. continue;
  2412. brd = &mxser_boards[m];
  2413. retval = mxser_get_ISA_conf(!ioaddr[b], brd);
  2414. if (retval <= 0) {
  2415. brd->info = NULL;
  2416. continue;
  2417. }
  2418. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2419. brd->info->name, ioaddr[b]);
  2420. /* mxser_initbrd will hook ISR. */
  2421. if (mxser_initbrd(brd, NULL) < 0) {
  2422. brd->info = NULL;
  2423. continue;
  2424. }
  2425. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2426. for (i = 0; i < brd->info->nports; i++)
  2427. tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
  2428. m++;
  2429. }
  2430. retval = pci_register_driver(&mxser_driver);
  2431. if (retval) {
  2432. printk(KERN_ERR "mxser: can't register pci driver\n");
  2433. if (!m) {
  2434. retval = -ENODEV;
  2435. goto err_unr;
  2436. } /* else: we have some ISA cards under control */
  2437. }
  2438. return 0;
  2439. err_unr:
  2440. tty_unregister_driver(mxvar_sdriver);
  2441. err_put:
  2442. put_tty_driver(mxvar_sdriver);
  2443. return retval;
  2444. }
  2445. static void __exit mxser_module_exit(void)
  2446. {
  2447. unsigned int i, j;
  2448. pci_unregister_driver(&mxser_driver);
  2449. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2450. if (mxser_boards[i].info != NULL)
  2451. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2452. tty_unregister_device(mxvar_sdriver,
  2453. mxser_boards[i].idx + j);
  2454. tty_unregister_driver(mxvar_sdriver);
  2455. put_tty_driver(mxvar_sdriver);
  2456. for (i = 0; i < MXSER_BOARDS; i++)
  2457. if (mxser_boards[i].info != NULL)
  2458. mxser_release_res(&mxser_boards[i], NULL, 1);
  2459. }
  2460. module_init(mxser_module_init);
  2461. module_exit(mxser_module_exit);