mmu.c 56 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "mmu.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. #ifndef MMU_DEBUG
  60. #define ASSERT(x) do { } while (0)
  61. #else
  62. #define ASSERT(x) \
  63. if (!(x)) { \
  64. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  65. __FILE__, __LINE__, #x); \
  66. }
  67. #endif
  68. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  69. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  70. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  71. #define PT64_LEVEL_BITS 9
  72. #define PT64_LEVEL_SHIFT(level) \
  73. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  74. #define PT64_LEVEL_MASK(level) \
  75. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  76. #define PT64_INDEX(address, level)\
  77. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  78. #define PT32_LEVEL_BITS 10
  79. #define PT32_LEVEL_SHIFT(level) \
  80. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  81. #define PT32_LEVEL_MASK(level) \
  82. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  83. #define PT32_INDEX(address, level)\
  84. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  85. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  86. #define PT64_DIR_BASE_ADDR_MASK \
  87. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  88. #define PT32_BASE_ADDR_MASK PAGE_MASK
  89. #define PT32_DIR_BASE_ADDR_MASK \
  90. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  91. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  92. | PT64_NX_MASK)
  93. #define PFERR_PRESENT_MASK (1U << 0)
  94. #define PFERR_WRITE_MASK (1U << 1)
  95. #define PFERR_USER_MASK (1U << 2)
  96. #define PFERR_FETCH_MASK (1U << 4)
  97. #define PT_DIRECTORY_LEVEL 2
  98. #define PT_PAGE_TABLE_LEVEL 1
  99. #define RMAP_EXT 4
  100. #define ACC_EXEC_MASK 1
  101. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  102. #define ACC_USER_MASK PT_USER_MASK
  103. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  104. struct kvm_pv_mmu_op_buffer {
  105. void *ptr;
  106. unsigned len;
  107. unsigned processed;
  108. char buf[512] __aligned(sizeof(long));
  109. };
  110. struct kvm_rmap_desc {
  111. u64 *shadow_ptes[RMAP_EXT];
  112. struct kvm_rmap_desc *more;
  113. };
  114. static struct kmem_cache *pte_chain_cache;
  115. static struct kmem_cache *rmap_desc_cache;
  116. static struct kmem_cache *mmu_page_header_cache;
  117. static u64 __read_mostly shadow_trap_nonpresent_pte;
  118. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  119. static u64 __read_mostly shadow_base_present_pte;
  120. static u64 __read_mostly shadow_nx_mask;
  121. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  122. static u64 __read_mostly shadow_user_mask;
  123. static u64 __read_mostly shadow_accessed_mask;
  124. static u64 __read_mostly shadow_dirty_mask;
  125. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  126. {
  127. shadow_trap_nonpresent_pte = trap_pte;
  128. shadow_notrap_nonpresent_pte = notrap_pte;
  129. }
  130. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  131. void kvm_mmu_set_base_ptes(u64 base_pte)
  132. {
  133. shadow_base_present_pte = base_pte;
  134. }
  135. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  136. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  137. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  138. {
  139. shadow_user_mask = user_mask;
  140. shadow_accessed_mask = accessed_mask;
  141. shadow_dirty_mask = dirty_mask;
  142. shadow_nx_mask = nx_mask;
  143. shadow_x_mask = x_mask;
  144. }
  145. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  146. static int is_write_protection(struct kvm_vcpu *vcpu)
  147. {
  148. return vcpu->arch.cr0 & X86_CR0_WP;
  149. }
  150. static int is_cpuid_PSE36(void)
  151. {
  152. return 1;
  153. }
  154. static int is_nx(struct kvm_vcpu *vcpu)
  155. {
  156. return vcpu->arch.shadow_efer & EFER_NX;
  157. }
  158. static int is_present_pte(unsigned long pte)
  159. {
  160. return pte & PT_PRESENT_MASK;
  161. }
  162. static int is_shadow_present_pte(u64 pte)
  163. {
  164. return pte != shadow_trap_nonpresent_pte
  165. && pte != shadow_notrap_nonpresent_pte;
  166. }
  167. static int is_large_pte(u64 pte)
  168. {
  169. return pte & PT_PAGE_SIZE_MASK;
  170. }
  171. static int is_writeble_pte(unsigned long pte)
  172. {
  173. return pte & PT_WRITABLE_MASK;
  174. }
  175. static int is_dirty_pte(unsigned long pte)
  176. {
  177. return pte & shadow_dirty_mask;
  178. }
  179. static int is_rmap_pte(u64 pte)
  180. {
  181. return is_shadow_present_pte(pte);
  182. }
  183. static pfn_t spte_to_pfn(u64 pte)
  184. {
  185. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  186. }
  187. static gfn_t pse36_gfn_delta(u32 gpte)
  188. {
  189. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  190. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  191. }
  192. static void set_shadow_pte(u64 *sptep, u64 spte)
  193. {
  194. #ifdef CONFIG_X86_64
  195. set_64bit((unsigned long *)sptep, spte);
  196. #else
  197. set_64bit((unsigned long long *)sptep, spte);
  198. #endif
  199. }
  200. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  201. struct kmem_cache *base_cache, int min)
  202. {
  203. void *obj;
  204. if (cache->nobjs >= min)
  205. return 0;
  206. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  207. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  208. if (!obj)
  209. return -ENOMEM;
  210. cache->objects[cache->nobjs++] = obj;
  211. }
  212. return 0;
  213. }
  214. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  215. {
  216. while (mc->nobjs)
  217. kfree(mc->objects[--mc->nobjs]);
  218. }
  219. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  220. int min)
  221. {
  222. struct page *page;
  223. if (cache->nobjs >= min)
  224. return 0;
  225. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  226. page = alloc_page(GFP_KERNEL);
  227. if (!page)
  228. return -ENOMEM;
  229. set_page_private(page, 0);
  230. cache->objects[cache->nobjs++] = page_address(page);
  231. }
  232. return 0;
  233. }
  234. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  235. {
  236. while (mc->nobjs)
  237. free_page((unsigned long)mc->objects[--mc->nobjs]);
  238. }
  239. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  240. {
  241. int r;
  242. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  243. pte_chain_cache, 4);
  244. if (r)
  245. goto out;
  246. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  247. rmap_desc_cache, 1);
  248. if (r)
  249. goto out;
  250. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  251. if (r)
  252. goto out;
  253. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  254. mmu_page_header_cache, 4);
  255. out:
  256. return r;
  257. }
  258. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  259. {
  260. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  261. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  262. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  263. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  264. }
  265. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  266. size_t size)
  267. {
  268. void *p;
  269. BUG_ON(!mc->nobjs);
  270. p = mc->objects[--mc->nobjs];
  271. memset(p, 0, size);
  272. return p;
  273. }
  274. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  275. {
  276. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  277. sizeof(struct kvm_pte_chain));
  278. }
  279. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  280. {
  281. kfree(pc);
  282. }
  283. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  284. {
  285. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  286. sizeof(struct kvm_rmap_desc));
  287. }
  288. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  289. {
  290. kfree(rd);
  291. }
  292. /*
  293. * Return the pointer to the largepage write count for a given
  294. * gfn, handling slots that are not large page aligned.
  295. */
  296. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  297. {
  298. unsigned long idx;
  299. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  300. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  301. return &slot->lpage_info[idx].write_count;
  302. }
  303. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  304. {
  305. int *write_count;
  306. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  307. *write_count += 1;
  308. }
  309. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  310. {
  311. int *write_count;
  312. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  313. *write_count -= 1;
  314. WARN_ON(*write_count < 0);
  315. }
  316. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  317. {
  318. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  319. int *largepage_idx;
  320. if (slot) {
  321. largepage_idx = slot_largepage_idx(gfn, slot);
  322. return *largepage_idx;
  323. }
  324. return 1;
  325. }
  326. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  327. {
  328. struct vm_area_struct *vma;
  329. unsigned long addr;
  330. addr = gfn_to_hva(kvm, gfn);
  331. if (kvm_is_error_hva(addr))
  332. return 0;
  333. vma = find_vma(current->mm, addr);
  334. if (vma && is_vm_hugetlb_page(vma))
  335. return 1;
  336. return 0;
  337. }
  338. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  339. {
  340. struct kvm_memory_slot *slot;
  341. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  342. return 0;
  343. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  344. return 0;
  345. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  346. if (slot && slot->dirty_bitmap)
  347. return 0;
  348. return 1;
  349. }
  350. /*
  351. * Take gfn and return the reverse mapping to it.
  352. * Note: gfn must be unaliased before this function get called
  353. */
  354. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  355. {
  356. struct kvm_memory_slot *slot;
  357. unsigned long idx;
  358. slot = gfn_to_memslot(kvm, gfn);
  359. if (!lpage)
  360. return &slot->rmap[gfn - slot->base_gfn];
  361. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  362. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  363. return &slot->lpage_info[idx].rmap_pde;
  364. }
  365. /*
  366. * Reverse mapping data structures:
  367. *
  368. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  369. * that points to page_address(page).
  370. *
  371. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  372. * containing more mappings.
  373. */
  374. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  375. {
  376. struct kvm_mmu_page *sp;
  377. struct kvm_rmap_desc *desc;
  378. unsigned long *rmapp;
  379. int i;
  380. if (!is_rmap_pte(*spte))
  381. return;
  382. gfn = unalias_gfn(vcpu->kvm, gfn);
  383. sp = page_header(__pa(spte));
  384. sp->gfns[spte - sp->spt] = gfn;
  385. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  386. if (!*rmapp) {
  387. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  388. *rmapp = (unsigned long)spte;
  389. } else if (!(*rmapp & 1)) {
  390. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  391. desc = mmu_alloc_rmap_desc(vcpu);
  392. desc->shadow_ptes[0] = (u64 *)*rmapp;
  393. desc->shadow_ptes[1] = spte;
  394. *rmapp = (unsigned long)desc | 1;
  395. } else {
  396. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  397. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  398. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  399. desc = desc->more;
  400. if (desc->shadow_ptes[RMAP_EXT-1]) {
  401. desc->more = mmu_alloc_rmap_desc(vcpu);
  402. desc = desc->more;
  403. }
  404. for (i = 0; desc->shadow_ptes[i]; ++i)
  405. ;
  406. desc->shadow_ptes[i] = spte;
  407. }
  408. }
  409. static void rmap_desc_remove_entry(unsigned long *rmapp,
  410. struct kvm_rmap_desc *desc,
  411. int i,
  412. struct kvm_rmap_desc *prev_desc)
  413. {
  414. int j;
  415. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  416. ;
  417. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  418. desc->shadow_ptes[j] = NULL;
  419. if (j != 0)
  420. return;
  421. if (!prev_desc && !desc->more)
  422. *rmapp = (unsigned long)desc->shadow_ptes[0];
  423. else
  424. if (prev_desc)
  425. prev_desc->more = desc->more;
  426. else
  427. *rmapp = (unsigned long)desc->more | 1;
  428. mmu_free_rmap_desc(desc);
  429. }
  430. static void rmap_remove(struct kvm *kvm, u64 *spte)
  431. {
  432. struct kvm_rmap_desc *desc;
  433. struct kvm_rmap_desc *prev_desc;
  434. struct kvm_mmu_page *sp;
  435. pfn_t pfn;
  436. unsigned long *rmapp;
  437. int i;
  438. if (!is_rmap_pte(*spte))
  439. return;
  440. sp = page_header(__pa(spte));
  441. pfn = spte_to_pfn(*spte);
  442. if (*spte & shadow_accessed_mask)
  443. kvm_set_pfn_accessed(pfn);
  444. if (is_writeble_pte(*spte))
  445. kvm_release_pfn_dirty(pfn);
  446. else
  447. kvm_release_pfn_clean(pfn);
  448. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  449. if (!*rmapp) {
  450. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  451. BUG();
  452. } else if (!(*rmapp & 1)) {
  453. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  454. if ((u64 *)*rmapp != spte) {
  455. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  456. spte, *spte);
  457. BUG();
  458. }
  459. *rmapp = 0;
  460. } else {
  461. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  462. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  463. prev_desc = NULL;
  464. while (desc) {
  465. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  466. if (desc->shadow_ptes[i] == spte) {
  467. rmap_desc_remove_entry(rmapp,
  468. desc, i,
  469. prev_desc);
  470. return;
  471. }
  472. prev_desc = desc;
  473. desc = desc->more;
  474. }
  475. BUG();
  476. }
  477. }
  478. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  479. {
  480. struct kvm_rmap_desc *desc;
  481. struct kvm_rmap_desc *prev_desc;
  482. u64 *prev_spte;
  483. int i;
  484. if (!*rmapp)
  485. return NULL;
  486. else if (!(*rmapp & 1)) {
  487. if (!spte)
  488. return (u64 *)*rmapp;
  489. return NULL;
  490. }
  491. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  492. prev_desc = NULL;
  493. prev_spte = NULL;
  494. while (desc) {
  495. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  496. if (prev_spte == spte)
  497. return desc->shadow_ptes[i];
  498. prev_spte = desc->shadow_ptes[i];
  499. }
  500. desc = desc->more;
  501. }
  502. return NULL;
  503. }
  504. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  505. {
  506. unsigned long *rmapp;
  507. u64 *spte;
  508. int write_protected = 0;
  509. gfn = unalias_gfn(kvm, gfn);
  510. rmapp = gfn_to_rmap(kvm, gfn, 0);
  511. spte = rmap_next(kvm, rmapp, NULL);
  512. while (spte) {
  513. BUG_ON(!spte);
  514. BUG_ON(!(*spte & PT_PRESENT_MASK));
  515. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  516. if (is_writeble_pte(*spte)) {
  517. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  518. write_protected = 1;
  519. }
  520. spte = rmap_next(kvm, rmapp, spte);
  521. }
  522. if (write_protected) {
  523. pfn_t pfn;
  524. spte = rmap_next(kvm, rmapp, NULL);
  525. pfn = spte_to_pfn(*spte);
  526. kvm_set_pfn_dirty(pfn);
  527. }
  528. /* check for huge page mappings */
  529. rmapp = gfn_to_rmap(kvm, gfn, 1);
  530. spte = rmap_next(kvm, rmapp, NULL);
  531. while (spte) {
  532. BUG_ON(!spte);
  533. BUG_ON(!(*spte & PT_PRESENT_MASK));
  534. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  535. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  536. if (is_writeble_pte(*spte)) {
  537. rmap_remove(kvm, spte);
  538. --kvm->stat.lpages;
  539. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  540. spte = NULL;
  541. write_protected = 1;
  542. }
  543. spte = rmap_next(kvm, rmapp, spte);
  544. }
  545. if (write_protected)
  546. kvm_flush_remote_tlbs(kvm);
  547. account_shadowed(kvm, gfn);
  548. }
  549. #ifdef MMU_DEBUG
  550. static int is_empty_shadow_page(u64 *spt)
  551. {
  552. u64 *pos;
  553. u64 *end;
  554. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  555. if (is_shadow_present_pte(*pos)) {
  556. printk(KERN_ERR "%s: %p %llx\n", __func__,
  557. pos, *pos);
  558. return 0;
  559. }
  560. return 1;
  561. }
  562. #endif
  563. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  564. {
  565. ASSERT(is_empty_shadow_page(sp->spt));
  566. list_del(&sp->link);
  567. __free_page(virt_to_page(sp->spt));
  568. __free_page(virt_to_page(sp->gfns));
  569. kfree(sp);
  570. ++kvm->arch.n_free_mmu_pages;
  571. }
  572. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  573. {
  574. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  575. }
  576. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  577. u64 *parent_pte)
  578. {
  579. struct kvm_mmu_page *sp;
  580. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  581. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  582. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  583. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  584. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  585. ASSERT(is_empty_shadow_page(sp->spt));
  586. sp->slot_bitmap = 0;
  587. sp->multimapped = 0;
  588. sp->parent_pte = parent_pte;
  589. --vcpu->kvm->arch.n_free_mmu_pages;
  590. return sp;
  591. }
  592. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  593. struct kvm_mmu_page *sp, u64 *parent_pte)
  594. {
  595. struct kvm_pte_chain *pte_chain;
  596. struct hlist_node *node;
  597. int i;
  598. if (!parent_pte)
  599. return;
  600. if (!sp->multimapped) {
  601. u64 *old = sp->parent_pte;
  602. if (!old) {
  603. sp->parent_pte = parent_pte;
  604. return;
  605. }
  606. sp->multimapped = 1;
  607. pte_chain = mmu_alloc_pte_chain(vcpu);
  608. INIT_HLIST_HEAD(&sp->parent_ptes);
  609. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  610. pte_chain->parent_ptes[0] = old;
  611. }
  612. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  613. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  614. continue;
  615. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  616. if (!pte_chain->parent_ptes[i]) {
  617. pte_chain->parent_ptes[i] = parent_pte;
  618. return;
  619. }
  620. }
  621. pte_chain = mmu_alloc_pte_chain(vcpu);
  622. BUG_ON(!pte_chain);
  623. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  624. pte_chain->parent_ptes[0] = parent_pte;
  625. }
  626. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  627. u64 *parent_pte)
  628. {
  629. struct kvm_pte_chain *pte_chain;
  630. struct hlist_node *node;
  631. int i;
  632. if (!sp->multimapped) {
  633. BUG_ON(sp->parent_pte != parent_pte);
  634. sp->parent_pte = NULL;
  635. return;
  636. }
  637. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  638. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  639. if (!pte_chain->parent_ptes[i])
  640. break;
  641. if (pte_chain->parent_ptes[i] != parent_pte)
  642. continue;
  643. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  644. && pte_chain->parent_ptes[i + 1]) {
  645. pte_chain->parent_ptes[i]
  646. = pte_chain->parent_ptes[i + 1];
  647. ++i;
  648. }
  649. pte_chain->parent_ptes[i] = NULL;
  650. if (i == 0) {
  651. hlist_del(&pte_chain->link);
  652. mmu_free_pte_chain(pte_chain);
  653. if (hlist_empty(&sp->parent_ptes)) {
  654. sp->multimapped = 0;
  655. sp->parent_pte = NULL;
  656. }
  657. }
  658. return;
  659. }
  660. BUG();
  661. }
  662. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  663. struct kvm_mmu_page *sp)
  664. {
  665. int i;
  666. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  667. sp->spt[i] = shadow_trap_nonpresent_pte;
  668. }
  669. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  670. {
  671. unsigned index;
  672. struct hlist_head *bucket;
  673. struct kvm_mmu_page *sp;
  674. struct hlist_node *node;
  675. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  676. index = kvm_page_table_hashfn(gfn);
  677. bucket = &kvm->arch.mmu_page_hash[index];
  678. hlist_for_each_entry(sp, node, bucket, hash_link)
  679. if (sp->gfn == gfn && !sp->role.metaphysical
  680. && !sp->role.invalid) {
  681. pgprintk("%s: found role %x\n",
  682. __func__, sp->role.word);
  683. return sp;
  684. }
  685. return NULL;
  686. }
  687. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  688. gfn_t gfn,
  689. gva_t gaddr,
  690. unsigned level,
  691. int metaphysical,
  692. unsigned access,
  693. u64 *parent_pte)
  694. {
  695. union kvm_mmu_page_role role;
  696. unsigned index;
  697. unsigned quadrant;
  698. struct hlist_head *bucket;
  699. struct kvm_mmu_page *sp;
  700. struct hlist_node *node;
  701. role.word = 0;
  702. role.glevels = vcpu->arch.mmu.root_level;
  703. role.level = level;
  704. role.metaphysical = metaphysical;
  705. role.access = access;
  706. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  707. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  708. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  709. role.quadrant = quadrant;
  710. }
  711. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  712. gfn, role.word);
  713. index = kvm_page_table_hashfn(gfn);
  714. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  715. hlist_for_each_entry(sp, node, bucket, hash_link)
  716. if (sp->gfn == gfn && sp->role.word == role.word) {
  717. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  718. pgprintk("%s: found\n", __func__);
  719. return sp;
  720. }
  721. ++vcpu->kvm->stat.mmu_cache_miss;
  722. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  723. if (!sp)
  724. return sp;
  725. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  726. sp->gfn = gfn;
  727. sp->role = role;
  728. hlist_add_head(&sp->hash_link, bucket);
  729. if (!metaphysical)
  730. rmap_write_protect(vcpu->kvm, gfn);
  731. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  732. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  733. else
  734. nonpaging_prefetch_page(vcpu, sp);
  735. return sp;
  736. }
  737. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  738. struct kvm_mmu_page *sp)
  739. {
  740. unsigned i;
  741. u64 *pt;
  742. u64 ent;
  743. pt = sp->spt;
  744. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  745. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  746. if (is_shadow_present_pte(pt[i]))
  747. rmap_remove(kvm, &pt[i]);
  748. pt[i] = shadow_trap_nonpresent_pte;
  749. }
  750. kvm_flush_remote_tlbs(kvm);
  751. return;
  752. }
  753. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  754. ent = pt[i];
  755. if (is_shadow_present_pte(ent)) {
  756. if (!is_large_pte(ent)) {
  757. ent &= PT64_BASE_ADDR_MASK;
  758. mmu_page_remove_parent_pte(page_header(ent),
  759. &pt[i]);
  760. } else {
  761. --kvm->stat.lpages;
  762. rmap_remove(kvm, &pt[i]);
  763. }
  764. }
  765. pt[i] = shadow_trap_nonpresent_pte;
  766. }
  767. kvm_flush_remote_tlbs(kvm);
  768. }
  769. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  770. {
  771. mmu_page_remove_parent_pte(sp, parent_pte);
  772. }
  773. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  774. {
  775. int i;
  776. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  777. if (kvm->vcpus[i])
  778. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  779. }
  780. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  781. {
  782. u64 *parent_pte;
  783. ++kvm->stat.mmu_shadow_zapped;
  784. while (sp->multimapped || sp->parent_pte) {
  785. if (!sp->multimapped)
  786. parent_pte = sp->parent_pte;
  787. else {
  788. struct kvm_pte_chain *chain;
  789. chain = container_of(sp->parent_ptes.first,
  790. struct kvm_pte_chain, link);
  791. parent_pte = chain->parent_ptes[0];
  792. }
  793. BUG_ON(!parent_pte);
  794. kvm_mmu_put_page(sp, parent_pte);
  795. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  796. }
  797. kvm_mmu_page_unlink_children(kvm, sp);
  798. if (!sp->root_count) {
  799. if (!sp->role.metaphysical && !sp->role.invalid)
  800. unaccount_shadowed(kvm, sp->gfn);
  801. hlist_del(&sp->hash_link);
  802. kvm_mmu_free_page(kvm, sp);
  803. } else {
  804. int invalid = sp->role.invalid;
  805. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  806. sp->role.invalid = 1;
  807. kvm_reload_remote_mmus(kvm);
  808. if (!sp->role.metaphysical && !invalid)
  809. unaccount_shadowed(kvm, sp->gfn);
  810. }
  811. kvm_mmu_reset_last_pte_updated(kvm);
  812. }
  813. /*
  814. * Changing the number of mmu pages allocated to the vm
  815. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  816. */
  817. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  818. {
  819. /*
  820. * If we set the number of mmu pages to be smaller be than the
  821. * number of actived pages , we must to free some mmu pages before we
  822. * change the value
  823. */
  824. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  825. kvm_nr_mmu_pages) {
  826. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  827. - kvm->arch.n_free_mmu_pages;
  828. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  829. struct kvm_mmu_page *page;
  830. page = container_of(kvm->arch.active_mmu_pages.prev,
  831. struct kvm_mmu_page, link);
  832. kvm_mmu_zap_page(kvm, page);
  833. n_used_mmu_pages--;
  834. }
  835. kvm->arch.n_free_mmu_pages = 0;
  836. }
  837. else
  838. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  839. - kvm->arch.n_alloc_mmu_pages;
  840. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  841. }
  842. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  843. {
  844. unsigned index;
  845. struct hlist_head *bucket;
  846. struct kvm_mmu_page *sp;
  847. struct hlist_node *node, *n;
  848. int r;
  849. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  850. r = 0;
  851. index = kvm_page_table_hashfn(gfn);
  852. bucket = &kvm->arch.mmu_page_hash[index];
  853. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  854. if (sp->gfn == gfn && !sp->role.metaphysical) {
  855. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  856. sp->role.word);
  857. kvm_mmu_zap_page(kvm, sp);
  858. r = 1;
  859. }
  860. return r;
  861. }
  862. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  863. {
  864. struct kvm_mmu_page *sp;
  865. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  866. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  867. kvm_mmu_zap_page(kvm, sp);
  868. }
  869. }
  870. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  871. {
  872. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  873. struct kvm_mmu_page *sp = page_header(__pa(pte));
  874. __set_bit(slot, &sp->slot_bitmap);
  875. }
  876. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  877. {
  878. struct page *page;
  879. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  880. if (gpa == UNMAPPED_GVA)
  881. return NULL;
  882. down_read(&current->mm->mmap_sem);
  883. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  884. up_read(&current->mm->mmap_sem);
  885. return page;
  886. }
  887. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  888. unsigned pt_access, unsigned pte_access,
  889. int user_fault, int write_fault, int dirty,
  890. int *ptwrite, int largepage, gfn_t gfn,
  891. pfn_t pfn, bool speculative)
  892. {
  893. u64 spte;
  894. int was_rmapped = 0;
  895. int was_writeble = is_writeble_pte(*shadow_pte);
  896. pgprintk("%s: spte %llx access %x write_fault %d"
  897. " user_fault %d gfn %lx\n",
  898. __func__, *shadow_pte, pt_access,
  899. write_fault, user_fault, gfn);
  900. if (is_rmap_pte(*shadow_pte)) {
  901. /*
  902. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  903. * the parent of the now unreachable PTE.
  904. */
  905. if (largepage && !is_large_pte(*shadow_pte)) {
  906. struct kvm_mmu_page *child;
  907. u64 pte = *shadow_pte;
  908. child = page_header(pte & PT64_BASE_ADDR_MASK);
  909. mmu_page_remove_parent_pte(child, shadow_pte);
  910. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  911. pgprintk("hfn old %lx new %lx\n",
  912. spte_to_pfn(*shadow_pte), pfn);
  913. rmap_remove(vcpu->kvm, shadow_pte);
  914. } else {
  915. if (largepage)
  916. was_rmapped = is_large_pte(*shadow_pte);
  917. else
  918. was_rmapped = 1;
  919. }
  920. }
  921. /*
  922. * We don't set the accessed bit, since we sometimes want to see
  923. * whether the guest actually used the pte (in order to detect
  924. * demand paging).
  925. */
  926. spte = shadow_base_present_pte | shadow_dirty_mask;
  927. if (!speculative)
  928. pte_access |= PT_ACCESSED_MASK;
  929. if (!dirty)
  930. pte_access &= ~ACC_WRITE_MASK;
  931. if (pte_access & ACC_EXEC_MASK)
  932. spte |= shadow_x_mask;
  933. else
  934. spte |= shadow_nx_mask;
  935. if (pte_access & ACC_USER_MASK)
  936. spte |= shadow_user_mask;
  937. if (largepage)
  938. spte |= PT_PAGE_SIZE_MASK;
  939. spte |= (u64)pfn << PAGE_SHIFT;
  940. if ((pte_access & ACC_WRITE_MASK)
  941. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  942. struct kvm_mmu_page *shadow;
  943. spte |= PT_WRITABLE_MASK;
  944. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  945. if (shadow ||
  946. (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
  947. pgprintk("%s: found shadow page for %lx, marking ro\n",
  948. __func__, gfn);
  949. pte_access &= ~ACC_WRITE_MASK;
  950. if (is_writeble_pte(spte)) {
  951. spte &= ~PT_WRITABLE_MASK;
  952. kvm_x86_ops->tlb_flush(vcpu);
  953. }
  954. if (write_fault)
  955. *ptwrite = 1;
  956. }
  957. }
  958. if (pte_access & ACC_WRITE_MASK)
  959. mark_page_dirty(vcpu->kvm, gfn);
  960. pgprintk("%s: setting spte %llx\n", __func__, spte);
  961. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  962. (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
  963. (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
  964. set_shadow_pte(shadow_pte, spte);
  965. if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
  966. && (spte & PT_PRESENT_MASK))
  967. ++vcpu->kvm->stat.lpages;
  968. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  969. if (!was_rmapped) {
  970. rmap_add(vcpu, shadow_pte, gfn, largepage);
  971. if (!is_rmap_pte(*shadow_pte))
  972. kvm_release_pfn_clean(pfn);
  973. } else {
  974. if (was_writeble)
  975. kvm_release_pfn_dirty(pfn);
  976. else
  977. kvm_release_pfn_clean(pfn);
  978. }
  979. if (speculative) {
  980. vcpu->arch.last_pte_updated = shadow_pte;
  981. vcpu->arch.last_pte_gfn = gfn;
  982. }
  983. }
  984. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  985. {
  986. }
  987. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  988. int largepage, gfn_t gfn, pfn_t pfn,
  989. int level)
  990. {
  991. hpa_t table_addr = vcpu->arch.mmu.root_hpa;
  992. int pt_write = 0;
  993. for (; ; level--) {
  994. u32 index = PT64_INDEX(v, level);
  995. u64 *table;
  996. ASSERT(VALID_PAGE(table_addr));
  997. table = __va(table_addr);
  998. if (level == 1) {
  999. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  1000. 0, write, 1, &pt_write, 0, gfn, pfn, false);
  1001. return pt_write;
  1002. }
  1003. if (largepage && level == 2) {
  1004. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  1005. 0, write, 1, &pt_write, 1, gfn, pfn, false);
  1006. return pt_write;
  1007. }
  1008. if (table[index] == shadow_trap_nonpresent_pte) {
  1009. struct kvm_mmu_page *new_table;
  1010. gfn_t pseudo_gfn;
  1011. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  1012. >> PAGE_SHIFT;
  1013. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  1014. v, level - 1,
  1015. 1, ACC_ALL, &table[index]);
  1016. if (!new_table) {
  1017. pgprintk("nonpaging_map: ENOMEM\n");
  1018. kvm_release_pfn_clean(pfn);
  1019. return -ENOMEM;
  1020. }
  1021. set_shadow_pte(&table[index],
  1022. __pa(new_table->spt)
  1023. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1024. | shadow_user_mask | shadow_x_mask);
  1025. }
  1026. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  1027. }
  1028. }
  1029. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1030. {
  1031. int r;
  1032. int largepage = 0;
  1033. pfn_t pfn;
  1034. down_read(&current->mm->mmap_sem);
  1035. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1036. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1037. largepage = 1;
  1038. }
  1039. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1040. up_read(&current->mm->mmap_sem);
  1041. /* mmio */
  1042. if (is_error_pfn(pfn)) {
  1043. kvm_release_pfn_clean(pfn);
  1044. return 1;
  1045. }
  1046. spin_lock(&vcpu->kvm->mmu_lock);
  1047. kvm_mmu_free_some_pages(vcpu);
  1048. r = __direct_map(vcpu, v, write, largepage, gfn, pfn,
  1049. PT32E_ROOT_LEVEL);
  1050. spin_unlock(&vcpu->kvm->mmu_lock);
  1051. return r;
  1052. }
  1053. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1054. {
  1055. int i;
  1056. struct kvm_mmu_page *sp;
  1057. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1058. return;
  1059. spin_lock(&vcpu->kvm->mmu_lock);
  1060. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1061. hpa_t root = vcpu->arch.mmu.root_hpa;
  1062. sp = page_header(root);
  1063. --sp->root_count;
  1064. if (!sp->root_count && sp->role.invalid)
  1065. kvm_mmu_zap_page(vcpu->kvm, sp);
  1066. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1067. spin_unlock(&vcpu->kvm->mmu_lock);
  1068. return;
  1069. }
  1070. for (i = 0; i < 4; ++i) {
  1071. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1072. if (root) {
  1073. root &= PT64_BASE_ADDR_MASK;
  1074. sp = page_header(root);
  1075. --sp->root_count;
  1076. if (!sp->root_count && sp->role.invalid)
  1077. kvm_mmu_zap_page(vcpu->kvm, sp);
  1078. }
  1079. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1080. }
  1081. spin_unlock(&vcpu->kvm->mmu_lock);
  1082. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1083. }
  1084. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1085. {
  1086. int i;
  1087. gfn_t root_gfn;
  1088. struct kvm_mmu_page *sp;
  1089. int metaphysical = 0;
  1090. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1091. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1092. hpa_t root = vcpu->arch.mmu.root_hpa;
  1093. ASSERT(!VALID_PAGE(root));
  1094. if (tdp_enabled)
  1095. metaphysical = 1;
  1096. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1097. PT64_ROOT_LEVEL, metaphysical,
  1098. ACC_ALL, NULL);
  1099. root = __pa(sp->spt);
  1100. ++sp->root_count;
  1101. vcpu->arch.mmu.root_hpa = root;
  1102. return;
  1103. }
  1104. metaphysical = !is_paging(vcpu);
  1105. if (tdp_enabled)
  1106. metaphysical = 1;
  1107. for (i = 0; i < 4; ++i) {
  1108. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1109. ASSERT(!VALID_PAGE(root));
  1110. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1111. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1112. vcpu->arch.mmu.pae_root[i] = 0;
  1113. continue;
  1114. }
  1115. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1116. } else if (vcpu->arch.mmu.root_level == 0)
  1117. root_gfn = 0;
  1118. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1119. PT32_ROOT_LEVEL, metaphysical,
  1120. ACC_ALL, NULL);
  1121. root = __pa(sp->spt);
  1122. ++sp->root_count;
  1123. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1124. }
  1125. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1126. }
  1127. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1128. {
  1129. return vaddr;
  1130. }
  1131. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1132. u32 error_code)
  1133. {
  1134. gfn_t gfn;
  1135. int r;
  1136. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1137. r = mmu_topup_memory_caches(vcpu);
  1138. if (r)
  1139. return r;
  1140. ASSERT(vcpu);
  1141. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1142. gfn = gva >> PAGE_SHIFT;
  1143. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1144. error_code & PFERR_WRITE_MASK, gfn);
  1145. }
  1146. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1147. u32 error_code)
  1148. {
  1149. pfn_t pfn;
  1150. int r;
  1151. int largepage = 0;
  1152. gfn_t gfn = gpa >> PAGE_SHIFT;
  1153. ASSERT(vcpu);
  1154. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1155. r = mmu_topup_memory_caches(vcpu);
  1156. if (r)
  1157. return r;
  1158. down_read(&current->mm->mmap_sem);
  1159. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1160. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1161. largepage = 1;
  1162. }
  1163. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1164. up_read(&current->mm->mmap_sem);
  1165. if (is_error_pfn(pfn)) {
  1166. kvm_release_pfn_clean(pfn);
  1167. return 1;
  1168. }
  1169. spin_lock(&vcpu->kvm->mmu_lock);
  1170. kvm_mmu_free_some_pages(vcpu);
  1171. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1172. largepage, gfn, pfn, kvm_x86_ops->get_tdp_level());
  1173. spin_unlock(&vcpu->kvm->mmu_lock);
  1174. return r;
  1175. }
  1176. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1177. {
  1178. mmu_free_roots(vcpu);
  1179. }
  1180. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1181. {
  1182. struct kvm_mmu *context = &vcpu->arch.mmu;
  1183. context->new_cr3 = nonpaging_new_cr3;
  1184. context->page_fault = nonpaging_page_fault;
  1185. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1186. context->free = nonpaging_free;
  1187. context->prefetch_page = nonpaging_prefetch_page;
  1188. context->root_level = 0;
  1189. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1190. context->root_hpa = INVALID_PAGE;
  1191. return 0;
  1192. }
  1193. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1194. {
  1195. ++vcpu->stat.tlb_flush;
  1196. kvm_x86_ops->tlb_flush(vcpu);
  1197. }
  1198. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1199. {
  1200. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1201. mmu_free_roots(vcpu);
  1202. }
  1203. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1204. u64 addr,
  1205. u32 err_code)
  1206. {
  1207. kvm_inject_page_fault(vcpu, addr, err_code);
  1208. }
  1209. static void paging_free(struct kvm_vcpu *vcpu)
  1210. {
  1211. nonpaging_free(vcpu);
  1212. }
  1213. #define PTTYPE 64
  1214. #include "paging_tmpl.h"
  1215. #undef PTTYPE
  1216. #define PTTYPE 32
  1217. #include "paging_tmpl.h"
  1218. #undef PTTYPE
  1219. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1220. {
  1221. struct kvm_mmu *context = &vcpu->arch.mmu;
  1222. ASSERT(is_pae(vcpu));
  1223. context->new_cr3 = paging_new_cr3;
  1224. context->page_fault = paging64_page_fault;
  1225. context->gva_to_gpa = paging64_gva_to_gpa;
  1226. context->prefetch_page = paging64_prefetch_page;
  1227. context->free = paging_free;
  1228. context->root_level = level;
  1229. context->shadow_root_level = level;
  1230. context->root_hpa = INVALID_PAGE;
  1231. return 0;
  1232. }
  1233. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1234. {
  1235. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1236. }
  1237. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1238. {
  1239. struct kvm_mmu *context = &vcpu->arch.mmu;
  1240. context->new_cr3 = paging_new_cr3;
  1241. context->page_fault = paging32_page_fault;
  1242. context->gva_to_gpa = paging32_gva_to_gpa;
  1243. context->free = paging_free;
  1244. context->prefetch_page = paging32_prefetch_page;
  1245. context->root_level = PT32_ROOT_LEVEL;
  1246. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1247. context->root_hpa = INVALID_PAGE;
  1248. return 0;
  1249. }
  1250. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1251. {
  1252. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1253. }
  1254. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1255. {
  1256. struct kvm_mmu *context = &vcpu->arch.mmu;
  1257. context->new_cr3 = nonpaging_new_cr3;
  1258. context->page_fault = tdp_page_fault;
  1259. context->free = nonpaging_free;
  1260. context->prefetch_page = nonpaging_prefetch_page;
  1261. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1262. context->root_hpa = INVALID_PAGE;
  1263. if (!is_paging(vcpu)) {
  1264. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1265. context->root_level = 0;
  1266. } else if (is_long_mode(vcpu)) {
  1267. context->gva_to_gpa = paging64_gva_to_gpa;
  1268. context->root_level = PT64_ROOT_LEVEL;
  1269. } else if (is_pae(vcpu)) {
  1270. context->gva_to_gpa = paging64_gva_to_gpa;
  1271. context->root_level = PT32E_ROOT_LEVEL;
  1272. } else {
  1273. context->gva_to_gpa = paging32_gva_to_gpa;
  1274. context->root_level = PT32_ROOT_LEVEL;
  1275. }
  1276. return 0;
  1277. }
  1278. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1279. {
  1280. ASSERT(vcpu);
  1281. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1282. if (!is_paging(vcpu))
  1283. return nonpaging_init_context(vcpu);
  1284. else if (is_long_mode(vcpu))
  1285. return paging64_init_context(vcpu);
  1286. else if (is_pae(vcpu))
  1287. return paging32E_init_context(vcpu);
  1288. else
  1289. return paging32_init_context(vcpu);
  1290. }
  1291. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1292. {
  1293. vcpu->arch.update_pte.pfn = bad_pfn;
  1294. if (tdp_enabled)
  1295. return init_kvm_tdp_mmu(vcpu);
  1296. else
  1297. return init_kvm_softmmu(vcpu);
  1298. }
  1299. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1300. {
  1301. ASSERT(vcpu);
  1302. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1303. vcpu->arch.mmu.free(vcpu);
  1304. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1305. }
  1306. }
  1307. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1308. {
  1309. destroy_kvm_mmu(vcpu);
  1310. return init_kvm_mmu(vcpu);
  1311. }
  1312. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1313. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1314. {
  1315. int r;
  1316. r = mmu_topup_memory_caches(vcpu);
  1317. if (r)
  1318. goto out;
  1319. spin_lock(&vcpu->kvm->mmu_lock);
  1320. kvm_mmu_free_some_pages(vcpu);
  1321. mmu_alloc_roots(vcpu);
  1322. spin_unlock(&vcpu->kvm->mmu_lock);
  1323. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1324. kvm_mmu_flush_tlb(vcpu);
  1325. out:
  1326. return r;
  1327. }
  1328. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1329. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1330. {
  1331. mmu_free_roots(vcpu);
  1332. }
  1333. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1334. struct kvm_mmu_page *sp,
  1335. u64 *spte)
  1336. {
  1337. u64 pte;
  1338. struct kvm_mmu_page *child;
  1339. pte = *spte;
  1340. if (is_shadow_present_pte(pte)) {
  1341. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1342. is_large_pte(pte))
  1343. rmap_remove(vcpu->kvm, spte);
  1344. else {
  1345. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1346. mmu_page_remove_parent_pte(child, spte);
  1347. }
  1348. }
  1349. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1350. if (is_large_pte(pte))
  1351. --vcpu->kvm->stat.lpages;
  1352. }
  1353. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1354. struct kvm_mmu_page *sp,
  1355. u64 *spte,
  1356. const void *new)
  1357. {
  1358. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1359. if (!vcpu->arch.update_pte.largepage ||
  1360. sp->role.glevels == PT32_ROOT_LEVEL) {
  1361. ++vcpu->kvm->stat.mmu_pde_zapped;
  1362. return;
  1363. }
  1364. }
  1365. ++vcpu->kvm->stat.mmu_pte_updated;
  1366. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1367. paging32_update_pte(vcpu, sp, spte, new);
  1368. else
  1369. paging64_update_pte(vcpu, sp, spte, new);
  1370. }
  1371. static bool need_remote_flush(u64 old, u64 new)
  1372. {
  1373. if (!is_shadow_present_pte(old))
  1374. return false;
  1375. if (!is_shadow_present_pte(new))
  1376. return true;
  1377. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1378. return true;
  1379. old ^= PT64_NX_MASK;
  1380. new ^= PT64_NX_MASK;
  1381. return (old & ~new & PT64_PERM_MASK) != 0;
  1382. }
  1383. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1384. {
  1385. if (need_remote_flush(old, new))
  1386. kvm_flush_remote_tlbs(vcpu->kvm);
  1387. else
  1388. kvm_mmu_flush_tlb(vcpu);
  1389. }
  1390. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1391. {
  1392. u64 *spte = vcpu->arch.last_pte_updated;
  1393. return !!(spte && (*spte & shadow_accessed_mask));
  1394. }
  1395. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1396. const u8 *new, int bytes)
  1397. {
  1398. gfn_t gfn;
  1399. int r;
  1400. u64 gpte = 0;
  1401. pfn_t pfn;
  1402. vcpu->arch.update_pte.largepage = 0;
  1403. if (bytes != 4 && bytes != 8)
  1404. return;
  1405. /*
  1406. * Assume that the pte write on a page table of the same type
  1407. * as the current vcpu paging mode. This is nearly always true
  1408. * (might be false while changing modes). Note it is verified later
  1409. * by update_pte().
  1410. */
  1411. if (is_pae(vcpu)) {
  1412. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  1413. if ((bytes == 4) && (gpa % 4 == 0)) {
  1414. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  1415. if (r)
  1416. return;
  1417. memcpy((void *)&gpte + (gpa % 8), new, 4);
  1418. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  1419. memcpy((void *)&gpte, new, 8);
  1420. }
  1421. } else {
  1422. if ((bytes == 4) && (gpa % 4 == 0))
  1423. memcpy((void *)&gpte, new, 4);
  1424. }
  1425. if (!is_present_pte(gpte))
  1426. return;
  1427. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1428. down_read(&current->mm->mmap_sem);
  1429. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  1430. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1431. vcpu->arch.update_pte.largepage = 1;
  1432. }
  1433. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1434. up_read(&current->mm->mmap_sem);
  1435. if (is_error_pfn(pfn)) {
  1436. kvm_release_pfn_clean(pfn);
  1437. return;
  1438. }
  1439. vcpu->arch.update_pte.gfn = gfn;
  1440. vcpu->arch.update_pte.pfn = pfn;
  1441. }
  1442. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  1443. {
  1444. u64 *spte = vcpu->arch.last_pte_updated;
  1445. if (spte
  1446. && vcpu->arch.last_pte_gfn == gfn
  1447. && shadow_accessed_mask
  1448. && !(*spte & shadow_accessed_mask)
  1449. && is_shadow_present_pte(*spte))
  1450. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  1451. }
  1452. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1453. const u8 *new, int bytes)
  1454. {
  1455. gfn_t gfn = gpa >> PAGE_SHIFT;
  1456. struct kvm_mmu_page *sp;
  1457. struct hlist_node *node, *n;
  1458. struct hlist_head *bucket;
  1459. unsigned index;
  1460. u64 entry, gentry;
  1461. u64 *spte;
  1462. unsigned offset = offset_in_page(gpa);
  1463. unsigned pte_size;
  1464. unsigned page_offset;
  1465. unsigned misaligned;
  1466. unsigned quadrant;
  1467. int level;
  1468. int flooded = 0;
  1469. int npte;
  1470. int r;
  1471. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  1472. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  1473. spin_lock(&vcpu->kvm->mmu_lock);
  1474. kvm_mmu_access_page(vcpu, gfn);
  1475. kvm_mmu_free_some_pages(vcpu);
  1476. ++vcpu->kvm->stat.mmu_pte_write;
  1477. kvm_mmu_audit(vcpu, "pre pte write");
  1478. if (gfn == vcpu->arch.last_pt_write_gfn
  1479. && !last_updated_pte_accessed(vcpu)) {
  1480. ++vcpu->arch.last_pt_write_count;
  1481. if (vcpu->arch.last_pt_write_count >= 3)
  1482. flooded = 1;
  1483. } else {
  1484. vcpu->arch.last_pt_write_gfn = gfn;
  1485. vcpu->arch.last_pt_write_count = 1;
  1486. vcpu->arch.last_pte_updated = NULL;
  1487. }
  1488. index = kvm_page_table_hashfn(gfn);
  1489. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1490. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1491. if (sp->gfn != gfn || sp->role.metaphysical)
  1492. continue;
  1493. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1494. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1495. misaligned |= bytes < 4;
  1496. if (misaligned || flooded) {
  1497. /*
  1498. * Misaligned accesses are too much trouble to fix
  1499. * up; also, they usually indicate a page is not used
  1500. * as a page table.
  1501. *
  1502. * If we're seeing too many writes to a page,
  1503. * it may no longer be a page table, or we may be
  1504. * forking, in which case it is better to unmap the
  1505. * page.
  1506. */
  1507. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1508. gpa, bytes, sp->role.word);
  1509. kvm_mmu_zap_page(vcpu->kvm, sp);
  1510. ++vcpu->kvm->stat.mmu_flooded;
  1511. continue;
  1512. }
  1513. page_offset = offset;
  1514. level = sp->role.level;
  1515. npte = 1;
  1516. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1517. page_offset <<= 1; /* 32->64 */
  1518. /*
  1519. * A 32-bit pde maps 4MB while the shadow pdes map
  1520. * only 2MB. So we need to double the offset again
  1521. * and zap two pdes instead of one.
  1522. */
  1523. if (level == PT32_ROOT_LEVEL) {
  1524. page_offset &= ~7; /* kill rounding error */
  1525. page_offset <<= 1;
  1526. npte = 2;
  1527. }
  1528. quadrant = page_offset >> PAGE_SHIFT;
  1529. page_offset &= ~PAGE_MASK;
  1530. if (quadrant != sp->role.quadrant)
  1531. continue;
  1532. }
  1533. spte = &sp->spt[page_offset / sizeof(*spte)];
  1534. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  1535. gentry = 0;
  1536. r = kvm_read_guest_atomic(vcpu->kvm,
  1537. gpa & ~(u64)(pte_size - 1),
  1538. &gentry, pte_size);
  1539. new = (const void *)&gentry;
  1540. if (r < 0)
  1541. new = NULL;
  1542. }
  1543. while (npte--) {
  1544. entry = *spte;
  1545. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1546. if (new)
  1547. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  1548. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1549. ++spte;
  1550. }
  1551. }
  1552. kvm_mmu_audit(vcpu, "post pte write");
  1553. spin_unlock(&vcpu->kvm->mmu_lock);
  1554. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  1555. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  1556. vcpu->arch.update_pte.pfn = bad_pfn;
  1557. }
  1558. }
  1559. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1560. {
  1561. gpa_t gpa;
  1562. int r;
  1563. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1564. spin_lock(&vcpu->kvm->mmu_lock);
  1565. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1566. spin_unlock(&vcpu->kvm->mmu_lock);
  1567. return r;
  1568. }
  1569. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  1570. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1571. {
  1572. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  1573. struct kvm_mmu_page *sp;
  1574. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  1575. struct kvm_mmu_page, link);
  1576. kvm_mmu_zap_page(vcpu->kvm, sp);
  1577. ++vcpu->kvm->stat.mmu_recycled;
  1578. }
  1579. }
  1580. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1581. {
  1582. int r;
  1583. enum emulation_result er;
  1584. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  1585. if (r < 0)
  1586. goto out;
  1587. if (!r) {
  1588. r = 1;
  1589. goto out;
  1590. }
  1591. r = mmu_topup_memory_caches(vcpu);
  1592. if (r)
  1593. goto out;
  1594. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1595. switch (er) {
  1596. case EMULATE_DONE:
  1597. return 1;
  1598. case EMULATE_DO_MMIO:
  1599. ++vcpu->stat.mmio_exits;
  1600. return 0;
  1601. case EMULATE_FAIL:
  1602. kvm_report_emulation_failure(vcpu, "pagetable");
  1603. return 1;
  1604. default:
  1605. BUG();
  1606. }
  1607. out:
  1608. return r;
  1609. }
  1610. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1611. void kvm_enable_tdp(void)
  1612. {
  1613. tdp_enabled = true;
  1614. }
  1615. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  1616. void kvm_disable_tdp(void)
  1617. {
  1618. tdp_enabled = false;
  1619. }
  1620. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  1621. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1622. {
  1623. struct kvm_mmu_page *sp;
  1624. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  1625. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  1626. struct kvm_mmu_page, link);
  1627. kvm_mmu_zap_page(vcpu->kvm, sp);
  1628. cond_resched();
  1629. }
  1630. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  1631. }
  1632. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1633. {
  1634. struct page *page;
  1635. int i;
  1636. ASSERT(vcpu);
  1637. if (vcpu->kvm->arch.n_requested_mmu_pages)
  1638. vcpu->kvm->arch.n_free_mmu_pages =
  1639. vcpu->kvm->arch.n_requested_mmu_pages;
  1640. else
  1641. vcpu->kvm->arch.n_free_mmu_pages =
  1642. vcpu->kvm->arch.n_alloc_mmu_pages;
  1643. /*
  1644. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1645. * Therefore we need to allocate shadow page tables in the first
  1646. * 4GB of memory, which happens to fit the DMA32 zone.
  1647. */
  1648. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1649. if (!page)
  1650. goto error_1;
  1651. vcpu->arch.mmu.pae_root = page_address(page);
  1652. for (i = 0; i < 4; ++i)
  1653. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1654. return 0;
  1655. error_1:
  1656. free_mmu_pages(vcpu);
  1657. return -ENOMEM;
  1658. }
  1659. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1660. {
  1661. ASSERT(vcpu);
  1662. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1663. return alloc_mmu_pages(vcpu);
  1664. }
  1665. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1666. {
  1667. ASSERT(vcpu);
  1668. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1669. return init_kvm_mmu(vcpu);
  1670. }
  1671. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1672. {
  1673. ASSERT(vcpu);
  1674. destroy_kvm_mmu(vcpu);
  1675. free_mmu_pages(vcpu);
  1676. mmu_free_memory_caches(vcpu);
  1677. }
  1678. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1679. {
  1680. struct kvm_mmu_page *sp;
  1681. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  1682. int i;
  1683. u64 *pt;
  1684. if (!test_bit(slot, &sp->slot_bitmap))
  1685. continue;
  1686. pt = sp->spt;
  1687. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1688. /* avoid RMW */
  1689. if (pt[i] & PT_WRITABLE_MASK)
  1690. pt[i] &= ~PT_WRITABLE_MASK;
  1691. }
  1692. }
  1693. void kvm_mmu_zap_all(struct kvm *kvm)
  1694. {
  1695. struct kvm_mmu_page *sp, *node;
  1696. spin_lock(&kvm->mmu_lock);
  1697. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  1698. kvm_mmu_zap_page(kvm, sp);
  1699. spin_unlock(&kvm->mmu_lock);
  1700. kvm_flush_remote_tlbs(kvm);
  1701. }
  1702. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  1703. {
  1704. struct kvm_mmu_page *page;
  1705. page = container_of(kvm->arch.active_mmu_pages.prev,
  1706. struct kvm_mmu_page, link);
  1707. kvm_mmu_zap_page(kvm, page);
  1708. }
  1709. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  1710. {
  1711. struct kvm *kvm;
  1712. struct kvm *kvm_freed = NULL;
  1713. int cache_count = 0;
  1714. spin_lock(&kvm_lock);
  1715. list_for_each_entry(kvm, &vm_list, vm_list) {
  1716. int npages;
  1717. if (!down_read_trylock(&kvm->slots_lock))
  1718. continue;
  1719. spin_lock(&kvm->mmu_lock);
  1720. npages = kvm->arch.n_alloc_mmu_pages -
  1721. kvm->arch.n_free_mmu_pages;
  1722. cache_count += npages;
  1723. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  1724. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  1725. cache_count--;
  1726. kvm_freed = kvm;
  1727. }
  1728. nr_to_scan--;
  1729. spin_unlock(&kvm->mmu_lock);
  1730. up_read(&kvm->slots_lock);
  1731. }
  1732. if (kvm_freed)
  1733. list_move_tail(&kvm_freed->vm_list, &vm_list);
  1734. spin_unlock(&kvm_lock);
  1735. return cache_count;
  1736. }
  1737. static struct shrinker mmu_shrinker = {
  1738. .shrink = mmu_shrink,
  1739. .seeks = DEFAULT_SEEKS * 10,
  1740. };
  1741. static void mmu_destroy_caches(void)
  1742. {
  1743. if (pte_chain_cache)
  1744. kmem_cache_destroy(pte_chain_cache);
  1745. if (rmap_desc_cache)
  1746. kmem_cache_destroy(rmap_desc_cache);
  1747. if (mmu_page_header_cache)
  1748. kmem_cache_destroy(mmu_page_header_cache);
  1749. }
  1750. void kvm_mmu_module_exit(void)
  1751. {
  1752. mmu_destroy_caches();
  1753. unregister_shrinker(&mmu_shrinker);
  1754. }
  1755. int kvm_mmu_module_init(void)
  1756. {
  1757. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1758. sizeof(struct kvm_pte_chain),
  1759. 0, 0, NULL);
  1760. if (!pte_chain_cache)
  1761. goto nomem;
  1762. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1763. sizeof(struct kvm_rmap_desc),
  1764. 0, 0, NULL);
  1765. if (!rmap_desc_cache)
  1766. goto nomem;
  1767. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1768. sizeof(struct kvm_mmu_page),
  1769. 0, 0, NULL);
  1770. if (!mmu_page_header_cache)
  1771. goto nomem;
  1772. register_shrinker(&mmu_shrinker);
  1773. return 0;
  1774. nomem:
  1775. mmu_destroy_caches();
  1776. return -ENOMEM;
  1777. }
  1778. /*
  1779. * Caculate mmu pages needed for kvm.
  1780. */
  1781. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1782. {
  1783. int i;
  1784. unsigned int nr_mmu_pages;
  1785. unsigned int nr_pages = 0;
  1786. for (i = 0; i < kvm->nmemslots; i++)
  1787. nr_pages += kvm->memslots[i].npages;
  1788. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1789. nr_mmu_pages = max(nr_mmu_pages,
  1790. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1791. return nr_mmu_pages;
  1792. }
  1793. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1794. unsigned len)
  1795. {
  1796. if (len > buffer->len)
  1797. return NULL;
  1798. return buffer->ptr;
  1799. }
  1800. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1801. unsigned len)
  1802. {
  1803. void *ret;
  1804. ret = pv_mmu_peek_buffer(buffer, len);
  1805. if (!ret)
  1806. return ret;
  1807. buffer->ptr += len;
  1808. buffer->len -= len;
  1809. buffer->processed += len;
  1810. return ret;
  1811. }
  1812. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  1813. gpa_t addr, gpa_t value)
  1814. {
  1815. int bytes = 8;
  1816. int r;
  1817. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  1818. bytes = 4;
  1819. r = mmu_topup_memory_caches(vcpu);
  1820. if (r)
  1821. return r;
  1822. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  1823. return -EFAULT;
  1824. return 1;
  1825. }
  1826. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1827. {
  1828. kvm_x86_ops->tlb_flush(vcpu);
  1829. return 1;
  1830. }
  1831. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  1832. {
  1833. spin_lock(&vcpu->kvm->mmu_lock);
  1834. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  1835. spin_unlock(&vcpu->kvm->mmu_lock);
  1836. return 1;
  1837. }
  1838. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  1839. struct kvm_pv_mmu_op_buffer *buffer)
  1840. {
  1841. struct kvm_mmu_op_header *header;
  1842. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  1843. if (!header)
  1844. return 0;
  1845. switch (header->op) {
  1846. case KVM_MMU_OP_WRITE_PTE: {
  1847. struct kvm_mmu_op_write_pte *wpte;
  1848. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  1849. if (!wpte)
  1850. return 0;
  1851. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  1852. wpte->pte_val);
  1853. }
  1854. case KVM_MMU_OP_FLUSH_TLB: {
  1855. struct kvm_mmu_op_flush_tlb *ftlb;
  1856. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  1857. if (!ftlb)
  1858. return 0;
  1859. return kvm_pv_mmu_flush_tlb(vcpu);
  1860. }
  1861. case KVM_MMU_OP_RELEASE_PT: {
  1862. struct kvm_mmu_op_release_pt *rpt;
  1863. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  1864. if (!rpt)
  1865. return 0;
  1866. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  1867. }
  1868. default: return 0;
  1869. }
  1870. }
  1871. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  1872. gpa_t addr, unsigned long *ret)
  1873. {
  1874. int r;
  1875. struct kvm_pv_mmu_op_buffer buffer;
  1876. buffer.ptr = buffer.buf;
  1877. buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
  1878. buffer.processed = 0;
  1879. r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
  1880. if (r)
  1881. goto out;
  1882. while (buffer.len) {
  1883. r = kvm_pv_mmu_op_one(vcpu, &buffer);
  1884. if (r < 0)
  1885. goto out;
  1886. if (r == 0)
  1887. break;
  1888. }
  1889. r = 1;
  1890. out:
  1891. *ret = buffer.processed;
  1892. return r;
  1893. }
  1894. #ifdef AUDIT
  1895. static const char *audit_msg;
  1896. static gva_t canonicalize(gva_t gva)
  1897. {
  1898. #ifdef CONFIG_X86_64
  1899. gva = (long long)(gva << 16) >> 16;
  1900. #endif
  1901. return gva;
  1902. }
  1903. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1904. gva_t va, int level)
  1905. {
  1906. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1907. int i;
  1908. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1909. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1910. u64 ent = pt[i];
  1911. if (ent == shadow_trap_nonpresent_pte)
  1912. continue;
  1913. va = canonicalize(va);
  1914. if (level > 1) {
  1915. if (ent == shadow_notrap_nonpresent_pte)
  1916. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1917. " in nonleaf level: levels %d gva %lx"
  1918. " level %d pte %llx\n", audit_msg,
  1919. vcpu->arch.mmu.root_level, va, level, ent);
  1920. audit_mappings_page(vcpu, ent, va, level - 1);
  1921. } else {
  1922. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  1923. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  1924. if (is_shadow_present_pte(ent)
  1925. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1926. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1927. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1928. audit_msg, vcpu->arch.mmu.root_level,
  1929. va, gpa, hpa, ent,
  1930. is_shadow_present_pte(ent));
  1931. else if (ent == shadow_notrap_nonpresent_pte
  1932. && !is_error_hpa(hpa))
  1933. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1934. " valid guest gva %lx\n", audit_msg, va);
  1935. kvm_release_pfn_clean(pfn);
  1936. }
  1937. }
  1938. }
  1939. static void audit_mappings(struct kvm_vcpu *vcpu)
  1940. {
  1941. unsigned i;
  1942. if (vcpu->arch.mmu.root_level == 4)
  1943. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  1944. else
  1945. for (i = 0; i < 4; ++i)
  1946. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  1947. audit_mappings_page(vcpu,
  1948. vcpu->arch.mmu.pae_root[i],
  1949. i << 30,
  1950. 2);
  1951. }
  1952. static int count_rmaps(struct kvm_vcpu *vcpu)
  1953. {
  1954. int nmaps = 0;
  1955. int i, j, k;
  1956. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1957. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1958. struct kvm_rmap_desc *d;
  1959. for (j = 0; j < m->npages; ++j) {
  1960. unsigned long *rmapp = &m->rmap[j];
  1961. if (!*rmapp)
  1962. continue;
  1963. if (!(*rmapp & 1)) {
  1964. ++nmaps;
  1965. continue;
  1966. }
  1967. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1968. while (d) {
  1969. for (k = 0; k < RMAP_EXT; ++k)
  1970. if (d->shadow_ptes[k])
  1971. ++nmaps;
  1972. else
  1973. break;
  1974. d = d->more;
  1975. }
  1976. }
  1977. }
  1978. return nmaps;
  1979. }
  1980. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1981. {
  1982. int nmaps = 0;
  1983. struct kvm_mmu_page *sp;
  1984. int i;
  1985. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  1986. u64 *pt = sp->spt;
  1987. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  1988. continue;
  1989. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1990. u64 ent = pt[i];
  1991. if (!(ent & PT_PRESENT_MASK))
  1992. continue;
  1993. if (!(ent & PT_WRITABLE_MASK))
  1994. continue;
  1995. ++nmaps;
  1996. }
  1997. }
  1998. return nmaps;
  1999. }
  2000. static void audit_rmap(struct kvm_vcpu *vcpu)
  2001. {
  2002. int n_rmap = count_rmaps(vcpu);
  2003. int n_actual = count_writable_mappings(vcpu);
  2004. if (n_rmap != n_actual)
  2005. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2006. __func__, audit_msg, n_rmap, n_actual);
  2007. }
  2008. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2009. {
  2010. struct kvm_mmu_page *sp;
  2011. struct kvm_memory_slot *slot;
  2012. unsigned long *rmapp;
  2013. gfn_t gfn;
  2014. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2015. if (sp->role.metaphysical)
  2016. continue;
  2017. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  2018. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2019. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2020. if (*rmapp)
  2021. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2022. " mappings: gfn %lx role %x\n",
  2023. __func__, audit_msg, sp->gfn,
  2024. sp->role.word);
  2025. }
  2026. }
  2027. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2028. {
  2029. int olddbg = dbg;
  2030. dbg = 0;
  2031. audit_msg = msg;
  2032. audit_rmap(vcpu);
  2033. audit_write_protection(vcpu);
  2034. audit_mappings(vcpu);
  2035. dbg = olddbg;
  2036. }
  2037. #endif