irq.c 6.0 KB

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  1. /*
  2. * Toshiba RBTX4927 specific interrupt handlers
  3. *
  4. * Author: MontaVista Software, Inc.
  5. * source@mvista.com
  6. *
  7. * Copyright 2001-2002 MontaVista Software Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  17. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  18. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  19. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  20. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  21. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  22. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  23. * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. *
  25. * You should have received a copy of the GNU General Public License along
  26. * with this program; if not, write to the Free Software Foundation, Inc.,
  27. * 675 Mass Ave, Cambridge, MA 02139, USA.
  28. */
  29. /*
  30. IRQ Device
  31. 00 RBTX4927-ISA/00
  32. 01 RBTX4927-ISA/01 PS2/Keyboard
  33. 02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
  34. 03 RBTX4927-ISA/03
  35. 04 RBTX4927-ISA/04
  36. 05 RBTX4927-ISA/05
  37. 06 RBTX4927-ISA/06
  38. 07 RBTX4927-ISA/07
  39. 08 RBTX4927-ISA/08
  40. 09 RBTX4927-ISA/09
  41. 10 RBTX4927-ISA/10
  42. 11 RBTX4927-ISA/11
  43. 12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
  44. 13 RBTX4927-ISA/13
  45. 14 RBTX4927-ISA/14 IDE
  46. 15 RBTX4927-ISA/15
  47. 16 TX4927-CP0/00 Software 0
  48. 17 TX4927-CP0/01 Software 1
  49. 18 TX4927-CP0/02 Cascade TX4927-CP0
  50. 19 TX4927-CP0/03 Multiplexed -- do not use
  51. 20 TX4927-CP0/04 Multiplexed -- do not use
  52. 21 TX4927-CP0/05 Multiplexed -- do not use
  53. 22 TX4927-CP0/06 Multiplexed -- do not use
  54. 23 TX4927-CP0/07 CPU TIMER
  55. 24 TX4927-PIC/00
  56. 25 TX4927-PIC/01
  57. 26 TX4927-PIC/02
  58. 27 TX4927-PIC/03 Cascade RBTX4927-IOC
  59. 28 TX4927-PIC/04
  60. 29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
  61. 30 TX4927-PIC/06
  62. 31 TX4927-PIC/07
  63. 32 TX4927-PIC/08 TX4927 SerialIO Channel 0
  64. 33 TX4927-PIC/09 TX4927 SerialIO Channel 1
  65. 34 TX4927-PIC/10
  66. 35 TX4927-PIC/11
  67. 36 TX4927-PIC/12
  68. 37 TX4927-PIC/13
  69. 38 TX4927-PIC/14
  70. 39 TX4927-PIC/15
  71. 40 TX4927-PIC/16 TX4927 PCI PCI-C
  72. 41 TX4927-PIC/17
  73. 42 TX4927-PIC/18
  74. 43 TX4927-PIC/19
  75. 44 TX4927-PIC/20
  76. 45 TX4927-PIC/21
  77. 46 TX4927-PIC/22 TX4927 PCI PCI-ERR
  78. 47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
  79. 48 TX4927-PIC/24
  80. 49 TX4927-PIC/25
  81. 50 TX4927-PIC/26
  82. 51 TX4927-PIC/27
  83. 52 TX4927-PIC/28
  84. 53 TX4927-PIC/29
  85. 54 TX4927-PIC/30
  86. 55 TX4927-PIC/31
  87. 56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
  88. 57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
  89. 58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
  90. 59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
  91. 60 RBTX4927-IOC/04
  92. 61 RBTX4927-IOC/05
  93. 62 RBTX4927-IOC/06
  94. 63 RBTX4927-IOC/07
  95. NOTES:
  96. SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
  97. SouthBridge/ISA/pin=0 no pci irq used by this device
  98. SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
  99. SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
  100. SouthBridge/PMC/pin=0 no pci irq used by this device
  101. SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
  102. SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
  103. JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
  104. */
  105. #include <linux/init.h>
  106. #include <linux/types.h>
  107. #include <linux/interrupt.h>
  108. #include <asm/io.h>
  109. #include <asm/mipsregs.h>
  110. #include <asm/txx9/generic.h>
  111. #include <asm/txx9/rbtx4927.h>
  112. static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
  113. static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
  114. #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
  115. static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
  116. .name = TOSHIBA_RBTX4927_IOC_NAME,
  117. .ack = toshiba_rbtx4927_irq_ioc_disable,
  118. .mask = toshiba_rbtx4927_irq_ioc_disable,
  119. .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
  120. .unmask = toshiba_rbtx4927_irq_ioc_enable,
  121. };
  122. static int toshiba_rbtx4927_irq_nested(int sw_irq)
  123. {
  124. u8 level3;
  125. level3 = readb(rbtx4927_imstat_addr) & 0x1f;
  126. if (level3)
  127. sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
  128. return (sw_irq);
  129. }
  130. static void __init toshiba_rbtx4927_irq_ioc_init(void)
  131. {
  132. int i;
  133. for (i = RBTX4927_IRQ_IOC;
  134. i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
  135. set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
  136. handle_level_irq);
  137. set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
  138. }
  139. static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
  140. {
  141. unsigned char v;
  142. v = readb(rbtx4927_imask_addr);
  143. v |= (1 << (irq - RBTX4927_IRQ_IOC));
  144. writeb(v, rbtx4927_imask_addr);
  145. }
  146. static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
  147. {
  148. unsigned char v;
  149. v = readb(rbtx4927_imask_addr);
  150. v &= ~(1 << (irq - RBTX4927_IRQ_IOC));
  151. writeb(v, rbtx4927_imask_addr);
  152. mmiowb();
  153. }
  154. static int rbtx4927_irq_dispatch(int pending)
  155. {
  156. int irq;
  157. if (pending & STATUSF_IP7) /* cpu timer */
  158. irq = MIPS_CPU_IRQ_BASE + 7;
  159. else if (pending & STATUSF_IP2) { /* tx4927 pic */
  160. irq = txx9_irq();
  161. if (irq == RBTX4927_IRQ_IOCINT)
  162. irq = toshiba_rbtx4927_irq_nested(irq);
  163. } else if (pending & STATUSF_IP0) /* user line 0 */
  164. irq = MIPS_CPU_IRQ_BASE + 0;
  165. else if (pending & STATUSF_IP1) /* user line 1 */
  166. irq = MIPS_CPU_IRQ_BASE + 1;
  167. else
  168. irq = -1;
  169. return irq;
  170. }
  171. void __init rbtx4927_irq_setup(void)
  172. {
  173. txx9_irq_dispatch = rbtx4927_irq_dispatch;
  174. tx4927_irq_init();
  175. toshiba_rbtx4927_irq_ioc_init();
  176. /* Onboard 10M Ether: High Active */
  177. set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
  178. }