media-dev.c 38 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527
  1. /*
  2. * S5P/EXYNOS4 SoC series camera host interface media device driver
  3. *
  4. * Copyright (C) 2011 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published
  9. * by the Free Software Foundation, either version 2 of the License,
  10. * or (at your option) any later version.
  11. */
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/i2c.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/of_device.h>
  22. #include <linux/of_i2c.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/types.h>
  26. #include <linux/slab.h>
  27. #include <media/v4l2-ctrls.h>
  28. #include <media/v4l2-of.h>
  29. #include <media/media-device.h>
  30. #include <media/s5p_fimc.h>
  31. #include "media-dev.h"
  32. #include "fimc-core.h"
  33. #include "fimc-is.h"
  34. #include "fimc-lite.h"
  35. #include "mipi-csis.h"
  36. static int __fimc_md_set_camclk(struct fimc_md *fmd,
  37. struct fimc_source_info *si,
  38. bool on);
  39. /**
  40. * fimc_pipeline_prepare - update pipeline information with subdevice pointers
  41. * @me: media entity terminating the pipeline
  42. *
  43. * Caller holds the graph mutex.
  44. */
  45. static void fimc_pipeline_prepare(struct fimc_pipeline *p,
  46. struct media_entity *me)
  47. {
  48. struct v4l2_subdev *sd;
  49. int i;
  50. for (i = 0; i < IDX_MAX; i++)
  51. p->subdevs[i] = NULL;
  52. while (1) {
  53. struct media_pad *pad = NULL;
  54. /* Find remote source pad */
  55. for (i = 0; i < me->num_pads; i++) {
  56. struct media_pad *spad = &me->pads[i];
  57. if (!(spad->flags & MEDIA_PAD_FL_SINK))
  58. continue;
  59. pad = media_entity_remote_pad(spad);
  60. if (pad)
  61. break;
  62. }
  63. if (pad == NULL ||
  64. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  65. break;
  66. sd = media_entity_to_v4l2_subdev(pad->entity);
  67. switch (sd->grp_id) {
  68. case GRP_ID_FIMC_IS_SENSOR:
  69. case GRP_ID_SENSOR:
  70. p->subdevs[IDX_SENSOR] = sd;
  71. break;
  72. case GRP_ID_CSIS:
  73. p->subdevs[IDX_CSIS] = sd;
  74. break;
  75. case GRP_ID_FLITE:
  76. p->subdevs[IDX_FLITE] = sd;
  77. break;
  78. case GRP_ID_FIMC:
  79. /* No need to control FIMC subdev through subdev ops */
  80. break;
  81. case GRP_ID_FIMC_IS:
  82. p->subdevs[IDX_IS_ISP] = sd;
  83. break;
  84. default:
  85. break;
  86. }
  87. me = &sd->entity;
  88. if (me->num_pads == 1)
  89. break;
  90. }
  91. }
  92. /**
  93. * __subdev_set_power - change power state of a single subdev
  94. * @sd: subdevice to change power state for
  95. * @on: 1 to enable power or 0 to disable
  96. *
  97. * Return result of s_power subdev operation or -ENXIO if sd argument
  98. * is NULL. Return 0 if the subdevice does not implement s_power.
  99. */
  100. static int __subdev_set_power(struct v4l2_subdev *sd, int on)
  101. {
  102. int *use_count;
  103. int ret;
  104. if (sd == NULL)
  105. return -ENXIO;
  106. use_count = &sd->entity.use_count;
  107. if (on && (*use_count)++ > 0)
  108. return 0;
  109. else if (!on && (*use_count == 0 || --(*use_count) > 0))
  110. return 0;
  111. ret = v4l2_subdev_call(sd, core, s_power, on);
  112. return ret != -ENOIOCTLCMD ? ret : 0;
  113. }
  114. /**
  115. * fimc_pipeline_s_power - change power state of all pipeline subdevs
  116. * @fimc: fimc device terminating the pipeline
  117. * @state: true to power on, false to power off
  118. *
  119. * Needs to be called with the graph mutex held.
  120. */
  121. static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
  122. {
  123. static const u8 seq[2][IDX_MAX - 1] = {
  124. { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
  125. { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
  126. };
  127. int i, ret = 0;
  128. if (p->subdevs[IDX_SENSOR] == NULL)
  129. return -ENXIO;
  130. for (i = 0; i < IDX_MAX - 1; i++) {
  131. unsigned int idx = seq[on][i];
  132. ret = __subdev_set_power(p->subdevs[idx], on);
  133. if (ret < 0 && ret != -ENXIO)
  134. goto error;
  135. }
  136. return 0;
  137. error:
  138. for (; i >= 0; i--) {
  139. unsigned int idx = seq[on][i];
  140. __subdev_set_power(p->subdevs[idx], !on);
  141. }
  142. return ret;
  143. }
  144. /**
  145. * __fimc_pipeline_open - update the pipeline information, enable power
  146. * of all pipeline subdevs and the sensor clock
  147. * @me: media entity to start graph walk with
  148. * @prepare: true to walk the current pipeline and acquire all subdevs
  149. *
  150. * Called with the graph mutex held.
  151. */
  152. static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
  153. struct media_entity *me, bool prepare)
  154. {
  155. struct fimc_md *fmd = entity_to_fimc_mdev(me);
  156. struct fimc_pipeline *p = to_fimc_pipeline(ep);
  157. struct v4l2_subdev *sd;
  158. int ret;
  159. if (WARN_ON(p == NULL || me == NULL))
  160. return -EINVAL;
  161. if (prepare)
  162. fimc_pipeline_prepare(p, me);
  163. sd = p->subdevs[IDX_SENSOR];
  164. if (sd == NULL)
  165. return -EINVAL;
  166. /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
  167. if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
  168. ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
  169. if (ret < 0)
  170. return ret;
  171. }
  172. ret = fimc_md_set_camclk(sd, true);
  173. if (ret < 0)
  174. goto err_wbclk;
  175. ret = fimc_pipeline_s_power(p, 1);
  176. if (!ret)
  177. return 0;
  178. fimc_md_set_camclk(sd, false);
  179. err_wbclk:
  180. if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
  181. clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
  182. return ret;
  183. }
  184. /**
  185. * __fimc_pipeline_close - disable the sensor clock and pipeline power
  186. * @fimc: fimc device terminating the pipeline
  187. *
  188. * Disable power of all subdevs and turn the external sensor clock off.
  189. */
  190. static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
  191. {
  192. struct fimc_pipeline *p = to_fimc_pipeline(ep);
  193. struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
  194. struct fimc_md *fmd;
  195. int ret;
  196. if (sd == NULL) {
  197. pr_warn("%s(): No sensor subdev\n", __func__);
  198. return 0;
  199. }
  200. ret = fimc_pipeline_s_power(p, 0);
  201. fimc_md_set_camclk(sd, false);
  202. fmd = entity_to_fimc_mdev(&sd->entity);
  203. /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
  204. if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
  205. clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
  206. return ret == -ENXIO ? 0 : ret;
  207. }
  208. /**
  209. * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
  210. * @pipeline: video pipeline structure
  211. * @on: passed as the s_stream() callback argument
  212. */
  213. static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
  214. {
  215. static const u8 seq[2][IDX_MAX] = {
  216. { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
  217. { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
  218. };
  219. struct fimc_pipeline *p = to_fimc_pipeline(ep);
  220. int i, ret = 0;
  221. if (p->subdevs[IDX_SENSOR] == NULL)
  222. return -ENODEV;
  223. for (i = 0; i < IDX_MAX; i++) {
  224. unsigned int idx = seq[on][i];
  225. ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
  226. if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
  227. goto error;
  228. }
  229. return 0;
  230. error:
  231. for (; i >= 0; i--) {
  232. unsigned int idx = seq[on][i];
  233. v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
  234. }
  235. return ret;
  236. }
  237. /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
  238. static const struct exynos_media_pipeline_ops fimc_pipeline_ops = {
  239. .open = __fimc_pipeline_open,
  240. .close = __fimc_pipeline_close,
  241. .set_stream = __fimc_pipeline_s_stream,
  242. };
  243. static struct exynos_media_pipeline *fimc_md_pipeline_create(
  244. struct fimc_md *fmd)
  245. {
  246. struct fimc_pipeline *p;
  247. p = kzalloc(sizeof(*p), GFP_KERNEL);
  248. if (!p)
  249. return NULL;
  250. list_add_tail(&p->list, &fmd->pipelines);
  251. p->ep.ops = &fimc_pipeline_ops;
  252. return &p->ep;
  253. }
  254. static void fimc_md_pipelines_free(struct fimc_md *fmd)
  255. {
  256. while (!list_empty(&fmd->pipelines)) {
  257. struct fimc_pipeline *p;
  258. p = list_entry(fmd->pipelines.next, typeof(*p), list);
  259. list_del(&p->list);
  260. kfree(p);
  261. }
  262. }
  263. /*
  264. * Sensor subdevice helper functions
  265. */
  266. static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
  267. struct fimc_source_info *si)
  268. {
  269. struct i2c_adapter *adapter;
  270. struct v4l2_subdev *sd = NULL;
  271. if (!si || !fmd)
  272. return NULL;
  273. /*
  274. * If FIMC bus type is not Writeback FIFO assume it is same
  275. * as sensor_bus_type.
  276. */
  277. si->fimc_bus_type = si->sensor_bus_type;
  278. adapter = i2c_get_adapter(si->i2c_bus_num);
  279. if (!adapter) {
  280. v4l2_warn(&fmd->v4l2_dev,
  281. "Failed to get I2C adapter %d, deferring probe\n",
  282. si->i2c_bus_num);
  283. return ERR_PTR(-EPROBE_DEFER);
  284. }
  285. sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter,
  286. si->board_info, NULL);
  287. if (IS_ERR_OR_NULL(sd)) {
  288. i2c_put_adapter(adapter);
  289. v4l2_warn(&fmd->v4l2_dev,
  290. "Failed to acquire subdev %s, deferring probe\n",
  291. si->board_info->type);
  292. return ERR_PTR(-EPROBE_DEFER);
  293. }
  294. v4l2_set_subdev_hostdata(sd, si);
  295. sd->grp_id = GRP_ID_SENSOR;
  296. v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice %s\n",
  297. sd->name);
  298. return sd;
  299. }
  300. static void fimc_md_unregister_sensor(struct v4l2_subdev *sd)
  301. {
  302. struct i2c_client *client = v4l2_get_subdevdata(sd);
  303. struct i2c_adapter *adapter;
  304. if (!client)
  305. return;
  306. v4l2_device_unregister_subdev(sd);
  307. if (!client->dev.of_node) {
  308. adapter = client->adapter;
  309. i2c_unregister_device(client);
  310. if (adapter)
  311. i2c_put_adapter(adapter);
  312. }
  313. }
  314. #ifdef CONFIG_OF
  315. /* Register I2C client subdev associated with @node. */
  316. static int fimc_md_of_add_sensor(struct fimc_md *fmd,
  317. struct device_node *node, int index)
  318. {
  319. struct fimc_sensor_info *si;
  320. struct i2c_client *client;
  321. struct v4l2_subdev *sd;
  322. int ret;
  323. if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor)))
  324. return -EINVAL;
  325. si = &fmd->sensor[index];
  326. client = of_find_i2c_device_by_node(node);
  327. if (!client)
  328. return -EPROBE_DEFER;
  329. device_lock(&client->dev);
  330. if (!client->driver ||
  331. !try_module_get(client->driver->driver.owner)) {
  332. ret = -EPROBE_DEFER;
  333. v4l2_info(&fmd->v4l2_dev, "No driver found for %s\n",
  334. node->full_name);
  335. goto dev_put;
  336. }
  337. /* Enable sensor's master clock */
  338. ret = __fimc_md_set_camclk(fmd, &si->pdata, true);
  339. if (ret < 0)
  340. goto mod_put;
  341. sd = i2c_get_clientdata(client);
  342. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  343. __fimc_md_set_camclk(fmd, &si->pdata, false);
  344. if (ret < 0)
  345. goto mod_put;
  346. v4l2_set_subdev_hostdata(sd, &si->pdata);
  347. if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
  348. sd->grp_id = GRP_ID_FIMC_IS_SENSOR;
  349. else
  350. sd->grp_id = GRP_ID_SENSOR;
  351. si->subdev = sd;
  352. v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
  353. sd->name, fmd->num_sensors);
  354. fmd->num_sensors++;
  355. mod_put:
  356. module_put(client->driver->driver.owner);
  357. dev_put:
  358. device_unlock(&client->dev);
  359. put_device(&client->dev);
  360. return ret;
  361. }
  362. /* Parse port node and register as a sub-device any sensor specified there. */
  363. static int fimc_md_parse_port_node(struct fimc_md *fmd,
  364. struct device_node *port,
  365. unsigned int index)
  366. {
  367. struct device_node *rem, *ep, *np;
  368. struct fimc_source_info *pd;
  369. struct v4l2_of_endpoint endpoint;
  370. int ret;
  371. u32 val;
  372. pd = &fmd->sensor[index].pdata;
  373. /* Assume here a port node can have only one endpoint node. */
  374. ep = of_get_next_child(port, NULL);
  375. if (!ep)
  376. return 0;
  377. v4l2_of_parse_endpoint(ep, &endpoint);
  378. if (WARN_ON(endpoint.port == 0) || index >= FIMC_MAX_SENSORS)
  379. return -EINVAL;
  380. pd->mux_id = (endpoint.port - 1) & 0x1;
  381. rem = v4l2_of_get_remote_port_parent(ep);
  382. of_node_put(ep);
  383. if (rem == NULL) {
  384. v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
  385. ep->full_name);
  386. return 0;
  387. }
  388. if (!of_property_read_u32(rem, "samsung,camclk-out", &val))
  389. pd->clk_id = val;
  390. if (!of_property_read_u32(rem, "clock-frequency", &val))
  391. pd->clk_frequency = val;
  392. if (pd->clk_frequency == 0) {
  393. v4l2_err(&fmd->v4l2_dev, "Wrong clock frequency at node %s\n",
  394. rem->full_name);
  395. of_node_put(rem);
  396. return -EINVAL;
  397. }
  398. if (fimc_input_is_parallel(endpoint.port)) {
  399. if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
  400. pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
  401. else
  402. pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
  403. pd->flags = endpoint.bus.parallel.flags;
  404. } else if (fimc_input_is_mipi_csi(endpoint.port)) {
  405. /*
  406. * MIPI CSI-2: only input mux selection and
  407. * the sensor's clock frequency is needed.
  408. */
  409. pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
  410. } else {
  411. v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
  412. endpoint.port, rem->full_name);
  413. }
  414. /*
  415. * For FIMC-IS handled sensors, that are placed under i2c-isp device
  416. * node, FIMC is connected to the FIMC-IS through its ISP Writeback
  417. * input. Sensors are attached to the FIMC-LITE hostdata interface
  418. * directly or through MIPI-CSIS, depending on the external media bus
  419. * used. This needs to be handled in a more reliable way, not by just
  420. * checking parent's node name.
  421. */
  422. np = of_get_parent(rem);
  423. if (np && !of_node_cmp(np->name, "i2c-isp"))
  424. pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  425. else
  426. pd->fimc_bus_type = pd->sensor_bus_type;
  427. ret = fimc_md_of_add_sensor(fmd, rem, index);
  428. of_node_put(rem);
  429. return ret;
  430. }
  431. /* Register all SoC external sub-devices */
  432. static int fimc_md_of_sensors_register(struct fimc_md *fmd,
  433. struct device_node *np)
  434. {
  435. struct device_node *parent = fmd->pdev->dev.of_node;
  436. struct device_node *node, *ports;
  437. int index = 0;
  438. int ret;
  439. /* Attach sensors linked to MIPI CSI-2 receivers */
  440. for_each_available_child_of_node(parent, node) {
  441. struct device_node *port;
  442. if (of_node_cmp(node->name, "csis"))
  443. continue;
  444. /* The csis node can have only port subnode. */
  445. port = of_get_next_child(node, NULL);
  446. if (!port)
  447. continue;
  448. ret = fimc_md_parse_port_node(fmd, port, index);
  449. if (ret < 0)
  450. return ret;
  451. index++;
  452. }
  453. /* Attach sensors listed in the parallel-ports node */
  454. ports = of_get_child_by_name(parent, "parallel-ports");
  455. if (!ports)
  456. return 0;
  457. for_each_child_of_node(ports, node) {
  458. ret = fimc_md_parse_port_node(fmd, node, index);
  459. if (ret < 0)
  460. break;
  461. index++;
  462. }
  463. return 0;
  464. }
  465. static int __of_get_csis_id(struct device_node *np)
  466. {
  467. u32 reg = 0;
  468. np = of_get_child_by_name(np, "port");
  469. if (!np)
  470. return -EINVAL;
  471. of_property_read_u32(np, "reg", &reg);
  472. return reg - FIMC_INPUT_MIPI_CSI2_0;
  473. }
  474. #else
  475. #define fimc_md_of_sensors_register(fmd, np) (-ENOSYS)
  476. #define __of_get_csis_id(np) (-ENOSYS)
  477. #endif
  478. static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
  479. {
  480. struct s5p_platform_fimc *pdata = fmd->pdev->dev.platform_data;
  481. struct device_node *of_node = fmd->pdev->dev.of_node;
  482. int num_clients = 0;
  483. int ret, i;
  484. /*
  485. * Runtime resume one of the FIMC entities to make sure
  486. * the sclk_cam clocks are not globally disabled.
  487. */
  488. if (!fmd->pmf)
  489. return -ENXIO;
  490. ret = pm_runtime_get_sync(fmd->pmf);
  491. if (ret < 0)
  492. return ret;
  493. if (of_node) {
  494. fmd->num_sensors = 0;
  495. ret = fimc_md_of_sensors_register(fmd, of_node);
  496. } else if (pdata) {
  497. WARN_ON(pdata->num_clients > ARRAY_SIZE(fmd->sensor));
  498. num_clients = min_t(u32, pdata->num_clients,
  499. ARRAY_SIZE(fmd->sensor));
  500. fmd->num_sensors = num_clients;
  501. for (i = 0; i < num_clients; i++) {
  502. struct fimc_sensor_info *si = &fmd->sensor[i];
  503. struct v4l2_subdev *sd;
  504. si->pdata = pdata->source_info[i];
  505. ret = __fimc_md_set_camclk(fmd, &si->pdata, true);
  506. if (ret)
  507. break;
  508. sd = fimc_md_register_sensor(fmd, &si->pdata);
  509. ret = __fimc_md_set_camclk(fmd, &si->pdata, false);
  510. if (IS_ERR(sd)) {
  511. si->subdev = NULL;
  512. ret = PTR_ERR(sd);
  513. break;
  514. }
  515. si->subdev = sd;
  516. if (ret)
  517. break;
  518. }
  519. }
  520. pm_runtime_put(fmd->pmf);
  521. return ret;
  522. }
  523. /*
  524. * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
  525. */
  526. static int register_fimc_lite_entity(struct fimc_md *fmd,
  527. struct fimc_lite *fimc_lite)
  528. {
  529. struct v4l2_subdev *sd;
  530. struct exynos_media_pipeline *ep;
  531. int ret;
  532. if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
  533. fmd->fimc_lite[fimc_lite->index]))
  534. return -EBUSY;
  535. sd = &fimc_lite->subdev;
  536. sd->grp_id = GRP_ID_FLITE;
  537. ep = fimc_md_pipeline_create(fmd);
  538. if (!ep)
  539. return -ENOMEM;
  540. v4l2_set_subdev_hostdata(sd, ep);
  541. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  542. if (!ret)
  543. fmd->fimc_lite[fimc_lite->index] = fimc_lite;
  544. else
  545. v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
  546. fimc_lite->index);
  547. return ret;
  548. }
  549. static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
  550. {
  551. struct v4l2_subdev *sd;
  552. struct exynos_media_pipeline *ep;
  553. int ret;
  554. if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
  555. return -EBUSY;
  556. sd = &fimc->vid_cap.subdev;
  557. sd->grp_id = GRP_ID_FIMC;
  558. ep = fimc_md_pipeline_create(fmd);
  559. if (!ep)
  560. return -ENOMEM;
  561. v4l2_set_subdev_hostdata(sd, ep);
  562. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  563. if (!ret) {
  564. if (!fmd->pmf && fimc->pdev)
  565. fmd->pmf = &fimc->pdev->dev;
  566. fmd->fimc[fimc->id] = fimc;
  567. fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
  568. } else {
  569. v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
  570. fimc->id, ret);
  571. }
  572. return ret;
  573. }
  574. static int register_csis_entity(struct fimc_md *fmd,
  575. struct platform_device *pdev,
  576. struct v4l2_subdev *sd)
  577. {
  578. struct device_node *node = pdev->dev.of_node;
  579. int id, ret;
  580. id = node ? __of_get_csis_id(node) : max(0, pdev->id);
  581. if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
  582. return -ENOENT;
  583. if (WARN_ON(fmd->csis[id].sd))
  584. return -EBUSY;
  585. sd->grp_id = GRP_ID_CSIS;
  586. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  587. if (!ret)
  588. fmd->csis[id].sd = sd;
  589. else
  590. v4l2_err(&fmd->v4l2_dev,
  591. "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
  592. return ret;
  593. }
  594. static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
  595. {
  596. struct v4l2_subdev *sd = &is->isp.subdev;
  597. int ret;
  598. ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
  599. if (ret) {
  600. v4l2_err(&fmd->v4l2_dev,
  601. "Failed to register FIMC-ISP (%d)\n", ret);
  602. return ret;
  603. }
  604. fmd->fimc_is = is;
  605. return 0;
  606. }
  607. static int fimc_md_register_platform_entity(struct fimc_md *fmd,
  608. struct platform_device *pdev,
  609. int plat_entity)
  610. {
  611. struct device *dev = &pdev->dev;
  612. int ret = -EPROBE_DEFER;
  613. void *drvdata;
  614. /* Lock to ensure dev->driver won't change. */
  615. device_lock(dev);
  616. if (!dev->driver || !try_module_get(dev->driver->owner))
  617. goto dev_unlock;
  618. drvdata = dev_get_drvdata(dev);
  619. /* Some subdev didn't probe succesfully id drvdata is NULL */
  620. if (drvdata) {
  621. switch (plat_entity) {
  622. case IDX_FIMC:
  623. ret = register_fimc_entity(fmd, drvdata);
  624. break;
  625. case IDX_FLITE:
  626. ret = register_fimc_lite_entity(fmd, drvdata);
  627. break;
  628. case IDX_CSIS:
  629. ret = register_csis_entity(fmd, pdev, drvdata);
  630. break;
  631. case IDX_IS_ISP:
  632. ret = register_fimc_is_entity(fmd, drvdata);
  633. break;
  634. default:
  635. ret = -ENODEV;
  636. }
  637. }
  638. module_put(dev->driver->owner);
  639. dev_unlock:
  640. device_unlock(dev);
  641. if (ret == -EPROBE_DEFER)
  642. dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
  643. dev_name(dev));
  644. else if (ret < 0)
  645. dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
  646. dev_name(dev), ret);
  647. return ret;
  648. }
  649. static int fimc_md_pdev_match(struct device *dev, void *data)
  650. {
  651. struct platform_device *pdev = to_platform_device(dev);
  652. int plat_entity = -1;
  653. int ret;
  654. char *p;
  655. if (!get_device(dev))
  656. return -ENODEV;
  657. if (!strcmp(pdev->name, CSIS_DRIVER_NAME)) {
  658. plat_entity = IDX_CSIS;
  659. } else if (!strcmp(pdev->name, FIMC_LITE_DRV_NAME)) {
  660. plat_entity = IDX_FLITE;
  661. } else {
  662. p = strstr(pdev->name, "fimc");
  663. if (p && *(p + 4) == 0)
  664. plat_entity = IDX_FIMC;
  665. }
  666. if (plat_entity >= 0)
  667. ret = fimc_md_register_platform_entity(data, pdev,
  668. plat_entity);
  669. put_device(dev);
  670. return 0;
  671. }
  672. /* Register FIMC, FIMC-LITE and CSIS media entities */
  673. #ifdef CONFIG_OF
  674. static int fimc_md_register_of_platform_entities(struct fimc_md *fmd,
  675. struct device_node *parent)
  676. {
  677. struct device_node *node;
  678. int ret = 0;
  679. for_each_available_child_of_node(parent, node) {
  680. struct platform_device *pdev;
  681. int plat_entity = -1;
  682. pdev = of_find_device_by_node(node);
  683. if (!pdev)
  684. continue;
  685. /* If driver of any entity isn't ready try all again later. */
  686. if (!strcmp(node->name, CSIS_OF_NODE_NAME))
  687. plat_entity = IDX_CSIS;
  688. else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME))
  689. plat_entity = IDX_IS_ISP;
  690. else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
  691. plat_entity = IDX_FLITE;
  692. else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
  693. !of_property_read_bool(node, "samsung,lcd-wb"))
  694. plat_entity = IDX_FIMC;
  695. if (plat_entity >= 0)
  696. ret = fimc_md_register_platform_entity(fmd, pdev,
  697. plat_entity);
  698. put_device(&pdev->dev);
  699. if (ret < 0)
  700. break;
  701. }
  702. return ret;
  703. }
  704. #else
  705. #define fimc_md_register_of_platform_entities(fmd, node) (-ENOSYS)
  706. #endif
  707. static void fimc_md_unregister_entities(struct fimc_md *fmd)
  708. {
  709. int i;
  710. for (i = 0; i < FIMC_MAX_DEVS; i++) {
  711. struct fimc_dev *dev = fmd->fimc[i];
  712. if (dev == NULL)
  713. continue;
  714. v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
  715. dev->vid_cap.ve.pipe = NULL;
  716. fmd->fimc[i] = NULL;
  717. }
  718. for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
  719. struct fimc_lite *dev = fmd->fimc_lite[i];
  720. if (dev == NULL)
  721. continue;
  722. v4l2_device_unregister_subdev(&dev->subdev);
  723. dev->ve.pipe = NULL;
  724. fmd->fimc_lite[i] = NULL;
  725. }
  726. for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
  727. if (fmd->csis[i].sd == NULL)
  728. continue;
  729. v4l2_device_unregister_subdev(fmd->csis[i].sd);
  730. fmd->csis[i].sd = NULL;
  731. }
  732. for (i = 0; i < fmd->num_sensors; i++) {
  733. if (fmd->sensor[i].subdev == NULL)
  734. continue;
  735. fimc_md_unregister_sensor(fmd->sensor[i].subdev);
  736. fmd->sensor[i].subdev = NULL;
  737. }
  738. if (fmd->fimc_is)
  739. v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
  740. v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
  741. }
  742. /**
  743. * __fimc_md_create_fimc_links - create links to all FIMC entities
  744. * @fmd: fimc media device
  745. * @source: the source entity to create links to all fimc entities from
  746. * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
  747. * @pad: the source entity pad index
  748. * @link_mask: bitmask of the fimc devices for which link should be enabled
  749. */
  750. static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
  751. struct media_entity *source,
  752. struct v4l2_subdev *sensor,
  753. int pad, int link_mask)
  754. {
  755. struct fimc_source_info *si = NULL;
  756. struct media_entity *sink;
  757. unsigned int flags = 0;
  758. int i, ret = 0;
  759. if (sensor) {
  760. si = v4l2_get_subdev_hostdata(sensor);
  761. /* Skip direct FIMC links in the logical FIMC-IS sensor path */
  762. if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
  763. ret = 1;
  764. }
  765. for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
  766. if (!fmd->fimc[i])
  767. continue;
  768. /*
  769. * Some FIMC variants are not fitted with camera capture
  770. * interface. Skip creating a link from sensor for those.
  771. */
  772. if (!fmd->fimc[i]->variant->has_cam_if)
  773. continue;
  774. flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
  775. sink = &fmd->fimc[i]->vid_cap.subdev.entity;
  776. ret = media_entity_create_link(source, pad, sink,
  777. FIMC_SD_PAD_SINK_CAM, flags);
  778. if (ret)
  779. return ret;
  780. /* Notify FIMC capture subdev entity */
  781. ret = media_entity_call(sink, link_setup, &sink->pads[0],
  782. &source->pads[pad], flags);
  783. if (ret)
  784. break;
  785. v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
  786. source->name, flags ? '=' : '-', sink->name);
  787. if (flags == 0 || sensor == NULL)
  788. continue;
  789. if (!WARN_ON(si == NULL)) {
  790. unsigned long irq_flags;
  791. struct fimc_sensor_info *inf = source_to_sensor_info(si);
  792. spin_lock_irqsave(&fmd->slock, irq_flags);
  793. inf->host = fmd->fimc[i];
  794. spin_unlock_irqrestore(&fmd->slock, irq_flags);
  795. }
  796. }
  797. for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
  798. if (!fmd->fimc_lite[i])
  799. continue;
  800. sink = &fmd->fimc_lite[i]->subdev.entity;
  801. ret = media_entity_create_link(source, pad, sink,
  802. FLITE_SD_PAD_SINK, 0);
  803. if (ret)
  804. return ret;
  805. /* Notify FIMC-LITE subdev entity */
  806. ret = media_entity_call(sink, link_setup, &sink->pads[0],
  807. &source->pads[pad], 0);
  808. if (ret)
  809. break;
  810. v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
  811. source->name, sink->name);
  812. }
  813. return 0;
  814. }
  815. /* Create links from FIMC-LITE source pads to other entities */
  816. static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
  817. {
  818. struct media_entity *source, *sink;
  819. int i, ret = 0;
  820. for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
  821. struct fimc_lite *fimc = fmd->fimc_lite[i];
  822. if (fimc == NULL)
  823. continue;
  824. source = &fimc->subdev.entity;
  825. sink = &fimc->ve.vdev.entity;
  826. /* FIMC-LITE's subdev and video node */
  827. ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA,
  828. sink, 0, 0);
  829. if (ret)
  830. break;
  831. /* Link from FIMC-LITE to IS-ISP subdev */
  832. sink = &fmd->fimc_is->isp.subdev.entity;
  833. ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_ISP,
  834. sink, 0, 0);
  835. if (ret)
  836. break;
  837. }
  838. return ret;
  839. }
  840. /* Create FIMC-IS links */
  841. static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
  842. {
  843. struct media_entity *source, *sink;
  844. int i, ret;
  845. source = &fmd->fimc_is->isp.subdev.entity;
  846. for (i = 0; i < FIMC_MAX_DEVS; i++) {
  847. if (fmd->fimc[i] == NULL)
  848. continue;
  849. /* Link from IS-ISP subdev to FIMC */
  850. sink = &fmd->fimc[i]->vid_cap.subdev.entity;
  851. ret = media_entity_create_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
  852. sink, FIMC_SD_PAD_SINK_FIFO, 0);
  853. if (ret)
  854. return ret;
  855. }
  856. return ret;
  857. }
  858. /**
  859. * fimc_md_create_links - create default links between registered entities
  860. *
  861. * Parallel interface sensor entities are connected directly to FIMC capture
  862. * entities. The sensors using MIPI CSIS bus are connected through immutable
  863. * link with CSI receiver entity specified by mux_id. Any registered CSIS
  864. * entity has a link to each registered FIMC capture entity. Enabled links
  865. * are created by default between each subsequent registered sensor and
  866. * subsequent FIMC capture entity. The number of default active links is
  867. * determined by the number of available sensors or FIMC entities,
  868. * whichever is less.
  869. */
  870. static int fimc_md_create_links(struct fimc_md *fmd)
  871. {
  872. struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
  873. struct v4l2_subdev *sensor, *csis;
  874. struct fimc_source_info *pdata;
  875. struct media_entity *source, *sink;
  876. int i, pad, fimc_id = 0, ret = 0;
  877. u32 flags, link_mask = 0;
  878. for (i = 0; i < fmd->num_sensors; i++) {
  879. if (fmd->sensor[i].subdev == NULL)
  880. continue;
  881. sensor = fmd->sensor[i].subdev;
  882. pdata = v4l2_get_subdev_hostdata(sensor);
  883. if (!pdata)
  884. continue;
  885. source = NULL;
  886. switch (pdata->sensor_bus_type) {
  887. case FIMC_BUS_TYPE_MIPI_CSI2:
  888. if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
  889. "Wrong CSI channel id: %d\n", pdata->mux_id))
  890. return -EINVAL;
  891. csis = fmd->csis[pdata->mux_id].sd;
  892. if (WARN(csis == NULL,
  893. "MIPI-CSI interface specified "
  894. "but s5p-csis module is not loaded!\n"))
  895. return -EINVAL;
  896. pad = sensor->entity.num_pads - 1;
  897. ret = media_entity_create_link(&sensor->entity, pad,
  898. &csis->entity, CSIS_PAD_SINK,
  899. MEDIA_LNK_FL_IMMUTABLE |
  900. MEDIA_LNK_FL_ENABLED);
  901. if (ret)
  902. return ret;
  903. v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
  904. sensor->entity.name, csis->entity.name);
  905. source = NULL;
  906. csi_sensors[pdata->mux_id] = sensor;
  907. break;
  908. case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
  909. source = &sensor->entity;
  910. pad = 0;
  911. break;
  912. default:
  913. v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
  914. pdata->sensor_bus_type);
  915. return -EINVAL;
  916. }
  917. if (source == NULL)
  918. continue;
  919. link_mask = 1 << fimc_id++;
  920. ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
  921. pad, link_mask);
  922. }
  923. for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
  924. if (fmd->csis[i].sd == NULL)
  925. continue;
  926. source = &fmd->csis[i].sd->entity;
  927. pad = CSIS_PAD_SOURCE;
  928. sensor = csi_sensors[i];
  929. link_mask = 1 << fimc_id++;
  930. ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
  931. pad, link_mask);
  932. }
  933. /* Create immutable links between each FIMC's subdev and video node */
  934. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  935. for (i = 0; i < FIMC_MAX_DEVS; i++) {
  936. if (!fmd->fimc[i])
  937. continue;
  938. source = &fmd->fimc[i]->vid_cap.subdev.entity;
  939. sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
  940. ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,
  941. sink, 0, flags);
  942. if (ret)
  943. break;
  944. }
  945. ret = __fimc_md_create_flite_source_links(fmd);
  946. if (ret < 0)
  947. return ret;
  948. if (fmd->use_isp)
  949. ret = __fimc_md_create_fimc_is_links(fmd);
  950. return ret;
  951. }
  952. /*
  953. * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
  954. */
  955. static void fimc_md_put_clocks(struct fimc_md *fmd)
  956. {
  957. int i = FIMC_MAX_CAMCLKS;
  958. while (--i >= 0) {
  959. if (IS_ERR(fmd->camclk[i].clock))
  960. continue;
  961. clk_unprepare(fmd->camclk[i].clock);
  962. clk_put(fmd->camclk[i].clock);
  963. fmd->camclk[i].clock = ERR_PTR(-EINVAL);
  964. }
  965. /* Writeback (PIXELASYNCMx) clocks */
  966. for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
  967. if (IS_ERR(fmd->wbclk[i]))
  968. continue;
  969. clk_put(fmd->wbclk[i]);
  970. fmd->wbclk[i] = ERR_PTR(-EINVAL);
  971. }
  972. }
  973. static int fimc_md_get_clocks(struct fimc_md *fmd)
  974. {
  975. struct device *dev = NULL;
  976. char clk_name[32];
  977. struct clk *clock;
  978. int ret, i;
  979. for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
  980. fmd->camclk[i].clock = ERR_PTR(-EINVAL);
  981. if (fmd->pdev->dev.of_node)
  982. dev = &fmd->pdev->dev;
  983. for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
  984. snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
  985. clock = clk_get(dev, clk_name);
  986. if (IS_ERR(clock)) {
  987. dev_err(&fmd->pdev->dev, "Failed to get clock: %s\n",
  988. clk_name);
  989. ret = PTR_ERR(clock);
  990. break;
  991. }
  992. ret = clk_prepare(clock);
  993. if (ret < 0) {
  994. clk_put(clock);
  995. fmd->camclk[i].clock = ERR_PTR(-EINVAL);
  996. break;
  997. }
  998. fmd->camclk[i].clock = clock;
  999. }
  1000. if (ret)
  1001. fimc_md_put_clocks(fmd);
  1002. if (!fmd->use_isp)
  1003. return 0;
  1004. /*
  1005. * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
  1006. * leave PIXELASYNCM0 out for the LCD Writeback driver.
  1007. */
  1008. fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
  1009. for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
  1010. snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
  1011. clock = clk_get(dev, clk_name);
  1012. if (IS_ERR(clock)) {
  1013. v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
  1014. clk_name);
  1015. ret = PTR_ERR(clock);
  1016. break;
  1017. }
  1018. fmd->wbclk[i] = clock;
  1019. }
  1020. if (ret)
  1021. fimc_md_put_clocks(fmd);
  1022. return ret;
  1023. }
  1024. static int __fimc_md_set_camclk(struct fimc_md *fmd,
  1025. struct fimc_source_info *si,
  1026. bool on)
  1027. {
  1028. struct fimc_camclk_info *camclk;
  1029. int ret = 0;
  1030. if (WARN_ON(si->clk_id >= FIMC_MAX_CAMCLKS) || !fmd || !fmd->pmf)
  1031. return -EINVAL;
  1032. camclk = &fmd->camclk[si->clk_id];
  1033. dbg("camclk %d, f: %lu, use_count: %d, on: %d",
  1034. si->clk_id, si->clk_frequency, camclk->use_count, on);
  1035. if (on) {
  1036. if (camclk->use_count > 0 &&
  1037. camclk->frequency != si->clk_frequency)
  1038. return -EINVAL;
  1039. if (camclk->use_count++ == 0) {
  1040. clk_set_rate(camclk->clock, si->clk_frequency);
  1041. camclk->frequency = si->clk_frequency;
  1042. ret = pm_runtime_get_sync(fmd->pmf);
  1043. if (ret < 0)
  1044. return ret;
  1045. ret = clk_enable(camclk->clock);
  1046. dbg("Enabled camclk %d: f: %lu", si->clk_id,
  1047. clk_get_rate(camclk->clock));
  1048. }
  1049. return ret;
  1050. }
  1051. if (WARN_ON(camclk->use_count == 0))
  1052. return 0;
  1053. if (--camclk->use_count == 0) {
  1054. clk_disable(camclk->clock);
  1055. pm_runtime_put(fmd->pmf);
  1056. dbg("Disabled camclk %d", si->clk_id);
  1057. }
  1058. return ret;
  1059. }
  1060. /**
  1061. * fimc_md_set_camclk - peripheral sensor clock setup
  1062. * @sd: sensor subdev to configure sclk_cam clock for
  1063. * @on: 1 to enable or 0 to disable the clock
  1064. *
  1065. * There are 2 separate clock outputs available in the SoC for external
  1066. * image processors. These clocks are shared between all registered FIMC
  1067. * devices to which sensors can be attached, either directly or through
  1068. * the MIPI CSI receiver. The clock is allowed here to be used by
  1069. * multiple sensors concurrently if they use same frequency.
  1070. * This function should only be called when the graph mutex is held.
  1071. */
  1072. int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on)
  1073. {
  1074. struct fimc_source_info *si = v4l2_get_subdev_hostdata(sd);
  1075. struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity);
  1076. return __fimc_md_set_camclk(fmd, si, on);
  1077. }
  1078. static int fimc_md_link_notify(struct media_pad *source,
  1079. struct media_pad *sink, u32 flags)
  1080. {
  1081. struct exynos_video_entity *ve;
  1082. struct video_device *vdev;
  1083. struct fimc_pipeline *pipeline;
  1084. int i, ret = 0;
  1085. if (media_entity_type(sink->entity) != MEDIA_ENT_T_DEVNODE_V4L)
  1086. return 0;
  1087. vdev = media_entity_to_video_device(sink->entity);
  1088. ve = vdev_to_exynos_video_entity(vdev);
  1089. pipeline = to_fimc_pipeline(ve->pipe);
  1090. if (!(flags & MEDIA_LNK_FL_ENABLED) && pipeline->subdevs[IDX_SENSOR]) {
  1091. if (sink->entity->use_count > 0)
  1092. ret = __fimc_pipeline_close(ve->pipe);
  1093. for (i = 0; i < IDX_MAX; i++)
  1094. pipeline->subdevs[i] = NULL;
  1095. } else if (sink->entity->use_count > 0) {
  1096. /*
  1097. * Link activation. Enable power of pipeline elements only if
  1098. * the pipeline is already in use, i.e. its video node is open.
  1099. * Recreate the controls destroyed during the link deactivation.
  1100. */
  1101. ret = __fimc_pipeline_open(ve->pipe, sink->entity, true);
  1102. }
  1103. return ret ? -EPIPE : ret;
  1104. }
  1105. static ssize_t fimc_md_sysfs_show(struct device *dev,
  1106. struct device_attribute *attr, char *buf)
  1107. {
  1108. struct platform_device *pdev = to_platform_device(dev);
  1109. struct fimc_md *fmd = platform_get_drvdata(pdev);
  1110. if (fmd->user_subdev_api)
  1111. return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
  1112. return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
  1113. }
  1114. static ssize_t fimc_md_sysfs_store(struct device *dev,
  1115. struct device_attribute *attr,
  1116. const char *buf, size_t count)
  1117. {
  1118. struct platform_device *pdev = to_platform_device(dev);
  1119. struct fimc_md *fmd = platform_get_drvdata(pdev);
  1120. bool subdev_api;
  1121. int i;
  1122. if (!strcmp(buf, "vid-dev\n"))
  1123. subdev_api = false;
  1124. else if (!strcmp(buf, "sub-dev\n"))
  1125. subdev_api = true;
  1126. else
  1127. return count;
  1128. fmd->user_subdev_api = subdev_api;
  1129. for (i = 0; i < FIMC_MAX_DEVS; i++)
  1130. if (fmd->fimc[i])
  1131. fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
  1132. return count;
  1133. }
  1134. /*
  1135. * This device attribute is to select video pipeline configuration method.
  1136. * There are following valid values:
  1137. * vid-dev - for V4L2 video node API only, subdevice will be configured
  1138. * by the host driver.
  1139. * sub-dev - for media controller API, subdevs must be configured in user
  1140. * space before starting streaming.
  1141. */
  1142. static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
  1143. fimc_md_sysfs_show, fimc_md_sysfs_store);
  1144. static int fimc_md_get_pinctrl(struct fimc_md *fmd)
  1145. {
  1146. struct device *dev = &fmd->pdev->dev;
  1147. struct fimc_pinctrl *pctl = &fmd->pinctl;
  1148. pctl->pinctrl = devm_pinctrl_get(dev);
  1149. if (IS_ERR(pctl->pinctrl))
  1150. return PTR_ERR(pctl->pinctrl);
  1151. pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
  1152. PINCTRL_STATE_DEFAULT);
  1153. if (IS_ERR(pctl->state_default))
  1154. return PTR_ERR(pctl->state_default);
  1155. pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
  1156. PINCTRL_STATE_IDLE);
  1157. return 0;
  1158. }
  1159. static int fimc_md_probe(struct platform_device *pdev)
  1160. {
  1161. struct device *dev = &pdev->dev;
  1162. struct v4l2_device *v4l2_dev;
  1163. struct fimc_md *fmd;
  1164. int ret;
  1165. fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
  1166. if (!fmd)
  1167. return -ENOMEM;
  1168. spin_lock_init(&fmd->slock);
  1169. fmd->pdev = pdev;
  1170. INIT_LIST_HEAD(&fmd->pipelines);
  1171. strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
  1172. sizeof(fmd->media_dev.model));
  1173. fmd->media_dev.link_notify = fimc_md_link_notify;
  1174. fmd->media_dev.dev = dev;
  1175. v4l2_dev = &fmd->v4l2_dev;
  1176. v4l2_dev->mdev = &fmd->media_dev;
  1177. v4l2_dev->notify = fimc_sensor_notify;
  1178. strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
  1179. fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
  1180. ret = v4l2_device_register(dev, &fmd->v4l2_dev);
  1181. if (ret < 0) {
  1182. v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
  1183. return ret;
  1184. }
  1185. ret = media_device_register(&fmd->media_dev);
  1186. if (ret < 0) {
  1187. v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret);
  1188. goto err_md;
  1189. }
  1190. ret = fimc_md_get_clocks(fmd);
  1191. if (ret)
  1192. goto err_clk;
  1193. fmd->user_subdev_api = (dev->of_node != NULL);
  1194. /* Protect the media graph while we're registering entities */
  1195. mutex_lock(&fmd->media_dev.graph_mutex);
  1196. ret = fimc_md_get_pinctrl(fmd);
  1197. if (ret < 0) {
  1198. if (ret != EPROBE_DEFER)
  1199. dev_err(dev, "Failed to get pinctrl: %d\n", ret);
  1200. goto err_unlock;
  1201. }
  1202. if (dev->of_node)
  1203. ret = fimc_md_register_of_platform_entities(fmd, dev->of_node);
  1204. else
  1205. ret = bus_for_each_dev(&platform_bus_type, NULL, fmd,
  1206. fimc_md_pdev_match);
  1207. if (ret)
  1208. goto err_unlock;
  1209. if (dev->platform_data || dev->of_node) {
  1210. ret = fimc_md_register_sensor_entities(fmd);
  1211. if (ret)
  1212. goto err_unlock;
  1213. }
  1214. ret = fimc_md_create_links(fmd);
  1215. if (ret)
  1216. goto err_unlock;
  1217. ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
  1218. if (ret)
  1219. goto err_unlock;
  1220. ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
  1221. if (ret)
  1222. goto err_unlock;
  1223. platform_set_drvdata(pdev, fmd);
  1224. mutex_unlock(&fmd->media_dev.graph_mutex);
  1225. return 0;
  1226. err_unlock:
  1227. mutex_unlock(&fmd->media_dev.graph_mutex);
  1228. err_clk:
  1229. media_device_unregister(&fmd->media_dev);
  1230. fimc_md_put_clocks(fmd);
  1231. fimc_md_unregister_entities(fmd);
  1232. err_md:
  1233. v4l2_device_unregister(&fmd->v4l2_dev);
  1234. return ret;
  1235. }
  1236. static int fimc_md_remove(struct platform_device *pdev)
  1237. {
  1238. struct fimc_md *fmd = platform_get_drvdata(pdev);
  1239. if (!fmd)
  1240. return 0;
  1241. device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
  1242. fimc_md_unregister_entities(fmd);
  1243. fimc_md_pipelines_free(fmd);
  1244. media_device_unregister(&fmd->media_dev);
  1245. fimc_md_put_clocks(fmd);
  1246. return 0;
  1247. }
  1248. static struct platform_device_id fimc_driver_ids[] __always_unused = {
  1249. { .name = "s5p-fimc-md" },
  1250. { },
  1251. };
  1252. MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
  1253. static const struct of_device_id fimc_md_of_match[] = {
  1254. { .compatible = "samsung,fimc" },
  1255. { },
  1256. };
  1257. MODULE_DEVICE_TABLE(of, fimc_md_of_match);
  1258. static struct platform_driver fimc_md_driver = {
  1259. .probe = fimc_md_probe,
  1260. .remove = fimc_md_remove,
  1261. .driver = {
  1262. .of_match_table = of_match_ptr(fimc_md_of_match),
  1263. .name = "s5p-fimc-md",
  1264. .owner = THIS_MODULE,
  1265. }
  1266. };
  1267. static int __init fimc_md_init(void)
  1268. {
  1269. int ret;
  1270. request_module("s5p-csis");
  1271. ret = fimc_register_driver();
  1272. if (ret)
  1273. return ret;
  1274. return platform_driver_register(&fimc_md_driver);
  1275. }
  1276. static void __exit fimc_md_exit(void)
  1277. {
  1278. platform_driver_unregister(&fimc_md_driver);
  1279. fimc_unregister_driver();
  1280. }
  1281. module_init(fimc_md_init);
  1282. module_exit(fimc_md_exit);
  1283. MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
  1284. MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
  1285. MODULE_LICENSE("GPL");
  1286. MODULE_VERSION("2.0.1");