timex.h 2.5 KB

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  1. /* timex.h: MN2WS0038 architecture timer specifications
  2. *
  3. * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #ifndef _ASM_UNIT_TIMEX_H
  12. #define _ASM_UNIT_TIMEX_H
  13. #ifndef __ASSEMBLY__
  14. #include <linux/irq.h>
  15. #endif /* __ASSEMBLY__ */
  16. #include <asm/timer-regs.h>
  17. #include <unit/clock.h>
  18. #include <asm/param.h>
  19. /*
  20. * jiffies counter specifications
  21. */
  22. #define TMJCBR_MAX 0xffffff /* 24bit */
  23. #define TMJCBC TMTBC
  24. #define TMJCMD TMTMD
  25. #define TMJCBR TMTBR
  26. #define TMJCIRQ TMTIRQ
  27. #define TMJCICR TMTICR
  28. #ifndef __ASSEMBLY__
  29. #define MN10300_SRC_IOBCLK MN10300_IOBCLK
  30. #ifndef HZ
  31. # error HZ undeclared.
  32. #endif /* !HZ */
  33. #define MN10300_JCCLK (MN10300_SRC_IOBCLK)
  34. #define MN10300_TSCCLK (MN10300_SRC_IOBCLK)
  35. #define MN10300_JC_PER_HZ ((MN10300_JCCLK + HZ / 2) / HZ)
  36. #define MN10300_TSC_PER_HZ ((MN10300_TSCCLK + HZ / 2) / HZ)
  37. /* Check bit width of MTM interval value that sets base register */
  38. #if (MN10300_JC_PER_HZ - 1) > TMJCBR_MAX
  39. # error MTM tick timer interval value is overflow.
  40. #endif
  41. static inline void startup_jiffies_counter(void)
  42. {
  43. u32 sync;
  44. TMJCBR = MN10300_JC_PER_HZ - 1;
  45. sync = TMJCBR;
  46. TMJCMD = TMTMD_TMTLDE;
  47. TMJCMD = TMTMD_TMTCNE;
  48. sync = TMJCMD;
  49. TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
  50. sync = TMJCICR;
  51. }
  52. static inline void shutdown_jiffies_counter(void)
  53. {
  54. }
  55. #endif /* !__ASSEMBLY__ */
  56. /*
  57. * timestamp counter specifications
  58. */
  59. #define TMTSCBR_MAX 0xffffffff
  60. #define TMTSCMD TMSMD
  61. #define TMTSCBR TMSBR
  62. #define TMTSCBC TMSBC
  63. #define TMTSCICR TMSICR
  64. #ifndef __ASSEMBLY__
  65. static inline void startup_timestamp_counter(void)
  66. {
  67. u32 sync;
  68. /* set up TMS(Timestamp) 32bit timer register to count real time
  69. * - count down from 4Gig-1 to 0 and wrap at IOBCLK rate
  70. */
  71. TMTSCBR = TMTSCBR_MAX;
  72. sync = TMTSCBR;
  73. TMTSCICR = 0;
  74. sync = TMTSCICR;
  75. TMTSCMD = TMTMD_TMTLDE;
  76. TMTSCMD = TMTMD_TMTCNE;
  77. sync = TMTSCMD;
  78. }
  79. static inline void shutdown_timestamp_counter(void)
  80. {
  81. TMTSCMD = 0;
  82. }
  83. /*
  84. * we use a cascaded pair of 16-bit down-counting timers to count I/O
  85. * clock cycles for the purposes of time keeping
  86. */
  87. typedef unsigned long cycles_t;
  88. static inline cycles_t read_timestamp_counter(void)
  89. {
  90. return (cycles_t)TMTSCBC;
  91. }
  92. #endif /* !__ASSEMBLY__ */
  93. #endif /* _ASM_UNIT_TIMEX_H */