init.c 42 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. static bool suspend_cutpower;
  28. module_param(debug_mask, uint, 0644);
  29. module_param(testmode, uint, 0644);
  30. module_param(suspend_cutpower, bool, 0444);
  31. static const struct ath6kl_hw hw_list[] = {
  32. {
  33. .id = AR6003_HW_2_0_VERSION,
  34. .name = "ar6003 hw 2.0",
  35. .dataset_patch_addr = 0x57e884,
  36. .app_load_addr = 0x543180,
  37. .board_ext_data_addr = 0x57e500,
  38. .reserved_ram_size = 6912,
  39. /* hw2.0 needs override address hardcoded */
  40. .app_start_override_addr = 0x944C00,
  41. .fw_otp = AR6003_HW_2_0_OTP_FILE,
  42. .fw = AR6003_HW_2_0_FIRMWARE_FILE,
  43. .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  44. .fw_patch = AR6003_HW_2_0_PATCH_FILE,
  45. .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE,
  46. .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
  47. .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  48. },
  49. {
  50. .id = AR6003_HW_2_1_1_VERSION,
  51. .name = "ar6003 hw 2.1.1",
  52. .dataset_patch_addr = 0x57ff74,
  53. .app_load_addr = 0x1234,
  54. .board_ext_data_addr = 0x542330,
  55. .reserved_ram_size = 512,
  56. .fw_otp = AR6003_HW_2_1_1_OTP_FILE,
  57. .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
  58. .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  59. .fw_patch = AR6003_HW_2_1_1_PATCH_FILE,
  60. .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE,
  61. .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  62. .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  63. },
  64. {
  65. .id = AR6004_HW_1_0_VERSION,
  66. .name = "ar6004 hw 1.0",
  67. .dataset_patch_addr = 0x57e884,
  68. .app_load_addr = 0x1234,
  69. .board_ext_data_addr = 0x437000,
  70. .reserved_ram_size = 19456,
  71. .board_addr = 0x433900,
  72. .fw = AR6004_HW_1_0_FIRMWARE_FILE,
  73. .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE,
  74. .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
  75. .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
  76. },
  77. {
  78. .id = AR6004_HW_1_1_VERSION,
  79. .name = "ar6004 hw 1.1",
  80. .dataset_patch_addr = 0x57e884,
  81. .app_load_addr = 0x1234,
  82. .board_ext_data_addr = 0x437000,
  83. .reserved_ram_size = 11264,
  84. .board_addr = 0x43d400,
  85. .fw = AR6004_HW_1_1_FIRMWARE_FILE,
  86. .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE,
  87. .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
  88. .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
  89. },
  90. };
  91. /*
  92. * Include definitions here that can be used to tune the WLAN module
  93. * behavior. Different customers can tune the behavior as per their needs,
  94. * here.
  95. */
  96. /*
  97. * This configuration item enable/disable keepalive support.
  98. * Keepalive support: In the absence of any data traffic to AP, null
  99. * frames will be sent to the AP at periodic interval, to keep the association
  100. * active. This configuration item defines the periodic interval.
  101. * Use value of zero to disable keepalive support
  102. * Default: 60 seconds
  103. */
  104. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  105. /*
  106. * This configuration item sets the value of disconnect timeout
  107. * Firmware delays sending the disconnec event to the host for this
  108. * timeout after is gets disconnected from the current AP.
  109. * If the firmware successly roams within the disconnect timeout
  110. * it sends a new connect event
  111. */
  112. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  113. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  114. #define ATH6KL_DATA_OFFSET 64
  115. struct sk_buff *ath6kl_buf_alloc(int size)
  116. {
  117. struct sk_buff *skb;
  118. u16 reserved;
  119. /* Add chacheline space at front and back of buffer */
  120. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  121. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  122. skb = dev_alloc_skb(size + reserved);
  123. if (skb)
  124. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  125. return skb;
  126. }
  127. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  128. {
  129. vif->ssid_len = 0;
  130. memset(vif->ssid, 0, sizeof(vif->ssid));
  131. vif->dot11_auth_mode = OPEN_AUTH;
  132. vif->auth_mode = NONE_AUTH;
  133. vif->prwise_crypto = NONE_CRYPT;
  134. vif->prwise_crypto_len = 0;
  135. vif->grp_crypto = NONE_CRYPT;
  136. vif->grp_crypto_len = 0;
  137. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  138. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  139. memset(vif->bssid, 0, sizeof(vif->bssid));
  140. vif->bss_ch = 0;
  141. }
  142. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  143. {
  144. u32 address, data;
  145. struct host_app_area host_app_area;
  146. /* Fetch the address of the host_app_area_s
  147. * instance in the host interest area */
  148. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  149. address = TARG_VTOP(ar->target_type, address);
  150. if (ath6kl_diag_read32(ar, address, &data))
  151. return -EIO;
  152. address = TARG_VTOP(ar->target_type, data);
  153. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  154. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  155. sizeof(struct host_app_area)))
  156. return -EIO;
  157. return 0;
  158. }
  159. static inline void set_ac2_ep_map(struct ath6kl *ar,
  160. u8 ac,
  161. enum htc_endpoint_id ep)
  162. {
  163. ar->ac2ep_map[ac] = ep;
  164. ar->ep2ac_map[ep] = ac;
  165. }
  166. /* connect to a service */
  167. static int ath6kl_connectservice(struct ath6kl *ar,
  168. struct htc_service_connect_req *con_req,
  169. char *desc)
  170. {
  171. int status;
  172. struct htc_service_connect_resp response;
  173. memset(&response, 0, sizeof(response));
  174. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  175. if (status) {
  176. ath6kl_err("failed to connect to %s service status:%d\n",
  177. desc, status);
  178. return status;
  179. }
  180. switch (con_req->svc_id) {
  181. case WMI_CONTROL_SVC:
  182. if (test_bit(WMI_ENABLED, &ar->flag))
  183. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  184. ar->ctrl_ep = response.endpoint;
  185. break;
  186. case WMI_DATA_BE_SVC:
  187. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  188. break;
  189. case WMI_DATA_BK_SVC:
  190. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  191. break;
  192. case WMI_DATA_VI_SVC:
  193. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  194. break;
  195. case WMI_DATA_VO_SVC:
  196. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  197. break;
  198. default:
  199. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  200. return -EINVAL;
  201. }
  202. return 0;
  203. }
  204. static int ath6kl_init_service_ep(struct ath6kl *ar)
  205. {
  206. struct htc_service_connect_req connect;
  207. memset(&connect, 0, sizeof(connect));
  208. /* these fields are the same for all service endpoints */
  209. connect.ep_cb.rx = ath6kl_rx;
  210. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  211. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  212. /*
  213. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  214. * gets called.
  215. */
  216. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  217. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  218. if (!connect.ep_cb.rx_refill_thresh)
  219. connect.ep_cb.rx_refill_thresh++;
  220. /* connect to control service */
  221. connect.svc_id = WMI_CONTROL_SVC;
  222. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  223. return -EIO;
  224. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  225. /*
  226. * Limit the HTC message size on the send path, although e can
  227. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  228. * (802.3) frames on the send path.
  229. */
  230. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  231. /*
  232. * To reduce the amount of committed memory for larger A_MSDU
  233. * frames, use the recv-alloc threshold mechanism for larger
  234. * packets.
  235. */
  236. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  237. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  238. /*
  239. * For the remaining data services set the connection flag to
  240. * reduce dribbling, if configured to do so.
  241. */
  242. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  243. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  244. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  245. connect.svc_id = WMI_DATA_BE_SVC;
  246. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  247. return -EIO;
  248. /* connect to back-ground map this to WMI LOW_PRI */
  249. connect.svc_id = WMI_DATA_BK_SVC;
  250. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  251. return -EIO;
  252. /* connect to Video service, map this to to HI PRI */
  253. connect.svc_id = WMI_DATA_VI_SVC;
  254. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  255. return -EIO;
  256. /*
  257. * Connect to VO service, this is currently not mapped to a WMI
  258. * priority stream due to historical reasons. WMI originally
  259. * defined 3 priorities over 3 mailboxes We can change this when
  260. * WMI is reworked so that priorities are not dependent on
  261. * mailboxes.
  262. */
  263. connect.svc_id = WMI_DATA_VO_SVC;
  264. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  265. return -EIO;
  266. return 0;
  267. }
  268. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  269. {
  270. ath6kl_init_profile_info(vif);
  271. vif->def_txkey_index = 0;
  272. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  273. vif->ch_hint = 0;
  274. }
  275. /*
  276. * Set HTC/Mbox operational parameters, this can only be called when the
  277. * target is in the BMI phase.
  278. */
  279. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  280. u8 htc_ctrl_buf)
  281. {
  282. int status;
  283. u32 blk_size;
  284. blk_size = ar->mbox_info.block_size;
  285. if (htc_ctrl_buf)
  286. blk_size |= ((u32)htc_ctrl_buf) << 16;
  287. /* set the host interest area for the block size */
  288. status = ath6kl_bmi_write(ar,
  289. ath6kl_get_hi_item_addr(ar,
  290. HI_ITEM(hi_mbox_io_block_sz)),
  291. (u8 *)&blk_size,
  292. 4);
  293. if (status) {
  294. ath6kl_err("bmi_write_memory for IO block size failed\n");
  295. goto out;
  296. }
  297. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  298. blk_size,
  299. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  300. if (mbox_isr_yield_val) {
  301. /* set the host interest area for the mbox ISR yield limit */
  302. status = ath6kl_bmi_write(ar,
  303. ath6kl_get_hi_item_addr(ar,
  304. HI_ITEM(hi_mbox_isr_yield_limit)),
  305. (u8 *)&mbox_isr_yield_val,
  306. 4);
  307. if (status) {
  308. ath6kl_err("bmi_write_memory for yield limit failed\n");
  309. goto out;
  310. }
  311. }
  312. out:
  313. return status;
  314. }
  315. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  316. {
  317. int status = 0;
  318. int ret;
  319. /*
  320. * Configure the device for rx dot11 header rules. "0,0" are the
  321. * default values. Required if checksum offload is needed. Set
  322. * RxMetaVersion to 2.
  323. */
  324. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  325. ar->rx_meta_ver, 0, 0)) {
  326. ath6kl_err("unable to set the rx frame format\n");
  327. status = -EIO;
  328. }
  329. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  330. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  331. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  332. ath6kl_err("unable to set power save fail event policy\n");
  333. status = -EIO;
  334. }
  335. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  336. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  337. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  338. ath6kl_err("unable to set barker preamble policy\n");
  339. status = -EIO;
  340. }
  341. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  342. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  343. ath6kl_err("unable to set keep alive interval\n");
  344. status = -EIO;
  345. }
  346. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  347. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  348. ath6kl_err("unable to set disconnect timeout\n");
  349. status = -EIO;
  350. }
  351. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  352. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  353. ath6kl_err("unable to set txop bursting\n");
  354. status = -EIO;
  355. }
  356. /*
  357. * FIXME: Make sure p2p configurations are not applied to
  358. * non-p2p capable interfaces when multivif support is enabled.
  359. */
  360. if (ar->p2p) {
  361. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  362. P2P_FLAG_CAPABILITIES_REQ |
  363. P2P_FLAG_MACADDR_REQ |
  364. P2P_FLAG_HMODEL_REQ);
  365. if (ret) {
  366. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  367. "capabilities (%d) - assuming P2P not "
  368. "supported\n", ret);
  369. ar->p2p = 0;
  370. }
  371. }
  372. /*
  373. * FIXME: Make sure p2p configurations are not applied to
  374. * non-p2p capable interfaces when multivif support is enabled.
  375. */
  376. if (ar->p2p) {
  377. /* Enable Probe Request reporting for P2P */
  378. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  379. if (ret) {
  380. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  381. "Request reporting (%d)\n", ret);
  382. }
  383. }
  384. return status;
  385. }
  386. int ath6kl_configure_target(struct ath6kl *ar)
  387. {
  388. u32 param, ram_reserved_size;
  389. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  390. int i;
  391. /*
  392. * Note: Even though the firmware interface type is
  393. * chosen as BSS_STA for all three interfaces, can
  394. * be configured to IBSS/AP as long as the fw submode
  395. * remains normal mode (0 - AP, STA and IBSS). But
  396. * due to an target assert in firmware only one interface is
  397. * configured for now.
  398. */
  399. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  400. for (i = 0; i < ar->vif_max; i++)
  401. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  402. /*
  403. * By default, submodes :
  404. * vif[0] - AP/STA/IBSS
  405. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  406. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  407. */
  408. for (i = 0; i < ar->max_norm_iface; i++)
  409. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  410. (i * HI_OPTION_FW_SUBMODE_BITS);
  411. for (i = ar->max_norm_iface; i < ar->vif_max; i++)
  412. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  413. (i * HI_OPTION_FW_SUBMODE_BITS);
  414. /*
  415. * FIXME: This needs to be removed once the multivif
  416. * support is enabled.
  417. */
  418. if (ar->p2p)
  419. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  420. param = HTC_PROTOCOL_VERSION;
  421. if (ath6kl_bmi_write(ar,
  422. ath6kl_get_hi_item_addr(ar,
  423. HI_ITEM(hi_app_host_interest)),
  424. (u8 *)&param, 4) != 0) {
  425. ath6kl_err("bmi_write_memory for htc version failed\n");
  426. return -EIO;
  427. }
  428. /* set the firmware mode to STA/IBSS/AP */
  429. param = 0;
  430. if (ath6kl_bmi_read(ar,
  431. ath6kl_get_hi_item_addr(ar,
  432. HI_ITEM(hi_option_flag)),
  433. (u8 *)&param, 4) != 0) {
  434. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  435. return -EIO;
  436. }
  437. param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
  438. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  439. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  440. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  441. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  442. if (ath6kl_bmi_write(ar,
  443. ath6kl_get_hi_item_addr(ar,
  444. HI_ITEM(hi_option_flag)),
  445. (u8 *)&param,
  446. 4) != 0) {
  447. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  448. return -EIO;
  449. }
  450. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  451. /*
  452. * Hardcode the address use for the extended board data
  453. * Ideally this should be pre-allocate by the OS at boot time
  454. * But since it is a new feature and board data is loaded
  455. * at init time, we have to workaround this from host.
  456. * It is difficult to patch the firmware boot code,
  457. * but possible in theory.
  458. */
  459. param = ar->hw.board_ext_data_addr;
  460. ram_reserved_size = ar->hw.reserved_ram_size;
  461. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  462. HI_ITEM(hi_board_ext_data)),
  463. (u8 *)&param, 4) != 0) {
  464. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  465. return -EIO;
  466. }
  467. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  468. HI_ITEM(hi_end_ram_reserve_sz)),
  469. (u8 *)&ram_reserved_size, 4) != 0) {
  470. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  471. return -EIO;
  472. }
  473. /* set the block size for the target */
  474. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  475. /* use default number of control buffers */
  476. return -EIO;
  477. return 0;
  478. }
  479. void ath6kl_core_free(struct ath6kl *ar)
  480. {
  481. wiphy_free(ar->wiphy);
  482. }
  483. void ath6kl_core_cleanup(struct ath6kl *ar)
  484. {
  485. ath6kl_hif_power_off(ar);
  486. destroy_workqueue(ar->ath6kl_wq);
  487. if (ar->htc_target)
  488. ath6kl_htc_cleanup(ar->htc_target);
  489. ath6kl_cookie_cleanup(ar);
  490. ath6kl_cleanup_amsdu_rxbufs(ar);
  491. ath6kl_bmi_cleanup(ar);
  492. ath6kl_debug_cleanup(ar);
  493. kfree(ar->fw_board);
  494. kfree(ar->fw_otp);
  495. kfree(ar->fw);
  496. kfree(ar->fw_patch);
  497. ath6kl_deinit_ieee80211_hw(ar);
  498. }
  499. /* firmware upload */
  500. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  501. u8 **fw, size_t *fw_len)
  502. {
  503. const struct firmware *fw_entry;
  504. int ret;
  505. ret = request_firmware(&fw_entry, filename, ar->dev);
  506. if (ret)
  507. return ret;
  508. *fw_len = fw_entry->size;
  509. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  510. if (*fw == NULL)
  511. ret = -ENOMEM;
  512. release_firmware(fw_entry);
  513. return ret;
  514. }
  515. #ifdef CONFIG_OF
  516. static const char *get_target_ver_dir(const struct ath6kl *ar)
  517. {
  518. switch (ar->version.target_ver) {
  519. case AR6003_HW_1_0_VERSION:
  520. return "ath6k/AR6003/hw1.0";
  521. case AR6003_HW_2_0_VERSION:
  522. return "ath6k/AR6003/hw2.0";
  523. case AR6003_HW_2_1_1_VERSION:
  524. return "ath6k/AR6003/hw2.1.1";
  525. }
  526. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  527. ar->version.target_ver);
  528. return NULL;
  529. }
  530. /*
  531. * Check the device tree for a board-id and use it to construct
  532. * the pathname to the firmware file. Used (for now) to find a
  533. * fallback to the "bdata.bin" file--typically a symlink to the
  534. * appropriate board-specific file.
  535. */
  536. static bool check_device_tree(struct ath6kl *ar)
  537. {
  538. static const char *board_id_prop = "atheros,board-id";
  539. struct device_node *node;
  540. char board_filename[64];
  541. const char *board_id;
  542. int ret;
  543. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  544. board_id = of_get_property(node, board_id_prop, NULL);
  545. if (board_id == NULL) {
  546. ath6kl_warn("No \"%s\" property on %s node.\n",
  547. board_id_prop, node->name);
  548. continue;
  549. }
  550. snprintf(board_filename, sizeof(board_filename),
  551. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  552. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  553. &ar->fw_board_len);
  554. if (ret) {
  555. ath6kl_err("Failed to get DT board file %s: %d\n",
  556. board_filename, ret);
  557. continue;
  558. }
  559. return true;
  560. }
  561. return false;
  562. }
  563. #else
  564. static bool check_device_tree(struct ath6kl *ar)
  565. {
  566. return false;
  567. }
  568. #endif /* CONFIG_OF */
  569. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  570. {
  571. const char *filename;
  572. int ret;
  573. if (ar->fw_board != NULL)
  574. return 0;
  575. if (WARN_ON(ar->hw.fw_board == NULL))
  576. return -EINVAL;
  577. filename = ar->hw.fw_board;
  578. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  579. &ar->fw_board_len);
  580. if (ret == 0) {
  581. /* managed to get proper board file */
  582. return 0;
  583. }
  584. if (check_device_tree(ar)) {
  585. /* got board file from device tree */
  586. return 0;
  587. }
  588. /* there was no proper board file, try to use default instead */
  589. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  590. filename, ret);
  591. filename = ar->hw.fw_default_board;
  592. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  593. &ar->fw_board_len);
  594. if (ret) {
  595. ath6kl_err("Failed to get default board file %s: %d\n",
  596. filename, ret);
  597. return ret;
  598. }
  599. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  600. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  601. return 0;
  602. }
  603. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  604. {
  605. const char *filename;
  606. int ret;
  607. if (ar->fw_otp != NULL)
  608. return 0;
  609. if (ar->hw.fw_otp == NULL) {
  610. ath6kl_dbg(ATH6KL_DBG_BOOT,
  611. "no OTP file configured for this hw\n");
  612. return 0;
  613. }
  614. filename = ar->hw.fw_otp;
  615. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  616. &ar->fw_otp_len);
  617. if (ret) {
  618. ath6kl_err("Failed to get OTP file %s: %d\n",
  619. filename, ret);
  620. return ret;
  621. }
  622. return 0;
  623. }
  624. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  625. {
  626. const char *filename;
  627. int ret;
  628. if (ar->fw != NULL)
  629. return 0;
  630. if (testmode) {
  631. if (ar->hw.fw_tcmd == NULL) {
  632. ath6kl_warn("testmode not supported\n");
  633. return -EOPNOTSUPP;
  634. }
  635. filename = ar->hw.fw_tcmd;
  636. set_bit(TESTMODE, &ar->flag);
  637. goto get_fw;
  638. }
  639. if (WARN_ON(ar->hw.fw == NULL))
  640. return -EINVAL;
  641. filename = ar->hw.fw;
  642. get_fw:
  643. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  644. if (ret) {
  645. ath6kl_err("Failed to get firmware file %s: %d\n",
  646. filename, ret);
  647. return ret;
  648. }
  649. return 0;
  650. }
  651. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  652. {
  653. const char *filename;
  654. int ret;
  655. if (ar->fw_patch != NULL)
  656. return 0;
  657. if (ar->hw.fw_patch == NULL)
  658. return 0;
  659. filename = ar->hw.fw_patch;
  660. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  661. &ar->fw_patch_len);
  662. if (ret) {
  663. ath6kl_err("Failed to get patch file %s: %d\n",
  664. filename, ret);
  665. return ret;
  666. }
  667. return 0;
  668. }
  669. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  670. {
  671. int ret;
  672. ret = ath6kl_fetch_otp_file(ar);
  673. if (ret)
  674. return ret;
  675. ret = ath6kl_fetch_fw_file(ar);
  676. if (ret)
  677. return ret;
  678. ret = ath6kl_fetch_patch_file(ar);
  679. if (ret)
  680. return ret;
  681. return 0;
  682. }
  683. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  684. {
  685. size_t magic_len, len, ie_len;
  686. const struct firmware *fw;
  687. struct ath6kl_fw_ie *hdr;
  688. const char *filename;
  689. const u8 *data;
  690. int ret, ie_id, i, index, bit;
  691. __le32 *val;
  692. if (ar->hw.fw_api2 == NULL)
  693. return -EOPNOTSUPP;
  694. filename = ar->hw.fw_api2;
  695. ret = request_firmware(&fw, filename, ar->dev);
  696. if (ret)
  697. return ret;
  698. data = fw->data;
  699. len = fw->size;
  700. /* magic also includes the null byte, check that as well */
  701. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  702. if (len < magic_len) {
  703. ret = -EINVAL;
  704. goto out;
  705. }
  706. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  707. ret = -EINVAL;
  708. goto out;
  709. }
  710. len -= magic_len;
  711. data += magic_len;
  712. /* loop elements */
  713. while (len > sizeof(struct ath6kl_fw_ie)) {
  714. /* hdr is unaligned! */
  715. hdr = (struct ath6kl_fw_ie *) data;
  716. ie_id = le32_to_cpup(&hdr->id);
  717. ie_len = le32_to_cpup(&hdr->len);
  718. len -= sizeof(*hdr);
  719. data += sizeof(*hdr);
  720. if (len < ie_len) {
  721. ret = -EINVAL;
  722. goto out;
  723. }
  724. switch (ie_id) {
  725. case ATH6KL_FW_IE_OTP_IMAGE:
  726. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  727. ie_len);
  728. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  729. if (ar->fw_otp == NULL) {
  730. ret = -ENOMEM;
  731. goto out;
  732. }
  733. ar->fw_otp_len = ie_len;
  734. break;
  735. case ATH6KL_FW_IE_FW_IMAGE:
  736. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  737. ie_len);
  738. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  739. if (ar->fw == NULL) {
  740. ret = -ENOMEM;
  741. goto out;
  742. }
  743. ar->fw_len = ie_len;
  744. break;
  745. case ATH6KL_FW_IE_PATCH_IMAGE:
  746. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  747. ie_len);
  748. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  749. if (ar->fw_patch == NULL) {
  750. ret = -ENOMEM;
  751. goto out;
  752. }
  753. ar->fw_patch_len = ie_len;
  754. break;
  755. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  756. val = (__le32 *) data;
  757. ar->hw.reserved_ram_size = le32_to_cpup(val);
  758. ath6kl_dbg(ATH6KL_DBG_BOOT,
  759. "found reserved ram size ie 0x%d\n",
  760. ar->hw.reserved_ram_size);
  761. break;
  762. case ATH6KL_FW_IE_CAPABILITIES:
  763. ath6kl_dbg(ATH6KL_DBG_BOOT,
  764. "found firmware capabilities ie (%zd B)\n",
  765. ie_len);
  766. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  767. index = ALIGN(i, 8) / 8;
  768. bit = i % 8;
  769. if (data[index] & (1 << bit))
  770. __set_bit(i, ar->fw_capabilities);
  771. }
  772. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  773. ar->fw_capabilities,
  774. sizeof(ar->fw_capabilities));
  775. break;
  776. case ATH6KL_FW_IE_PATCH_ADDR:
  777. if (ie_len != sizeof(*val))
  778. break;
  779. val = (__le32 *) data;
  780. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  781. ath6kl_dbg(ATH6KL_DBG_BOOT,
  782. "found patch address ie 0x%x\n",
  783. ar->hw.dataset_patch_addr);
  784. break;
  785. case ATH6KL_FW_IE_BOARD_ADDR:
  786. if (ie_len != sizeof(*val))
  787. break;
  788. val = (__le32 *) data;
  789. ar->hw.board_addr = le32_to_cpup(val);
  790. ath6kl_dbg(ATH6KL_DBG_BOOT,
  791. "found board address ie 0x%x\n",
  792. ar->hw.board_addr);
  793. break;
  794. case ATH6KL_FW_IE_VIF_MAX:
  795. if (ie_len != sizeof(*val))
  796. break;
  797. val = (__le32 *) data;
  798. ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
  799. ATH6KL_VIF_MAX);
  800. ath6kl_dbg(ATH6KL_DBG_BOOT,
  801. "found vif max ie %d\n", ar->vif_max);
  802. break;
  803. default:
  804. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  805. le32_to_cpup(&hdr->id));
  806. break;
  807. }
  808. len -= ie_len;
  809. data += ie_len;
  810. };
  811. ret = 0;
  812. out:
  813. release_firmware(fw);
  814. return ret;
  815. }
  816. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  817. {
  818. int ret;
  819. ret = ath6kl_fetch_board_file(ar);
  820. if (ret)
  821. return ret;
  822. ret = ath6kl_fetch_fw_api2(ar);
  823. if (ret == 0) {
  824. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  825. return 0;
  826. }
  827. ret = ath6kl_fetch_fw_api1(ar);
  828. if (ret)
  829. return ret;
  830. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  831. return 0;
  832. }
  833. static int ath6kl_upload_board_file(struct ath6kl *ar)
  834. {
  835. u32 board_address, board_ext_address, param;
  836. u32 board_data_size, board_ext_data_size;
  837. int ret;
  838. if (WARN_ON(ar->fw_board == NULL))
  839. return -ENOENT;
  840. /*
  841. * Determine where in Target RAM to write Board Data.
  842. * For AR6004, host determine Target RAM address for
  843. * writing board data.
  844. */
  845. if (ar->hw.board_addr != 0) {
  846. board_address = ar->hw.board_addr;
  847. ath6kl_bmi_write(ar,
  848. ath6kl_get_hi_item_addr(ar,
  849. HI_ITEM(hi_board_data)),
  850. (u8 *) &board_address, 4);
  851. } else {
  852. ath6kl_bmi_read(ar,
  853. ath6kl_get_hi_item_addr(ar,
  854. HI_ITEM(hi_board_data)),
  855. (u8 *) &board_address, 4);
  856. }
  857. /* determine where in target ram to write extended board data */
  858. ath6kl_bmi_read(ar,
  859. ath6kl_get_hi_item_addr(ar,
  860. HI_ITEM(hi_board_ext_data)),
  861. (u8 *) &board_ext_address, 4);
  862. if (ar->target_type == TARGET_TYPE_AR6003 &&
  863. board_ext_address == 0) {
  864. ath6kl_err("Failed to get board file target address.\n");
  865. return -EINVAL;
  866. }
  867. switch (ar->target_type) {
  868. case TARGET_TYPE_AR6003:
  869. board_data_size = AR6003_BOARD_DATA_SZ;
  870. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  871. break;
  872. case TARGET_TYPE_AR6004:
  873. board_data_size = AR6004_BOARD_DATA_SZ;
  874. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  875. break;
  876. default:
  877. WARN_ON(1);
  878. return -EINVAL;
  879. break;
  880. }
  881. if (board_ext_address &&
  882. ar->fw_board_len == (board_data_size + board_ext_data_size)) {
  883. /* write extended board data */
  884. ath6kl_dbg(ATH6KL_DBG_BOOT,
  885. "writing extended board data to 0x%x (%d B)\n",
  886. board_ext_address, board_ext_data_size);
  887. ret = ath6kl_bmi_write(ar, board_ext_address,
  888. ar->fw_board + board_data_size,
  889. board_ext_data_size);
  890. if (ret) {
  891. ath6kl_err("Failed to write extended board data: %d\n",
  892. ret);
  893. return ret;
  894. }
  895. /* record that extended board data is initialized */
  896. param = (board_ext_data_size << 16) | 1;
  897. ath6kl_bmi_write(ar,
  898. ath6kl_get_hi_item_addr(ar,
  899. HI_ITEM(hi_board_ext_data_config)),
  900. (unsigned char *) &param, 4);
  901. }
  902. if (ar->fw_board_len < board_data_size) {
  903. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  904. ret = -EINVAL;
  905. return ret;
  906. }
  907. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  908. board_address, board_data_size);
  909. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  910. board_data_size);
  911. if (ret) {
  912. ath6kl_err("Board file bmi write failed: %d\n", ret);
  913. return ret;
  914. }
  915. /* record the fact that Board Data IS initialized */
  916. param = 1;
  917. ath6kl_bmi_write(ar,
  918. ath6kl_get_hi_item_addr(ar,
  919. HI_ITEM(hi_board_data_initialized)),
  920. (u8 *)&param, 4);
  921. return ret;
  922. }
  923. static int ath6kl_upload_otp(struct ath6kl *ar)
  924. {
  925. u32 address, param;
  926. bool from_hw = false;
  927. int ret;
  928. if (ar->fw_otp == NULL)
  929. return 0;
  930. address = ar->hw.app_load_addr;
  931. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  932. ar->fw_otp_len);
  933. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  934. ar->fw_otp_len);
  935. if (ret) {
  936. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  937. return ret;
  938. }
  939. /* read firmware start address */
  940. ret = ath6kl_bmi_read(ar,
  941. ath6kl_get_hi_item_addr(ar,
  942. HI_ITEM(hi_app_start)),
  943. (u8 *) &address, sizeof(address));
  944. if (ret) {
  945. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  946. return ret;
  947. }
  948. if (ar->hw.app_start_override_addr == 0) {
  949. ar->hw.app_start_override_addr = address;
  950. from_hw = true;
  951. }
  952. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  953. from_hw ? " (from hw)" : "",
  954. ar->hw.app_start_override_addr);
  955. /* execute the OTP code */
  956. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  957. ar->hw.app_start_override_addr);
  958. param = 0;
  959. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  960. return ret;
  961. }
  962. static int ath6kl_upload_firmware(struct ath6kl *ar)
  963. {
  964. u32 address;
  965. int ret;
  966. if (WARN_ON(ar->fw == NULL))
  967. return 0;
  968. address = ar->hw.app_load_addr;
  969. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  970. address, ar->fw_len);
  971. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  972. if (ret) {
  973. ath6kl_err("Failed to write firmware: %d\n", ret);
  974. return ret;
  975. }
  976. /*
  977. * Set starting address for firmware
  978. * Don't need to setup app_start override addr on AR6004
  979. */
  980. if (ar->target_type != TARGET_TYPE_AR6004) {
  981. address = ar->hw.app_start_override_addr;
  982. ath6kl_bmi_set_app_start(ar, address);
  983. }
  984. return ret;
  985. }
  986. static int ath6kl_upload_patch(struct ath6kl *ar)
  987. {
  988. u32 address, param;
  989. int ret;
  990. if (ar->fw_patch == NULL)
  991. return 0;
  992. address = ar->hw.dataset_patch_addr;
  993. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  994. address, ar->fw_patch_len);
  995. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  996. if (ret) {
  997. ath6kl_err("Failed to write patch file: %d\n", ret);
  998. return ret;
  999. }
  1000. param = address;
  1001. ath6kl_bmi_write(ar,
  1002. ath6kl_get_hi_item_addr(ar,
  1003. HI_ITEM(hi_dset_list_head)),
  1004. (unsigned char *) &param, 4);
  1005. return 0;
  1006. }
  1007. static int ath6kl_init_upload(struct ath6kl *ar)
  1008. {
  1009. u32 param, options, sleep, address;
  1010. int status = 0;
  1011. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1012. ar->target_type != TARGET_TYPE_AR6004)
  1013. return -EINVAL;
  1014. /* temporarily disable system sleep */
  1015. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1016. status = ath6kl_bmi_reg_read(ar, address, &param);
  1017. if (status)
  1018. return status;
  1019. options = param;
  1020. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1021. status = ath6kl_bmi_reg_write(ar, address, param);
  1022. if (status)
  1023. return status;
  1024. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1025. status = ath6kl_bmi_reg_read(ar, address, &param);
  1026. if (status)
  1027. return status;
  1028. sleep = param;
  1029. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1030. status = ath6kl_bmi_reg_write(ar, address, param);
  1031. if (status)
  1032. return status;
  1033. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1034. options, sleep);
  1035. /* program analog PLL register */
  1036. /* no need to control 40/44MHz clock on AR6004 */
  1037. if (ar->target_type != TARGET_TYPE_AR6004) {
  1038. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1039. 0xF9104001);
  1040. if (status)
  1041. return status;
  1042. /* Run at 80/88MHz by default */
  1043. param = SM(CPU_CLOCK_STANDARD, 1);
  1044. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1045. status = ath6kl_bmi_reg_write(ar, address, param);
  1046. if (status)
  1047. return status;
  1048. }
  1049. param = 0;
  1050. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1051. param = SM(LPO_CAL_ENABLE, 1);
  1052. status = ath6kl_bmi_reg_write(ar, address, param);
  1053. if (status)
  1054. return status;
  1055. /* WAR to avoid SDIO CRC err */
  1056. if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
  1057. ath6kl_err("temporary war to avoid sdio crc error\n");
  1058. param = 0x20;
  1059. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1060. status = ath6kl_bmi_reg_write(ar, address, param);
  1061. if (status)
  1062. return status;
  1063. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1064. status = ath6kl_bmi_reg_write(ar, address, param);
  1065. if (status)
  1066. return status;
  1067. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1068. status = ath6kl_bmi_reg_write(ar, address, param);
  1069. if (status)
  1070. return status;
  1071. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1072. status = ath6kl_bmi_reg_write(ar, address, param);
  1073. if (status)
  1074. return status;
  1075. }
  1076. /* write EEPROM data to Target RAM */
  1077. status = ath6kl_upload_board_file(ar);
  1078. if (status)
  1079. return status;
  1080. /* transfer One time Programmable data */
  1081. status = ath6kl_upload_otp(ar);
  1082. if (status)
  1083. return status;
  1084. /* Download Target firmware */
  1085. status = ath6kl_upload_firmware(ar);
  1086. if (status)
  1087. return status;
  1088. status = ath6kl_upload_patch(ar);
  1089. if (status)
  1090. return status;
  1091. /* Restore system sleep */
  1092. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1093. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1094. if (status)
  1095. return status;
  1096. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1097. param = options | 0x20;
  1098. status = ath6kl_bmi_reg_write(ar, address, param);
  1099. if (status)
  1100. return status;
  1101. /* Configure GPIO AR6003 UART */
  1102. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1103. status = ath6kl_bmi_write(ar,
  1104. ath6kl_get_hi_item_addr(ar,
  1105. HI_ITEM(hi_dbg_uart_txpin)),
  1106. (u8 *)&param, 4);
  1107. return status;
  1108. }
  1109. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1110. {
  1111. const struct ath6kl_hw *hw;
  1112. int i;
  1113. for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  1114. hw = &hw_list[i];
  1115. if (hw->id == ar->version.target_ver)
  1116. break;
  1117. }
  1118. if (i == ARRAY_SIZE(hw_list)) {
  1119. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1120. ar->version.target_ver);
  1121. return -EINVAL;
  1122. }
  1123. ar->hw = *hw;
  1124. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1125. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1126. ar->version.target_ver, ar->target_type,
  1127. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1128. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1129. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1130. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1131. ar->hw.reserved_ram_size);
  1132. return 0;
  1133. }
  1134. static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
  1135. {
  1136. switch (type) {
  1137. case ATH6KL_HIF_TYPE_SDIO:
  1138. return "sdio";
  1139. case ATH6KL_HIF_TYPE_USB:
  1140. return "usb";
  1141. }
  1142. return NULL;
  1143. }
  1144. int ath6kl_init_hw_start(struct ath6kl *ar)
  1145. {
  1146. long timeleft;
  1147. int ret, i;
  1148. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1149. ret = ath6kl_hif_power_on(ar);
  1150. if (ret)
  1151. return ret;
  1152. ret = ath6kl_configure_target(ar);
  1153. if (ret)
  1154. goto err_power_off;
  1155. ret = ath6kl_init_upload(ar);
  1156. if (ret)
  1157. goto err_power_off;
  1158. /* Do we need to finish the BMI phase */
  1159. /* FIXME: return error from ath6kl_bmi_done() */
  1160. if (ath6kl_bmi_done(ar)) {
  1161. ret = -EIO;
  1162. goto err_power_off;
  1163. }
  1164. /*
  1165. * The reason we have to wait for the target here is that the
  1166. * driver layer has to init BMI in order to set the host block
  1167. * size.
  1168. */
  1169. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1170. ret = -EIO;
  1171. goto err_power_off;
  1172. }
  1173. if (ath6kl_init_service_ep(ar)) {
  1174. ret = -EIO;
  1175. goto err_cleanup_scatter;
  1176. }
  1177. /* setup credit distribution */
  1178. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1179. /* start HTC */
  1180. ret = ath6kl_htc_start(ar->htc_target);
  1181. if (ret) {
  1182. /* FIXME: call this */
  1183. ath6kl_cookie_cleanup(ar);
  1184. goto err_cleanup_scatter;
  1185. }
  1186. /* Wait for Wmi event to be ready */
  1187. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1188. test_bit(WMI_READY,
  1189. &ar->flag),
  1190. WMI_TIMEOUT);
  1191. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1192. if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
  1193. ath6kl_info("%s %s fw %s%s\n",
  1194. ar->hw.name,
  1195. ath6kl_init_get_hif_name(ar->hif_type),
  1196. ar->wiphy->fw_version,
  1197. test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
  1198. }
  1199. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1200. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1201. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1202. ret = -EIO;
  1203. goto err_htc_stop;
  1204. }
  1205. if (!timeleft || signal_pending(current)) {
  1206. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1207. ret = -EIO;
  1208. goto err_htc_stop;
  1209. }
  1210. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1211. /* communicate the wmi protocol verision to the target */
  1212. /* FIXME: return error */
  1213. if ((ath6kl_set_host_app_area(ar)) != 0)
  1214. ath6kl_err("unable to set the host app area\n");
  1215. for (i = 0; i < ar->vif_max; i++) {
  1216. ret = ath6kl_target_config_wlan_params(ar, i);
  1217. if (ret)
  1218. goto err_htc_stop;
  1219. }
  1220. ar->state = ATH6KL_STATE_ON;
  1221. return 0;
  1222. err_htc_stop:
  1223. ath6kl_htc_stop(ar->htc_target);
  1224. err_cleanup_scatter:
  1225. ath6kl_hif_cleanup_scatter(ar);
  1226. err_power_off:
  1227. ath6kl_hif_power_off(ar);
  1228. return ret;
  1229. }
  1230. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1231. {
  1232. int ret;
  1233. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1234. ath6kl_htc_stop(ar->htc_target);
  1235. ath6kl_hif_stop(ar);
  1236. ath6kl_bmi_reset(ar);
  1237. ret = ath6kl_hif_power_off(ar);
  1238. if (ret)
  1239. ath6kl_warn("failed to power off hif: %d\n", ret);
  1240. ar->state = ATH6KL_STATE_OFF;
  1241. return 0;
  1242. }
  1243. int ath6kl_core_init(struct ath6kl *ar)
  1244. {
  1245. struct ath6kl_bmi_target_info targ_info;
  1246. struct net_device *ndev;
  1247. int ret = 0, i;
  1248. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1249. if (!ar->ath6kl_wq)
  1250. return -ENOMEM;
  1251. ret = ath6kl_bmi_init(ar);
  1252. if (ret)
  1253. goto err_wq;
  1254. /*
  1255. * Turn on power to get hardware (target) version and leave power
  1256. * on delibrately as we will boot the hardware anyway within few
  1257. * seconds.
  1258. */
  1259. ret = ath6kl_hif_power_on(ar);
  1260. if (ret)
  1261. goto err_bmi_cleanup;
  1262. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1263. if (ret)
  1264. goto err_power_off;
  1265. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1266. ar->target_type = le32_to_cpu(targ_info.type);
  1267. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1268. ret = ath6kl_init_hw_params(ar);
  1269. if (ret)
  1270. goto err_power_off;
  1271. ar->htc_target = ath6kl_htc_create(ar);
  1272. if (!ar->htc_target) {
  1273. ret = -ENOMEM;
  1274. goto err_power_off;
  1275. }
  1276. ret = ath6kl_fetch_firmwares(ar);
  1277. if (ret)
  1278. goto err_htc_cleanup;
  1279. /* FIXME: we should free all firmwares in the error cases below */
  1280. /* Indicate that WMI is enabled (although not ready yet) */
  1281. set_bit(WMI_ENABLED, &ar->flag);
  1282. ar->wmi = ath6kl_wmi_init(ar);
  1283. if (!ar->wmi) {
  1284. ath6kl_err("failed to initialize wmi\n");
  1285. ret = -EIO;
  1286. goto err_htc_cleanup;
  1287. }
  1288. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1289. ret = ath6kl_register_ieee80211_hw(ar);
  1290. if (ret)
  1291. goto err_node_cleanup;
  1292. ret = ath6kl_debug_init(ar);
  1293. if (ret) {
  1294. wiphy_unregister(ar->wiphy);
  1295. goto err_node_cleanup;
  1296. }
  1297. for (i = 0; i < ar->vif_max; i++)
  1298. ar->avail_idx_map |= BIT(i);
  1299. rtnl_lock();
  1300. /* Add an initial station interface */
  1301. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1302. INFRA_NETWORK);
  1303. rtnl_unlock();
  1304. if (!ndev) {
  1305. ath6kl_err("Failed to instantiate a network device\n");
  1306. ret = -ENOMEM;
  1307. wiphy_unregister(ar->wiphy);
  1308. goto err_debug_init;
  1309. }
  1310. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1311. __func__, ndev->name, ndev, ar);
  1312. /* setup access class priority mappings */
  1313. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1314. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1315. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1316. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1317. /* give our connected endpoints some buffers */
  1318. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1319. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1320. /* allocate some buffers that handle larger AMSDU frames */
  1321. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1322. ath6kl_cookie_init(ar);
  1323. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1324. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1325. if (suspend_cutpower)
  1326. ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
  1327. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1328. WIPHY_FLAG_HAVE_AP_SME;
  1329. set_bit(FIRST_BOOT, &ar->flag);
  1330. ret = ath6kl_init_hw_start(ar);
  1331. if (ret) {
  1332. ath6kl_err("Failed to start hardware: %d\n", ret);
  1333. goto err_rxbuf_cleanup;
  1334. }
  1335. /*
  1336. * Set mac address which is received in ready event
  1337. * FIXME: Move to ath6kl_interface_add()
  1338. */
  1339. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1340. return ret;
  1341. err_rxbuf_cleanup:
  1342. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1343. ath6kl_cleanup_amsdu_rxbufs(ar);
  1344. rtnl_lock();
  1345. ath6kl_deinit_if_data(netdev_priv(ndev));
  1346. rtnl_unlock();
  1347. wiphy_unregister(ar->wiphy);
  1348. err_debug_init:
  1349. ath6kl_debug_cleanup(ar);
  1350. err_node_cleanup:
  1351. ath6kl_wmi_shutdown(ar->wmi);
  1352. clear_bit(WMI_ENABLED, &ar->flag);
  1353. ar->wmi = NULL;
  1354. err_htc_cleanup:
  1355. ath6kl_htc_cleanup(ar->htc_target);
  1356. err_power_off:
  1357. ath6kl_hif_power_off(ar);
  1358. err_bmi_cleanup:
  1359. ath6kl_bmi_cleanup(ar);
  1360. err_wq:
  1361. destroy_workqueue(ar->ath6kl_wq);
  1362. return ret;
  1363. }
  1364. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1365. {
  1366. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1367. bool discon_issued;
  1368. netif_stop_queue(vif->ndev);
  1369. clear_bit(WLAN_ENABLED, &vif->flags);
  1370. if (wmi_ready) {
  1371. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1372. test_bit(CONNECT_PEND, &vif->flags);
  1373. ath6kl_disconnect(vif);
  1374. del_timer(&vif->disconnect_timer);
  1375. if (discon_issued)
  1376. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1377. (vif->nw_type & AP_NETWORK) ?
  1378. bcast_mac : vif->bssid,
  1379. 0, NULL, 0);
  1380. }
  1381. if (vif->scan_req) {
  1382. cfg80211_scan_done(vif->scan_req, true);
  1383. vif->scan_req = NULL;
  1384. }
  1385. }
  1386. void ath6kl_stop_txrx(struct ath6kl *ar)
  1387. {
  1388. struct ath6kl_vif *vif, *tmp_vif;
  1389. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1390. if (down_interruptible(&ar->sem)) {
  1391. ath6kl_err("down_interruptible failed\n");
  1392. return;
  1393. }
  1394. spin_lock_bh(&ar->list_lock);
  1395. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1396. list_del(&vif->list);
  1397. spin_unlock_bh(&ar->list_lock);
  1398. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1399. rtnl_lock();
  1400. ath6kl_deinit_if_data(vif);
  1401. rtnl_unlock();
  1402. spin_lock_bh(&ar->list_lock);
  1403. }
  1404. spin_unlock_bh(&ar->list_lock);
  1405. clear_bit(WMI_READY, &ar->flag);
  1406. /*
  1407. * After wmi_shudown all WMI events will be dropped. We
  1408. * need to cleanup the buffers allocated in AP mode and
  1409. * give disconnect notification to stack, which usually
  1410. * happens in the disconnect_event. Simulate the disconnect
  1411. * event by calling the function directly. Sometimes
  1412. * disconnect_event will be received when the debug logs
  1413. * are collected.
  1414. */
  1415. ath6kl_wmi_shutdown(ar->wmi);
  1416. clear_bit(WMI_ENABLED, &ar->flag);
  1417. if (ar->htc_target) {
  1418. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1419. ath6kl_htc_stop(ar->htc_target);
  1420. }
  1421. /*
  1422. * Try to reset the device if we can. The driver may have been
  1423. * configure NOT to reset the target during a debug session.
  1424. */
  1425. ath6kl_dbg(ATH6KL_DBG_TRC,
  1426. "attempting to reset target on instance destroy\n");
  1427. ath6kl_reset_device(ar, ar->target_type, true, true);
  1428. clear_bit(WLAN_ENABLED, &ar->flag);
  1429. }