cm_bf527.c 24 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x203C0000,
  40. .end = 0x203C0000 + 0x000fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PF7,
  45. .end = IRQ_PF7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  68. static struct resource musb_resources[] = {
  69. [0] = {
  70. .start = 0xffc03800,
  71. .end = 0xffc03cff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. [1] = { /* general IRQ */
  75. .start = IRQ_USB_INT0,
  76. .end = IRQ_USB_INT0,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. .name = "mc"
  79. },
  80. [2] = { /* DMA IRQ */
  81. .start = IRQ_USB_DMA,
  82. .end = IRQ_USB_DMA,
  83. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  84. .name = "dma"
  85. },
  86. };
  87. static struct musb_hdrc_config musb_config = {
  88. .multipoint = 0,
  89. .dyn_fifo = 0,
  90. .soft_con = 1,
  91. .dma = 1,
  92. .num_eps = 8,
  93. .dma_channels = 8,
  94. .gpio_vrsel = GPIO_PF11,
  95. /* Some custom boards need to be active low, just set it to "0"
  96. * if it is the case.
  97. */
  98. .gpio_vrsel_active = 1,
  99. };
  100. static struct musb_hdrc_platform_data musb_plat = {
  101. #if defined(CONFIG_USB_MUSB_OTG)
  102. .mode = MUSB_OTG,
  103. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  104. .mode = MUSB_HOST,
  105. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  106. .mode = MUSB_PERIPHERAL,
  107. #endif
  108. .config = &musb_config,
  109. };
  110. static u64 musb_dmamask = ~(u32)0;
  111. static struct platform_device musb_device = {
  112. .name = "musb_hdrc",
  113. .id = 0,
  114. .dev = {
  115. .dma_mask = &musb_dmamask,
  116. .coherent_dma_mask = 0xffffffff,
  117. .platform_data = &musb_plat,
  118. },
  119. .num_resources = ARRAY_SIZE(musb_resources),
  120. .resource = musb_resources,
  121. };
  122. #endif
  123. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  124. static struct mtd_partition partition_info[] = {
  125. {
  126. .name = "linux kernel(nand)",
  127. .offset = 0,
  128. .size = 4 * 1024 * 1024,
  129. },
  130. {
  131. .name = "file system(nand)",
  132. .offset = MTDPART_OFS_APPEND,
  133. .size = MTDPART_SIZ_FULL,
  134. },
  135. };
  136. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  137. .data_width = NFC_NWIDTH_8,
  138. .partitions = partition_info,
  139. .nr_partitions = ARRAY_SIZE(partition_info),
  140. .rd_dly = 3,
  141. .wr_dly = 3,
  142. };
  143. static struct resource bf5xx_nand_resources[] = {
  144. {
  145. .start = NFC_CTL,
  146. .end = NFC_DATA_RD + 2,
  147. .flags = IORESOURCE_MEM,
  148. },
  149. {
  150. .start = CH_NFC,
  151. .end = CH_NFC,
  152. .flags = IORESOURCE_IRQ,
  153. },
  154. };
  155. static struct platform_device bf5xx_nand_device = {
  156. .name = "bf5xx-nand",
  157. .id = 0,
  158. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  159. .resource = bf5xx_nand_resources,
  160. .dev = {
  161. .platform_data = &bf5xx_nand_platform,
  162. },
  163. };
  164. #endif
  165. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  166. static struct resource bfin_pcmcia_cf_resources[] = {
  167. {
  168. .start = 0x20310000, /* IO PORT */
  169. .end = 0x20312000,
  170. .flags = IORESOURCE_MEM,
  171. }, {
  172. .start = 0x20311000, /* Attribute Memory */
  173. .end = 0x20311FFF,
  174. .flags = IORESOURCE_MEM,
  175. }, {
  176. .start = IRQ_PF4,
  177. .end = IRQ_PF4,
  178. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  179. }, {
  180. .start = 6, /* Card Detect PF6 */
  181. .end = 6,
  182. .flags = IORESOURCE_IRQ,
  183. },
  184. };
  185. static struct platform_device bfin_pcmcia_cf_device = {
  186. .name = "bfin_cf_pcmcia",
  187. .id = -1,
  188. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  189. .resource = bfin_pcmcia_cf_resources,
  190. };
  191. #endif
  192. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  193. static struct platform_device rtc_device = {
  194. .name = "rtc-bfin",
  195. .id = -1,
  196. };
  197. #endif
  198. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  199. #include <linux/smc91x.h>
  200. static struct smc91x_platdata smc91x_info = {
  201. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  202. .leda = RPC_LED_100_10,
  203. .ledb = RPC_LED_TX_RX,
  204. };
  205. static struct resource smc91x_resources[] = {
  206. {
  207. .name = "smc91x-regs",
  208. .start = 0x20300300,
  209. .end = 0x20300300 + 16,
  210. .flags = IORESOURCE_MEM,
  211. }, {
  212. .start = IRQ_PF7,
  213. .end = IRQ_PF7,
  214. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  215. },
  216. };
  217. static struct platform_device smc91x_device = {
  218. .name = "smc91x",
  219. .id = 0,
  220. .num_resources = ARRAY_SIZE(smc91x_resources),
  221. .resource = smc91x_resources,
  222. .dev = {
  223. .platform_data = &smc91x_info,
  224. },
  225. };
  226. #endif
  227. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  228. static struct resource dm9000_resources[] = {
  229. [0] = {
  230. .start = 0x203FB800,
  231. .end = 0x203FB800 + 1,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [1] = {
  235. .start = 0x203FB804,
  236. .end = 0x203FB804 + 1,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. [2] = {
  240. .start = IRQ_PF9,
  241. .end = IRQ_PF9,
  242. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  243. },
  244. };
  245. static struct platform_device dm9000_device = {
  246. .name = "dm9000",
  247. .id = -1,
  248. .num_resources = ARRAY_SIZE(dm9000_resources),
  249. .resource = dm9000_resources,
  250. };
  251. #endif
  252. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  253. #include <linux/bfin_mac.h>
  254. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  255. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  256. {
  257. .addr = 1,
  258. .irq = IRQ_MAC_PHYINT,
  259. },
  260. };
  261. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  262. .phydev_number = 1,
  263. .phydev_data = bfin_phydev_data,
  264. .phy_mode = PHY_INTERFACE_MODE_RMII,
  265. .mac_peripherals = bfin_mac_peripherals,
  266. };
  267. static struct platform_device bfin_mii_bus = {
  268. .name = "bfin_mii_bus",
  269. .dev = {
  270. .platform_data = &bfin_mii_bus_data,
  271. }
  272. };
  273. static struct platform_device bfin_mac_device = {
  274. .name = "bfin_mac",
  275. .dev = {
  276. .platform_data = &bfin_mii_bus,
  277. }
  278. };
  279. #endif
  280. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  281. static struct resource net2272_bfin_resources[] = {
  282. {
  283. .start = 0x20300000,
  284. .end = 0x20300000 + 0x100,
  285. .flags = IORESOURCE_MEM,
  286. }, {
  287. .start = IRQ_PF7,
  288. .end = IRQ_PF7,
  289. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  290. },
  291. };
  292. static struct platform_device net2272_bfin_device = {
  293. .name = "net2272",
  294. .id = -1,
  295. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  296. .resource = net2272_bfin_resources,
  297. };
  298. #endif
  299. #if defined(CONFIG_MTD_M25P80) \
  300. || defined(CONFIG_MTD_M25P80_MODULE)
  301. static struct mtd_partition bfin_spi_flash_partitions[] = {
  302. {
  303. .name = "bootloader(spi)",
  304. .size = 0x00040000,
  305. .offset = 0,
  306. .mask_flags = MTD_CAP_ROM
  307. }, {
  308. .name = "linux kernel(spi)",
  309. .size = MTDPART_SIZ_FULL,
  310. .offset = MTDPART_OFS_APPEND,
  311. }
  312. };
  313. static struct flash_platform_data bfin_spi_flash_data = {
  314. .name = "m25p80",
  315. .parts = bfin_spi_flash_partitions,
  316. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  317. .type = "m25p16",
  318. };
  319. /* SPI flash chip (m25p64) */
  320. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  321. .enable_dma = 0, /* use dma transfer with this chip*/
  322. .bits_per_word = 8,
  323. };
  324. #endif
  325. #if defined(CONFIG_BFIN_SPI_ADC) \
  326. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  327. /* SPI ADC chip */
  328. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  329. .enable_dma = 1, /* use dma transfer with this chip*/
  330. .bits_per_word = 16,
  331. };
  332. #endif
  333. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  334. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  335. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  336. .enable_dma = 0,
  337. .bits_per_word = 16,
  338. };
  339. #endif
  340. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  341. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  342. .enable_dma = 0,
  343. .bits_per_word = 8,
  344. };
  345. #endif
  346. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  347. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  348. .enable_dma = 0,
  349. .bits_per_word = 16,
  350. };
  351. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  352. .model = 7877,
  353. .vref_delay_usecs = 50, /* internal, no capacitor */
  354. .x_plate_ohms = 419,
  355. .y_plate_ohms = 486,
  356. .pressure_max = 1000,
  357. .pressure_min = 0,
  358. .stopacq_polarity = 1,
  359. .first_conversion_delay = 3,
  360. .acquisition_time = 1,
  361. .averaging = 1,
  362. .pen_down_acc_interval = 1,
  363. };
  364. #endif
  365. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  366. && defined(CONFIG_SND_SOC_WM8731_SPI)
  367. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  368. .enable_dma = 0,
  369. .bits_per_word = 16,
  370. };
  371. #endif
  372. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  373. static struct bfin5xx_spi_chip spidev_chip_info = {
  374. .enable_dma = 0,
  375. .bits_per_word = 8,
  376. };
  377. #endif
  378. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  379. #if defined(CONFIG_MTD_M25P80) \
  380. || defined(CONFIG_MTD_M25P80_MODULE)
  381. {
  382. /* the modalias must be the same as spi device driver name */
  383. .modalias = "m25p80", /* Name of spi_driver for this device */
  384. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  385. .bus_num = 0, /* Framework bus number */
  386. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  387. .platform_data = &bfin_spi_flash_data,
  388. .controller_data = &spi_flash_chip_info,
  389. .mode = SPI_MODE_3,
  390. },
  391. #endif
  392. #if defined(CONFIG_BFIN_SPI_ADC) \
  393. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  394. {
  395. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  396. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  397. .bus_num = 0, /* Framework bus number */
  398. .chip_select = 1, /* Framework chip select. */
  399. .platform_data = NULL, /* No spi_driver specific config */
  400. .controller_data = &spi_adc_chip_info,
  401. },
  402. #endif
  403. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  404. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  405. {
  406. .modalias = "ad183x",
  407. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  408. .bus_num = 0,
  409. .chip_select = 4,
  410. .controller_data = &ad1836_spi_chip_info,
  411. },
  412. #endif
  413. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  414. {
  415. .modalias = "mmc_spi",
  416. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  417. .bus_num = 0,
  418. .chip_select = 5,
  419. .controller_data = &mmc_spi_chip_info,
  420. .mode = SPI_MODE_3,
  421. },
  422. #endif
  423. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  424. {
  425. .modalias = "ad7877",
  426. .platform_data = &bfin_ad7877_ts_info,
  427. .irq = IRQ_PF8,
  428. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  429. .bus_num = 0,
  430. .chip_select = 2,
  431. .controller_data = &spi_ad7877_chip_info,
  432. },
  433. #endif
  434. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  435. && defined(CONFIG_SND_SOC_WM8731_SPI)
  436. {
  437. .modalias = "wm8731",
  438. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  439. .bus_num = 0,
  440. .chip_select = 5,
  441. .controller_data = &spi_wm8731_chip_info,
  442. .mode = SPI_MODE_0,
  443. },
  444. #endif
  445. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  446. {
  447. .modalias = "spidev",
  448. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  449. .bus_num = 0,
  450. .chip_select = 1,
  451. .controller_data = &spidev_chip_info,
  452. },
  453. #endif
  454. };
  455. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  456. /* SPI controller data */
  457. static struct bfin5xx_spi_master bfin_spi0_info = {
  458. .num_chipselect = 8,
  459. .enable_dma = 1, /* master has the ability to do dma transfer */
  460. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  461. };
  462. /* SPI (0) */
  463. static struct resource bfin_spi0_resource[] = {
  464. [0] = {
  465. .start = SPI0_REGBASE,
  466. .end = SPI0_REGBASE + 0xFF,
  467. .flags = IORESOURCE_MEM,
  468. },
  469. [1] = {
  470. .start = CH_SPI,
  471. .end = CH_SPI,
  472. .flags = IORESOURCE_DMA,
  473. },
  474. [2] = {
  475. .start = IRQ_SPI,
  476. .end = IRQ_SPI,
  477. .flags = IORESOURCE_IRQ,
  478. },
  479. };
  480. static struct platform_device bfin_spi0_device = {
  481. .name = "bfin-spi",
  482. .id = 0, /* Bus number */
  483. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  484. .resource = bfin_spi0_resource,
  485. .dev = {
  486. .platform_data = &bfin_spi0_info, /* Passed to driver */
  487. },
  488. };
  489. #endif /* spi master and devices */
  490. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  491. static struct mtd_partition cm_partitions[] = {
  492. {
  493. .name = "bootloader(nor)",
  494. .size = 0x40000,
  495. .offset = 0,
  496. }, {
  497. .name = "linux kernel(nor)",
  498. .size = 0x100000,
  499. .offset = MTDPART_OFS_APPEND,
  500. }, {
  501. .name = "file system(nor)",
  502. .size = MTDPART_SIZ_FULL,
  503. .offset = MTDPART_OFS_APPEND,
  504. }
  505. };
  506. static struct physmap_flash_data cm_flash_data = {
  507. .width = 2,
  508. .parts = cm_partitions,
  509. .nr_parts = ARRAY_SIZE(cm_partitions),
  510. };
  511. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  512. static struct resource cm_flash_resource[] = {
  513. {
  514. .name = "cfi_probe",
  515. .start = 0x20000000,
  516. .end = 0x201fffff,
  517. .flags = IORESOURCE_MEM,
  518. }, {
  519. .start = (unsigned long)cm_flash_gpios,
  520. .end = ARRAY_SIZE(cm_flash_gpios),
  521. .flags = IORESOURCE_IRQ,
  522. }
  523. };
  524. static struct platform_device cm_flash_device = {
  525. .name = "gpio-addr-flash",
  526. .id = 0,
  527. .dev = {
  528. .platform_data = &cm_flash_data,
  529. },
  530. .num_resources = ARRAY_SIZE(cm_flash_resource),
  531. .resource = cm_flash_resource,
  532. };
  533. #endif
  534. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  535. #ifdef CONFIG_SERIAL_BFIN_UART0
  536. static struct resource bfin_uart0_resources[] = {
  537. {
  538. .start = UART0_THR,
  539. .end = UART0_GCTL+2,
  540. .flags = IORESOURCE_MEM,
  541. },
  542. {
  543. .start = IRQ_UART0_RX,
  544. .end = IRQ_UART0_RX+1,
  545. .flags = IORESOURCE_IRQ,
  546. },
  547. {
  548. .start = IRQ_UART0_ERROR,
  549. .end = IRQ_UART0_ERROR,
  550. .flags = IORESOURCE_IRQ,
  551. },
  552. {
  553. .start = CH_UART0_TX,
  554. .end = CH_UART0_TX,
  555. .flags = IORESOURCE_DMA,
  556. },
  557. {
  558. .start = CH_UART0_RX,
  559. .end = CH_UART0_RX,
  560. .flags = IORESOURCE_DMA,
  561. },
  562. };
  563. unsigned short bfin_uart0_peripherals[] = {
  564. P_UART0_TX, P_UART0_RX, 0
  565. };
  566. static struct platform_device bfin_uart0_device = {
  567. .name = "bfin-uart",
  568. .id = 0,
  569. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  570. .resource = bfin_uart0_resources,
  571. .dev = {
  572. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  573. },
  574. };
  575. #endif
  576. #ifdef CONFIG_SERIAL_BFIN_UART1
  577. static struct resource bfin_uart1_resources[] = {
  578. {
  579. .start = UART1_THR,
  580. .end = UART1_GCTL+2,
  581. .flags = IORESOURCE_MEM,
  582. },
  583. {
  584. .start = IRQ_UART1_RX,
  585. .end = IRQ_UART1_RX+1,
  586. .flags = IORESOURCE_IRQ,
  587. },
  588. {
  589. .start = IRQ_UART1_ERROR,
  590. .end = IRQ_UART1_ERROR,
  591. .flags = IORESOURCE_IRQ,
  592. },
  593. {
  594. .start = CH_UART1_TX,
  595. .end = CH_UART1_TX,
  596. .flags = IORESOURCE_DMA,
  597. },
  598. {
  599. .start = CH_UART1_RX,
  600. .end = CH_UART1_RX,
  601. .flags = IORESOURCE_DMA,
  602. },
  603. #ifdef CONFIG_BFIN_UART1_CTSRTS
  604. { /* CTS pin */
  605. .start = GPIO_PF9,
  606. .end = GPIO_PF9,
  607. .flags = IORESOURCE_IO,
  608. },
  609. { /* RTS pin */
  610. .start = GPIO_PF10,
  611. .end = GPIO_PF10,
  612. .flags = IORESOURCE_IO,
  613. },
  614. #endif
  615. };
  616. unsigned short bfin_uart1_peripherals[] = {
  617. P_UART1_TX, P_UART1_RX, 0
  618. };
  619. static struct platform_device bfin_uart1_device = {
  620. .name = "bfin-uart",
  621. .id = 1,
  622. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  623. .resource = bfin_uart1_resources,
  624. .dev = {
  625. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  626. },
  627. };
  628. #endif
  629. #endif
  630. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  631. #ifdef CONFIG_BFIN_SIR0
  632. static struct resource bfin_sir0_resources[] = {
  633. {
  634. .start = 0xFFC00400,
  635. .end = 0xFFC004FF,
  636. .flags = IORESOURCE_MEM,
  637. },
  638. {
  639. .start = IRQ_UART0_RX,
  640. .end = IRQ_UART0_RX+1,
  641. .flags = IORESOURCE_IRQ,
  642. },
  643. {
  644. .start = CH_UART0_RX,
  645. .end = CH_UART0_RX+1,
  646. .flags = IORESOURCE_DMA,
  647. },
  648. };
  649. static struct platform_device bfin_sir0_device = {
  650. .name = "bfin_sir",
  651. .id = 0,
  652. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  653. .resource = bfin_sir0_resources,
  654. };
  655. #endif
  656. #ifdef CONFIG_BFIN_SIR1
  657. static struct resource bfin_sir1_resources[] = {
  658. {
  659. .start = 0xFFC02000,
  660. .end = 0xFFC020FF,
  661. .flags = IORESOURCE_MEM,
  662. },
  663. {
  664. .start = IRQ_UART1_RX,
  665. .end = IRQ_UART1_RX+1,
  666. .flags = IORESOURCE_IRQ,
  667. },
  668. {
  669. .start = CH_UART1_RX,
  670. .end = CH_UART1_RX+1,
  671. .flags = IORESOURCE_DMA,
  672. },
  673. };
  674. static struct platform_device bfin_sir1_device = {
  675. .name = "bfin_sir",
  676. .id = 1,
  677. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  678. .resource = bfin_sir1_resources,
  679. };
  680. #endif
  681. #endif
  682. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  683. static struct resource bfin_twi0_resource[] = {
  684. [0] = {
  685. .start = TWI0_REGBASE,
  686. .end = TWI0_REGBASE,
  687. .flags = IORESOURCE_MEM,
  688. },
  689. [1] = {
  690. .start = IRQ_TWI,
  691. .end = IRQ_TWI,
  692. .flags = IORESOURCE_IRQ,
  693. },
  694. };
  695. static struct platform_device i2c_bfin_twi_device = {
  696. .name = "i2c-bfin-twi",
  697. .id = 0,
  698. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  699. .resource = bfin_twi0_resource,
  700. };
  701. #endif
  702. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  703. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  704. {
  705. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  706. },
  707. #endif
  708. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  709. {
  710. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  711. .irq = IRQ_PF8,
  712. },
  713. #endif
  714. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  715. {
  716. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  717. },
  718. #endif
  719. };
  720. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  721. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  722. static struct resource bfin_sport0_uart_resources[] = {
  723. {
  724. .start = SPORT0_TCR1,
  725. .end = SPORT0_MRCS3+4,
  726. .flags = IORESOURCE_MEM,
  727. },
  728. {
  729. .start = IRQ_SPORT0_RX,
  730. .end = IRQ_SPORT0_RX+1,
  731. .flags = IORESOURCE_IRQ,
  732. },
  733. {
  734. .start = IRQ_SPORT0_ERROR,
  735. .end = IRQ_SPORT0_ERROR,
  736. .flags = IORESOURCE_IRQ,
  737. },
  738. };
  739. unsigned short bfin_sport0_peripherals[] = {
  740. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  741. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  742. };
  743. static struct platform_device bfin_sport0_uart_device = {
  744. .name = "bfin-sport-uart",
  745. .id = 0,
  746. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  747. .resource = bfin_sport0_uart_resources,
  748. .dev = {
  749. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  750. },
  751. };
  752. #endif
  753. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  754. static struct resource bfin_sport1_uart_resources[] = {
  755. {
  756. .start = SPORT1_TCR1,
  757. .end = SPORT1_MRCS3+4,
  758. .flags = IORESOURCE_MEM,
  759. },
  760. {
  761. .start = IRQ_SPORT1_RX,
  762. .end = IRQ_SPORT1_RX+1,
  763. .flags = IORESOURCE_IRQ,
  764. },
  765. {
  766. .start = IRQ_SPORT1_ERROR,
  767. .end = IRQ_SPORT1_ERROR,
  768. .flags = IORESOURCE_IRQ,
  769. },
  770. };
  771. unsigned short bfin_sport1_peripherals[] = {
  772. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  773. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  774. };
  775. static struct platform_device bfin_sport1_uart_device = {
  776. .name = "bfin-sport-uart",
  777. .id = 1,
  778. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  779. .resource = bfin_sport1_uart_resources,
  780. .dev = {
  781. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  782. },
  783. };
  784. #endif
  785. #endif
  786. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  787. #include <linux/input.h>
  788. #include <linux/gpio_keys.h>
  789. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  790. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  791. };
  792. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  793. .buttons = bfin_gpio_keys_table,
  794. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  795. };
  796. static struct platform_device bfin_device_gpiokeys = {
  797. .name = "gpio-keys",
  798. .dev = {
  799. .platform_data = &bfin_gpio_keys_data,
  800. },
  801. };
  802. #endif
  803. static const unsigned int cclk_vlev_datasheet[] =
  804. {
  805. VRPAIR(VLEV_100, 400000000),
  806. VRPAIR(VLEV_105, 426000000),
  807. VRPAIR(VLEV_110, 500000000),
  808. VRPAIR(VLEV_115, 533000000),
  809. VRPAIR(VLEV_120, 600000000),
  810. };
  811. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  812. .tuple_tab = cclk_vlev_datasheet,
  813. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  814. .vr_settling_time = 25 /* us */,
  815. };
  816. static struct platform_device bfin_dpmc = {
  817. .name = "bfin dpmc",
  818. .dev = {
  819. .platform_data = &bfin_dmpc_vreg_data,
  820. },
  821. };
  822. static struct platform_device *cmbf527_devices[] __initdata = {
  823. &bfin_dpmc,
  824. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  825. &bf5xx_nand_device,
  826. #endif
  827. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  828. &bfin_pcmcia_cf_device,
  829. #endif
  830. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  831. &rtc_device,
  832. #endif
  833. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  834. &bfin_isp1760_device,
  835. #endif
  836. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  837. &musb_device,
  838. #endif
  839. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  840. &smc91x_device,
  841. #endif
  842. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  843. &dm9000_device,
  844. #endif
  845. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  846. &bfin_mii_bus,
  847. &bfin_mac_device,
  848. #endif
  849. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  850. &net2272_bfin_device,
  851. #endif
  852. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  853. &bfin_spi0_device,
  854. #endif
  855. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  856. #ifdef CONFIG_SERIAL_BFIN_UART0
  857. &bfin_uart0_device,
  858. #endif
  859. #ifdef CONFIG_SERIAL_BFIN_UART1
  860. &bfin_uart1_device,
  861. #endif
  862. #endif
  863. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  864. #ifdef CONFIG_BFIN_SIR0
  865. &bfin_sir0_device,
  866. #endif
  867. #ifdef CONFIG_BFIN_SIR1
  868. &bfin_sir1_device,
  869. #endif
  870. #endif
  871. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  872. &i2c_bfin_twi_device,
  873. #endif
  874. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  875. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  876. &bfin_sport0_uart_device,
  877. #endif
  878. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  879. &bfin_sport1_uart_device,
  880. #endif
  881. #endif
  882. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  883. &bfin_device_gpiokeys,
  884. #endif
  885. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  886. &cm_flash_device,
  887. #endif
  888. };
  889. static int __init cm_init(void)
  890. {
  891. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  892. i2c_register_board_info(0, bfin_i2c_board_info,
  893. ARRAY_SIZE(bfin_i2c_board_info));
  894. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  895. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  896. return 0;
  897. }
  898. arch_initcall(cm_init);
  899. static struct platform_device *cmbf527_early_devices[] __initdata = {
  900. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  901. #ifdef CONFIG_SERIAL_BFIN_UART0
  902. &bfin_uart0_device,
  903. #endif
  904. #ifdef CONFIG_SERIAL_BFIN_UART1
  905. &bfin_uart1_device,
  906. #endif
  907. #endif
  908. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  909. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  910. &bfin_sport0_uart_device,
  911. #endif
  912. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  913. &bfin_sport1_uart_device,
  914. #endif
  915. #endif
  916. };
  917. void __init native_machine_early_platform_add_devices(void)
  918. {
  919. printk(KERN_INFO "register early platform devices\n");
  920. early_platform_add_devices(cmbf527_early_devices,
  921. ARRAY_SIZE(cmbf527_early_devices));
  922. }
  923. void native_machine_restart(char *cmd)
  924. {
  925. /* workaround reboot hang when booting from SPI */
  926. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  927. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  928. }
  929. void bfin_get_ether_addr(char *addr)
  930. {
  931. random_ether_addr(addr);
  932. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  933. }
  934. EXPORT_SYMBOL(bfin_get_ether_addr);