main.c 52 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_cache_conf_rate(struct ath_softc *sc,
  20. struct ieee80211_conf *conf)
  21. {
  22. switch (conf->channel->band) {
  23. case IEEE80211_BAND_2GHZ:
  24. if (conf_is_ht20(conf))
  25. sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  26. else if (conf_is_ht40_minus(conf))
  27. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  28. else if (conf_is_ht40_plus(conf))
  29. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  30. else
  31. sc->cur_rate_mode = ATH9K_MODE_11G;
  32. break;
  33. case IEEE80211_BAND_5GHZ:
  34. if (conf_is_ht20(conf))
  35. sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  36. else if (conf_is_ht40_minus(conf))
  37. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  38. else if (conf_is_ht40_plus(conf))
  39. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  40. else
  41. sc->cur_rate_mode = ATH9K_MODE_11A;
  42. break;
  43. default:
  44. BUG_ON(1);
  45. break;
  46. }
  47. }
  48. static void ath_update_txpow(struct ath_softc *sc)
  49. {
  50. struct ath_hw *ah = sc->sc_ah;
  51. if (sc->curtxpow != sc->config.txpowlimit) {
  52. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  53. /* read back in case value is clamped */
  54. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  55. }
  56. }
  57. static u8 parse_mpdudensity(u8 mpdudensity)
  58. {
  59. /*
  60. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  61. * 0 for no restriction
  62. * 1 for 1/4 us
  63. * 2 for 1/2 us
  64. * 3 for 1 us
  65. * 4 for 2 us
  66. * 5 for 4 us
  67. * 6 for 8 us
  68. * 7 for 16 us
  69. */
  70. switch (mpdudensity) {
  71. case 0:
  72. return 0;
  73. case 1:
  74. case 2:
  75. case 3:
  76. /* Our lower layer calculations limit our precision to
  77. 1 microsecond */
  78. return 1;
  79. case 4:
  80. return 2;
  81. case 5:
  82. return 4;
  83. case 6:
  84. return 8;
  85. case 7:
  86. return 16;
  87. default:
  88. return 0;
  89. }
  90. }
  91. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  92. struct ieee80211_hw *hw)
  93. {
  94. struct ieee80211_channel *curchan = hw->conf.channel;
  95. struct ath9k_channel *channel;
  96. u8 chan_idx;
  97. chan_idx = curchan->hw_value;
  98. channel = &sc->sc_ah->channels[chan_idx];
  99. ath9k_update_ichannel(sc, hw, channel);
  100. return channel;
  101. }
  102. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  103. {
  104. unsigned long flags;
  105. bool ret;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  108. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  109. return ret;
  110. }
  111. void ath9k_ps_wakeup(struct ath_softc *sc)
  112. {
  113. unsigned long flags;
  114. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  115. if (++sc->ps_usecount != 1)
  116. goto unlock;
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath9k_ps_restore(struct ath_softc *sc)
  122. {
  123. unsigned long flags;
  124. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  125. if (--sc->ps_usecount != 0)
  126. goto unlock;
  127. if (sc->ps_idle)
  128. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  129. else if (sc->ps_enabled &&
  130. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  131. PS_WAIT_FOR_CAB |
  132. PS_WAIT_FOR_PSPOLL_DATA |
  133. PS_WAIT_FOR_TX_ACK)))
  134. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  135. unlock:
  136. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  137. }
  138. static void ath_start_ani(struct ath_common *common)
  139. {
  140. struct ath_hw *ah = common->ah;
  141. unsigned long timestamp = jiffies_to_msecs(jiffies);
  142. struct ath_softc *sc = (struct ath_softc *) common->priv;
  143. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  144. return;
  145. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  146. return;
  147. common->ani.longcal_timer = timestamp;
  148. common->ani.shortcal_timer = timestamp;
  149. common->ani.checkani_timer = timestamp;
  150. mod_timer(&common->ani.timer,
  151. jiffies +
  152. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  153. }
  154. /*
  155. * Set/change channels. If the channel is really being changed, it's done
  156. * by reseting the chip. To accomplish this we must first cleanup any pending
  157. * DMA, then restart stuff.
  158. */
  159. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  160. struct ath9k_channel *hchan)
  161. {
  162. struct ath_wiphy *aphy = hw->priv;
  163. struct ath_hw *ah = sc->sc_ah;
  164. struct ath_common *common = ath9k_hw_common(ah);
  165. struct ieee80211_conf *conf = &common->hw->conf;
  166. bool fastcc = true, stopped;
  167. struct ieee80211_channel *channel = hw->conf.channel;
  168. struct ath9k_hw_cal_data *caldata = NULL;
  169. int r;
  170. if (sc->sc_flags & SC_OP_INVALID)
  171. return -EIO;
  172. del_timer_sync(&common->ani.timer);
  173. cancel_work_sync(&sc->paprd_work);
  174. cancel_work_sync(&sc->hw_check_work);
  175. cancel_delayed_work_sync(&sc->tx_complete_work);
  176. ath9k_ps_wakeup(sc);
  177. /*
  178. * This is only performed if the channel settings have
  179. * actually changed.
  180. *
  181. * To switch channels clear any pending DMA operations;
  182. * wait long enough for the RX fifo to drain, reset the
  183. * hardware at the new frequency, and then re-enable
  184. * the relevant bits of the h/w.
  185. */
  186. ath9k_hw_set_interrupts(ah, 0);
  187. ath_drain_all_txq(sc, false);
  188. stopped = ath_stoprecv(sc);
  189. /* XXX: do not flush receive queue here. We don't want
  190. * to flush data frames already in queue because of
  191. * changing channel. */
  192. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  193. fastcc = false;
  194. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  195. caldata = &aphy->caldata;
  196. ath_print(common, ATH_DBG_CONFIG,
  197. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  198. sc->sc_ah->curchan->channel,
  199. channel->center_freq, conf_is_ht40(conf),
  200. fastcc);
  201. spin_lock_bh(&sc->sc_resetlock);
  202. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  203. if (r) {
  204. ath_print(common, ATH_DBG_FATAL,
  205. "Unable to reset channel (%u MHz), "
  206. "reset status %d\n",
  207. channel->center_freq, r);
  208. spin_unlock_bh(&sc->sc_resetlock);
  209. goto ps_restore;
  210. }
  211. spin_unlock_bh(&sc->sc_resetlock);
  212. if (ath_startrecv(sc) != 0) {
  213. ath_print(common, ATH_DBG_FATAL,
  214. "Unable to restart recv logic\n");
  215. r = -EIO;
  216. goto ps_restore;
  217. }
  218. ath_cache_conf_rate(sc, &hw->conf);
  219. ath_update_txpow(sc);
  220. ath9k_hw_set_interrupts(ah, ah->imask);
  221. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL | SC_OP_SCANNING))) {
  222. ath_start_ani(common);
  223. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  224. ath_beacon_config(sc, NULL);
  225. }
  226. ps_restore:
  227. ath9k_ps_restore(sc);
  228. return r;
  229. }
  230. static void ath_paprd_activate(struct ath_softc *sc)
  231. {
  232. struct ath_hw *ah = sc->sc_ah;
  233. struct ath9k_hw_cal_data *caldata = ah->caldata;
  234. int chain;
  235. if (!caldata || !caldata->paprd_done)
  236. return;
  237. ath9k_ps_wakeup(sc);
  238. ar9003_paprd_enable(ah, false);
  239. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  240. if (!(ah->caps.tx_chainmask & BIT(chain)))
  241. continue;
  242. ar9003_paprd_populate_single_table(ah, caldata, chain);
  243. }
  244. ar9003_paprd_enable(ah, true);
  245. ath9k_ps_restore(sc);
  246. }
  247. void ath_paprd_calibrate(struct work_struct *work)
  248. {
  249. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  250. struct ieee80211_hw *hw = sc->hw;
  251. struct ath_hw *ah = sc->sc_ah;
  252. struct ieee80211_hdr *hdr;
  253. struct sk_buff *skb = NULL;
  254. struct ieee80211_tx_info *tx_info;
  255. int band = hw->conf.channel->band;
  256. struct ieee80211_supported_band *sband = &sc->sbands[band];
  257. struct ath_tx_control txctl;
  258. struct ath9k_hw_cal_data *caldata = ah->caldata;
  259. int qnum, ftype;
  260. int chain_ok = 0;
  261. int chain;
  262. int len = 1800;
  263. int time_left;
  264. int i;
  265. if (!caldata)
  266. return;
  267. skb = alloc_skb(len, GFP_KERNEL);
  268. if (!skb)
  269. return;
  270. tx_info = IEEE80211_SKB_CB(skb);
  271. skb_put(skb, len);
  272. memset(skb->data, 0, len);
  273. hdr = (struct ieee80211_hdr *)skb->data;
  274. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  275. hdr->frame_control = cpu_to_le16(ftype);
  276. hdr->duration_id = cpu_to_le16(10);
  277. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  278. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  279. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  280. memset(&txctl, 0, sizeof(txctl));
  281. qnum = sc->tx.hwq_map[WME_AC_BE];
  282. txctl.txq = &sc->tx.txq[qnum];
  283. ath9k_ps_wakeup(sc);
  284. ar9003_paprd_init_table(ah);
  285. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  286. if (!(ah->caps.tx_chainmask & BIT(chain)))
  287. continue;
  288. chain_ok = 0;
  289. memset(tx_info, 0, sizeof(*tx_info));
  290. tx_info->band = band;
  291. for (i = 0; i < 4; i++) {
  292. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  293. tx_info->control.rates[i].count = 6;
  294. }
  295. init_completion(&sc->paprd_complete);
  296. ar9003_paprd_setup_gain_table(ah, chain);
  297. txctl.paprd = BIT(chain);
  298. if (ath_tx_start(hw, skb, &txctl) != 0)
  299. break;
  300. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  301. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  302. if (!time_left) {
  303. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  304. "Timeout waiting for paprd training on "
  305. "TX chain %d\n",
  306. chain);
  307. goto fail_paprd;
  308. }
  309. if (!ar9003_paprd_is_done(ah))
  310. break;
  311. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  312. break;
  313. chain_ok = 1;
  314. }
  315. kfree_skb(skb);
  316. if (chain_ok) {
  317. caldata->paprd_done = true;
  318. ath_paprd_activate(sc);
  319. }
  320. fail_paprd:
  321. ath9k_ps_restore(sc);
  322. }
  323. /*
  324. * This routine performs the periodic noise floor calibration function
  325. * that is used to adjust and optimize the chip performance. This
  326. * takes environmental changes (location, temperature) into account.
  327. * When the task is complete, it reschedules itself depending on the
  328. * appropriate interval that was calculated.
  329. */
  330. void ath_ani_calibrate(unsigned long data)
  331. {
  332. struct ath_softc *sc = (struct ath_softc *)data;
  333. struct ath_hw *ah = sc->sc_ah;
  334. struct ath_common *common = ath9k_hw_common(ah);
  335. bool longcal = false;
  336. bool shortcal = false;
  337. bool aniflag = false;
  338. unsigned int timestamp = jiffies_to_msecs(jiffies);
  339. u32 cal_interval, short_cal_interval, long_cal_interval;
  340. if (ah->caldata && ah->caldata->nfcal_interference)
  341. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  342. else
  343. long_cal_interval = ATH_LONG_CALINTERVAL;
  344. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  345. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  346. /* Only calibrate if awake */
  347. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  348. goto set_timer;
  349. ath9k_ps_wakeup(sc);
  350. /* Long calibration runs independently of short calibration. */
  351. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  352. longcal = true;
  353. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  354. common->ani.longcal_timer = timestamp;
  355. }
  356. /* Short calibration applies only while caldone is false */
  357. if (!common->ani.caldone) {
  358. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  359. shortcal = true;
  360. ath_print(common, ATH_DBG_ANI,
  361. "shortcal @%lu\n", jiffies);
  362. common->ani.shortcal_timer = timestamp;
  363. common->ani.resetcal_timer = timestamp;
  364. }
  365. } else {
  366. if ((timestamp - common->ani.resetcal_timer) >=
  367. ATH_RESTART_CALINTERVAL) {
  368. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  369. if (common->ani.caldone)
  370. common->ani.resetcal_timer = timestamp;
  371. }
  372. }
  373. /* Verify whether we must check ANI */
  374. if ((timestamp - common->ani.checkani_timer) >=
  375. ah->config.ani_poll_interval) {
  376. aniflag = true;
  377. common->ani.checkani_timer = timestamp;
  378. }
  379. /* Skip all processing if there's nothing to do. */
  380. if (longcal || shortcal || aniflag) {
  381. /* Call ANI routine if necessary */
  382. if (aniflag)
  383. ath9k_hw_ani_monitor(ah, ah->curchan);
  384. /* Perform calibration if necessary */
  385. if (longcal || shortcal) {
  386. common->ani.caldone =
  387. ath9k_hw_calibrate(ah,
  388. ah->curchan,
  389. common->rx_chainmask,
  390. longcal);
  391. if (longcal)
  392. common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
  393. ah->curchan);
  394. ath_print(common, ATH_DBG_ANI,
  395. " calibrate chan %u/%x nf: %d\n",
  396. ah->curchan->channel,
  397. ah->curchan->channelFlags,
  398. common->ani.noise_floor);
  399. }
  400. }
  401. ath9k_ps_restore(sc);
  402. set_timer:
  403. /*
  404. * Set timer interval based on previous results.
  405. * The interval must be the shortest necessary to satisfy ANI,
  406. * short calibration and long calibration.
  407. */
  408. cal_interval = ATH_LONG_CALINTERVAL;
  409. if (sc->sc_ah->config.enable_ani)
  410. cal_interval = min(cal_interval,
  411. (u32)ah->config.ani_poll_interval);
  412. if (!common->ani.caldone)
  413. cal_interval = min(cal_interval, (u32)short_cal_interval);
  414. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  415. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  416. if (!ah->caldata->paprd_done)
  417. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  418. else
  419. ath_paprd_activate(sc);
  420. }
  421. }
  422. /*
  423. * Update tx/rx chainmask. For legacy association,
  424. * hard code chainmask to 1x1, for 11n association, use
  425. * the chainmask configuration, for bt coexistence, use
  426. * the chainmask configuration even in legacy mode.
  427. */
  428. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  429. {
  430. struct ath_hw *ah = sc->sc_ah;
  431. struct ath_common *common = ath9k_hw_common(ah);
  432. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  433. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  434. common->tx_chainmask = ah->caps.tx_chainmask;
  435. common->rx_chainmask = ah->caps.rx_chainmask;
  436. } else {
  437. common->tx_chainmask = 1;
  438. common->rx_chainmask = 1;
  439. }
  440. ath_print(common, ATH_DBG_CONFIG,
  441. "tx chmask: %d, rx chmask: %d\n",
  442. common->tx_chainmask,
  443. common->rx_chainmask);
  444. }
  445. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  446. {
  447. struct ath_node *an;
  448. an = (struct ath_node *)sta->drv_priv;
  449. if (sc->sc_flags & SC_OP_TXAGGR) {
  450. ath_tx_node_init(sc, an);
  451. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  452. sta->ht_cap.ampdu_factor);
  453. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  454. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  455. }
  456. }
  457. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  458. {
  459. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  460. if (sc->sc_flags & SC_OP_TXAGGR)
  461. ath_tx_node_cleanup(sc, an);
  462. }
  463. void ath_hw_check(struct work_struct *work)
  464. {
  465. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  466. int i;
  467. ath9k_ps_wakeup(sc);
  468. for (i = 0; i < 3; i++) {
  469. if (ath9k_hw_check_alive(sc->sc_ah))
  470. goto out;
  471. msleep(1);
  472. }
  473. ath_reset(sc, false);
  474. out:
  475. ath9k_ps_restore(sc);
  476. }
  477. void ath9k_tasklet(unsigned long data)
  478. {
  479. struct ath_softc *sc = (struct ath_softc *)data;
  480. struct ath_hw *ah = sc->sc_ah;
  481. struct ath_common *common = ath9k_hw_common(ah);
  482. u32 status = sc->intrstatus;
  483. u32 rxmask;
  484. ath9k_ps_wakeup(sc);
  485. if (status & ATH9K_INT_FATAL) {
  486. ath_reset(sc, false);
  487. ath9k_ps_restore(sc);
  488. return;
  489. }
  490. if (!ath9k_hw_check_alive(ah))
  491. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  492. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  493. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  494. ATH9K_INT_RXORN);
  495. else
  496. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  497. if (status & rxmask) {
  498. spin_lock_bh(&sc->rx.rxflushlock);
  499. /* Check for high priority Rx first */
  500. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  501. (status & ATH9K_INT_RXHP))
  502. ath_rx_tasklet(sc, 0, true);
  503. ath_rx_tasklet(sc, 0, false);
  504. spin_unlock_bh(&sc->rx.rxflushlock);
  505. }
  506. if (status & ATH9K_INT_TX) {
  507. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  508. ath_tx_edma_tasklet(sc);
  509. else
  510. ath_tx_tasklet(sc);
  511. }
  512. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  513. /*
  514. * TSF sync does not look correct; remain awake to sync with
  515. * the next Beacon.
  516. */
  517. ath_print(common, ATH_DBG_PS,
  518. "TSFOOR - Sync with next Beacon\n");
  519. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  520. }
  521. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  522. if (status & ATH9K_INT_GENTIMER)
  523. ath_gen_timer_isr(sc->sc_ah);
  524. /* re-enable hardware interrupt */
  525. ath9k_hw_set_interrupts(ah, ah->imask);
  526. ath9k_ps_restore(sc);
  527. }
  528. irqreturn_t ath_isr(int irq, void *dev)
  529. {
  530. #define SCHED_INTR ( \
  531. ATH9K_INT_FATAL | \
  532. ATH9K_INT_RXORN | \
  533. ATH9K_INT_RXEOL | \
  534. ATH9K_INT_RX | \
  535. ATH9K_INT_RXLP | \
  536. ATH9K_INT_RXHP | \
  537. ATH9K_INT_TX | \
  538. ATH9K_INT_BMISS | \
  539. ATH9K_INT_CST | \
  540. ATH9K_INT_TSFOOR | \
  541. ATH9K_INT_GENTIMER)
  542. struct ath_softc *sc = dev;
  543. struct ath_hw *ah = sc->sc_ah;
  544. enum ath9k_int status;
  545. bool sched = false;
  546. /*
  547. * The hardware is not ready/present, don't
  548. * touch anything. Note this can happen early
  549. * on if the IRQ is shared.
  550. */
  551. if (sc->sc_flags & SC_OP_INVALID)
  552. return IRQ_NONE;
  553. /* shared irq, not for us */
  554. if (!ath9k_hw_intrpend(ah))
  555. return IRQ_NONE;
  556. /*
  557. * Figure out the reason(s) for the interrupt. Note
  558. * that the hal returns a pseudo-ISR that may include
  559. * bits we haven't explicitly enabled so we mask the
  560. * value to insure we only process bits we requested.
  561. */
  562. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  563. status &= ah->imask; /* discard unasked-for bits */
  564. /*
  565. * If there are no status bits set, then this interrupt was not
  566. * for me (should have been caught above).
  567. */
  568. if (!status)
  569. return IRQ_NONE;
  570. /* Cache the status */
  571. sc->intrstatus = status;
  572. if (status & SCHED_INTR)
  573. sched = true;
  574. /*
  575. * If a FATAL or RXORN interrupt is received, we have to reset the
  576. * chip immediately.
  577. */
  578. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  579. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  580. goto chip_reset;
  581. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  582. (status & ATH9K_INT_BB_WATCHDOG)) {
  583. ar9003_hw_bb_watchdog_dbg_info(ah);
  584. goto chip_reset;
  585. }
  586. if (status & ATH9K_INT_SWBA)
  587. tasklet_schedule(&sc->bcon_tasklet);
  588. if (status & ATH9K_INT_TXURN)
  589. ath9k_hw_updatetxtriglevel(ah, true);
  590. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  591. if (status & ATH9K_INT_RXEOL) {
  592. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  593. ath9k_hw_set_interrupts(ah, ah->imask);
  594. }
  595. }
  596. if (status & ATH9K_INT_MIB) {
  597. /*
  598. * Disable interrupts until we service the MIB
  599. * interrupt; otherwise it will continue to
  600. * fire.
  601. */
  602. ath9k_hw_set_interrupts(ah, 0);
  603. /*
  604. * Let the hal handle the event. We assume
  605. * it will clear whatever condition caused
  606. * the interrupt.
  607. */
  608. ath9k_hw_procmibevent(ah);
  609. ath9k_hw_set_interrupts(ah, ah->imask);
  610. }
  611. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  612. if (status & ATH9K_INT_TIM_TIMER) {
  613. /* Clear RxAbort bit so that we can
  614. * receive frames */
  615. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  616. ath9k_hw_setrxabort(sc->sc_ah, 0);
  617. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  618. }
  619. chip_reset:
  620. ath_debug_stat_interrupt(sc, status);
  621. if (sched) {
  622. /* turn off every interrupt except SWBA */
  623. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  624. tasklet_schedule(&sc->intr_tq);
  625. }
  626. return IRQ_HANDLED;
  627. #undef SCHED_INTR
  628. }
  629. static u32 ath_get_extchanmode(struct ath_softc *sc,
  630. struct ieee80211_channel *chan,
  631. enum nl80211_channel_type channel_type)
  632. {
  633. u32 chanmode = 0;
  634. switch (chan->band) {
  635. case IEEE80211_BAND_2GHZ:
  636. switch(channel_type) {
  637. case NL80211_CHAN_NO_HT:
  638. case NL80211_CHAN_HT20:
  639. chanmode = CHANNEL_G_HT20;
  640. break;
  641. case NL80211_CHAN_HT40PLUS:
  642. chanmode = CHANNEL_G_HT40PLUS;
  643. break;
  644. case NL80211_CHAN_HT40MINUS:
  645. chanmode = CHANNEL_G_HT40MINUS;
  646. break;
  647. }
  648. break;
  649. case IEEE80211_BAND_5GHZ:
  650. switch(channel_type) {
  651. case NL80211_CHAN_NO_HT:
  652. case NL80211_CHAN_HT20:
  653. chanmode = CHANNEL_A_HT20;
  654. break;
  655. case NL80211_CHAN_HT40PLUS:
  656. chanmode = CHANNEL_A_HT40PLUS;
  657. break;
  658. case NL80211_CHAN_HT40MINUS:
  659. chanmode = CHANNEL_A_HT40MINUS;
  660. break;
  661. }
  662. break;
  663. default:
  664. break;
  665. }
  666. return chanmode;
  667. }
  668. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  669. struct ieee80211_vif *vif,
  670. struct ieee80211_bss_conf *bss_conf)
  671. {
  672. struct ath_hw *ah = sc->sc_ah;
  673. struct ath_common *common = ath9k_hw_common(ah);
  674. if (bss_conf->assoc) {
  675. ath_print(common, ATH_DBG_CONFIG,
  676. "Bss Info ASSOC %d, bssid: %pM\n",
  677. bss_conf->aid, common->curbssid);
  678. /* New association, store aid */
  679. common->curaid = bss_conf->aid;
  680. ath9k_hw_write_associd(ah);
  681. /*
  682. * Request a re-configuration of Beacon related timers
  683. * on the receipt of the first Beacon frame (i.e.,
  684. * after time sync with the AP).
  685. */
  686. sc->ps_flags |= PS_BEACON_SYNC;
  687. /* Configure the beacon */
  688. ath_beacon_config(sc, vif);
  689. /* Reset rssi stats */
  690. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  691. sc->sc_flags |= SC_OP_ANI_RUN;
  692. ath_start_ani(common);
  693. } else {
  694. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  695. common->curaid = 0;
  696. /* Stop ANI */
  697. sc->sc_flags &= ~SC_OP_ANI_RUN;
  698. del_timer_sync(&common->ani.timer);
  699. }
  700. }
  701. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  702. {
  703. struct ath_hw *ah = sc->sc_ah;
  704. struct ath_common *common = ath9k_hw_common(ah);
  705. struct ieee80211_channel *channel = hw->conf.channel;
  706. int r;
  707. ath9k_ps_wakeup(sc);
  708. ath9k_hw_configpcipowersave(ah, 0, 0);
  709. if (!ah->curchan)
  710. ah->curchan = ath_get_curchannel(sc, sc->hw);
  711. spin_lock_bh(&sc->sc_resetlock);
  712. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  713. if (r) {
  714. ath_print(common, ATH_DBG_FATAL,
  715. "Unable to reset channel (%u MHz), "
  716. "reset status %d\n",
  717. channel->center_freq, r);
  718. }
  719. spin_unlock_bh(&sc->sc_resetlock);
  720. ath_update_txpow(sc);
  721. if (ath_startrecv(sc) != 0) {
  722. ath_print(common, ATH_DBG_FATAL,
  723. "Unable to restart recv logic\n");
  724. return;
  725. }
  726. if (sc->sc_flags & SC_OP_BEACONS)
  727. ath_beacon_config(sc, NULL); /* restart beacons */
  728. /* Re-Enable interrupts */
  729. ath9k_hw_set_interrupts(ah, ah->imask);
  730. /* Enable LED */
  731. ath9k_hw_cfg_output(ah, ah->led_pin,
  732. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  733. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  734. ieee80211_wake_queues(hw);
  735. ath9k_ps_restore(sc);
  736. }
  737. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  738. {
  739. struct ath_hw *ah = sc->sc_ah;
  740. struct ieee80211_channel *channel = hw->conf.channel;
  741. int r;
  742. ath9k_ps_wakeup(sc);
  743. ieee80211_stop_queues(hw);
  744. /*
  745. * Keep the LED on when the radio is disabled
  746. * during idle unassociated state.
  747. */
  748. if (!sc->ps_idle) {
  749. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  750. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  751. }
  752. /* Disable interrupts */
  753. ath9k_hw_set_interrupts(ah, 0);
  754. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  755. ath_stoprecv(sc); /* turn off frame recv */
  756. ath_flushrecv(sc); /* flush recv queue */
  757. if (!ah->curchan)
  758. ah->curchan = ath_get_curchannel(sc, hw);
  759. spin_lock_bh(&sc->sc_resetlock);
  760. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  761. if (r) {
  762. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  763. "Unable to reset channel (%u MHz), "
  764. "reset status %d\n",
  765. channel->center_freq, r);
  766. }
  767. spin_unlock_bh(&sc->sc_resetlock);
  768. ath9k_hw_phy_disable(ah);
  769. ath9k_hw_configpcipowersave(ah, 1, 1);
  770. ath9k_ps_restore(sc);
  771. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  772. }
  773. int ath_reset(struct ath_softc *sc, bool retry_tx)
  774. {
  775. struct ath_hw *ah = sc->sc_ah;
  776. struct ath_common *common = ath9k_hw_common(ah);
  777. struct ieee80211_hw *hw = sc->hw;
  778. int r;
  779. /* Stop ANI */
  780. del_timer_sync(&common->ani.timer);
  781. ieee80211_stop_queues(hw);
  782. ath9k_hw_set_interrupts(ah, 0);
  783. ath_drain_all_txq(sc, retry_tx);
  784. ath_stoprecv(sc);
  785. ath_flushrecv(sc);
  786. spin_lock_bh(&sc->sc_resetlock);
  787. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  788. if (r)
  789. ath_print(common, ATH_DBG_FATAL,
  790. "Unable to reset hardware; reset status %d\n", r);
  791. spin_unlock_bh(&sc->sc_resetlock);
  792. if (ath_startrecv(sc) != 0)
  793. ath_print(common, ATH_DBG_FATAL,
  794. "Unable to start recv logic\n");
  795. /*
  796. * We may be doing a reset in response to a request
  797. * that changes the channel so update any state that
  798. * might change as a result.
  799. */
  800. ath_cache_conf_rate(sc, &hw->conf);
  801. ath_update_txpow(sc);
  802. if (sc->sc_flags & SC_OP_BEACONS)
  803. ath_beacon_config(sc, NULL); /* restart beacons */
  804. ath9k_hw_set_interrupts(ah, ah->imask);
  805. if (retry_tx) {
  806. int i;
  807. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  808. if (ATH_TXQ_SETUP(sc, i)) {
  809. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  810. ath_txq_schedule(sc, &sc->tx.txq[i]);
  811. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  812. }
  813. }
  814. }
  815. ieee80211_wake_queues(hw);
  816. /* Start ANI */
  817. ath_start_ani(common);
  818. return r;
  819. }
  820. static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  821. {
  822. int qnum;
  823. switch (queue) {
  824. case 0:
  825. qnum = sc->tx.hwq_map[WME_AC_VO];
  826. break;
  827. case 1:
  828. qnum = sc->tx.hwq_map[WME_AC_VI];
  829. break;
  830. case 2:
  831. qnum = sc->tx.hwq_map[WME_AC_BE];
  832. break;
  833. case 3:
  834. qnum = sc->tx.hwq_map[WME_AC_BK];
  835. break;
  836. default:
  837. qnum = sc->tx.hwq_map[WME_AC_BE];
  838. break;
  839. }
  840. return qnum;
  841. }
  842. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  843. {
  844. int qnum;
  845. switch (queue) {
  846. case WME_AC_VO:
  847. qnum = 0;
  848. break;
  849. case WME_AC_VI:
  850. qnum = 1;
  851. break;
  852. case WME_AC_BE:
  853. qnum = 2;
  854. break;
  855. case WME_AC_BK:
  856. qnum = 3;
  857. break;
  858. default:
  859. qnum = -1;
  860. break;
  861. }
  862. return qnum;
  863. }
  864. /* XXX: Remove me once we don't depend on ath9k_channel for all
  865. * this redundant data */
  866. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  867. struct ath9k_channel *ichan)
  868. {
  869. struct ieee80211_channel *chan = hw->conf.channel;
  870. struct ieee80211_conf *conf = &hw->conf;
  871. ichan->channel = chan->center_freq;
  872. ichan->chan = chan;
  873. if (chan->band == IEEE80211_BAND_2GHZ) {
  874. ichan->chanmode = CHANNEL_G;
  875. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  876. } else {
  877. ichan->chanmode = CHANNEL_A;
  878. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  879. }
  880. if (conf_is_ht(conf))
  881. ichan->chanmode = ath_get_extchanmode(sc, chan,
  882. conf->channel_type);
  883. }
  884. /**********************/
  885. /* mac80211 callbacks */
  886. /**********************/
  887. static int ath9k_start(struct ieee80211_hw *hw)
  888. {
  889. struct ath_wiphy *aphy = hw->priv;
  890. struct ath_softc *sc = aphy->sc;
  891. struct ath_hw *ah = sc->sc_ah;
  892. struct ath_common *common = ath9k_hw_common(ah);
  893. struct ieee80211_channel *curchan = hw->conf.channel;
  894. struct ath9k_channel *init_channel;
  895. int r;
  896. ath_print(common, ATH_DBG_CONFIG,
  897. "Starting driver with initial channel: %d MHz\n",
  898. curchan->center_freq);
  899. mutex_lock(&sc->mutex);
  900. if (ath9k_wiphy_started(sc)) {
  901. if (sc->chan_idx == curchan->hw_value) {
  902. /*
  903. * Already on the operational channel, the new wiphy
  904. * can be marked active.
  905. */
  906. aphy->state = ATH_WIPHY_ACTIVE;
  907. ieee80211_wake_queues(hw);
  908. } else {
  909. /*
  910. * Another wiphy is on another channel, start the new
  911. * wiphy in paused state.
  912. */
  913. aphy->state = ATH_WIPHY_PAUSED;
  914. ieee80211_stop_queues(hw);
  915. }
  916. mutex_unlock(&sc->mutex);
  917. return 0;
  918. }
  919. aphy->state = ATH_WIPHY_ACTIVE;
  920. /* setup initial channel */
  921. sc->chan_idx = curchan->hw_value;
  922. init_channel = ath_get_curchannel(sc, hw);
  923. /* Reset SERDES registers */
  924. ath9k_hw_configpcipowersave(ah, 0, 0);
  925. /*
  926. * The basic interface to setting the hardware in a good
  927. * state is ``reset''. On return the hardware is known to
  928. * be powered up and with interrupts disabled. This must
  929. * be followed by initialization of the appropriate bits
  930. * and then setup of the interrupt mask.
  931. */
  932. spin_lock_bh(&sc->sc_resetlock);
  933. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  934. if (r) {
  935. ath_print(common, ATH_DBG_FATAL,
  936. "Unable to reset hardware; reset status %d "
  937. "(freq %u MHz)\n", r,
  938. curchan->center_freq);
  939. spin_unlock_bh(&sc->sc_resetlock);
  940. goto mutex_unlock;
  941. }
  942. spin_unlock_bh(&sc->sc_resetlock);
  943. /*
  944. * This is needed only to setup initial state
  945. * but it's best done after a reset.
  946. */
  947. ath_update_txpow(sc);
  948. /*
  949. * Setup the hardware after reset:
  950. * The receive engine is set going.
  951. * Frame transmit is handled entirely
  952. * in the frame output path; there's nothing to do
  953. * here except setup the interrupt mask.
  954. */
  955. if (ath_startrecv(sc) != 0) {
  956. ath_print(common, ATH_DBG_FATAL,
  957. "Unable to start recv logic\n");
  958. r = -EIO;
  959. goto mutex_unlock;
  960. }
  961. /* Setup our intr mask. */
  962. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  963. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  964. ATH9K_INT_GLOBAL;
  965. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  966. ah->imask |= ATH9K_INT_RXHP |
  967. ATH9K_INT_RXLP |
  968. ATH9K_INT_BB_WATCHDOG;
  969. else
  970. ah->imask |= ATH9K_INT_RX;
  971. ah->imask |= ATH9K_INT_GTT;
  972. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  973. ah->imask |= ATH9K_INT_CST;
  974. ath_cache_conf_rate(sc, &hw->conf);
  975. sc->sc_flags &= ~SC_OP_INVALID;
  976. /* Disable BMISS interrupt when we're not associated */
  977. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  978. ath9k_hw_set_interrupts(ah, ah->imask);
  979. ieee80211_wake_queues(hw);
  980. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  981. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  982. !ah->btcoex_hw.enabled) {
  983. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  984. AR_STOMP_LOW_WLAN_WGHT);
  985. ath9k_hw_btcoex_enable(ah);
  986. if (common->bus_ops->bt_coex_prep)
  987. common->bus_ops->bt_coex_prep(common);
  988. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  989. ath9k_btcoex_timer_resume(sc);
  990. }
  991. mutex_unlock:
  992. mutex_unlock(&sc->mutex);
  993. return r;
  994. }
  995. static int ath9k_tx(struct ieee80211_hw *hw,
  996. struct sk_buff *skb)
  997. {
  998. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  999. struct ath_wiphy *aphy = hw->priv;
  1000. struct ath_softc *sc = aphy->sc;
  1001. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1002. struct ath_tx_control txctl;
  1003. int padpos, padsize;
  1004. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  1005. int qnum;
  1006. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1007. ath_print(common, ATH_DBG_XMIT,
  1008. "ath9k: %s: TX in unexpected wiphy state "
  1009. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1010. goto exit;
  1011. }
  1012. if (sc->ps_enabled) {
  1013. /*
  1014. * mac80211 does not set PM field for normal data frames, so we
  1015. * need to update that based on the current PS mode.
  1016. */
  1017. if (ieee80211_is_data(hdr->frame_control) &&
  1018. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1019. !ieee80211_has_pm(hdr->frame_control)) {
  1020. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1021. "while in PS mode\n");
  1022. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1023. }
  1024. }
  1025. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1026. /*
  1027. * We are using PS-Poll and mac80211 can request TX while in
  1028. * power save mode. Need to wake up hardware for the TX to be
  1029. * completed and if needed, also for RX of buffered frames.
  1030. */
  1031. ath9k_ps_wakeup(sc);
  1032. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1033. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1034. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1035. ath_print(common, ATH_DBG_PS,
  1036. "Sending PS-Poll to pick a buffered frame\n");
  1037. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1038. } else {
  1039. ath_print(common, ATH_DBG_PS,
  1040. "Wake up to complete TX\n");
  1041. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1042. }
  1043. /*
  1044. * The actual restore operation will happen only after
  1045. * the sc_flags bit is cleared. We are just dropping
  1046. * the ps_usecount here.
  1047. */
  1048. ath9k_ps_restore(sc);
  1049. }
  1050. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1051. /*
  1052. * As a temporary workaround, assign seq# here; this will likely need
  1053. * to be cleaned up to work better with Beacon transmission and virtual
  1054. * BSSes.
  1055. */
  1056. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1057. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1058. sc->tx.seq_no += 0x10;
  1059. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1060. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1061. }
  1062. /* Add the padding after the header if this is not already done */
  1063. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1064. padsize = padpos & 3;
  1065. if (padsize && skb->len>padpos) {
  1066. if (skb_headroom(skb) < padsize)
  1067. return -1;
  1068. skb_push(skb, padsize);
  1069. memmove(skb->data, skb->data + padsize, padpos);
  1070. }
  1071. qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
  1072. txctl.txq = &sc->tx.txq[qnum];
  1073. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1074. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1075. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1076. goto exit;
  1077. }
  1078. return 0;
  1079. exit:
  1080. dev_kfree_skb_any(skb);
  1081. return 0;
  1082. }
  1083. static void ath9k_stop(struct ieee80211_hw *hw)
  1084. {
  1085. struct ath_wiphy *aphy = hw->priv;
  1086. struct ath_softc *sc = aphy->sc;
  1087. struct ath_hw *ah = sc->sc_ah;
  1088. struct ath_common *common = ath9k_hw_common(ah);
  1089. int i;
  1090. mutex_lock(&sc->mutex);
  1091. aphy->state = ATH_WIPHY_INACTIVE;
  1092. if (led_blink)
  1093. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1094. cancel_delayed_work_sync(&sc->tx_complete_work);
  1095. cancel_work_sync(&sc->paprd_work);
  1096. cancel_work_sync(&sc->hw_check_work);
  1097. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1098. if (sc->sec_wiphy[i])
  1099. break;
  1100. }
  1101. if (i == sc->num_sec_wiphy) {
  1102. cancel_delayed_work_sync(&sc->wiphy_work);
  1103. cancel_work_sync(&sc->chan_work);
  1104. }
  1105. if (sc->sc_flags & SC_OP_INVALID) {
  1106. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1107. mutex_unlock(&sc->mutex);
  1108. return;
  1109. }
  1110. if (ath9k_wiphy_started(sc)) {
  1111. mutex_unlock(&sc->mutex);
  1112. return; /* another wiphy still in use */
  1113. }
  1114. /* Ensure HW is awake when we try to shut it down. */
  1115. ath9k_ps_wakeup(sc);
  1116. if (ah->btcoex_hw.enabled) {
  1117. ath9k_hw_btcoex_disable(ah);
  1118. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1119. ath9k_btcoex_timer_pause(sc);
  1120. }
  1121. /* make sure h/w will not generate any interrupt
  1122. * before setting the invalid flag. */
  1123. ath9k_hw_set_interrupts(ah, 0);
  1124. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1125. ath_drain_all_txq(sc, false);
  1126. ath_stoprecv(sc);
  1127. ath9k_hw_phy_disable(ah);
  1128. } else
  1129. sc->rx.rxlink = NULL;
  1130. /* disable HAL and put h/w to sleep */
  1131. ath9k_hw_disable(ah);
  1132. ath9k_hw_configpcipowersave(ah, 1, 1);
  1133. ath9k_ps_restore(sc);
  1134. /* Finally, put the chip in FULL SLEEP mode */
  1135. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1136. sc->sc_flags |= SC_OP_INVALID;
  1137. mutex_unlock(&sc->mutex);
  1138. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1139. }
  1140. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1141. struct ieee80211_vif *vif)
  1142. {
  1143. struct ath_wiphy *aphy = hw->priv;
  1144. struct ath_softc *sc = aphy->sc;
  1145. struct ath_hw *ah = sc->sc_ah;
  1146. struct ath_common *common = ath9k_hw_common(ah);
  1147. struct ath_vif *avp = (void *)vif->drv_priv;
  1148. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1149. int ret = 0;
  1150. mutex_lock(&sc->mutex);
  1151. switch (vif->type) {
  1152. case NL80211_IFTYPE_STATION:
  1153. ic_opmode = NL80211_IFTYPE_STATION;
  1154. break;
  1155. case NL80211_IFTYPE_ADHOC:
  1156. case NL80211_IFTYPE_AP:
  1157. case NL80211_IFTYPE_MESH_POINT:
  1158. if (sc->nbcnvifs >= ATH_BCBUF) {
  1159. ret = -ENOBUFS;
  1160. goto out;
  1161. }
  1162. ic_opmode = vif->type;
  1163. break;
  1164. default:
  1165. ath_print(common, ATH_DBG_FATAL,
  1166. "Interface type %d not yet supported\n", vif->type);
  1167. ret = -EOPNOTSUPP;
  1168. goto out;
  1169. }
  1170. ath_print(common, ATH_DBG_CONFIG,
  1171. "Attach a VIF of type: %d\n", ic_opmode);
  1172. /* Set the VIF opmode */
  1173. avp->av_opmode = ic_opmode;
  1174. avp->av_bslot = -1;
  1175. sc->nvifs++;
  1176. ath9k_set_bssid_mask(hw, vif);
  1177. if (sc->nvifs > 1)
  1178. goto out; /* skip global settings for secondary vif */
  1179. if (ic_opmode == NL80211_IFTYPE_AP) {
  1180. ath9k_hw_set_tsfadjust(ah, 1);
  1181. sc->sc_flags |= SC_OP_TSF_RESET;
  1182. }
  1183. /* Set the device opmode */
  1184. ah->opmode = ic_opmode;
  1185. /*
  1186. * Enable MIB interrupts when there are hardware phy counters.
  1187. * Note we only do this (at the moment) for station mode.
  1188. */
  1189. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1190. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1191. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1192. if (ah->config.enable_ani)
  1193. ah->imask |= ATH9K_INT_MIB;
  1194. ah->imask |= ATH9K_INT_TSFOOR;
  1195. }
  1196. ath9k_hw_set_interrupts(ah, ah->imask);
  1197. if (vif->type == NL80211_IFTYPE_AP ||
  1198. vif->type == NL80211_IFTYPE_ADHOC ||
  1199. vif->type == NL80211_IFTYPE_MONITOR) {
  1200. sc->sc_flags |= SC_OP_ANI_RUN;
  1201. ath_start_ani(common);
  1202. }
  1203. out:
  1204. mutex_unlock(&sc->mutex);
  1205. return ret;
  1206. }
  1207. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1208. struct ieee80211_vif *vif)
  1209. {
  1210. struct ath_wiphy *aphy = hw->priv;
  1211. struct ath_softc *sc = aphy->sc;
  1212. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1213. struct ath_vif *avp = (void *)vif->drv_priv;
  1214. int i;
  1215. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1216. mutex_lock(&sc->mutex);
  1217. /* Stop ANI */
  1218. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1219. del_timer_sync(&common->ani.timer);
  1220. /* Reclaim beacon resources */
  1221. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1222. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1223. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1224. ath9k_ps_wakeup(sc);
  1225. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1226. ath9k_ps_restore(sc);
  1227. }
  1228. ath_beacon_return(sc, avp);
  1229. sc->sc_flags &= ~SC_OP_BEACONS;
  1230. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1231. if (sc->beacon.bslot[i] == vif) {
  1232. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1233. "slot\n", __func__);
  1234. sc->beacon.bslot[i] = NULL;
  1235. sc->beacon.bslot_aphy[i] = NULL;
  1236. }
  1237. }
  1238. sc->nvifs--;
  1239. mutex_unlock(&sc->mutex);
  1240. }
  1241. void ath9k_enable_ps(struct ath_softc *sc)
  1242. {
  1243. struct ath_hw *ah = sc->sc_ah;
  1244. sc->ps_enabled = true;
  1245. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1246. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1247. ah->imask |= ATH9K_INT_TIM_TIMER;
  1248. ath9k_hw_set_interrupts(ah, ah->imask);
  1249. }
  1250. ath9k_hw_setrxabort(ah, 1);
  1251. }
  1252. }
  1253. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1254. {
  1255. struct ath_wiphy *aphy = hw->priv;
  1256. struct ath_softc *sc = aphy->sc;
  1257. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1258. struct ieee80211_conf *conf = &hw->conf;
  1259. struct ath_hw *ah = sc->sc_ah;
  1260. bool disable_radio;
  1261. mutex_lock(&sc->mutex);
  1262. /*
  1263. * Leave this as the first check because we need to turn on the
  1264. * radio if it was disabled before prior to processing the rest
  1265. * of the changes. Likewise we must only disable the radio towards
  1266. * the end.
  1267. */
  1268. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1269. bool enable_radio;
  1270. bool all_wiphys_idle;
  1271. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1272. spin_lock_bh(&sc->wiphy_lock);
  1273. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1274. ath9k_set_wiphy_idle(aphy, idle);
  1275. enable_radio = (!idle && all_wiphys_idle);
  1276. /*
  1277. * After we unlock here its possible another wiphy
  1278. * can be re-renabled so to account for that we will
  1279. * only disable the radio toward the end of this routine
  1280. * if by then all wiphys are still idle.
  1281. */
  1282. spin_unlock_bh(&sc->wiphy_lock);
  1283. if (enable_radio) {
  1284. sc->ps_idle = false;
  1285. ath_radio_enable(sc, hw);
  1286. ath_print(common, ATH_DBG_CONFIG,
  1287. "not-idle: enabling radio\n");
  1288. }
  1289. }
  1290. /*
  1291. * We just prepare to enable PS. We have to wait until our AP has
  1292. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1293. * those ACKs and end up retransmitting the same null data frames.
  1294. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1295. */
  1296. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1297. if (conf->flags & IEEE80211_CONF_PS) {
  1298. sc->ps_flags |= PS_ENABLED;
  1299. /*
  1300. * At this point we know hardware has received an ACK
  1301. * of a previously sent null data frame.
  1302. */
  1303. if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
  1304. sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
  1305. ath9k_enable_ps(sc);
  1306. }
  1307. } else {
  1308. sc->ps_enabled = false;
  1309. sc->ps_flags &= ~(PS_ENABLED |
  1310. PS_NULLFUNC_COMPLETED);
  1311. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  1312. if (!(ah->caps.hw_caps &
  1313. ATH9K_HW_CAP_AUTOSLEEP)) {
  1314. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1315. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1316. PS_WAIT_FOR_CAB |
  1317. PS_WAIT_FOR_PSPOLL_DATA |
  1318. PS_WAIT_FOR_TX_ACK);
  1319. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1320. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1321. ath9k_hw_set_interrupts(sc->sc_ah,
  1322. ah->imask);
  1323. }
  1324. }
  1325. }
  1326. }
  1327. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1328. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1329. ath_print(common, ATH_DBG_CONFIG,
  1330. "HW opmode set to Monitor mode\n");
  1331. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1332. }
  1333. }
  1334. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1335. struct ieee80211_channel *curchan = hw->conf.channel;
  1336. int pos = curchan->hw_value;
  1337. aphy->chan_idx = pos;
  1338. aphy->chan_is_ht = conf_is_ht(conf);
  1339. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1340. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1341. else
  1342. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1343. if (aphy->state == ATH_WIPHY_SCAN ||
  1344. aphy->state == ATH_WIPHY_ACTIVE)
  1345. ath9k_wiphy_pause_all_forced(sc, aphy);
  1346. else {
  1347. /*
  1348. * Do not change operational channel based on a paused
  1349. * wiphy changes.
  1350. */
  1351. goto skip_chan_change;
  1352. }
  1353. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1354. curchan->center_freq);
  1355. /* XXX: remove me eventualy */
  1356. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1357. ath_update_chainmask(sc, conf_is_ht(conf));
  1358. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1359. ath_print(common, ATH_DBG_FATAL,
  1360. "Unable to set channel\n");
  1361. mutex_unlock(&sc->mutex);
  1362. return -EINVAL;
  1363. }
  1364. }
  1365. skip_chan_change:
  1366. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1367. sc->config.txpowlimit = 2 * conf->power_level;
  1368. ath_update_txpow(sc);
  1369. }
  1370. spin_lock_bh(&sc->wiphy_lock);
  1371. disable_radio = ath9k_all_wiphys_idle(sc);
  1372. spin_unlock_bh(&sc->wiphy_lock);
  1373. if (disable_radio) {
  1374. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1375. sc->ps_idle = true;
  1376. ath_radio_disable(sc, hw);
  1377. }
  1378. mutex_unlock(&sc->mutex);
  1379. return 0;
  1380. }
  1381. #define SUPPORTED_FILTERS \
  1382. (FIF_PROMISC_IN_BSS | \
  1383. FIF_ALLMULTI | \
  1384. FIF_CONTROL | \
  1385. FIF_PSPOLL | \
  1386. FIF_OTHER_BSS | \
  1387. FIF_BCN_PRBRESP_PROMISC | \
  1388. FIF_FCSFAIL)
  1389. /* FIXME: sc->sc_full_reset ? */
  1390. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1391. unsigned int changed_flags,
  1392. unsigned int *total_flags,
  1393. u64 multicast)
  1394. {
  1395. struct ath_wiphy *aphy = hw->priv;
  1396. struct ath_softc *sc = aphy->sc;
  1397. u32 rfilt;
  1398. changed_flags &= SUPPORTED_FILTERS;
  1399. *total_flags &= SUPPORTED_FILTERS;
  1400. sc->rx.rxfilter = *total_flags;
  1401. ath9k_ps_wakeup(sc);
  1402. rfilt = ath_calcrxfilter(sc);
  1403. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1404. ath9k_ps_restore(sc);
  1405. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1406. "Set HW RX filter: 0x%x\n", rfilt);
  1407. }
  1408. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1409. struct ieee80211_vif *vif,
  1410. struct ieee80211_sta *sta)
  1411. {
  1412. struct ath_wiphy *aphy = hw->priv;
  1413. struct ath_softc *sc = aphy->sc;
  1414. ath_node_attach(sc, sta);
  1415. return 0;
  1416. }
  1417. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1418. struct ieee80211_vif *vif,
  1419. struct ieee80211_sta *sta)
  1420. {
  1421. struct ath_wiphy *aphy = hw->priv;
  1422. struct ath_softc *sc = aphy->sc;
  1423. ath_node_detach(sc, sta);
  1424. return 0;
  1425. }
  1426. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1427. const struct ieee80211_tx_queue_params *params)
  1428. {
  1429. struct ath_wiphy *aphy = hw->priv;
  1430. struct ath_softc *sc = aphy->sc;
  1431. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1432. struct ath9k_tx_queue_info qi;
  1433. int ret = 0, qnum;
  1434. if (queue >= WME_NUM_AC)
  1435. return 0;
  1436. mutex_lock(&sc->mutex);
  1437. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1438. qi.tqi_aifs = params->aifs;
  1439. qi.tqi_cwmin = params->cw_min;
  1440. qi.tqi_cwmax = params->cw_max;
  1441. qi.tqi_burstTime = params->txop;
  1442. qnum = ath_get_hal_qnum(queue, sc);
  1443. ath_print(common, ATH_DBG_CONFIG,
  1444. "Configure tx [queue/halq] [%d/%d], "
  1445. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1446. queue, qnum, params->aifs, params->cw_min,
  1447. params->cw_max, params->txop);
  1448. ret = ath_txq_update(sc, qnum, &qi);
  1449. if (ret)
  1450. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1451. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1452. if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
  1453. ath_beaconq_config(sc);
  1454. mutex_unlock(&sc->mutex);
  1455. return ret;
  1456. }
  1457. static int ath9k_set_key(struct ieee80211_hw *hw,
  1458. enum set_key_cmd cmd,
  1459. struct ieee80211_vif *vif,
  1460. struct ieee80211_sta *sta,
  1461. struct ieee80211_key_conf *key)
  1462. {
  1463. struct ath_wiphy *aphy = hw->priv;
  1464. struct ath_softc *sc = aphy->sc;
  1465. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1466. int ret = 0;
  1467. if (modparam_nohwcrypt)
  1468. return -ENOSPC;
  1469. mutex_lock(&sc->mutex);
  1470. ath9k_ps_wakeup(sc);
  1471. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1472. switch (cmd) {
  1473. case SET_KEY:
  1474. ret = ath9k_cmn_key_config(common, vif, sta, key);
  1475. if (ret >= 0) {
  1476. key->hw_key_idx = ret;
  1477. /* push IV and Michael MIC generation to stack */
  1478. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1479. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1480. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1481. if (sc->sc_ah->sw_mgmt_crypto &&
  1482. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1483. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1484. ret = 0;
  1485. }
  1486. break;
  1487. case DISABLE_KEY:
  1488. ath9k_cmn_key_delete(common, key);
  1489. break;
  1490. default:
  1491. ret = -EINVAL;
  1492. }
  1493. ath9k_ps_restore(sc);
  1494. mutex_unlock(&sc->mutex);
  1495. return ret;
  1496. }
  1497. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1498. struct ieee80211_vif *vif,
  1499. struct ieee80211_bss_conf *bss_conf,
  1500. u32 changed)
  1501. {
  1502. struct ath_wiphy *aphy = hw->priv;
  1503. struct ath_softc *sc = aphy->sc;
  1504. struct ath_hw *ah = sc->sc_ah;
  1505. struct ath_common *common = ath9k_hw_common(ah);
  1506. struct ath_vif *avp = (void *)vif->drv_priv;
  1507. int slottime;
  1508. int error;
  1509. mutex_lock(&sc->mutex);
  1510. if (changed & BSS_CHANGED_BSSID) {
  1511. /* Set BSSID */
  1512. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1513. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1514. common->curaid = 0;
  1515. ath9k_hw_write_associd(ah);
  1516. /* Set aggregation protection mode parameters */
  1517. sc->config.ath_aggr_prot = 0;
  1518. /* Only legacy IBSS for now */
  1519. if (vif->type == NL80211_IFTYPE_ADHOC)
  1520. ath_update_chainmask(sc, 0);
  1521. ath_print(common, ATH_DBG_CONFIG,
  1522. "BSSID: %pM aid: 0x%x\n",
  1523. common->curbssid, common->curaid);
  1524. /* need to reconfigure the beacon */
  1525. sc->sc_flags &= ~SC_OP_BEACONS ;
  1526. }
  1527. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1528. if ((changed & BSS_CHANGED_BEACON) ||
  1529. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1530. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1531. error = ath_beacon_alloc(aphy, vif);
  1532. if (!error)
  1533. ath_beacon_config(sc, vif);
  1534. }
  1535. if (changed & BSS_CHANGED_ERP_SLOT) {
  1536. if (bss_conf->use_short_slot)
  1537. slottime = 9;
  1538. else
  1539. slottime = 20;
  1540. if (vif->type == NL80211_IFTYPE_AP) {
  1541. /*
  1542. * Defer update, so that connected stations can adjust
  1543. * their settings at the same time.
  1544. * See beacon.c for more details
  1545. */
  1546. sc->beacon.slottime = slottime;
  1547. sc->beacon.updateslot = UPDATE;
  1548. } else {
  1549. ah->slottime = slottime;
  1550. ath9k_hw_init_global_settings(ah);
  1551. }
  1552. }
  1553. /* Disable transmission of beacons */
  1554. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1555. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1556. if (changed & BSS_CHANGED_BEACON_INT) {
  1557. sc->beacon_interval = bss_conf->beacon_int;
  1558. /*
  1559. * In case of AP mode, the HW TSF has to be reset
  1560. * when the beacon interval changes.
  1561. */
  1562. if (vif->type == NL80211_IFTYPE_AP) {
  1563. sc->sc_flags |= SC_OP_TSF_RESET;
  1564. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1565. error = ath_beacon_alloc(aphy, vif);
  1566. if (!error)
  1567. ath_beacon_config(sc, vif);
  1568. } else {
  1569. ath_beacon_config(sc, vif);
  1570. }
  1571. }
  1572. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1573. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1574. bss_conf->use_short_preamble);
  1575. if (bss_conf->use_short_preamble)
  1576. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1577. else
  1578. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1579. }
  1580. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1581. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1582. bss_conf->use_cts_prot);
  1583. if (bss_conf->use_cts_prot &&
  1584. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1585. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1586. else
  1587. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1588. }
  1589. if (changed & BSS_CHANGED_ASSOC) {
  1590. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1591. bss_conf->assoc);
  1592. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1593. }
  1594. mutex_unlock(&sc->mutex);
  1595. }
  1596. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1597. {
  1598. u64 tsf;
  1599. struct ath_wiphy *aphy = hw->priv;
  1600. struct ath_softc *sc = aphy->sc;
  1601. mutex_lock(&sc->mutex);
  1602. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1603. mutex_unlock(&sc->mutex);
  1604. return tsf;
  1605. }
  1606. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1607. {
  1608. struct ath_wiphy *aphy = hw->priv;
  1609. struct ath_softc *sc = aphy->sc;
  1610. mutex_lock(&sc->mutex);
  1611. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1612. mutex_unlock(&sc->mutex);
  1613. }
  1614. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1615. {
  1616. struct ath_wiphy *aphy = hw->priv;
  1617. struct ath_softc *sc = aphy->sc;
  1618. mutex_lock(&sc->mutex);
  1619. ath9k_ps_wakeup(sc);
  1620. ath9k_hw_reset_tsf(sc->sc_ah);
  1621. ath9k_ps_restore(sc);
  1622. mutex_unlock(&sc->mutex);
  1623. }
  1624. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1625. struct ieee80211_vif *vif,
  1626. enum ieee80211_ampdu_mlme_action action,
  1627. struct ieee80211_sta *sta,
  1628. u16 tid, u16 *ssn)
  1629. {
  1630. struct ath_wiphy *aphy = hw->priv;
  1631. struct ath_softc *sc = aphy->sc;
  1632. int ret = 0;
  1633. local_bh_disable();
  1634. switch (action) {
  1635. case IEEE80211_AMPDU_RX_START:
  1636. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1637. ret = -ENOTSUPP;
  1638. break;
  1639. case IEEE80211_AMPDU_RX_STOP:
  1640. break;
  1641. case IEEE80211_AMPDU_TX_START:
  1642. ath9k_ps_wakeup(sc);
  1643. ath_tx_aggr_start(sc, sta, tid, ssn);
  1644. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1645. ath9k_ps_restore(sc);
  1646. break;
  1647. case IEEE80211_AMPDU_TX_STOP:
  1648. ath9k_ps_wakeup(sc);
  1649. ath_tx_aggr_stop(sc, sta, tid);
  1650. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1651. ath9k_ps_restore(sc);
  1652. break;
  1653. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1654. ath9k_ps_wakeup(sc);
  1655. ath_tx_aggr_resume(sc, sta, tid);
  1656. ath9k_ps_restore(sc);
  1657. break;
  1658. default:
  1659. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1660. "Unknown AMPDU action\n");
  1661. }
  1662. local_bh_enable();
  1663. return ret;
  1664. }
  1665. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1666. struct survey_info *survey)
  1667. {
  1668. struct ath_wiphy *aphy = hw->priv;
  1669. struct ath_softc *sc = aphy->sc;
  1670. struct ath_hw *ah = sc->sc_ah;
  1671. struct ath_common *common = ath9k_hw_common(ah);
  1672. struct ieee80211_conf *conf = &hw->conf;
  1673. if (idx != 0)
  1674. return -ENOENT;
  1675. survey->channel = conf->channel;
  1676. survey->filled = SURVEY_INFO_NOISE_DBM;
  1677. survey->noise = common->ani.noise_floor;
  1678. return 0;
  1679. }
  1680. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1681. {
  1682. struct ath_wiphy *aphy = hw->priv;
  1683. struct ath_softc *sc = aphy->sc;
  1684. mutex_lock(&sc->mutex);
  1685. if (ath9k_wiphy_scanning(sc)) {
  1686. /*
  1687. * There is a race here in mac80211 but fixing it requires
  1688. * we revisit how we handle the scan complete callback.
  1689. * After mac80211 fixes we will not have configured hardware
  1690. * to the home channel nor would we have configured the RX
  1691. * filter yet.
  1692. */
  1693. mutex_unlock(&sc->mutex);
  1694. return;
  1695. }
  1696. aphy->state = ATH_WIPHY_SCAN;
  1697. ath9k_wiphy_pause_all_forced(sc, aphy);
  1698. sc->sc_flags |= SC_OP_SCANNING;
  1699. mutex_unlock(&sc->mutex);
  1700. }
  1701. /*
  1702. * XXX: this requires a revisit after the driver
  1703. * scan_complete gets moved to another place/removed in mac80211.
  1704. */
  1705. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1706. {
  1707. struct ath_wiphy *aphy = hw->priv;
  1708. struct ath_softc *sc = aphy->sc;
  1709. mutex_lock(&sc->mutex);
  1710. aphy->state = ATH_WIPHY_ACTIVE;
  1711. sc->sc_flags &= ~SC_OP_SCANNING;
  1712. mutex_unlock(&sc->mutex);
  1713. }
  1714. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1715. {
  1716. struct ath_wiphy *aphy = hw->priv;
  1717. struct ath_softc *sc = aphy->sc;
  1718. struct ath_hw *ah = sc->sc_ah;
  1719. mutex_lock(&sc->mutex);
  1720. ah->coverage_class = coverage_class;
  1721. ath9k_hw_init_global_settings(ah);
  1722. mutex_unlock(&sc->mutex);
  1723. }
  1724. struct ieee80211_ops ath9k_ops = {
  1725. .tx = ath9k_tx,
  1726. .start = ath9k_start,
  1727. .stop = ath9k_stop,
  1728. .add_interface = ath9k_add_interface,
  1729. .remove_interface = ath9k_remove_interface,
  1730. .config = ath9k_config,
  1731. .configure_filter = ath9k_configure_filter,
  1732. .sta_add = ath9k_sta_add,
  1733. .sta_remove = ath9k_sta_remove,
  1734. .conf_tx = ath9k_conf_tx,
  1735. .bss_info_changed = ath9k_bss_info_changed,
  1736. .set_key = ath9k_set_key,
  1737. .get_tsf = ath9k_get_tsf,
  1738. .set_tsf = ath9k_set_tsf,
  1739. .reset_tsf = ath9k_reset_tsf,
  1740. .ampdu_action = ath9k_ampdu_action,
  1741. .get_survey = ath9k_get_survey,
  1742. .sw_scan_start = ath9k_sw_scan_start,
  1743. .sw_scan_complete = ath9k_sw_scan_complete,
  1744. .rfkill_poll = ath9k_rfkill_poll_state,
  1745. .set_coverage_class = ath9k_set_coverage_class,
  1746. };