iwl-agn.c 105 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/slab.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/sched.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/netdevice.h>
  39. #include <linux/wireless.h>
  40. #include <linux/firmware.h>
  41. #include <linux/etherdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #include "iwl-eeprom.h"
  46. #include "iwl-dev.h"
  47. #include "iwl-core.h"
  48. #include "iwl-io.h"
  49. #include "iwl-helpers.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-agn-calib.h"
  52. #include "iwl-agn.h"
  53. #include "iwl-pci.h"
  54. /******************************************************************************
  55. *
  56. * module boiler plate
  57. *
  58. ******************************************************************************/
  59. /*
  60. * module name, copyright, version, etc.
  61. */
  62. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  63. #ifdef CONFIG_IWLWIFI_DEBUG
  64. #define VD "d"
  65. #else
  66. #define VD
  67. #endif
  68. #define DRV_VERSION IWLWIFI_VERSION VD
  69. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  70. MODULE_VERSION(DRV_VERSION);
  71. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  72. MODULE_LICENSE("GPL");
  73. static int iwlagn_ant_coupling;
  74. static bool iwlagn_bt_ch_announce = 1;
  75. void iwl_update_chain_flags(struct iwl_priv *priv)
  76. {
  77. struct iwl_rxon_context *ctx;
  78. if (priv->cfg->ops->hcmd->set_rxon_chain) {
  79. for_each_context(priv, ctx) {
  80. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  81. if (ctx->active.rx_chain != ctx->staging.rx_chain)
  82. iwlagn_commit_rxon(priv, ctx);
  83. }
  84. }
  85. }
  86. /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
  87. static void iwl_set_beacon_tim(struct iwl_priv *priv,
  88. struct iwl_tx_beacon_cmd *tx_beacon_cmd,
  89. u8 *beacon, u32 frame_size)
  90. {
  91. u16 tim_idx;
  92. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
  93. /*
  94. * The index is relative to frame start but we start looking at the
  95. * variable-length part of the beacon.
  96. */
  97. tim_idx = mgmt->u.beacon.variable - beacon;
  98. /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
  99. while ((tim_idx < (frame_size - 2)) &&
  100. (beacon[tim_idx] != WLAN_EID_TIM))
  101. tim_idx += beacon[tim_idx+1] + 2;
  102. /* If TIM field was found, set variables */
  103. if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
  104. tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
  105. tx_beacon_cmd->tim_size = beacon[tim_idx+1];
  106. } else
  107. IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
  108. }
  109. int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
  110. {
  111. struct iwl_tx_beacon_cmd *tx_beacon_cmd;
  112. struct iwl_host_cmd cmd = {
  113. .id = REPLY_TX_BEACON,
  114. };
  115. u32 frame_size;
  116. u32 rate_flags;
  117. u32 rate;
  118. /*
  119. * We have to set up the TX command, the TX Beacon command, and the
  120. * beacon contents.
  121. */
  122. lockdep_assert_held(&priv->mutex);
  123. if (!priv->beacon_ctx) {
  124. IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
  125. return 0;
  126. }
  127. if (WARN_ON(!priv->beacon_skb))
  128. return -EINVAL;
  129. /* Allocate beacon command */
  130. if (!priv->beacon_cmd)
  131. priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL);
  132. tx_beacon_cmd = priv->beacon_cmd;
  133. if (!tx_beacon_cmd)
  134. return -ENOMEM;
  135. frame_size = priv->beacon_skb->len;
  136. /* Set up TX command fields */
  137. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  138. tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
  139. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  140. tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
  141. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
  142. /* Set up TX beacon command fields */
  143. iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data,
  144. frame_size);
  145. /* Set up packet rate and flags */
  146. rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
  147. priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
  148. priv->hw_params.valid_tx_ant);
  149. rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
  150. if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
  151. rate_flags |= RATE_MCS_CCK_MSK;
  152. tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
  153. rate_flags);
  154. /* Submit command */
  155. cmd.len[0] = sizeof(*tx_beacon_cmd);
  156. cmd.data[0] = tx_beacon_cmd;
  157. cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
  158. cmd.len[1] = frame_size;
  159. cmd.data[1] = priv->beacon_skb->data;
  160. cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
  161. return iwl_send_cmd_sync(priv, &cmd);
  162. }
  163. static void iwl_bg_beacon_update(struct work_struct *work)
  164. {
  165. struct iwl_priv *priv =
  166. container_of(work, struct iwl_priv, beacon_update);
  167. struct sk_buff *beacon;
  168. mutex_lock(&priv->mutex);
  169. if (!priv->beacon_ctx) {
  170. IWL_ERR(priv, "updating beacon w/o beacon context!\n");
  171. goto out;
  172. }
  173. if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
  174. /*
  175. * The ucode will send beacon notifications even in
  176. * IBSS mode, but we don't want to process them. But
  177. * we need to defer the type check to here due to
  178. * requiring locking around the beacon_ctx access.
  179. */
  180. goto out;
  181. }
  182. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  183. beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
  184. if (!beacon) {
  185. IWL_ERR(priv, "update beacon failed -- keeping old\n");
  186. goto out;
  187. }
  188. /* new beacon skb is allocated every time; dispose previous.*/
  189. dev_kfree_skb(priv->beacon_skb);
  190. priv->beacon_skb = beacon;
  191. iwlagn_send_beacon_cmd(priv);
  192. out:
  193. mutex_unlock(&priv->mutex);
  194. }
  195. static void iwl_bg_bt_runtime_config(struct work_struct *work)
  196. {
  197. struct iwl_priv *priv =
  198. container_of(work, struct iwl_priv, bt_runtime_config);
  199. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  200. return;
  201. /* dont send host command if rf-kill is on */
  202. if (!iwl_is_ready_rf(priv))
  203. return;
  204. priv->cfg->ops->hcmd->send_bt_config(priv);
  205. }
  206. static void iwl_bg_bt_full_concurrency(struct work_struct *work)
  207. {
  208. struct iwl_priv *priv =
  209. container_of(work, struct iwl_priv, bt_full_concurrency);
  210. struct iwl_rxon_context *ctx;
  211. mutex_lock(&priv->mutex);
  212. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  213. goto out;
  214. /* dont send host command if rf-kill is on */
  215. if (!iwl_is_ready_rf(priv))
  216. goto out;
  217. IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
  218. priv->bt_full_concurrent ?
  219. "full concurrency" : "3-wire");
  220. /*
  221. * LQ & RXON updated cmds must be sent before BT Config cmd
  222. * to avoid 3-wire collisions
  223. */
  224. for_each_context(priv, ctx) {
  225. if (priv->cfg->ops->hcmd->set_rxon_chain)
  226. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  227. iwlagn_commit_rxon(priv, ctx);
  228. }
  229. priv->cfg->ops->hcmd->send_bt_config(priv);
  230. out:
  231. mutex_unlock(&priv->mutex);
  232. }
  233. /**
  234. * iwl_bg_statistics_periodic - Timer callback to queue statistics
  235. *
  236. * This callback is provided in order to send a statistics request.
  237. *
  238. * This timer function is continually reset to execute within
  239. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  240. * was received. We need to ensure we receive the statistics in order
  241. * to update the temperature used for calibrating the TXPOWER.
  242. */
  243. static void iwl_bg_statistics_periodic(unsigned long data)
  244. {
  245. struct iwl_priv *priv = (struct iwl_priv *)data;
  246. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  247. return;
  248. /* dont send host command if rf-kill is on */
  249. if (!iwl_is_ready_rf(priv))
  250. return;
  251. iwl_send_statistics_request(priv, CMD_ASYNC, false);
  252. }
  253. static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
  254. u32 start_idx, u32 num_events,
  255. u32 mode)
  256. {
  257. u32 i;
  258. u32 ptr; /* SRAM byte address of log data */
  259. u32 ev, time, data; /* event log data */
  260. unsigned long reg_flags;
  261. if (mode == 0)
  262. ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
  263. else
  264. ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
  265. /* Make sure device is powered up for SRAM reads */
  266. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  267. if (iwl_grab_nic_access(priv)) {
  268. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  269. return;
  270. }
  271. /* Set starting address; reads will auto-increment */
  272. iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
  273. rmb();
  274. /*
  275. * "time" is actually "data" for mode 0 (no timestamp).
  276. * place event id # at far right for easier visual parsing.
  277. */
  278. for (i = 0; i < num_events; i++) {
  279. ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  280. time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  281. if (mode == 0) {
  282. trace_iwlwifi_dev_ucode_cont_event(priv,
  283. 0, time, ev);
  284. } else {
  285. data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  286. trace_iwlwifi_dev_ucode_cont_event(priv,
  287. time, data, ev);
  288. }
  289. }
  290. /* Allow device to power down */
  291. iwl_release_nic_access(priv);
  292. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  293. }
  294. static void iwl_continuous_event_trace(struct iwl_priv *priv)
  295. {
  296. u32 capacity; /* event log capacity in # entries */
  297. u32 base; /* SRAM byte address of event log header */
  298. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  299. u32 num_wraps; /* # times uCode wrapped to top of log */
  300. u32 next_entry; /* index of next entry to be written by uCode */
  301. base = priv->device_pointers.error_event_table;
  302. if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  303. capacity = iwl_read_targ_mem(priv, base);
  304. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  305. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  306. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  307. } else
  308. return;
  309. if (num_wraps == priv->event_log.num_wraps) {
  310. iwl_print_cont_event_trace(priv,
  311. base, priv->event_log.next_entry,
  312. next_entry - priv->event_log.next_entry,
  313. mode);
  314. priv->event_log.non_wraps_count++;
  315. } else {
  316. if ((num_wraps - priv->event_log.num_wraps) > 1)
  317. priv->event_log.wraps_more_count++;
  318. else
  319. priv->event_log.wraps_once_count++;
  320. trace_iwlwifi_dev_ucode_wrap_event(priv,
  321. num_wraps - priv->event_log.num_wraps,
  322. next_entry, priv->event_log.next_entry);
  323. if (next_entry < priv->event_log.next_entry) {
  324. iwl_print_cont_event_trace(priv, base,
  325. priv->event_log.next_entry,
  326. capacity - priv->event_log.next_entry,
  327. mode);
  328. iwl_print_cont_event_trace(priv, base, 0,
  329. next_entry, mode);
  330. } else {
  331. iwl_print_cont_event_trace(priv, base,
  332. next_entry, capacity - next_entry,
  333. mode);
  334. iwl_print_cont_event_trace(priv, base, 0,
  335. next_entry, mode);
  336. }
  337. }
  338. priv->event_log.num_wraps = num_wraps;
  339. priv->event_log.next_entry = next_entry;
  340. }
  341. /**
  342. * iwl_bg_ucode_trace - Timer callback to log ucode event
  343. *
  344. * The timer is continually set to execute every
  345. * UCODE_TRACE_PERIOD milliseconds after the last timer expired
  346. * this function is to perform continuous uCode event logging operation
  347. * if enabled
  348. */
  349. static void iwl_bg_ucode_trace(unsigned long data)
  350. {
  351. struct iwl_priv *priv = (struct iwl_priv *)data;
  352. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  353. return;
  354. if (priv->event_log.ucode_trace) {
  355. iwl_continuous_event_trace(priv);
  356. /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
  357. mod_timer(&priv->ucode_trace,
  358. jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
  359. }
  360. }
  361. static void iwl_bg_tx_flush(struct work_struct *work)
  362. {
  363. struct iwl_priv *priv =
  364. container_of(work, struct iwl_priv, tx_flush);
  365. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  366. return;
  367. /* do nothing if rf-kill is on */
  368. if (!iwl_is_ready_rf(priv))
  369. return;
  370. IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
  371. iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
  372. }
  373. /**
  374. * iwl_rx_handle - Main entry function for receiving responses from uCode
  375. *
  376. * Uses the priv->rx_handlers callback function array to invoke
  377. * the appropriate handlers, including command responses,
  378. * frame-received notifications, and other notifications.
  379. */
  380. static void iwl_rx_handle(struct iwl_priv *priv)
  381. {
  382. struct iwl_rx_mem_buffer *rxb;
  383. struct iwl_rx_packet *pkt;
  384. struct iwl_rx_queue *rxq = &priv->rxq;
  385. u32 r, i;
  386. int reclaim;
  387. unsigned long flags;
  388. u8 fill_rx = 0;
  389. u32 count = 8;
  390. int total_empty;
  391. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  392. * buffer that the driver may process (last buffer filled by ucode). */
  393. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  394. i = rxq->read;
  395. /* Rx interrupt, but nothing sent from uCode */
  396. if (i == r)
  397. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  398. /* calculate total frames need to be restock after handling RX */
  399. total_empty = r - rxq->write_actual;
  400. if (total_empty < 0)
  401. total_empty += RX_QUEUE_SIZE;
  402. if (total_empty > (RX_QUEUE_SIZE / 2))
  403. fill_rx = 1;
  404. while (i != r) {
  405. int len;
  406. rxb = rxq->queue[i];
  407. /* If an RXB doesn't have a Rx queue slot associated with it,
  408. * then a bug has been introduced in the queue refilling
  409. * routines -- catch it here */
  410. if (WARN_ON(rxb == NULL)) {
  411. i = (i + 1) & RX_QUEUE_MASK;
  412. continue;
  413. }
  414. rxq->queue[i] = NULL;
  415. dma_unmap_page(priv->bus.dev, rxb->page_dma,
  416. PAGE_SIZE << priv->hw_params.rx_page_order,
  417. DMA_FROM_DEVICE);
  418. pkt = rxb_addr(rxb);
  419. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  420. len += sizeof(u32); /* account for status word */
  421. trace_iwlwifi_dev_rx(priv, pkt, len);
  422. /* Reclaim a command buffer only if this packet is a response
  423. * to a (driver-originated) command.
  424. * If the packet (e.g. Rx frame) originated from uCode,
  425. * there is no command buffer to reclaim.
  426. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  427. * but apparently a few don't get set; catch them here. */
  428. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  429. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  430. (pkt->hdr.cmd != REPLY_RX) &&
  431. (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
  432. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  433. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  434. (pkt->hdr.cmd != REPLY_TX);
  435. /*
  436. * Do the notification wait before RX handlers so
  437. * even if the RX handler consumes the RXB we have
  438. * access to it in the notification wait entry.
  439. */
  440. if (!list_empty(&priv->_agn.notif_waits)) {
  441. struct iwl_notification_wait *w;
  442. spin_lock(&priv->_agn.notif_wait_lock);
  443. list_for_each_entry(w, &priv->_agn.notif_waits, list) {
  444. if (w->cmd == pkt->hdr.cmd) {
  445. w->triggered = true;
  446. if (w->fn)
  447. w->fn(priv, pkt, w->fn_data);
  448. }
  449. }
  450. spin_unlock(&priv->_agn.notif_wait_lock);
  451. wake_up_all(&priv->_agn.notif_waitq);
  452. }
  453. if (priv->pre_rx_handler)
  454. priv->pre_rx_handler(priv, rxb);
  455. /* Based on type of command response or notification,
  456. * handle those that need handling via function in
  457. * rx_handlers table. See iwl_setup_rx_handlers() */
  458. if (priv->rx_handlers[pkt->hdr.cmd]) {
  459. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
  460. i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  461. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  462. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  463. } else {
  464. /* No handling needed */
  465. IWL_DEBUG_RX(priv,
  466. "r %d i %d No handler needed for %s, 0x%02x\n",
  467. r, i, get_cmd_string(pkt->hdr.cmd),
  468. pkt->hdr.cmd);
  469. }
  470. /*
  471. * XXX: After here, we should always check rxb->page
  472. * against NULL before touching it or its virtual
  473. * memory (pkt). Because some rx_handler might have
  474. * already taken or freed the pages.
  475. */
  476. if (reclaim) {
  477. /* Invoke any callbacks, transfer the buffer to caller,
  478. * and fire off the (possibly) blocking iwl_send_cmd()
  479. * as we reclaim the driver command queue */
  480. if (rxb->page)
  481. iwl_tx_cmd_complete(priv, rxb);
  482. else
  483. IWL_WARN(priv, "Claim null rxb?\n");
  484. }
  485. /* Reuse the page if possible. For notification packets and
  486. * SKBs that fail to Rx correctly, add them back into the
  487. * rx_free list for reuse later. */
  488. spin_lock_irqsave(&rxq->lock, flags);
  489. if (rxb->page != NULL) {
  490. rxb->page_dma = dma_map_page(priv->bus.dev, rxb->page,
  491. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  492. DMA_FROM_DEVICE);
  493. list_add_tail(&rxb->list, &rxq->rx_free);
  494. rxq->free_count++;
  495. } else
  496. list_add_tail(&rxb->list, &rxq->rx_used);
  497. spin_unlock_irqrestore(&rxq->lock, flags);
  498. i = (i + 1) & RX_QUEUE_MASK;
  499. /* If there are a lot of unused frames,
  500. * restock the Rx queue so ucode wont assert. */
  501. if (fill_rx) {
  502. count++;
  503. if (count >= 8) {
  504. rxq->read = i;
  505. iwlagn_rx_replenish_now(priv);
  506. count = 0;
  507. }
  508. }
  509. }
  510. /* Backtrack one entry */
  511. rxq->read = i;
  512. if (fill_rx)
  513. iwlagn_rx_replenish_now(priv);
  514. else
  515. iwlagn_rx_queue_restock(priv);
  516. }
  517. /* tasklet for iwlagn interrupt */
  518. static void iwl_irq_tasklet(struct iwl_priv *priv)
  519. {
  520. u32 inta = 0;
  521. u32 handled = 0;
  522. unsigned long flags;
  523. u32 i;
  524. #ifdef CONFIG_IWLWIFI_DEBUG
  525. u32 inta_mask;
  526. #endif
  527. spin_lock_irqsave(&priv->lock, flags);
  528. /* Ack/clear/reset pending uCode interrupts.
  529. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  530. */
  531. /* There is a hardware bug in the interrupt mask function that some
  532. * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
  533. * they are disabled in the CSR_INT_MASK register. Furthermore the
  534. * ICT interrupt handling mechanism has another bug that might cause
  535. * these unmasked interrupts fail to be detected. We workaround the
  536. * hardware bugs here by ACKing all the possible interrupts so that
  537. * interrupt coalescing can still be achieved.
  538. */
  539. iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
  540. inta = priv->_agn.inta;
  541. #ifdef CONFIG_IWLWIFI_DEBUG
  542. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  543. /* just for debug */
  544. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  545. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
  546. inta, inta_mask);
  547. }
  548. #endif
  549. spin_unlock_irqrestore(&priv->lock, flags);
  550. /* saved interrupt in inta variable now we can reset priv->_agn.inta */
  551. priv->_agn.inta = 0;
  552. /* Now service all interrupt bits discovered above. */
  553. if (inta & CSR_INT_BIT_HW_ERR) {
  554. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  555. /* Tell the device to stop sending interrupts */
  556. iwl_disable_interrupts(priv);
  557. priv->isr_stats.hw++;
  558. iwl_irq_handle_error(priv);
  559. handled |= CSR_INT_BIT_HW_ERR;
  560. return;
  561. }
  562. #ifdef CONFIG_IWLWIFI_DEBUG
  563. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  564. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  565. if (inta & CSR_INT_BIT_SCD) {
  566. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  567. "the frame/frames.\n");
  568. priv->isr_stats.sch++;
  569. }
  570. /* Alive notification via Rx interrupt will do the real work */
  571. if (inta & CSR_INT_BIT_ALIVE) {
  572. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  573. priv->isr_stats.alive++;
  574. }
  575. }
  576. #endif
  577. /* Safely ignore these bits for debug checks below */
  578. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  579. /* HW RF KILL switch toggled */
  580. if (inta & CSR_INT_BIT_RF_KILL) {
  581. int hw_rf_kill = 0;
  582. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  583. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  584. hw_rf_kill = 1;
  585. IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
  586. hw_rf_kill ? "disable radio" : "enable radio");
  587. priv->isr_stats.rfkill++;
  588. /* driver only loads ucode once setting the interface up.
  589. * the driver allows loading the ucode even if the radio
  590. * is killed. Hence update the killswitch state here. The
  591. * rfkill handler will care about restarting if needed.
  592. */
  593. if (!test_bit(STATUS_ALIVE, &priv->status)) {
  594. if (hw_rf_kill)
  595. set_bit(STATUS_RF_KILL_HW, &priv->status);
  596. else
  597. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  598. wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
  599. }
  600. handled |= CSR_INT_BIT_RF_KILL;
  601. }
  602. /* Chip got too hot and stopped itself */
  603. if (inta & CSR_INT_BIT_CT_KILL) {
  604. IWL_ERR(priv, "Microcode CT kill error detected.\n");
  605. priv->isr_stats.ctkill++;
  606. handled |= CSR_INT_BIT_CT_KILL;
  607. }
  608. /* Error detected by uCode */
  609. if (inta & CSR_INT_BIT_SW_ERR) {
  610. IWL_ERR(priv, "Microcode SW error detected. "
  611. " Restarting 0x%X.\n", inta);
  612. priv->isr_stats.sw++;
  613. iwl_irq_handle_error(priv);
  614. handled |= CSR_INT_BIT_SW_ERR;
  615. }
  616. /* uCode wakes up after power-down sleep */
  617. if (inta & CSR_INT_BIT_WAKEUP) {
  618. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  619. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  620. for (i = 0; i < priv->hw_params.max_txq_num; i++)
  621. iwl_txq_update_write_ptr(priv, &priv->txq[i]);
  622. priv->isr_stats.wakeup++;
  623. handled |= CSR_INT_BIT_WAKEUP;
  624. }
  625. /* All uCode command responses, including Tx command responses,
  626. * Rx "responses" (frame-received notification), and other
  627. * notifications from uCode come through here*/
  628. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
  629. CSR_INT_BIT_RX_PERIODIC)) {
  630. IWL_DEBUG_ISR(priv, "Rx interrupt\n");
  631. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  632. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  633. iwl_write32(priv, CSR_FH_INT_STATUS,
  634. CSR_FH_INT_RX_MASK);
  635. }
  636. if (inta & CSR_INT_BIT_RX_PERIODIC) {
  637. handled |= CSR_INT_BIT_RX_PERIODIC;
  638. iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
  639. }
  640. /* Sending RX interrupt require many steps to be done in the
  641. * the device:
  642. * 1- write interrupt to current index in ICT table.
  643. * 2- dma RX frame.
  644. * 3- update RX shared data to indicate last write index.
  645. * 4- send interrupt.
  646. * This could lead to RX race, driver could receive RX interrupt
  647. * but the shared data changes does not reflect this;
  648. * periodic interrupt will detect any dangling Rx activity.
  649. */
  650. /* Disable periodic interrupt; we use it as just a one-shot. */
  651. iwl_write8(priv, CSR_INT_PERIODIC_REG,
  652. CSR_INT_PERIODIC_DIS);
  653. iwl_rx_handle(priv);
  654. /*
  655. * Enable periodic interrupt in 8 msec only if we received
  656. * real RX interrupt (instead of just periodic int), to catch
  657. * any dangling Rx interrupt. If it was just the periodic
  658. * interrupt, there was no dangling Rx activity, and no need
  659. * to extend the periodic interrupt; one-shot is enough.
  660. */
  661. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
  662. iwl_write8(priv, CSR_INT_PERIODIC_REG,
  663. CSR_INT_PERIODIC_ENA);
  664. priv->isr_stats.rx++;
  665. }
  666. /* This "Tx" DMA channel is used only for loading uCode */
  667. if (inta & CSR_INT_BIT_FH_TX) {
  668. iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
  669. IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
  670. priv->isr_stats.tx++;
  671. handled |= CSR_INT_BIT_FH_TX;
  672. /* Wake up uCode load routine, now that load is complete */
  673. priv->ucode_write_complete = 1;
  674. wake_up_interruptible(&priv->wait_command_queue);
  675. }
  676. if (inta & ~handled) {
  677. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  678. priv->isr_stats.unhandled++;
  679. }
  680. if (inta & ~(priv->inta_mask)) {
  681. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  682. inta & ~priv->inta_mask);
  683. }
  684. /* Re-enable all interrupts */
  685. /* only Re-enable if disabled by irq */
  686. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  687. iwl_enable_interrupts(priv);
  688. /* Re-enable RF_KILL if it occurred */
  689. else if (handled & CSR_INT_BIT_RF_KILL)
  690. iwl_enable_rfkill_int(priv);
  691. }
  692. /*****************************************************************************
  693. *
  694. * sysfs attributes
  695. *
  696. *****************************************************************************/
  697. #ifdef CONFIG_IWLWIFI_DEBUG
  698. /*
  699. * The following adds a new attribute to the sysfs representation
  700. * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
  701. * used for controlling the debug level.
  702. *
  703. * See the level definitions in iwl for details.
  704. *
  705. * The debug_level being managed using sysfs below is a per device debug
  706. * level that is used instead of the global debug level if it (the per
  707. * device debug level) is set.
  708. */
  709. static ssize_t show_debug_level(struct device *d,
  710. struct device_attribute *attr, char *buf)
  711. {
  712. struct iwl_priv *priv = dev_get_drvdata(d);
  713. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  714. }
  715. static ssize_t store_debug_level(struct device *d,
  716. struct device_attribute *attr,
  717. const char *buf, size_t count)
  718. {
  719. struct iwl_priv *priv = dev_get_drvdata(d);
  720. unsigned long val;
  721. int ret;
  722. ret = strict_strtoul(buf, 0, &val);
  723. if (ret)
  724. IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
  725. else {
  726. priv->debug_level = val;
  727. if (iwl_alloc_traffic_mem(priv))
  728. IWL_ERR(priv,
  729. "Not enough memory to generate traffic log\n");
  730. }
  731. return strnlen(buf, count);
  732. }
  733. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  734. show_debug_level, store_debug_level);
  735. #endif /* CONFIG_IWLWIFI_DEBUG */
  736. static ssize_t show_temperature(struct device *d,
  737. struct device_attribute *attr, char *buf)
  738. {
  739. struct iwl_priv *priv = dev_get_drvdata(d);
  740. if (!iwl_is_alive(priv))
  741. return -EAGAIN;
  742. return sprintf(buf, "%d\n", priv->temperature);
  743. }
  744. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  745. static ssize_t show_tx_power(struct device *d,
  746. struct device_attribute *attr, char *buf)
  747. {
  748. struct iwl_priv *priv = dev_get_drvdata(d);
  749. if (!iwl_is_ready_rf(priv))
  750. return sprintf(buf, "off\n");
  751. else
  752. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  753. }
  754. static ssize_t store_tx_power(struct device *d,
  755. struct device_attribute *attr,
  756. const char *buf, size_t count)
  757. {
  758. struct iwl_priv *priv = dev_get_drvdata(d);
  759. unsigned long val;
  760. int ret;
  761. ret = strict_strtoul(buf, 10, &val);
  762. if (ret)
  763. IWL_INFO(priv, "%s is not in decimal form.\n", buf);
  764. else {
  765. ret = iwl_set_tx_power(priv, val, false);
  766. if (ret)
  767. IWL_ERR(priv, "failed setting tx power (0x%d).\n",
  768. ret);
  769. else
  770. ret = count;
  771. }
  772. return ret;
  773. }
  774. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  775. static struct attribute *iwl_sysfs_entries[] = {
  776. &dev_attr_temperature.attr,
  777. &dev_attr_tx_power.attr,
  778. #ifdef CONFIG_IWLWIFI_DEBUG
  779. &dev_attr_debug_level.attr,
  780. #endif
  781. NULL
  782. };
  783. static struct attribute_group iwl_attribute_group = {
  784. .name = NULL, /* put in device directory */
  785. .attrs = iwl_sysfs_entries,
  786. };
  787. /******************************************************************************
  788. *
  789. * uCode download functions
  790. *
  791. ******************************************************************************/
  792. static void iwl_free_fw_desc(struct iwl_priv *priv, struct fw_desc *desc)
  793. {
  794. if (desc->v_addr)
  795. dma_free_coherent(priv->bus.dev, desc->len,
  796. desc->v_addr, desc->p_addr);
  797. desc->v_addr = NULL;
  798. desc->len = 0;
  799. }
  800. static void iwl_free_fw_img(struct iwl_priv *priv, struct fw_img *img)
  801. {
  802. iwl_free_fw_desc(priv, &img->code);
  803. iwl_free_fw_desc(priv, &img->data);
  804. }
  805. static void iwl_dealloc_ucode(struct iwl_priv *priv)
  806. {
  807. iwl_free_fw_img(priv, &priv->ucode_rt);
  808. iwl_free_fw_img(priv, &priv->ucode_init);
  809. }
  810. static int iwl_alloc_fw_desc(struct iwl_priv *priv, struct fw_desc *desc,
  811. const void *data, size_t len)
  812. {
  813. if (!len) {
  814. desc->v_addr = NULL;
  815. return -EINVAL;
  816. }
  817. desc->v_addr = dma_alloc_coherent(priv->bus.dev, len,
  818. &desc->p_addr, GFP_KERNEL);
  819. if (!desc->v_addr)
  820. return -ENOMEM;
  821. desc->len = len;
  822. memcpy(desc->v_addr, data, len);
  823. return 0;
  824. }
  825. struct iwlagn_ucode_capabilities {
  826. u32 max_probe_length;
  827. u32 standard_phy_calibration_size;
  828. u32 flags;
  829. };
  830. static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
  831. static int iwl_mac_setup_register(struct iwl_priv *priv,
  832. struct iwlagn_ucode_capabilities *capa);
  833. #define UCODE_EXPERIMENTAL_INDEX 100
  834. #define UCODE_EXPERIMENTAL_TAG "exp"
  835. static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
  836. {
  837. const char *name_pre = priv->cfg->fw_name_pre;
  838. char tag[8];
  839. if (first) {
  840. #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
  841. priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
  842. strcpy(tag, UCODE_EXPERIMENTAL_TAG);
  843. } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
  844. #endif
  845. priv->fw_index = priv->cfg->ucode_api_max;
  846. sprintf(tag, "%d", priv->fw_index);
  847. } else {
  848. priv->fw_index--;
  849. sprintf(tag, "%d", priv->fw_index);
  850. }
  851. if (priv->fw_index < priv->cfg->ucode_api_min) {
  852. IWL_ERR(priv, "no suitable firmware found!\n");
  853. return -ENOENT;
  854. }
  855. sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
  856. IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
  857. (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
  858. ? "EXPERIMENTAL " : "",
  859. priv->firmware_name);
  860. return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
  861. priv->bus.dev,
  862. GFP_KERNEL, priv, iwl_ucode_callback);
  863. }
  864. struct iwlagn_firmware_pieces {
  865. const void *inst, *data, *init, *init_data;
  866. size_t inst_size, data_size, init_size, init_data_size;
  867. u32 build;
  868. u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
  869. u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
  870. };
  871. static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
  872. const struct firmware *ucode_raw,
  873. struct iwlagn_firmware_pieces *pieces)
  874. {
  875. struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
  876. u32 api_ver, hdr_size;
  877. const u8 *src;
  878. priv->ucode_ver = le32_to_cpu(ucode->ver);
  879. api_ver = IWL_UCODE_API(priv->ucode_ver);
  880. switch (api_ver) {
  881. default:
  882. hdr_size = 28;
  883. if (ucode_raw->size < hdr_size) {
  884. IWL_ERR(priv, "File size too small!\n");
  885. return -EINVAL;
  886. }
  887. pieces->build = le32_to_cpu(ucode->u.v2.build);
  888. pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
  889. pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
  890. pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
  891. pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
  892. src = ucode->u.v2.data;
  893. break;
  894. case 0:
  895. case 1:
  896. case 2:
  897. hdr_size = 24;
  898. if (ucode_raw->size < hdr_size) {
  899. IWL_ERR(priv, "File size too small!\n");
  900. return -EINVAL;
  901. }
  902. pieces->build = 0;
  903. pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
  904. pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
  905. pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
  906. pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
  907. src = ucode->u.v1.data;
  908. break;
  909. }
  910. /* Verify size of file vs. image size info in file's header */
  911. if (ucode_raw->size != hdr_size + pieces->inst_size +
  912. pieces->data_size + pieces->init_size +
  913. pieces->init_data_size) {
  914. IWL_ERR(priv,
  915. "uCode file size %d does not match expected size\n",
  916. (int)ucode_raw->size);
  917. return -EINVAL;
  918. }
  919. pieces->inst = src;
  920. src += pieces->inst_size;
  921. pieces->data = src;
  922. src += pieces->data_size;
  923. pieces->init = src;
  924. src += pieces->init_size;
  925. pieces->init_data = src;
  926. src += pieces->init_data_size;
  927. return 0;
  928. }
  929. static int iwlagn_wanted_ucode_alternative = 1;
  930. static int iwlagn_load_firmware(struct iwl_priv *priv,
  931. const struct firmware *ucode_raw,
  932. struct iwlagn_firmware_pieces *pieces,
  933. struct iwlagn_ucode_capabilities *capa)
  934. {
  935. struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
  936. struct iwl_ucode_tlv *tlv;
  937. size_t len = ucode_raw->size;
  938. const u8 *data;
  939. int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
  940. u64 alternatives;
  941. u32 tlv_len;
  942. enum iwl_ucode_tlv_type tlv_type;
  943. const u8 *tlv_data;
  944. if (len < sizeof(*ucode)) {
  945. IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
  946. return -EINVAL;
  947. }
  948. if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
  949. IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
  950. le32_to_cpu(ucode->magic));
  951. return -EINVAL;
  952. }
  953. /*
  954. * Check which alternatives are present, and "downgrade"
  955. * when the chosen alternative is not present, warning
  956. * the user when that happens. Some files may not have
  957. * any alternatives, so don't warn in that case.
  958. */
  959. alternatives = le64_to_cpu(ucode->alternatives);
  960. tmp = wanted_alternative;
  961. if (wanted_alternative > 63)
  962. wanted_alternative = 63;
  963. while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
  964. wanted_alternative--;
  965. if (wanted_alternative && wanted_alternative != tmp)
  966. IWL_WARN(priv,
  967. "uCode alternative %d not available, choosing %d\n",
  968. tmp, wanted_alternative);
  969. priv->ucode_ver = le32_to_cpu(ucode->ver);
  970. pieces->build = le32_to_cpu(ucode->build);
  971. data = ucode->data;
  972. len -= sizeof(*ucode);
  973. while (len >= sizeof(*tlv)) {
  974. u16 tlv_alt;
  975. len -= sizeof(*tlv);
  976. tlv = (void *)data;
  977. tlv_len = le32_to_cpu(tlv->length);
  978. tlv_type = le16_to_cpu(tlv->type);
  979. tlv_alt = le16_to_cpu(tlv->alternative);
  980. tlv_data = tlv->data;
  981. if (len < tlv_len) {
  982. IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
  983. len, tlv_len);
  984. return -EINVAL;
  985. }
  986. len -= ALIGN(tlv_len, 4);
  987. data += sizeof(*tlv) + ALIGN(tlv_len, 4);
  988. /*
  989. * Alternative 0 is always valid.
  990. *
  991. * Skip alternative TLVs that are not selected.
  992. */
  993. if (tlv_alt != 0 && tlv_alt != wanted_alternative)
  994. continue;
  995. switch (tlv_type) {
  996. case IWL_UCODE_TLV_INST:
  997. pieces->inst = tlv_data;
  998. pieces->inst_size = tlv_len;
  999. break;
  1000. case IWL_UCODE_TLV_DATA:
  1001. pieces->data = tlv_data;
  1002. pieces->data_size = tlv_len;
  1003. break;
  1004. case IWL_UCODE_TLV_INIT:
  1005. pieces->init = tlv_data;
  1006. pieces->init_size = tlv_len;
  1007. break;
  1008. case IWL_UCODE_TLV_INIT_DATA:
  1009. pieces->init_data = tlv_data;
  1010. pieces->init_data_size = tlv_len;
  1011. break;
  1012. case IWL_UCODE_TLV_BOOT:
  1013. IWL_ERR(priv, "Found unexpected BOOT ucode\n");
  1014. break;
  1015. case IWL_UCODE_TLV_PROBE_MAX_LEN:
  1016. if (tlv_len != sizeof(u32))
  1017. goto invalid_tlv_len;
  1018. capa->max_probe_length =
  1019. le32_to_cpup((__le32 *)tlv_data);
  1020. break;
  1021. case IWL_UCODE_TLV_PAN:
  1022. if (tlv_len)
  1023. goto invalid_tlv_len;
  1024. capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
  1025. break;
  1026. case IWL_UCODE_TLV_FLAGS:
  1027. /* must be at least one u32 */
  1028. if (tlv_len < sizeof(u32))
  1029. goto invalid_tlv_len;
  1030. /* and a proper number of u32s */
  1031. if (tlv_len % sizeof(u32))
  1032. goto invalid_tlv_len;
  1033. /*
  1034. * This driver only reads the first u32 as
  1035. * right now no more features are defined,
  1036. * if that changes then either the driver
  1037. * will not work with the new firmware, or
  1038. * it'll not take advantage of new features.
  1039. */
  1040. capa->flags = le32_to_cpup((__le32 *)tlv_data);
  1041. break;
  1042. case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
  1043. if (tlv_len != sizeof(u32))
  1044. goto invalid_tlv_len;
  1045. pieces->init_evtlog_ptr =
  1046. le32_to_cpup((__le32 *)tlv_data);
  1047. break;
  1048. case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
  1049. if (tlv_len != sizeof(u32))
  1050. goto invalid_tlv_len;
  1051. pieces->init_evtlog_size =
  1052. le32_to_cpup((__le32 *)tlv_data);
  1053. break;
  1054. case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
  1055. if (tlv_len != sizeof(u32))
  1056. goto invalid_tlv_len;
  1057. pieces->init_errlog_ptr =
  1058. le32_to_cpup((__le32 *)tlv_data);
  1059. break;
  1060. case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
  1061. if (tlv_len != sizeof(u32))
  1062. goto invalid_tlv_len;
  1063. pieces->inst_evtlog_ptr =
  1064. le32_to_cpup((__le32 *)tlv_data);
  1065. break;
  1066. case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
  1067. if (tlv_len != sizeof(u32))
  1068. goto invalid_tlv_len;
  1069. pieces->inst_evtlog_size =
  1070. le32_to_cpup((__le32 *)tlv_data);
  1071. break;
  1072. case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
  1073. if (tlv_len != sizeof(u32))
  1074. goto invalid_tlv_len;
  1075. pieces->inst_errlog_ptr =
  1076. le32_to_cpup((__le32 *)tlv_data);
  1077. break;
  1078. case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
  1079. if (tlv_len)
  1080. goto invalid_tlv_len;
  1081. priv->enhance_sensitivity_table = true;
  1082. break;
  1083. case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
  1084. if (tlv_len != sizeof(u32))
  1085. goto invalid_tlv_len;
  1086. capa->standard_phy_calibration_size =
  1087. le32_to_cpup((__le32 *)tlv_data);
  1088. break;
  1089. default:
  1090. IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
  1091. break;
  1092. }
  1093. }
  1094. if (len) {
  1095. IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
  1096. iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
  1097. return -EINVAL;
  1098. }
  1099. return 0;
  1100. invalid_tlv_len:
  1101. IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
  1102. iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
  1103. return -EINVAL;
  1104. }
  1105. /**
  1106. * iwl_ucode_callback - callback when firmware was loaded
  1107. *
  1108. * If loaded successfully, copies the firmware into buffers
  1109. * for the card to fetch (via DMA).
  1110. */
  1111. static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
  1112. {
  1113. struct iwl_priv *priv = context;
  1114. struct iwl_ucode_header *ucode;
  1115. int err;
  1116. struct iwlagn_firmware_pieces pieces;
  1117. const unsigned int api_max = priv->cfg->ucode_api_max;
  1118. const unsigned int api_min = priv->cfg->ucode_api_min;
  1119. u32 api_ver;
  1120. char buildstr[25];
  1121. u32 build;
  1122. struct iwlagn_ucode_capabilities ucode_capa = {
  1123. .max_probe_length = 200,
  1124. .standard_phy_calibration_size =
  1125. IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
  1126. };
  1127. memset(&pieces, 0, sizeof(pieces));
  1128. if (!ucode_raw) {
  1129. if (priv->fw_index <= priv->cfg->ucode_api_max)
  1130. IWL_ERR(priv,
  1131. "request for firmware file '%s' failed.\n",
  1132. priv->firmware_name);
  1133. goto try_again;
  1134. }
  1135. IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
  1136. priv->firmware_name, ucode_raw->size);
  1137. /* Make sure that we got at least the API version number */
  1138. if (ucode_raw->size < 4) {
  1139. IWL_ERR(priv, "File size way too small!\n");
  1140. goto try_again;
  1141. }
  1142. /* Data from ucode file: header followed by uCode images */
  1143. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1144. if (ucode->ver)
  1145. err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
  1146. else
  1147. err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
  1148. &ucode_capa);
  1149. if (err)
  1150. goto try_again;
  1151. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1152. build = pieces.build;
  1153. /*
  1154. * api_ver should match the api version forming part of the
  1155. * firmware filename ... but we don't check for that and only rely
  1156. * on the API version read from firmware header from here on forward
  1157. */
  1158. /* no api version check required for experimental uCode */
  1159. if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
  1160. if (api_ver < api_min || api_ver > api_max) {
  1161. IWL_ERR(priv,
  1162. "Driver unable to support your firmware API. "
  1163. "Driver supports v%u, firmware is v%u.\n",
  1164. api_max, api_ver);
  1165. goto try_again;
  1166. }
  1167. if (api_ver != api_max)
  1168. IWL_ERR(priv,
  1169. "Firmware has old API version. Expected v%u, "
  1170. "got v%u. New firmware can be obtained "
  1171. "from http://www.intellinuxwireless.org.\n",
  1172. api_max, api_ver);
  1173. }
  1174. if (build)
  1175. sprintf(buildstr, " build %u%s", build,
  1176. (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
  1177. ? " (EXP)" : "");
  1178. else
  1179. buildstr[0] = '\0';
  1180. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
  1181. IWL_UCODE_MAJOR(priv->ucode_ver),
  1182. IWL_UCODE_MINOR(priv->ucode_ver),
  1183. IWL_UCODE_API(priv->ucode_ver),
  1184. IWL_UCODE_SERIAL(priv->ucode_ver),
  1185. buildstr);
  1186. snprintf(priv->hw->wiphy->fw_version,
  1187. sizeof(priv->hw->wiphy->fw_version),
  1188. "%u.%u.%u.%u%s",
  1189. IWL_UCODE_MAJOR(priv->ucode_ver),
  1190. IWL_UCODE_MINOR(priv->ucode_ver),
  1191. IWL_UCODE_API(priv->ucode_ver),
  1192. IWL_UCODE_SERIAL(priv->ucode_ver),
  1193. buildstr);
  1194. /*
  1195. * For any of the failures below (before allocating pci memory)
  1196. * we will try to load a version with a smaller API -- maybe the
  1197. * user just got a corrupted version of the latest API.
  1198. */
  1199. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1200. priv->ucode_ver);
  1201. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
  1202. pieces.inst_size);
  1203. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
  1204. pieces.data_size);
  1205. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
  1206. pieces.init_size);
  1207. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
  1208. pieces.init_data_size);
  1209. /* Verify that uCode images will fit in card's SRAM */
  1210. if (pieces.inst_size > priv->hw_params.max_inst_size) {
  1211. IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
  1212. pieces.inst_size);
  1213. goto try_again;
  1214. }
  1215. if (pieces.data_size > priv->hw_params.max_data_size) {
  1216. IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
  1217. pieces.data_size);
  1218. goto try_again;
  1219. }
  1220. if (pieces.init_size > priv->hw_params.max_inst_size) {
  1221. IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
  1222. pieces.init_size);
  1223. goto try_again;
  1224. }
  1225. if (pieces.init_data_size > priv->hw_params.max_data_size) {
  1226. IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
  1227. pieces.init_data_size);
  1228. goto try_again;
  1229. }
  1230. /* Allocate ucode buffers for card's bus-master loading ... */
  1231. /* Runtime instructions and 2 copies of data:
  1232. * 1) unmodified from disk
  1233. * 2) backup cache for save/restore during power-downs */
  1234. if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.code,
  1235. pieces.inst, pieces.inst_size))
  1236. goto err_pci_alloc;
  1237. if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.data,
  1238. pieces.data, pieces.data_size))
  1239. goto err_pci_alloc;
  1240. /* Initialization instructions and data */
  1241. if (pieces.init_size && pieces.init_data_size) {
  1242. if (iwl_alloc_fw_desc(priv, &priv->ucode_init.code,
  1243. pieces.init, pieces.init_size))
  1244. goto err_pci_alloc;
  1245. if (iwl_alloc_fw_desc(priv, &priv->ucode_init.data,
  1246. pieces.init_data, pieces.init_data_size))
  1247. goto err_pci_alloc;
  1248. }
  1249. /* Now that we can no longer fail, copy information */
  1250. /*
  1251. * The (size - 16) / 12 formula is based on the information recorded
  1252. * for each event, which is of mode 1 (including timestamp) for all
  1253. * new microcodes that include this information.
  1254. */
  1255. priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
  1256. if (pieces.init_evtlog_size)
  1257. priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
  1258. else
  1259. priv->_agn.init_evtlog_size =
  1260. priv->cfg->base_params->max_event_log_size;
  1261. priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
  1262. priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
  1263. if (pieces.inst_evtlog_size)
  1264. priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
  1265. else
  1266. priv->_agn.inst_evtlog_size =
  1267. priv->cfg->base_params->max_event_log_size;
  1268. priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
  1269. priv->new_scan_threshold_behaviour =
  1270. !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
  1271. if ((priv->cfg->sku & EEPROM_SKU_CAP_IPAN_ENABLE) &&
  1272. (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN)) {
  1273. priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
  1274. priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
  1275. } else
  1276. priv->sta_key_max_num = STA_KEY_MAX_NUM;
  1277. if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
  1278. priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
  1279. else
  1280. priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
  1281. /*
  1282. * figure out the offset of chain noise reset and gain commands
  1283. * base on the size of standard phy calibration commands table size
  1284. */
  1285. if (ucode_capa.standard_phy_calibration_size >
  1286. IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
  1287. ucode_capa.standard_phy_calibration_size =
  1288. IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
  1289. priv->_agn.phy_calib_chain_noise_reset_cmd =
  1290. ucode_capa.standard_phy_calibration_size;
  1291. priv->_agn.phy_calib_chain_noise_gain_cmd =
  1292. ucode_capa.standard_phy_calibration_size + 1;
  1293. /**************************************************
  1294. * This is still part of probe() in a sense...
  1295. *
  1296. * 9. Setup and register with mac80211 and debugfs
  1297. **************************************************/
  1298. err = iwl_mac_setup_register(priv, &ucode_capa);
  1299. if (err)
  1300. goto out_unbind;
  1301. err = iwl_dbgfs_register(priv, DRV_NAME);
  1302. if (err)
  1303. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  1304. err = sysfs_create_group(&(priv->bus.dev->kobj),
  1305. &iwl_attribute_group);
  1306. if (err) {
  1307. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  1308. goto out_unbind;
  1309. }
  1310. /* We have our copies now, allow OS release its copies */
  1311. release_firmware(ucode_raw);
  1312. complete(&priv->_agn.firmware_loading_complete);
  1313. return;
  1314. try_again:
  1315. /* try next, if any */
  1316. if (iwl_request_firmware(priv, false))
  1317. goto out_unbind;
  1318. release_firmware(ucode_raw);
  1319. return;
  1320. err_pci_alloc:
  1321. IWL_ERR(priv, "failed to allocate pci memory\n");
  1322. iwl_dealloc_ucode(priv);
  1323. out_unbind:
  1324. complete(&priv->_agn.firmware_loading_complete);
  1325. device_release_driver(priv->bus.dev);
  1326. release_firmware(ucode_raw);
  1327. }
  1328. static const char *desc_lookup_text[] = {
  1329. "OK",
  1330. "FAIL",
  1331. "BAD_PARAM",
  1332. "BAD_CHECKSUM",
  1333. "NMI_INTERRUPT_WDG",
  1334. "SYSASSERT",
  1335. "FATAL_ERROR",
  1336. "BAD_COMMAND",
  1337. "HW_ERROR_TUNE_LOCK",
  1338. "HW_ERROR_TEMPERATURE",
  1339. "ILLEGAL_CHAN_FREQ",
  1340. "VCC_NOT_STABLE",
  1341. "FH_ERROR",
  1342. "NMI_INTERRUPT_HOST",
  1343. "NMI_INTERRUPT_ACTION_PT",
  1344. "NMI_INTERRUPT_UNKNOWN",
  1345. "UCODE_VERSION_MISMATCH",
  1346. "HW_ERROR_ABS_LOCK",
  1347. "HW_ERROR_CAL_LOCK_FAIL",
  1348. "NMI_INTERRUPT_INST_ACTION_PT",
  1349. "NMI_INTERRUPT_DATA_ACTION_PT",
  1350. "NMI_TRM_HW_ER",
  1351. "NMI_INTERRUPT_TRM",
  1352. "NMI_INTERRUPT_BREAK_POINT"
  1353. "DEBUG_0",
  1354. "DEBUG_1",
  1355. "DEBUG_2",
  1356. "DEBUG_3",
  1357. };
  1358. static struct { char *name; u8 num; } advanced_lookup[] = {
  1359. { "NMI_INTERRUPT_WDG", 0x34 },
  1360. { "SYSASSERT", 0x35 },
  1361. { "UCODE_VERSION_MISMATCH", 0x37 },
  1362. { "BAD_COMMAND", 0x38 },
  1363. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  1364. { "FATAL_ERROR", 0x3D },
  1365. { "NMI_TRM_HW_ERR", 0x46 },
  1366. { "NMI_INTERRUPT_TRM", 0x4C },
  1367. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  1368. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  1369. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  1370. { "NMI_INTERRUPT_HOST", 0x66 },
  1371. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  1372. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  1373. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  1374. { "ADVANCED_SYSASSERT", 0 },
  1375. };
  1376. static const char *desc_lookup(u32 num)
  1377. {
  1378. int i;
  1379. int max = ARRAY_SIZE(desc_lookup_text);
  1380. if (num < max)
  1381. return desc_lookup_text[num];
  1382. max = ARRAY_SIZE(advanced_lookup) - 1;
  1383. for (i = 0; i < max; i++) {
  1384. if (advanced_lookup[i].num == num)
  1385. break;
  1386. }
  1387. return advanced_lookup[i].name;
  1388. }
  1389. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1390. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1391. void iwl_dump_nic_error_log(struct iwl_priv *priv)
  1392. {
  1393. u32 base;
  1394. struct iwl_error_event_table table;
  1395. base = priv->device_pointers.error_event_table;
  1396. if (priv->ucode_type == IWL_UCODE_INIT) {
  1397. if (!base)
  1398. base = priv->_agn.init_errlog_ptr;
  1399. } else {
  1400. if (!base)
  1401. base = priv->_agn.inst_errlog_ptr;
  1402. }
  1403. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1404. IWL_ERR(priv,
  1405. "Not valid error log pointer 0x%08X for %s uCode\n",
  1406. base,
  1407. (priv->ucode_type == IWL_UCODE_INIT)
  1408. ? "Init" : "RT");
  1409. return;
  1410. }
  1411. iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
  1412. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  1413. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1414. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1415. priv->status, table.valid);
  1416. }
  1417. priv->isr_stats.err_code = table.error_id;
  1418. trace_iwlwifi_dev_ucode_error(priv, table.error_id, table.tsf_low,
  1419. table.data1, table.data2, table.line,
  1420. table.blink1, table.blink2, table.ilink1,
  1421. table.ilink2, table.bcon_time, table.gp1,
  1422. table.gp2, table.gp3, table.ucode_ver,
  1423. table.hw_ver, table.brd_ver);
  1424. IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id,
  1425. desc_lookup(table.error_id));
  1426. IWL_ERR(priv, "0x%08X | uPc\n", table.pc);
  1427. IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1);
  1428. IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2);
  1429. IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1);
  1430. IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2);
  1431. IWL_ERR(priv, "0x%08X | data1\n", table.data1);
  1432. IWL_ERR(priv, "0x%08X | data2\n", table.data2);
  1433. IWL_ERR(priv, "0x%08X | line\n", table.line);
  1434. IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time);
  1435. IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low);
  1436. IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi);
  1437. IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1);
  1438. IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2);
  1439. IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3);
  1440. IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver);
  1441. IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver);
  1442. IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver);
  1443. IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd);
  1444. }
  1445. #define EVENT_START_OFFSET (4 * sizeof(u32))
  1446. /**
  1447. * iwl_print_event_log - Dump error event log to syslog
  1448. *
  1449. */
  1450. static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1451. u32 num_events, u32 mode,
  1452. int pos, char **buf, size_t bufsz)
  1453. {
  1454. u32 i;
  1455. u32 base; /* SRAM byte address of event log header */
  1456. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1457. u32 ptr; /* SRAM byte address of log data */
  1458. u32 ev, time, data; /* event log data */
  1459. unsigned long reg_flags;
  1460. if (num_events == 0)
  1461. return pos;
  1462. base = priv->device_pointers.log_event_table;
  1463. if (priv->ucode_type == IWL_UCODE_INIT) {
  1464. if (!base)
  1465. base = priv->_agn.init_evtlog_ptr;
  1466. } else {
  1467. if (!base)
  1468. base = priv->_agn.inst_evtlog_ptr;
  1469. }
  1470. if (mode == 0)
  1471. event_size = 2 * sizeof(u32);
  1472. else
  1473. event_size = 3 * sizeof(u32);
  1474. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1475. /* Make sure device is powered up for SRAM reads */
  1476. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1477. iwl_grab_nic_access(priv);
  1478. /* Set starting address; reads will auto-increment */
  1479. iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1480. rmb();
  1481. /* "time" is actually "data" for mode 0 (no timestamp).
  1482. * place event id # at far right for easier visual parsing. */
  1483. for (i = 0; i < num_events; i++) {
  1484. ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1485. time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1486. if (mode == 0) {
  1487. /* data, ev */
  1488. if (bufsz) {
  1489. pos += scnprintf(*buf + pos, bufsz - pos,
  1490. "EVT_LOG:0x%08x:%04u\n",
  1491. time, ev);
  1492. } else {
  1493. trace_iwlwifi_dev_ucode_event(priv, 0,
  1494. time, ev);
  1495. IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
  1496. time, ev);
  1497. }
  1498. } else {
  1499. data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1500. if (bufsz) {
  1501. pos += scnprintf(*buf + pos, bufsz - pos,
  1502. "EVT_LOGT:%010u:0x%08x:%04u\n",
  1503. time, data, ev);
  1504. } else {
  1505. IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
  1506. time, data, ev);
  1507. trace_iwlwifi_dev_ucode_event(priv, time,
  1508. data, ev);
  1509. }
  1510. }
  1511. }
  1512. /* Allow device to power down */
  1513. iwl_release_nic_access(priv);
  1514. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1515. return pos;
  1516. }
  1517. /**
  1518. * iwl_print_last_event_logs - Dump the newest # of event log to syslog
  1519. */
  1520. static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1521. u32 num_wraps, u32 next_entry,
  1522. u32 size, u32 mode,
  1523. int pos, char **buf, size_t bufsz)
  1524. {
  1525. /*
  1526. * display the newest DEFAULT_LOG_ENTRIES entries
  1527. * i.e the entries just before the next ont that uCode would fill.
  1528. */
  1529. if (num_wraps) {
  1530. if (next_entry < size) {
  1531. pos = iwl_print_event_log(priv,
  1532. capacity - (size - next_entry),
  1533. size - next_entry, mode,
  1534. pos, buf, bufsz);
  1535. pos = iwl_print_event_log(priv, 0,
  1536. next_entry, mode,
  1537. pos, buf, bufsz);
  1538. } else
  1539. pos = iwl_print_event_log(priv, next_entry - size,
  1540. size, mode, pos, buf, bufsz);
  1541. } else {
  1542. if (next_entry < size) {
  1543. pos = iwl_print_event_log(priv, 0, next_entry,
  1544. mode, pos, buf, bufsz);
  1545. } else {
  1546. pos = iwl_print_event_log(priv, next_entry - size,
  1547. size, mode, pos, buf, bufsz);
  1548. }
  1549. }
  1550. return pos;
  1551. }
  1552. #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
  1553. int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1554. char **buf, bool display)
  1555. {
  1556. u32 base; /* SRAM byte address of event log header */
  1557. u32 capacity; /* event log capacity in # entries */
  1558. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1559. u32 num_wraps; /* # times uCode wrapped to top of log */
  1560. u32 next_entry; /* index of next entry to be written by uCode */
  1561. u32 size; /* # entries that we'll print */
  1562. u32 logsize;
  1563. int pos = 0;
  1564. size_t bufsz = 0;
  1565. base = priv->device_pointers.log_event_table;
  1566. if (priv->ucode_type == IWL_UCODE_INIT) {
  1567. logsize = priv->_agn.init_evtlog_size;
  1568. if (!base)
  1569. base = priv->_agn.init_evtlog_ptr;
  1570. } else {
  1571. logsize = priv->_agn.inst_evtlog_size;
  1572. if (!base)
  1573. base = priv->_agn.inst_evtlog_ptr;
  1574. }
  1575. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1576. IWL_ERR(priv,
  1577. "Invalid event log pointer 0x%08X for %s uCode\n",
  1578. base,
  1579. (priv->ucode_type == IWL_UCODE_INIT)
  1580. ? "Init" : "RT");
  1581. return -EINVAL;
  1582. }
  1583. /* event log header */
  1584. capacity = iwl_read_targ_mem(priv, base);
  1585. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1586. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1587. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1588. if (capacity > logsize) {
  1589. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1590. capacity, logsize);
  1591. capacity = logsize;
  1592. }
  1593. if (next_entry > logsize) {
  1594. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1595. next_entry, logsize);
  1596. next_entry = logsize;
  1597. }
  1598. size = num_wraps ? capacity : next_entry;
  1599. /* bail out if nothing in log */
  1600. if (size == 0) {
  1601. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1602. return pos;
  1603. }
  1604. /* enable/disable bt channel inhibition */
  1605. priv->bt_ch_announce = iwlagn_bt_ch_announce;
  1606. #ifdef CONFIG_IWLWIFI_DEBUG
  1607. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1608. size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
  1609. ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
  1610. #else
  1611. size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
  1612. ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
  1613. #endif
  1614. IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
  1615. size);
  1616. #ifdef CONFIG_IWLWIFI_DEBUG
  1617. if (display) {
  1618. if (full_log)
  1619. bufsz = capacity * 48;
  1620. else
  1621. bufsz = size * 48;
  1622. *buf = kmalloc(bufsz, GFP_KERNEL);
  1623. if (!*buf)
  1624. return -ENOMEM;
  1625. }
  1626. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1627. /*
  1628. * if uCode has wrapped back to top of log,
  1629. * start at the oldest entry,
  1630. * i.e the next one that uCode would fill.
  1631. */
  1632. if (num_wraps)
  1633. pos = iwl_print_event_log(priv, next_entry,
  1634. capacity - next_entry, mode,
  1635. pos, buf, bufsz);
  1636. /* (then/else) start at top of log */
  1637. pos = iwl_print_event_log(priv, 0,
  1638. next_entry, mode, pos, buf, bufsz);
  1639. } else
  1640. pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
  1641. next_entry, size, mode,
  1642. pos, buf, bufsz);
  1643. #else
  1644. pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
  1645. next_entry, size, mode,
  1646. pos, buf, bufsz);
  1647. #endif
  1648. return pos;
  1649. }
  1650. static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1651. {
  1652. struct iwl_ct_kill_config cmd;
  1653. struct iwl_ct_kill_throttling_config adv_cmd;
  1654. unsigned long flags;
  1655. int ret = 0;
  1656. spin_lock_irqsave(&priv->lock, flags);
  1657. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1658. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1659. spin_unlock_irqrestore(&priv->lock, flags);
  1660. priv->thermal_throttle.ct_kill_toggle = false;
  1661. if (priv->cfg->base_params->support_ct_kill_exit) {
  1662. adv_cmd.critical_temperature_enter =
  1663. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1664. adv_cmd.critical_temperature_exit =
  1665. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1666. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1667. sizeof(adv_cmd), &adv_cmd);
  1668. if (ret)
  1669. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1670. else
  1671. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1672. "succeeded, "
  1673. "critical temperature enter is %d,"
  1674. "exit is %d\n",
  1675. priv->hw_params.ct_kill_threshold,
  1676. priv->hw_params.ct_kill_exit_threshold);
  1677. } else {
  1678. cmd.critical_temperature_R =
  1679. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1680. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1681. sizeof(cmd), &cmd);
  1682. if (ret)
  1683. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1684. else
  1685. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1686. "succeeded, "
  1687. "critical temperature is %d\n",
  1688. priv->hw_params.ct_kill_threshold);
  1689. }
  1690. }
  1691. static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
  1692. {
  1693. struct iwl_calib_cfg_cmd calib_cfg_cmd;
  1694. struct iwl_host_cmd cmd = {
  1695. .id = CALIBRATION_CFG_CMD,
  1696. .len = { sizeof(struct iwl_calib_cfg_cmd), },
  1697. .data = { &calib_cfg_cmd, },
  1698. };
  1699. memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
  1700. calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
  1701. calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
  1702. return iwl_send_cmd(priv, &cmd);
  1703. }
  1704. /**
  1705. * iwl_alive_start - called after REPLY_ALIVE notification received
  1706. * from protocol/runtime uCode (initialization uCode's
  1707. * Alive gets handled by iwl_init_alive_start()).
  1708. */
  1709. int iwl_alive_start(struct iwl_priv *priv)
  1710. {
  1711. int ret = 0;
  1712. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  1713. iwl_reset_ict(priv);
  1714. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  1715. /* After the ALIVE response, we can send host commands to the uCode */
  1716. set_bit(STATUS_ALIVE, &priv->status);
  1717. /* Enable watchdog to monitor the driver tx queues */
  1718. iwl_setup_watchdog(priv);
  1719. if (iwl_is_rfkill(priv))
  1720. return -ERFKILL;
  1721. /* download priority table before any calibration request */
  1722. if (priv->cfg->bt_params &&
  1723. priv->cfg->bt_params->advanced_bt_coexist) {
  1724. /* Configure Bluetooth device coexistence support */
  1725. priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
  1726. priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
  1727. priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
  1728. priv->cfg->ops->hcmd->send_bt_config(priv);
  1729. priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
  1730. iwlagn_send_prio_tbl(priv);
  1731. /* FIXME: w/a to force change uCode BT state machine */
  1732. ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
  1733. BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
  1734. if (ret)
  1735. return ret;
  1736. ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
  1737. BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
  1738. if (ret)
  1739. return ret;
  1740. }
  1741. if (priv->hw_params.calib_rt_cfg)
  1742. iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
  1743. ieee80211_wake_queues(priv->hw);
  1744. priv->active_rate = IWL_RATES_MASK;
  1745. /* Configure Tx antenna selection based on H/W config */
  1746. if (priv->cfg->ops->hcmd->set_tx_ant)
  1747. priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
  1748. if (iwl_is_associated_ctx(ctx)) {
  1749. struct iwl_rxon_cmd *active_rxon =
  1750. (struct iwl_rxon_cmd *)&ctx->active;
  1751. /* apply any changes in staging */
  1752. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1753. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1754. } else {
  1755. struct iwl_rxon_context *tmp;
  1756. /* Initialize our rx_config data */
  1757. for_each_context(priv, tmp)
  1758. iwl_connection_init_rx_config(priv, tmp);
  1759. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1760. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1761. }
  1762. if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
  1763. !priv->cfg->bt_params->advanced_bt_coexist)) {
  1764. /*
  1765. * default is 2-wire BT coexexistence support
  1766. */
  1767. priv->cfg->ops->hcmd->send_bt_config(priv);
  1768. }
  1769. iwl_reset_run_time_calib(priv);
  1770. set_bit(STATUS_READY, &priv->status);
  1771. /* Configure the adapter for unassociated operation */
  1772. ret = iwlagn_commit_rxon(priv, ctx);
  1773. if (ret)
  1774. return ret;
  1775. /* At this point, the NIC is initialized and operational */
  1776. iwl_rf_kill_ct_config(priv);
  1777. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  1778. return iwl_power_update_mode(priv, true);
  1779. }
  1780. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  1781. static void __iwl_down(struct iwl_priv *priv)
  1782. {
  1783. int exit_pending;
  1784. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  1785. iwl_scan_cancel_timeout(priv, 200);
  1786. exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
  1787. /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
  1788. * to prevent rearm timer */
  1789. del_timer_sync(&priv->watchdog);
  1790. iwl_clear_ucode_stations(priv, NULL);
  1791. iwl_dealloc_bcast_stations(priv);
  1792. iwl_clear_driver_stations(priv);
  1793. /* reset BT coex data */
  1794. priv->bt_status = 0;
  1795. if (priv->cfg->bt_params)
  1796. priv->bt_traffic_load =
  1797. priv->cfg->bt_params->bt_init_traffic_load;
  1798. else
  1799. priv->bt_traffic_load = 0;
  1800. priv->bt_full_concurrent = false;
  1801. priv->bt_ci_compliance = 0;
  1802. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1803. * exiting the module */
  1804. if (!exit_pending)
  1805. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1806. if (priv->mac80211_registered)
  1807. ieee80211_stop_queues(priv->hw);
  1808. /* Clear out all status bits but a few that are stable across reset */
  1809. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  1810. STATUS_RF_KILL_HW |
  1811. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  1812. STATUS_GEO_CONFIGURED |
  1813. test_bit(STATUS_FW_ERROR, &priv->status) <<
  1814. STATUS_FW_ERROR |
  1815. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  1816. STATUS_EXIT_PENDING;
  1817. iwlagn_stop_device(priv);
  1818. dev_kfree_skb(priv->beacon_skb);
  1819. priv->beacon_skb = NULL;
  1820. }
  1821. static void iwl_down(struct iwl_priv *priv)
  1822. {
  1823. mutex_lock(&priv->mutex);
  1824. __iwl_down(priv);
  1825. mutex_unlock(&priv->mutex);
  1826. iwl_cancel_deferred_work(priv);
  1827. }
  1828. #define HW_READY_TIMEOUT (50)
  1829. /* Note: returns poll_bit return value, which is >= 0 if success */
  1830. static int iwl_set_hw_ready(struct iwl_priv *priv)
  1831. {
  1832. int ret;
  1833. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1834. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
  1835. /* See if we got it */
  1836. ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  1837. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
  1838. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
  1839. HW_READY_TIMEOUT);
  1840. IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
  1841. return ret;
  1842. }
  1843. /* Note: returns standard 0/-ERROR code */
  1844. int iwl_prepare_card_hw(struct iwl_priv *priv)
  1845. {
  1846. int ret;
  1847. IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
  1848. ret = iwl_set_hw_ready(priv);
  1849. if (ret >= 0)
  1850. return 0;
  1851. /* If HW is not ready, prepare the conditions to check again */
  1852. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1853. CSR_HW_IF_CONFIG_REG_PREPARE);
  1854. ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  1855. ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
  1856. CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
  1857. if (ret < 0)
  1858. return ret;
  1859. /* HW should be ready by now, check again. */
  1860. ret = iwl_set_hw_ready(priv);
  1861. if (ret >= 0)
  1862. return 0;
  1863. return ret;
  1864. }
  1865. #define MAX_HW_RESTARTS 5
  1866. static int __iwl_up(struct iwl_priv *priv)
  1867. {
  1868. struct iwl_rxon_context *ctx;
  1869. int ret;
  1870. lockdep_assert_held(&priv->mutex);
  1871. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1872. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  1873. return -EIO;
  1874. }
  1875. for_each_context(priv, ctx) {
  1876. ret = iwlagn_alloc_bcast_station(priv, ctx);
  1877. if (ret) {
  1878. iwl_dealloc_bcast_stations(priv);
  1879. return ret;
  1880. }
  1881. }
  1882. ret = iwlagn_run_init_ucode(priv);
  1883. if (ret) {
  1884. IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
  1885. goto error;
  1886. }
  1887. ret = iwlagn_load_ucode_wait_alive(priv,
  1888. &priv->ucode_rt,
  1889. IWL_UCODE_REGULAR);
  1890. if (ret) {
  1891. IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
  1892. goto error;
  1893. }
  1894. ret = iwl_alive_start(priv);
  1895. if (ret)
  1896. goto error;
  1897. return 0;
  1898. error:
  1899. set_bit(STATUS_EXIT_PENDING, &priv->status);
  1900. __iwl_down(priv);
  1901. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1902. IWL_ERR(priv, "Unable to initialize device.\n");
  1903. return ret;
  1904. }
  1905. /*****************************************************************************
  1906. *
  1907. * Workqueue callbacks
  1908. *
  1909. *****************************************************************************/
  1910. static void iwl_bg_run_time_calib_work(struct work_struct *work)
  1911. {
  1912. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  1913. run_time_calib_work);
  1914. mutex_lock(&priv->mutex);
  1915. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1916. test_bit(STATUS_SCANNING, &priv->status)) {
  1917. mutex_unlock(&priv->mutex);
  1918. return;
  1919. }
  1920. if (priv->start_calib) {
  1921. iwl_chain_noise_calibration(priv);
  1922. iwl_sensitivity_calibration(priv);
  1923. }
  1924. mutex_unlock(&priv->mutex);
  1925. }
  1926. static void iwlagn_prepare_restart(struct iwl_priv *priv)
  1927. {
  1928. struct iwl_rxon_context *ctx;
  1929. bool bt_full_concurrent;
  1930. u8 bt_ci_compliance;
  1931. u8 bt_load;
  1932. u8 bt_status;
  1933. lockdep_assert_held(&priv->mutex);
  1934. for_each_context(priv, ctx)
  1935. ctx->vif = NULL;
  1936. priv->is_open = 0;
  1937. /*
  1938. * __iwl_down() will clear the BT status variables,
  1939. * which is correct, but when we restart we really
  1940. * want to keep them so restore them afterwards.
  1941. *
  1942. * The restart process will later pick them up and
  1943. * re-configure the hw when we reconfigure the BT
  1944. * command.
  1945. */
  1946. bt_full_concurrent = priv->bt_full_concurrent;
  1947. bt_ci_compliance = priv->bt_ci_compliance;
  1948. bt_load = priv->bt_traffic_load;
  1949. bt_status = priv->bt_status;
  1950. __iwl_down(priv);
  1951. priv->bt_full_concurrent = bt_full_concurrent;
  1952. priv->bt_ci_compliance = bt_ci_compliance;
  1953. priv->bt_traffic_load = bt_load;
  1954. priv->bt_status = bt_status;
  1955. }
  1956. static void iwl_bg_restart(struct work_struct *data)
  1957. {
  1958. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  1959. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1960. return;
  1961. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  1962. mutex_lock(&priv->mutex);
  1963. iwlagn_prepare_restart(priv);
  1964. mutex_unlock(&priv->mutex);
  1965. iwl_cancel_deferred_work(priv);
  1966. ieee80211_restart_hw(priv->hw);
  1967. } else {
  1968. WARN_ON(1);
  1969. }
  1970. }
  1971. static void iwl_bg_rx_replenish(struct work_struct *data)
  1972. {
  1973. struct iwl_priv *priv =
  1974. container_of(data, struct iwl_priv, rx_replenish);
  1975. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1976. return;
  1977. mutex_lock(&priv->mutex);
  1978. iwlagn_rx_replenish(priv);
  1979. mutex_unlock(&priv->mutex);
  1980. }
  1981. static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  1982. struct ieee80211_channel *chan,
  1983. enum nl80211_channel_type channel_type,
  1984. unsigned int wait)
  1985. {
  1986. struct iwl_priv *priv = hw->priv;
  1987. int ret;
  1988. /* Not supported if we don't have PAN */
  1989. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
  1990. ret = -EOPNOTSUPP;
  1991. goto free;
  1992. }
  1993. /* Not supported on pre-P2P firmware */
  1994. if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
  1995. BIT(NL80211_IFTYPE_P2P_CLIENT))) {
  1996. ret = -EOPNOTSUPP;
  1997. goto free;
  1998. }
  1999. mutex_lock(&priv->mutex);
  2000. if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
  2001. /*
  2002. * If the PAN context is free, use the normal
  2003. * way of doing remain-on-channel offload + TX.
  2004. */
  2005. ret = 1;
  2006. goto out;
  2007. }
  2008. /* TODO: queue up if scanning? */
  2009. if (test_bit(STATUS_SCANNING, &priv->status) ||
  2010. priv->_agn.offchan_tx_skb) {
  2011. ret = -EBUSY;
  2012. goto out;
  2013. }
  2014. /*
  2015. * max_scan_ie_len doesn't include the blank SSID or the header,
  2016. * so need to add that again here.
  2017. */
  2018. if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
  2019. ret = -ENOBUFS;
  2020. goto out;
  2021. }
  2022. priv->_agn.offchan_tx_skb = skb;
  2023. priv->_agn.offchan_tx_timeout = wait;
  2024. priv->_agn.offchan_tx_chan = chan;
  2025. ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
  2026. IWL_SCAN_OFFCH_TX, chan->band);
  2027. if (ret)
  2028. priv->_agn.offchan_tx_skb = NULL;
  2029. out:
  2030. mutex_unlock(&priv->mutex);
  2031. free:
  2032. if (ret < 0)
  2033. kfree_skb(skb);
  2034. return ret;
  2035. }
  2036. static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
  2037. {
  2038. struct iwl_priv *priv = hw->priv;
  2039. int ret;
  2040. mutex_lock(&priv->mutex);
  2041. if (!priv->_agn.offchan_tx_skb) {
  2042. ret = -EINVAL;
  2043. goto unlock;
  2044. }
  2045. priv->_agn.offchan_tx_skb = NULL;
  2046. ret = iwl_scan_cancel_timeout(priv, 200);
  2047. if (ret)
  2048. ret = -EIO;
  2049. unlock:
  2050. mutex_unlock(&priv->mutex);
  2051. return ret;
  2052. }
  2053. /*****************************************************************************
  2054. *
  2055. * mac80211 entry point functions
  2056. *
  2057. *****************************************************************************/
  2058. static const struct ieee80211_iface_limit iwlagn_sta_ap_limits[] = {
  2059. {
  2060. .max = 1,
  2061. .types = BIT(NL80211_IFTYPE_STATION),
  2062. },
  2063. {
  2064. .max = 1,
  2065. .types = BIT(NL80211_IFTYPE_AP),
  2066. },
  2067. };
  2068. static const struct ieee80211_iface_limit iwlagn_2sta_limits[] = {
  2069. {
  2070. .max = 2,
  2071. .types = BIT(NL80211_IFTYPE_STATION),
  2072. },
  2073. };
  2074. static const struct ieee80211_iface_limit iwlagn_p2p_sta_go_limits[] = {
  2075. {
  2076. .max = 1,
  2077. .types = BIT(NL80211_IFTYPE_STATION),
  2078. },
  2079. {
  2080. .max = 1,
  2081. .types = BIT(NL80211_IFTYPE_P2P_GO) |
  2082. BIT(NL80211_IFTYPE_AP),
  2083. },
  2084. };
  2085. static const struct ieee80211_iface_limit iwlagn_p2p_2sta_limits[] = {
  2086. {
  2087. .max = 2,
  2088. .types = BIT(NL80211_IFTYPE_STATION),
  2089. },
  2090. {
  2091. .max = 1,
  2092. .types = BIT(NL80211_IFTYPE_P2P_CLIENT),
  2093. },
  2094. };
  2095. static const struct ieee80211_iface_combination
  2096. iwlagn_iface_combinations_dualmode[] = {
  2097. { .num_different_channels = 1,
  2098. .max_interfaces = 2,
  2099. .beacon_int_infra_match = true,
  2100. .limits = iwlagn_sta_ap_limits,
  2101. .n_limits = ARRAY_SIZE(iwlagn_sta_ap_limits),
  2102. },
  2103. { .num_different_channels = 1,
  2104. .max_interfaces = 2,
  2105. .limits = iwlagn_2sta_limits,
  2106. .n_limits = ARRAY_SIZE(iwlagn_2sta_limits),
  2107. },
  2108. };
  2109. static const struct ieee80211_iface_combination
  2110. iwlagn_iface_combinations_p2p[] = {
  2111. { .num_different_channels = 1,
  2112. .max_interfaces = 2,
  2113. .beacon_int_infra_match = true,
  2114. .limits = iwlagn_p2p_sta_go_limits,
  2115. .n_limits = ARRAY_SIZE(iwlagn_p2p_sta_go_limits),
  2116. },
  2117. { .num_different_channels = 1,
  2118. .max_interfaces = 2,
  2119. .limits = iwlagn_p2p_2sta_limits,
  2120. .n_limits = ARRAY_SIZE(iwlagn_p2p_2sta_limits),
  2121. },
  2122. };
  2123. /*
  2124. * Not a mac80211 entry point function, but it fits in with all the
  2125. * other mac80211 functions grouped here.
  2126. */
  2127. static int iwl_mac_setup_register(struct iwl_priv *priv,
  2128. struct iwlagn_ucode_capabilities *capa)
  2129. {
  2130. int ret;
  2131. struct ieee80211_hw *hw = priv->hw;
  2132. struct iwl_rxon_context *ctx;
  2133. hw->rate_control_algorithm = "iwl-agn-rs";
  2134. /* Tell mac80211 our characteristics */
  2135. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  2136. IEEE80211_HW_AMPDU_AGGREGATION |
  2137. IEEE80211_HW_NEED_DTIM_PERIOD |
  2138. IEEE80211_HW_SPECTRUM_MGMT |
  2139. IEEE80211_HW_REPORTS_TX_ACK_STATUS;
  2140. hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
  2141. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  2142. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  2143. if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
  2144. hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
  2145. IEEE80211_HW_SUPPORTS_STATIC_SMPS;
  2146. if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
  2147. hw->flags |= IEEE80211_HW_MFP_CAPABLE;
  2148. hw->sta_data_size = sizeof(struct iwl_station_priv);
  2149. hw->vif_data_size = sizeof(struct iwl_vif_priv);
  2150. for_each_context(priv, ctx) {
  2151. hw->wiphy->interface_modes |= ctx->interface_modes;
  2152. hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
  2153. }
  2154. BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
  2155. if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_P2P_CLIENT)) {
  2156. hw->wiphy->iface_combinations = iwlagn_iface_combinations_p2p;
  2157. hw->wiphy->n_iface_combinations =
  2158. ARRAY_SIZE(iwlagn_iface_combinations_p2p);
  2159. } else if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_AP)) {
  2160. hw->wiphy->iface_combinations = iwlagn_iface_combinations_dualmode;
  2161. hw->wiphy->n_iface_combinations =
  2162. ARRAY_SIZE(iwlagn_iface_combinations_dualmode);
  2163. }
  2164. hw->wiphy->max_remain_on_channel_duration = 1000;
  2165. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  2166. WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2167. WIPHY_FLAG_IBSS_RSN;
  2168. if (iwlagn_mod_params.power_save)
  2169. hw->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2170. else
  2171. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2172. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  2173. /* we create the 802.11 header and a zero-length SSID element */
  2174. hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
  2175. /* Default value; 4 EDCA QOS priorities */
  2176. hw->queues = 4;
  2177. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  2178. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  2179. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2180. &priv->bands[IEEE80211_BAND_2GHZ];
  2181. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  2182. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2183. &priv->bands[IEEE80211_BAND_5GHZ];
  2184. iwl_leds_init(priv);
  2185. ret = ieee80211_register_hw(priv->hw);
  2186. if (ret) {
  2187. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  2188. return ret;
  2189. }
  2190. priv->mac80211_registered = 1;
  2191. return 0;
  2192. }
  2193. static int iwlagn_mac_start(struct ieee80211_hw *hw)
  2194. {
  2195. struct iwl_priv *priv = hw->priv;
  2196. int ret;
  2197. IWL_DEBUG_MAC80211(priv, "enter\n");
  2198. /* we should be verifying the device is ready to be opened */
  2199. mutex_lock(&priv->mutex);
  2200. ret = __iwl_up(priv);
  2201. mutex_unlock(&priv->mutex);
  2202. if (ret)
  2203. return ret;
  2204. IWL_DEBUG_INFO(priv, "Start UP work done.\n");
  2205. /* Now we should be done, and the READY bit should be set. */
  2206. if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
  2207. ret = -EIO;
  2208. iwlagn_led_enable(priv);
  2209. priv->is_open = 1;
  2210. IWL_DEBUG_MAC80211(priv, "leave\n");
  2211. return 0;
  2212. }
  2213. static void iwlagn_mac_stop(struct ieee80211_hw *hw)
  2214. {
  2215. struct iwl_priv *priv = hw->priv;
  2216. IWL_DEBUG_MAC80211(priv, "enter\n");
  2217. if (!priv->is_open)
  2218. return;
  2219. priv->is_open = 0;
  2220. iwl_down(priv);
  2221. flush_workqueue(priv->workqueue);
  2222. /* User space software may expect getting rfkill changes
  2223. * even if interface is down */
  2224. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2225. iwl_enable_rfkill_int(priv);
  2226. IWL_DEBUG_MAC80211(priv, "leave\n");
  2227. }
  2228. static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2229. {
  2230. struct iwl_priv *priv = hw->priv;
  2231. IWL_DEBUG_MACDUMP(priv, "enter\n");
  2232. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2233. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2234. if (iwlagn_tx_skb(priv, skb))
  2235. dev_kfree_skb_any(skb);
  2236. IWL_DEBUG_MACDUMP(priv, "leave\n");
  2237. }
  2238. static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
  2239. struct ieee80211_vif *vif,
  2240. struct ieee80211_key_conf *keyconf,
  2241. struct ieee80211_sta *sta,
  2242. u32 iv32, u16 *phase1key)
  2243. {
  2244. struct iwl_priv *priv = hw->priv;
  2245. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2246. IWL_DEBUG_MAC80211(priv, "enter\n");
  2247. iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
  2248. iv32, phase1key);
  2249. IWL_DEBUG_MAC80211(priv, "leave\n");
  2250. }
  2251. static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2252. struct ieee80211_vif *vif,
  2253. struct ieee80211_sta *sta,
  2254. struct ieee80211_key_conf *key)
  2255. {
  2256. struct iwl_priv *priv = hw->priv;
  2257. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2258. struct iwl_rxon_context *ctx = vif_priv->ctx;
  2259. int ret;
  2260. u8 sta_id;
  2261. bool is_default_wep_key = false;
  2262. IWL_DEBUG_MAC80211(priv, "enter\n");
  2263. if (iwlagn_mod_params.sw_crypto) {
  2264. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2265. return -EOPNOTSUPP;
  2266. }
  2267. /*
  2268. * To support IBSS RSN, don't program group keys in IBSS, the
  2269. * hardware will then not attempt to decrypt the frames.
  2270. */
  2271. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2272. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2273. return -EOPNOTSUPP;
  2274. sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
  2275. if (sta_id == IWL_INVALID_STATION)
  2276. return -EINVAL;
  2277. mutex_lock(&priv->mutex);
  2278. iwl_scan_cancel_timeout(priv, 100);
  2279. /*
  2280. * If we are getting WEP group key and we didn't receive any key mapping
  2281. * so far, we are in legacy wep mode (group key only), otherwise we are
  2282. * in 1X mode.
  2283. * In legacy wep mode, we use another host command to the uCode.
  2284. */
  2285. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  2286. key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
  2287. !sta) {
  2288. if (cmd == SET_KEY)
  2289. is_default_wep_key = !ctx->key_mapping_keys;
  2290. else
  2291. is_default_wep_key =
  2292. (key->hw_key_idx == HW_KEY_DEFAULT);
  2293. }
  2294. switch (cmd) {
  2295. case SET_KEY:
  2296. if (is_default_wep_key)
  2297. ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
  2298. else
  2299. ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
  2300. key, sta_id);
  2301. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2302. break;
  2303. case DISABLE_KEY:
  2304. if (is_default_wep_key)
  2305. ret = iwl_remove_default_wep_key(priv, ctx, key);
  2306. else
  2307. ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
  2308. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2309. break;
  2310. default:
  2311. ret = -EINVAL;
  2312. }
  2313. mutex_unlock(&priv->mutex);
  2314. IWL_DEBUG_MAC80211(priv, "leave\n");
  2315. return ret;
  2316. }
  2317. static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
  2318. struct ieee80211_vif *vif,
  2319. enum ieee80211_ampdu_mlme_action action,
  2320. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  2321. u8 buf_size)
  2322. {
  2323. struct iwl_priv *priv = hw->priv;
  2324. int ret = -EINVAL;
  2325. struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
  2326. IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
  2327. sta->addr, tid);
  2328. if (!(priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE))
  2329. return -EACCES;
  2330. mutex_lock(&priv->mutex);
  2331. switch (action) {
  2332. case IEEE80211_AMPDU_RX_START:
  2333. IWL_DEBUG_HT(priv, "start Rx\n");
  2334. ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
  2335. break;
  2336. case IEEE80211_AMPDU_RX_STOP:
  2337. IWL_DEBUG_HT(priv, "stop Rx\n");
  2338. ret = iwl_sta_rx_agg_stop(priv, sta, tid);
  2339. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2340. ret = 0;
  2341. break;
  2342. case IEEE80211_AMPDU_TX_START:
  2343. IWL_DEBUG_HT(priv, "start Tx\n");
  2344. ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
  2345. if (ret == 0) {
  2346. priv->_agn.agg_tids_count++;
  2347. IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
  2348. priv->_agn.agg_tids_count);
  2349. }
  2350. break;
  2351. case IEEE80211_AMPDU_TX_STOP:
  2352. IWL_DEBUG_HT(priv, "stop Tx\n");
  2353. ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
  2354. if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
  2355. priv->_agn.agg_tids_count--;
  2356. IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
  2357. priv->_agn.agg_tids_count);
  2358. }
  2359. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2360. ret = 0;
  2361. if (priv->cfg->ht_params &&
  2362. priv->cfg->ht_params->use_rts_for_aggregation) {
  2363. /*
  2364. * switch off RTS/CTS if it was previously enabled
  2365. */
  2366. sta_priv->lq_sta.lq.general_params.flags &=
  2367. ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
  2368. iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
  2369. &sta_priv->lq_sta.lq, CMD_ASYNC, false);
  2370. }
  2371. break;
  2372. case IEEE80211_AMPDU_TX_OPERATIONAL:
  2373. buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
  2374. iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
  2375. /*
  2376. * If the limit is 0, then it wasn't initialised yet,
  2377. * use the default. We can do that since we take the
  2378. * minimum below, and we don't want to go above our
  2379. * default due to hardware restrictions.
  2380. */
  2381. if (sta_priv->max_agg_bufsize == 0)
  2382. sta_priv->max_agg_bufsize =
  2383. LINK_QUAL_AGG_FRAME_LIMIT_DEF;
  2384. /*
  2385. * Even though in theory the peer could have different
  2386. * aggregation reorder buffer sizes for different sessions,
  2387. * our ucode doesn't allow for that and has a global limit
  2388. * for each station. Therefore, use the minimum of all the
  2389. * aggregation sessions and our default value.
  2390. */
  2391. sta_priv->max_agg_bufsize =
  2392. min(sta_priv->max_agg_bufsize, buf_size);
  2393. if (priv->cfg->ht_params &&
  2394. priv->cfg->ht_params->use_rts_for_aggregation) {
  2395. /*
  2396. * switch to RTS/CTS if it is the prefer protection
  2397. * method for HT traffic
  2398. */
  2399. sta_priv->lq_sta.lq.general_params.flags |=
  2400. LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
  2401. }
  2402. sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
  2403. sta_priv->max_agg_bufsize;
  2404. iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
  2405. &sta_priv->lq_sta.lq, CMD_ASYNC, false);
  2406. IWL_INFO(priv, "Tx aggregation enabled on ra = %pM tid = %d\n",
  2407. sta->addr, tid);
  2408. ret = 0;
  2409. break;
  2410. }
  2411. mutex_unlock(&priv->mutex);
  2412. return ret;
  2413. }
  2414. static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
  2415. struct ieee80211_vif *vif,
  2416. struct ieee80211_sta *sta)
  2417. {
  2418. struct iwl_priv *priv = hw->priv;
  2419. struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
  2420. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2421. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2422. int ret;
  2423. u8 sta_id;
  2424. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2425. sta->addr);
  2426. mutex_lock(&priv->mutex);
  2427. IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
  2428. sta->addr);
  2429. sta_priv->common.sta_id = IWL_INVALID_STATION;
  2430. atomic_set(&sta_priv->pending_frames, 0);
  2431. if (vif->type == NL80211_IFTYPE_AP)
  2432. sta_priv->client = true;
  2433. ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
  2434. is_ap, sta, &sta_id);
  2435. if (ret) {
  2436. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2437. sta->addr, ret);
  2438. /* Should we return success if return code is EEXIST ? */
  2439. mutex_unlock(&priv->mutex);
  2440. return ret;
  2441. }
  2442. sta_priv->common.sta_id = sta_id;
  2443. /* Initialize rate scaling */
  2444. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2445. sta->addr);
  2446. iwl_rs_rate_init(priv, sta, sta_id);
  2447. mutex_unlock(&priv->mutex);
  2448. return 0;
  2449. }
  2450. static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
  2451. struct ieee80211_channel_switch *ch_switch)
  2452. {
  2453. struct iwl_priv *priv = hw->priv;
  2454. const struct iwl_channel_info *ch_info;
  2455. struct ieee80211_conf *conf = &hw->conf;
  2456. struct ieee80211_channel *channel = ch_switch->channel;
  2457. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  2458. /*
  2459. * MULTI-FIXME
  2460. * When we add support for multiple interfaces, we need to
  2461. * revisit this. The channel switch command in the device
  2462. * only affects the BSS context, but what does that really
  2463. * mean? And what if we get a CSA on the second interface?
  2464. * This needs a lot of work.
  2465. */
  2466. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2467. u16 ch;
  2468. IWL_DEBUG_MAC80211(priv, "enter\n");
  2469. mutex_lock(&priv->mutex);
  2470. if (iwl_is_rfkill(priv))
  2471. goto out;
  2472. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  2473. test_bit(STATUS_SCANNING, &priv->status) ||
  2474. test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
  2475. goto out;
  2476. if (!iwl_is_associated_ctx(ctx))
  2477. goto out;
  2478. if (!priv->cfg->ops->lib->set_channel_switch)
  2479. goto out;
  2480. ch = channel->hw_value;
  2481. if (le16_to_cpu(ctx->active.channel) == ch)
  2482. goto out;
  2483. ch_info = iwl_get_channel_info(priv, channel->band, ch);
  2484. if (!is_channel_valid(ch_info)) {
  2485. IWL_DEBUG_MAC80211(priv, "invalid channel\n");
  2486. goto out;
  2487. }
  2488. spin_lock_irq(&priv->lock);
  2489. priv->current_ht_config.smps = conf->smps_mode;
  2490. /* Configure HT40 channels */
  2491. ctx->ht.enabled = conf_is_ht(conf);
  2492. if (ctx->ht.enabled) {
  2493. if (conf_is_ht40_minus(conf)) {
  2494. ctx->ht.extension_chan_offset =
  2495. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2496. ctx->ht.is_40mhz = true;
  2497. } else if (conf_is_ht40_plus(conf)) {
  2498. ctx->ht.extension_chan_offset =
  2499. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2500. ctx->ht.is_40mhz = true;
  2501. } else {
  2502. ctx->ht.extension_chan_offset =
  2503. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2504. ctx->ht.is_40mhz = false;
  2505. }
  2506. } else
  2507. ctx->ht.is_40mhz = false;
  2508. if ((le16_to_cpu(ctx->staging.channel) != ch))
  2509. ctx->staging.flags = 0;
  2510. iwl_set_rxon_channel(priv, channel, ctx);
  2511. iwl_set_rxon_ht(priv, ht_conf);
  2512. iwl_set_flags_for_band(priv, ctx, channel->band, ctx->vif);
  2513. spin_unlock_irq(&priv->lock);
  2514. iwl_set_rate(priv);
  2515. /*
  2516. * at this point, staging_rxon has the
  2517. * configuration for channel switch
  2518. */
  2519. set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
  2520. priv->switch_channel = cpu_to_le16(ch);
  2521. if (priv->cfg->ops->lib->set_channel_switch(priv, ch_switch)) {
  2522. clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
  2523. priv->switch_channel = 0;
  2524. ieee80211_chswitch_done(ctx->vif, false);
  2525. }
  2526. out:
  2527. mutex_unlock(&priv->mutex);
  2528. IWL_DEBUG_MAC80211(priv, "leave\n");
  2529. }
  2530. static void iwlagn_configure_filter(struct ieee80211_hw *hw,
  2531. unsigned int changed_flags,
  2532. unsigned int *total_flags,
  2533. u64 multicast)
  2534. {
  2535. struct iwl_priv *priv = hw->priv;
  2536. __le32 filter_or = 0, filter_nand = 0;
  2537. struct iwl_rxon_context *ctx;
  2538. #define CHK(test, flag) do { \
  2539. if (*total_flags & (test)) \
  2540. filter_or |= (flag); \
  2541. else \
  2542. filter_nand |= (flag); \
  2543. } while (0)
  2544. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  2545. changed_flags, *total_flags);
  2546. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2547. /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
  2548. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
  2549. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2550. #undef CHK
  2551. mutex_lock(&priv->mutex);
  2552. for_each_context(priv, ctx) {
  2553. ctx->staging.filter_flags &= ~filter_nand;
  2554. ctx->staging.filter_flags |= filter_or;
  2555. /*
  2556. * Not committing directly because hardware can perform a scan,
  2557. * but we'll eventually commit the filter flags change anyway.
  2558. */
  2559. }
  2560. mutex_unlock(&priv->mutex);
  2561. /*
  2562. * Receiving all multicast frames is always enabled by the
  2563. * default flags setup in iwl_connection_init_rx_config()
  2564. * since we currently do not support programming multicast
  2565. * filters into the device.
  2566. */
  2567. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2568. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2569. }
  2570. static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
  2571. {
  2572. struct iwl_priv *priv = hw->priv;
  2573. mutex_lock(&priv->mutex);
  2574. IWL_DEBUG_MAC80211(priv, "enter\n");
  2575. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2576. IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
  2577. goto done;
  2578. }
  2579. if (iwl_is_rfkill(priv)) {
  2580. IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
  2581. goto done;
  2582. }
  2583. /*
  2584. * mac80211 will not push any more frames for transmit
  2585. * until the flush is completed
  2586. */
  2587. if (drop) {
  2588. IWL_DEBUG_MAC80211(priv, "send flush command\n");
  2589. if (iwlagn_txfifo_flush(priv, IWL_DROP_ALL)) {
  2590. IWL_ERR(priv, "flush request fail\n");
  2591. goto done;
  2592. }
  2593. }
  2594. IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
  2595. iwlagn_wait_tx_queue_empty(priv);
  2596. done:
  2597. mutex_unlock(&priv->mutex);
  2598. IWL_DEBUG_MAC80211(priv, "leave\n");
  2599. }
  2600. static void iwlagn_disable_roc(struct iwl_priv *priv)
  2601. {
  2602. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
  2603. struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
  2604. lockdep_assert_held(&priv->mutex);
  2605. if (!ctx->is_active)
  2606. return;
  2607. ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
  2608. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2609. iwl_set_rxon_channel(priv, chan, ctx);
  2610. iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
  2611. priv->_agn.hw_roc_channel = NULL;
  2612. iwlagn_commit_rxon(priv, ctx);
  2613. ctx->is_active = false;
  2614. }
  2615. static void iwlagn_bg_roc_done(struct work_struct *work)
  2616. {
  2617. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  2618. _agn.hw_roc_work.work);
  2619. mutex_lock(&priv->mutex);
  2620. ieee80211_remain_on_channel_expired(priv->hw);
  2621. iwlagn_disable_roc(priv);
  2622. mutex_unlock(&priv->mutex);
  2623. }
  2624. static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
  2625. struct ieee80211_channel *channel,
  2626. enum nl80211_channel_type channel_type,
  2627. int duration)
  2628. {
  2629. struct iwl_priv *priv = hw->priv;
  2630. int err = 0;
  2631. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
  2632. return -EOPNOTSUPP;
  2633. if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
  2634. BIT(NL80211_IFTYPE_P2P_CLIENT)))
  2635. return -EOPNOTSUPP;
  2636. mutex_lock(&priv->mutex);
  2637. if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
  2638. test_bit(STATUS_SCAN_HW, &priv->status)) {
  2639. err = -EBUSY;
  2640. goto out;
  2641. }
  2642. priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
  2643. priv->_agn.hw_roc_channel = channel;
  2644. priv->_agn.hw_roc_chantype = channel_type;
  2645. priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
  2646. iwlagn_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
  2647. queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
  2648. msecs_to_jiffies(duration + 20));
  2649. msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
  2650. ieee80211_ready_on_channel(priv->hw);
  2651. out:
  2652. mutex_unlock(&priv->mutex);
  2653. return err;
  2654. }
  2655. static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
  2656. {
  2657. struct iwl_priv *priv = hw->priv;
  2658. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
  2659. return -EOPNOTSUPP;
  2660. cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
  2661. mutex_lock(&priv->mutex);
  2662. iwlagn_disable_roc(priv);
  2663. mutex_unlock(&priv->mutex);
  2664. return 0;
  2665. }
  2666. /*****************************************************************************
  2667. *
  2668. * driver setup and teardown
  2669. *
  2670. *****************************************************************************/
  2671. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  2672. {
  2673. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  2674. init_waitqueue_head(&priv->wait_command_queue);
  2675. INIT_WORK(&priv->restart, iwl_bg_restart);
  2676. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  2677. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  2678. INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
  2679. INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
  2680. INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
  2681. INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
  2682. INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
  2683. iwl_setup_scan_deferred_work(priv);
  2684. if (priv->cfg->ops->lib->setup_deferred_work)
  2685. priv->cfg->ops->lib->setup_deferred_work(priv);
  2686. init_timer(&priv->statistics_periodic);
  2687. priv->statistics_periodic.data = (unsigned long)priv;
  2688. priv->statistics_periodic.function = iwl_bg_statistics_periodic;
  2689. init_timer(&priv->ucode_trace);
  2690. priv->ucode_trace.data = (unsigned long)priv;
  2691. priv->ucode_trace.function = iwl_bg_ucode_trace;
  2692. init_timer(&priv->watchdog);
  2693. priv->watchdog.data = (unsigned long)priv;
  2694. priv->watchdog.function = iwl_bg_watchdog;
  2695. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  2696. iwl_irq_tasklet, (unsigned long)priv);
  2697. }
  2698. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  2699. {
  2700. if (priv->cfg->ops->lib->cancel_deferred_work)
  2701. priv->cfg->ops->lib->cancel_deferred_work(priv);
  2702. cancel_work_sync(&priv->run_time_calib_work);
  2703. cancel_work_sync(&priv->beacon_update);
  2704. iwl_cancel_scan_deferred_work(priv);
  2705. cancel_work_sync(&priv->bt_full_concurrency);
  2706. cancel_work_sync(&priv->bt_runtime_config);
  2707. del_timer_sync(&priv->statistics_periodic);
  2708. del_timer_sync(&priv->ucode_trace);
  2709. }
  2710. static void iwl_init_hw_rates(struct iwl_priv *priv,
  2711. struct ieee80211_rate *rates)
  2712. {
  2713. int i;
  2714. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  2715. rates[i].bitrate = iwl_rates[i].ieee * 5;
  2716. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  2717. rates[i].hw_value_short = i;
  2718. rates[i].flags = 0;
  2719. if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
  2720. /*
  2721. * If CCK != 1M then set short preamble rate flag.
  2722. */
  2723. rates[i].flags |=
  2724. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  2725. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  2726. }
  2727. }
  2728. }
  2729. static int iwl_init_drv(struct iwl_priv *priv)
  2730. {
  2731. int ret;
  2732. spin_lock_init(&priv->sta_lock);
  2733. spin_lock_init(&priv->hcmd_lock);
  2734. mutex_init(&priv->mutex);
  2735. priv->ieee_channels = NULL;
  2736. priv->ieee_rates = NULL;
  2737. priv->band = IEEE80211_BAND_2GHZ;
  2738. priv->iw_mode = NL80211_IFTYPE_STATION;
  2739. priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
  2740. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  2741. priv->_agn.agg_tids_count = 0;
  2742. /* initialize force reset */
  2743. priv->force_reset[IWL_RF_RESET].reset_duration =
  2744. IWL_DELAY_NEXT_FORCE_RF_RESET;
  2745. priv->force_reset[IWL_FW_RESET].reset_duration =
  2746. IWL_DELAY_NEXT_FORCE_FW_RELOAD;
  2747. priv->rx_statistics_jiffies = jiffies;
  2748. /* Choose which receivers/antennas to use */
  2749. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2750. priv->cfg->ops->hcmd->set_rxon_chain(priv,
  2751. &priv->contexts[IWL_RXON_CTX_BSS]);
  2752. iwl_init_scan_params(priv);
  2753. /* init bt coex */
  2754. if (priv->cfg->bt_params &&
  2755. priv->cfg->bt_params->advanced_bt_coexist) {
  2756. priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
  2757. priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
  2758. priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
  2759. priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
  2760. priv->bt_duration = BT_DURATION_LIMIT_DEF;
  2761. priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
  2762. }
  2763. ret = iwl_init_channel_map(priv);
  2764. if (ret) {
  2765. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  2766. goto err;
  2767. }
  2768. ret = iwlcore_init_geos(priv);
  2769. if (ret) {
  2770. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  2771. goto err_free_channel_map;
  2772. }
  2773. iwl_init_hw_rates(priv, priv->ieee_rates);
  2774. return 0;
  2775. err_free_channel_map:
  2776. iwl_free_channel_map(priv);
  2777. err:
  2778. return ret;
  2779. }
  2780. static void iwl_uninit_drv(struct iwl_priv *priv)
  2781. {
  2782. iwl_calib_free_results(priv);
  2783. iwlcore_free_geos(priv);
  2784. iwl_free_channel_map(priv);
  2785. kfree(priv->scan_cmd);
  2786. kfree(priv->beacon_cmd);
  2787. }
  2788. struct ieee80211_ops iwlagn_hw_ops = {
  2789. .tx = iwlagn_mac_tx,
  2790. .start = iwlagn_mac_start,
  2791. .stop = iwlagn_mac_stop,
  2792. .add_interface = iwl_mac_add_interface,
  2793. .remove_interface = iwl_mac_remove_interface,
  2794. .change_interface = iwl_mac_change_interface,
  2795. .config = iwlagn_mac_config,
  2796. .configure_filter = iwlagn_configure_filter,
  2797. .set_key = iwlagn_mac_set_key,
  2798. .update_tkip_key = iwlagn_mac_update_tkip_key,
  2799. .conf_tx = iwl_mac_conf_tx,
  2800. .bss_info_changed = iwlagn_bss_info_changed,
  2801. .ampdu_action = iwlagn_mac_ampdu_action,
  2802. .hw_scan = iwl_mac_hw_scan,
  2803. .sta_notify = iwlagn_mac_sta_notify,
  2804. .sta_add = iwlagn_mac_sta_add,
  2805. .sta_remove = iwl_mac_sta_remove,
  2806. .channel_switch = iwlagn_mac_channel_switch,
  2807. .flush = iwlagn_mac_flush,
  2808. .tx_last_beacon = iwl_mac_tx_last_beacon,
  2809. .remain_on_channel = iwl_mac_remain_on_channel,
  2810. .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
  2811. .offchannel_tx = iwl_mac_offchannel_tx,
  2812. .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
  2813. CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
  2814. CFG80211_TESTMODE_DUMP(iwl_testmode_dump)
  2815. };
  2816. static u32 iwl_hw_detect(struct iwl_priv *priv)
  2817. {
  2818. return iwl_read32(priv, CSR_HW_REV);
  2819. }
  2820. static int iwl_set_hw_params(struct iwl_priv *priv)
  2821. {
  2822. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  2823. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  2824. if (iwlagn_mod_params.amsdu_size_8K)
  2825. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  2826. else
  2827. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  2828. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  2829. if (iwlagn_mod_params.disable_11n)
  2830. priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
  2831. /* Device-specific setup */
  2832. return priv->cfg->ops->lib->set_hw_params(priv);
  2833. }
  2834. static const u8 iwlagn_bss_ac_to_fifo[] = {
  2835. IWL_TX_FIFO_VO,
  2836. IWL_TX_FIFO_VI,
  2837. IWL_TX_FIFO_BE,
  2838. IWL_TX_FIFO_BK,
  2839. };
  2840. static const u8 iwlagn_bss_ac_to_queue[] = {
  2841. 0, 1, 2, 3,
  2842. };
  2843. static const u8 iwlagn_pan_ac_to_fifo[] = {
  2844. IWL_TX_FIFO_VO_IPAN,
  2845. IWL_TX_FIFO_VI_IPAN,
  2846. IWL_TX_FIFO_BE_IPAN,
  2847. IWL_TX_FIFO_BK_IPAN,
  2848. };
  2849. static const u8 iwlagn_pan_ac_to_queue[] = {
  2850. 7, 6, 5, 4,
  2851. };
  2852. /* This function both allocates and initializes hw and priv. */
  2853. static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
  2854. {
  2855. struct iwl_priv *priv;
  2856. /* mac80211 allocates memory for this device instance, including
  2857. * space for this driver's private structure */
  2858. struct ieee80211_hw *hw;
  2859. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
  2860. if (hw == NULL) {
  2861. pr_err("%s: Can not allocate network device\n",
  2862. cfg->name);
  2863. goto out;
  2864. }
  2865. priv = hw->priv;
  2866. priv->hw = hw;
  2867. out:
  2868. return hw;
  2869. }
  2870. static void iwl_init_context(struct iwl_priv *priv)
  2871. {
  2872. int i;
  2873. /*
  2874. * The default context is always valid,
  2875. * more may be discovered when firmware
  2876. * is loaded.
  2877. */
  2878. priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
  2879. for (i = 0; i < NUM_IWL_RXON_CTX; i++)
  2880. priv->contexts[i].ctxid = i;
  2881. priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
  2882. priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
  2883. priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
  2884. priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
  2885. priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
  2886. priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
  2887. priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
  2888. priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
  2889. priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
  2890. priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
  2891. priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
  2892. BIT(NL80211_IFTYPE_ADHOC);
  2893. priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
  2894. BIT(NL80211_IFTYPE_STATION);
  2895. priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
  2896. priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
  2897. priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
  2898. priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
  2899. priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
  2900. priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd =
  2901. REPLY_WIPAN_RXON_TIMING;
  2902. priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd =
  2903. REPLY_WIPAN_RXON_ASSOC;
  2904. priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
  2905. priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
  2906. priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
  2907. priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
  2908. priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
  2909. priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
  2910. priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
  2911. priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
  2912. priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
  2913. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
  2914. #ifdef CONFIG_IWL_P2P
  2915. priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
  2916. BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
  2917. #endif
  2918. priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
  2919. priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
  2920. priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
  2921. BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
  2922. }
  2923. int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
  2924. struct iwl_cfg *cfg)
  2925. {
  2926. int err = 0;
  2927. struct iwl_priv *priv;
  2928. struct ieee80211_hw *hw;
  2929. u16 num_mac;
  2930. u32 hw_rev;
  2931. /************************
  2932. * 1. Allocating HW data
  2933. ************************/
  2934. hw = iwl_alloc_all(cfg);
  2935. if (!hw) {
  2936. err = -ENOMEM;
  2937. goto out;
  2938. }
  2939. priv = hw->priv;
  2940. priv->bus.priv = priv;
  2941. priv->bus.bus_specific = bus_specific;
  2942. priv->bus.ops = bus_ops;
  2943. priv->bus.irq = priv->bus.ops->get_irq(&priv->bus);
  2944. priv->bus.ops->set_drv_data(&priv->bus, priv);
  2945. priv->bus.dev = priv->bus.ops->get_dev(&priv->bus);
  2946. /* At this point both hw and priv are allocated. */
  2947. SET_IEEE80211_DEV(hw, priv->bus.dev);
  2948. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  2949. priv->cfg = cfg;
  2950. priv->inta_mask = CSR_INI_SET_MASK;
  2951. /* is antenna coupling more than 35dB ? */
  2952. priv->bt_ant_couple_ok =
  2953. (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
  2954. true : false;
  2955. /* enable/disable bt channel inhibition */
  2956. priv->bt_ch_announce = iwlagn_bt_ch_announce;
  2957. IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
  2958. (priv->bt_ch_announce) ? "On" : "Off");
  2959. if (iwl_alloc_traffic_mem(priv))
  2960. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  2961. /* these spin locks will be used in apm_ops.init and EEPROM access
  2962. * we should init now
  2963. */
  2964. spin_lock_init(&priv->reg_lock);
  2965. spin_lock_init(&priv->lock);
  2966. /*
  2967. * stop and reset the on-board processor just in case it is in a
  2968. * strange state ... like being left stranded by a primary kernel
  2969. * and this is now the kdump kernel trying to start up
  2970. */
  2971. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2972. /***********************
  2973. * 3. Read REV register
  2974. ***********************/
  2975. hw_rev = iwl_hw_detect(priv);
  2976. IWL_INFO(priv, "Detected %s, REV=0x%X\n",
  2977. priv->cfg->name, hw_rev);
  2978. if (iwl_prepare_card_hw(priv)) {
  2979. err = -EIO;
  2980. IWL_WARN(priv, "Failed, HW not ready\n");
  2981. goto out_free_traffic_mem;
  2982. }
  2983. /*****************
  2984. * 4. Read EEPROM
  2985. *****************/
  2986. /* Read the EEPROM */
  2987. err = iwl_eeprom_init(priv, hw_rev);
  2988. if (err) {
  2989. IWL_ERR(priv, "Unable to init EEPROM\n");
  2990. goto out_free_traffic_mem;
  2991. }
  2992. err = iwl_eeprom_check_version(priv);
  2993. if (err)
  2994. goto out_free_eeprom;
  2995. err = iwl_eeprom_check_sku(priv);
  2996. if (err)
  2997. goto out_free_eeprom;
  2998. /* extract MAC Address */
  2999. iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
  3000. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
  3001. priv->hw->wiphy->addresses = priv->addresses;
  3002. priv->hw->wiphy->n_addresses = 1;
  3003. num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
  3004. if (num_mac > 1) {
  3005. memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
  3006. ETH_ALEN);
  3007. priv->addresses[1].addr[5]++;
  3008. priv->hw->wiphy->n_addresses++;
  3009. }
  3010. /* initialize all valid contexts */
  3011. iwl_init_context(priv);
  3012. /************************
  3013. * 5. Setup HW constants
  3014. ************************/
  3015. if (iwl_set_hw_params(priv)) {
  3016. err = -ENOENT;
  3017. IWL_ERR(priv, "failed to set hw parameters\n");
  3018. goto out_free_eeprom;
  3019. }
  3020. /*******************
  3021. * 6. Setup priv
  3022. *******************/
  3023. err = iwl_init_drv(priv);
  3024. if (err)
  3025. goto out_free_eeprom;
  3026. /* At this point both hw and priv are initialized. */
  3027. /********************
  3028. * 7. Setup services
  3029. ********************/
  3030. iwl_alloc_isr_ict(priv);
  3031. err = request_irq(priv->bus.irq, iwl_isr_ict, IRQF_SHARED,
  3032. DRV_NAME, priv);
  3033. if (err) {
  3034. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->bus.irq);
  3035. goto out_uninit_drv;
  3036. }
  3037. iwl_setup_deferred_work(priv);
  3038. iwl_setup_rx_handlers(priv);
  3039. iwl_testmode_init(priv);
  3040. /*********************************************
  3041. * 8. Enable interrupts
  3042. *********************************************/
  3043. iwl_enable_rfkill_int(priv);
  3044. /* If platform's RF_KILL switch is NOT set to KILL */
  3045. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3046. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3047. else
  3048. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3049. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  3050. test_bit(STATUS_RF_KILL_HW, &priv->status));
  3051. iwl_power_initialize(priv);
  3052. iwl_tt_initialize(priv);
  3053. init_completion(&priv->_agn.firmware_loading_complete);
  3054. err = iwl_request_firmware(priv, true);
  3055. if (err)
  3056. goto out_destroy_workqueue;
  3057. return 0;
  3058. out_destroy_workqueue:
  3059. destroy_workqueue(priv->workqueue);
  3060. priv->workqueue = NULL;
  3061. free_irq(priv->bus.irq, priv);
  3062. iwl_free_isr_ict(priv);
  3063. out_uninit_drv:
  3064. iwl_uninit_drv(priv);
  3065. out_free_eeprom:
  3066. iwl_eeprom_free(priv);
  3067. out_free_traffic_mem:
  3068. iwl_free_traffic_mem(priv);
  3069. ieee80211_free_hw(priv->hw);
  3070. out:
  3071. return err;
  3072. }
  3073. void __devexit iwl_remove(struct iwl_priv * priv)
  3074. {
  3075. unsigned long flags;
  3076. wait_for_completion(&priv->_agn.firmware_loading_complete);
  3077. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3078. iwl_dbgfs_unregister(priv);
  3079. sysfs_remove_group(&priv->bus.dev->kobj,
  3080. &iwl_attribute_group);
  3081. /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
  3082. * to be called and iwl_down since we are removing the device
  3083. * we need to set STATUS_EXIT_PENDING bit.
  3084. */
  3085. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3086. iwl_testmode_cleanup(priv);
  3087. iwl_leds_exit(priv);
  3088. if (priv->mac80211_registered) {
  3089. ieee80211_unregister_hw(priv->hw);
  3090. priv->mac80211_registered = 0;
  3091. }
  3092. /* Reset to low power before unloading driver. */
  3093. iwl_apm_stop(priv);
  3094. iwl_tt_exit(priv);
  3095. /* make sure we flush any pending irq or
  3096. * tasklet for the driver
  3097. */
  3098. spin_lock_irqsave(&priv->lock, flags);
  3099. iwl_disable_interrupts(priv);
  3100. spin_unlock_irqrestore(&priv->lock, flags);
  3101. iwl_synchronize_irq(priv);
  3102. iwl_dealloc_ucode(priv);
  3103. if (priv->rxq.bd)
  3104. iwlagn_rx_queue_free(priv, &priv->rxq);
  3105. iwlagn_hw_txq_ctx_free(priv);
  3106. iwl_eeprom_free(priv);
  3107. /*netif_stop_queue(dev); */
  3108. flush_workqueue(priv->workqueue);
  3109. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  3110. * priv->workqueue... so we can't take down the workqueue
  3111. * until now... */
  3112. destroy_workqueue(priv->workqueue);
  3113. priv->workqueue = NULL;
  3114. iwl_free_traffic_mem(priv);
  3115. free_irq(priv->bus.irq, priv);
  3116. priv->bus.ops->set_drv_data(&priv->bus, NULL);
  3117. iwl_uninit_drv(priv);
  3118. iwl_free_isr_ict(priv);
  3119. dev_kfree_skb(priv->beacon_skb);
  3120. ieee80211_free_hw(priv->hw);
  3121. }
  3122. /*****************************************************************************
  3123. *
  3124. * driver and module entry point
  3125. *
  3126. *****************************************************************************/
  3127. static int __init iwl_init(void)
  3128. {
  3129. int ret;
  3130. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3131. pr_info(DRV_COPYRIGHT "\n");
  3132. ret = iwlagn_rate_control_register();
  3133. if (ret) {
  3134. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3135. return ret;
  3136. }
  3137. ret = iwl_pci_register_driver();
  3138. if (ret)
  3139. goto error_register;
  3140. return ret;
  3141. error_register:
  3142. iwlagn_rate_control_unregister();
  3143. return ret;
  3144. }
  3145. static void __exit iwl_exit(void)
  3146. {
  3147. iwl_pci_unregister_driver();
  3148. iwlagn_rate_control_unregister();
  3149. }
  3150. module_exit(iwl_exit);
  3151. module_init(iwl_init);
  3152. #ifdef CONFIG_IWLWIFI_DEBUG
  3153. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3154. MODULE_PARM_DESC(debug, "debug output mask");
  3155. #endif
  3156. module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
  3157. MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
  3158. module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
  3159. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3160. module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
  3161. MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
  3162. module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
  3163. int, S_IRUGO);
  3164. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  3165. module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
  3166. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3167. module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
  3168. S_IRUGO);
  3169. MODULE_PARM_DESC(ucode_alternative,
  3170. "specify ucode alternative to use from ucode file");
  3171. module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
  3172. MODULE_PARM_DESC(antenna_coupling,
  3173. "specify antenna coupling in dB (defualt: 0 dB)");
  3174. module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
  3175. MODULE_PARM_DESC(bt_ch_inhibition,
  3176. "Disable BT channel inhibition (default: enable)");
  3177. module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
  3178. MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
  3179. module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
  3180. MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");
  3181. /*
  3182. * set bt_coex_active to true, uCode will do kill/defer
  3183. * every time the priority line is asserted (BT is sending signals on the
  3184. * priority line in the PCIx).
  3185. * set bt_coex_active to false, uCode will ignore the BT activity and
  3186. * perform the normal operation
  3187. *
  3188. * User might experience transmit issue on some platform due to WiFi/BT
  3189. * co-exist problem. The possible behaviors are:
  3190. * Able to scan and finding all the available AP
  3191. * Not able to associate with any AP
  3192. * On those platforms, WiFi communication can be restored by set
  3193. * "bt_coex_active" module parameter to "false"
  3194. *
  3195. * default: bt_coex_active = true (BT_COEX_ENABLE)
  3196. */
  3197. module_param_named(bt_coex_active, iwlagn_mod_params.bt_coex_active,
  3198. bool, S_IRUGO);
  3199. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)");
  3200. module_param_named(led_mode, iwlagn_mod_params.led_mode, int, S_IRUGO);
  3201. MODULE_PARM_DESC(led_mode, "0=system default, "
  3202. "1=On(RF On)/Off(RF Off), 2=blinking (default: 0)");
  3203. module_param_named(power_save, iwlagn_mod_params.power_save,
  3204. bool, S_IRUGO);
  3205. MODULE_PARM_DESC(power_save,
  3206. "enable WiFi power management (default: disable)");
  3207. module_param_named(power_level, iwlagn_mod_params.power_level,
  3208. int, S_IRUGO);
  3209. MODULE_PARM_DESC(power_level,
  3210. "default power save level (range from 1 - 5, default: 1)");
  3211. /*
  3212. * For now, keep using power level 1 instead of automatically
  3213. * adjusting ...
  3214. */
  3215. module_param_named(no_sleep_autoadjust, iwlagn_mod_params.no_sleep_autoadjust,
  3216. bool, S_IRUGO);
  3217. MODULE_PARM_DESC(no_sleep_autoadjust,
  3218. "don't automatically adjust sleep level "
  3219. "according to maximum network latency (default: true)");