prep_setup.c 28 KB

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  1. /*
  2. * arch/ppc/platforms/setup.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. *
  8. * Support for PReP (Motorola MTX/MVME)
  9. * by Troy Benjegerdes (hozer@drgw.net)
  10. */
  11. /*
  12. * bootup setup stuff..
  13. */
  14. #include <linux/config.h>
  15. #include <linux/delay.h>
  16. #include <linux/module.h>
  17. #include <linux/errno.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/mm.h>
  21. #include <linux/stddef.h>
  22. #include <linux/unistd.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/a.out.h>
  27. #include <linux/tty.h>
  28. #include <linux/major.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/reboot.h>
  31. #include <linux/init.h>
  32. #include <linux/initrd.h>
  33. #include <linux/ioport.h>
  34. #include <linux/console.h>
  35. #include <linux/timex.h>
  36. #include <linux/pci.h>
  37. #include <linux/ide.h>
  38. #include <linux/seq_file.h>
  39. #include <linux/root_dev.h>
  40. #include <asm/sections.h>
  41. #include <asm/mmu.h>
  42. #include <asm/processor.h>
  43. #include <asm/residual.h>
  44. #include <asm/io.h>
  45. #include <asm/pgtable.h>
  46. #include <asm/cache.h>
  47. #include <asm/dma.h>
  48. #include <asm/machdep.h>
  49. #include <asm/mc146818rtc.h>
  50. #include <asm/mk48t59.h>
  51. #include <asm/prep_nvram.h>
  52. #include <asm/raven.h>
  53. #include <asm/vga.h>
  54. #include <asm/time.h>
  55. #include <asm/mpc10x.h>
  56. #include <asm/i8259.h>
  57. #include <asm/open_pic.h>
  58. #include <asm/pci-bridge.h>
  59. #include <asm/todc.h>
  60. TODC_ALLOC();
  61. unsigned char ucSystemType;
  62. unsigned char ucBoardRev;
  63. unsigned char ucBoardRevMaj, ucBoardRevMin;
  64. extern unsigned char prep_nvram_read_val(int addr);
  65. extern void prep_nvram_write_val(int addr,
  66. unsigned char val);
  67. extern unsigned char rs_nvram_read_val(int addr);
  68. extern void rs_nvram_write_val(int addr,
  69. unsigned char val);
  70. extern void ibm_prep_init(void);
  71. extern void prep_find_bridges(void);
  72. int _prep_type;
  73. extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  74. extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  75. extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  76. extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  77. extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  78. #define cached_21 (((char *)(ppc_cached_irq_mask))[3])
  79. #define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
  80. #ifdef CONFIG_SOUND_CS4232
  81. long ppc_cs4232_dma, ppc_cs4232_dma2;
  82. #endif
  83. extern PTE *Hash, *Hash_end;
  84. extern unsigned long Hash_size, Hash_mask;
  85. extern int probingmem;
  86. extern unsigned long loops_per_jiffy;
  87. #ifdef CONFIG_SOUND_CS4232
  88. EXPORT_SYMBOL(ppc_cs4232_dma);
  89. EXPORT_SYMBOL(ppc_cs4232_dma2);
  90. #endif
  91. /* useful ISA ports */
  92. #define PREP_SYSCTL 0x81c
  93. /* present in the IBM reference design; possibly identical in Mot boxes: */
  94. #define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
  95. #define PREP_IBM_SIMM_PRESENCE 0x804
  96. #define PREP_IBM_EQUIPMENT 0x80c
  97. #define PREP_IBM_L2INFO 0x80d
  98. #define PREP_IBM_PM1 0x82a /* power management register 1 */
  99. #define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
  100. #define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
  101. /* Equipment Present Register masks: */
  102. #define PREP_IBM_EQUIPMENT_RESERVED 0x80
  103. #define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
  104. #define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
  105. #define PREP_IBM_EQUIPMENT_L2_256 0x04
  106. #define PREP_IBM_EQUIPMENT_CPU 0x02
  107. #define PREP_IBM_EQUIPMENT_L2 0x01
  108. /* planar ID values: */
  109. /* Sandalfoot/Sandalbow (6015/7020) */
  110. #define PREP_IBM_SANDALFOOT 0xfc
  111. /* Woodfield, Thinkpad 850/860 (6042/7249) */
  112. #define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
  113. /* PowerSeries 830/850 (6050/6070) */
  114. #define PREP_IBM_CAROLINA_IDE_0 0xf0
  115. #define PREP_IBM_CAROLINA_IDE_1 0xf1
  116. #define PREP_IBM_CAROLINA_IDE_2 0xf2
  117. #define PREP_IBM_CAROLINA_IDE_3 0xf3
  118. /* 7248-43P */
  119. #define PREP_IBM_CAROLINA_SCSI_0 0xf4
  120. #define PREP_IBM_CAROLINA_SCSI_1 0xf5
  121. #define PREP_IBM_CAROLINA_SCSI_2 0xf6
  122. #define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
  123. /* Tiger1 (7043-140) */
  124. #define PREP_IBM_TIGER1_133 0xd1
  125. #define PREP_IBM_TIGER1_166 0xd2
  126. #define PREP_IBM_TIGER1_180 0xd3
  127. #define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
  128. #define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
  129. /* setup_ibm_pci:
  130. * set Motherboard_map_name, Motherboard_map, Motherboard_routes.
  131. * return 8259 edge/level masks.
  132. */
  133. void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
  134. extern char *Motherboard_map_name; /* for use in *_cpuinfo */
  135. /*
  136. * As found in the PReP reference implementation.
  137. * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
  138. */
  139. static void __init
  140. prep_gen_enable_l2(void)
  141. {
  142. outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
  143. }
  144. /* Used by Carolina and Tiger1 */
  145. static void __init
  146. prep_carolina_enable_l2(void)
  147. {
  148. outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
  149. }
  150. /* cpuinfo code common to all IBM PReP */
  151. static void
  152. prep_ibm_cpuinfo(struct seq_file *m)
  153. {
  154. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  155. seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
  156. seq_printf(m, "upgrade cpu\t: ");
  157. if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
  158. seq_printf(m, "not ");
  159. }
  160. seq_printf(m, "present\n");
  161. /* print info about the SCSI fuse */
  162. seq_printf(m, "scsi fuse\t: ");
  163. if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
  164. seq_printf(m, "ok");
  165. else
  166. seq_printf(m, "bad");
  167. seq_printf(m, "\n");
  168. /* print info about SIMMs */
  169. if (have_residual_data) {
  170. int i;
  171. seq_printf(m, "simms\t\t: ");
  172. for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
  173. if (res->Memories[i].SIMMSize != 0)
  174. seq_printf(m, "%d:%ldMiB ", i,
  175. (res->Memories[i].SIMMSize > 1024) ?
  176. res->Memories[i].SIMMSize>>20 :
  177. res->Memories[i].SIMMSize);
  178. }
  179. seq_printf(m, "\n");
  180. }
  181. }
  182. static int
  183. prep_gen_cpuinfo(struct seq_file *m)
  184. {
  185. prep_ibm_cpuinfo(m);
  186. return 0;
  187. }
  188. static int
  189. prep_sandalfoot_cpuinfo(struct seq_file *m)
  190. {
  191. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  192. prep_ibm_cpuinfo(m);
  193. /* report amount and type of L2 cache present */
  194. seq_printf(m, "L2 cache\t: ");
  195. if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
  196. seq_printf(m, "not present");
  197. } else {
  198. if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
  199. seq_printf(m, "256KiB");
  200. else
  201. seq_printf(m, "unknown size");
  202. if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
  203. seq_printf(m, ", copy-back");
  204. else
  205. seq_printf(m, ", write-through");
  206. }
  207. seq_printf(m, "\n");
  208. return 0;
  209. }
  210. static int
  211. prep_thinkpad_cpuinfo(struct seq_file *m)
  212. {
  213. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  214. char *cpubus_speed, *pci_speed;
  215. prep_ibm_cpuinfo(m);
  216. /* report amount and type of L2 cache present */
  217. seq_printf(m, "l2 cache\t: ");
  218. if ((equip_reg & 0x1) == 0) {
  219. switch ((equip_reg & 0xc) >> 2) {
  220. case 0x0:
  221. seq_printf(m, "128KiB look-aside 2-way write-through\n");
  222. break;
  223. case 0x1:
  224. seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
  225. break;
  226. case 0x2:
  227. seq_printf(m, "256KiB look-aside 2-way write-through\n");
  228. break;
  229. case 0x3:
  230. seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
  231. break;
  232. }
  233. } else {
  234. seq_printf(m, "not present\n");
  235. }
  236. /* report bus speeds because we can */
  237. if ((equip_reg & 0x80) == 0) {
  238. switch ((equip_reg & 0x30) >> 4) {
  239. case 0x1:
  240. cpubus_speed = "50";
  241. pci_speed = "25";
  242. break;
  243. case 0x3:
  244. cpubus_speed = "66";
  245. pci_speed = "33";
  246. break;
  247. default:
  248. cpubus_speed = "unknown";
  249. pci_speed = "unknown";
  250. break;
  251. }
  252. } else {
  253. switch ((equip_reg & 0x30) >> 4) {
  254. case 0x1:
  255. cpubus_speed = "25";
  256. pci_speed = "25";
  257. break;
  258. case 0x2:
  259. cpubus_speed = "60";
  260. pci_speed = "30";
  261. break;
  262. case 0x3:
  263. cpubus_speed = "33";
  264. pci_speed = "33";
  265. break;
  266. default:
  267. cpubus_speed = "unknown";
  268. pci_speed = "unknown";
  269. break;
  270. }
  271. }
  272. seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
  273. seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
  274. return 0;
  275. }
  276. static int
  277. prep_carolina_cpuinfo(struct seq_file *m)
  278. {
  279. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  280. prep_ibm_cpuinfo(m);
  281. /* report amount and type of L2 cache present */
  282. seq_printf(m, "l2 cache\t: ");
  283. if ((equip_reg & 0x1) == 0) {
  284. unsigned int l2_reg = inb(PREP_IBM_L2INFO);
  285. /* L2 size */
  286. if ((l2_reg & 0x60) == 0)
  287. seq_printf(m, "256KiB");
  288. else if ((l2_reg & 0x60) == 0x20)
  289. seq_printf(m, "512KiB");
  290. else
  291. seq_printf(m, "unknown size");
  292. /* L2 type */
  293. if ((l2_reg & 0x3) == 0)
  294. seq_printf(m, ", async");
  295. else if ((l2_reg & 0x3) == 1)
  296. seq_printf(m, ", sync");
  297. else
  298. seq_printf(m, ", unknown type");
  299. seq_printf(m, "\n");
  300. } else {
  301. seq_printf(m, "not present\n");
  302. }
  303. return 0;
  304. }
  305. static int
  306. prep_tiger1_cpuinfo(struct seq_file *m)
  307. {
  308. unsigned int l2_reg = inb(PREP_IBM_L2INFO);
  309. prep_ibm_cpuinfo(m);
  310. /* report amount and type of L2 cache present */
  311. seq_printf(m, "l2 cache\t: ");
  312. if ((l2_reg & 0xf) == 0xf) {
  313. seq_printf(m, "not present\n");
  314. } else {
  315. if (l2_reg & 0x8)
  316. seq_printf(m, "async, ");
  317. else
  318. seq_printf(m, "sync burst, ");
  319. if (l2_reg & 0x4)
  320. seq_printf(m, "parity, ");
  321. else
  322. seq_printf(m, "no parity, ");
  323. switch (l2_reg & 0x3) {
  324. case 0x0:
  325. seq_printf(m, "256KiB\n");
  326. break;
  327. case 0x1:
  328. seq_printf(m, "512KiB\n");
  329. break;
  330. case 0x2:
  331. seq_printf(m, "1MiB\n");
  332. break;
  333. default:
  334. seq_printf(m, "unknown size\n");
  335. break;
  336. }
  337. }
  338. return 0;
  339. }
  340. /* Used by all Motorola PReP */
  341. static int
  342. prep_mot_cpuinfo(struct seq_file *m)
  343. {
  344. unsigned int cachew = *((unsigned char *)CACHECRBA);
  345. seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
  346. /* report amount and type of L2 cache present */
  347. seq_printf(m, "l2 cache\t: ");
  348. switch (cachew & L2CACHE_MASK) {
  349. case L2CACHE_512KB:
  350. seq_printf(m, "512KiB");
  351. break;
  352. case L2CACHE_256KB:
  353. seq_printf(m, "256KiB");
  354. break;
  355. case L2CACHE_1MB:
  356. seq_printf(m, "1MiB");
  357. break;
  358. case L2CACHE_NONE:
  359. seq_printf(m, "none\n");
  360. goto no_l2;
  361. break;
  362. default:
  363. seq_printf(m, "%x\n", cachew);
  364. }
  365. seq_printf(m, ", parity %s",
  366. (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
  367. seq_printf(m, " SRAM:");
  368. switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
  369. case 1: seq_printf(m, "synchronous, parity, flow-through\n");
  370. break;
  371. case 2: seq_printf(m, "asynchronous, no parity\n");
  372. break;
  373. case 3: seq_printf(m, "asynchronous, parity\n");
  374. break;
  375. default:seq_printf(m, "synchronous, pipelined, no parity\n");
  376. break;
  377. }
  378. no_l2:
  379. /* print info about SIMMs */
  380. if (have_residual_data) {
  381. int i;
  382. seq_printf(m, "simms\t\t: ");
  383. for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
  384. if (res->Memories[i].SIMMSize != 0)
  385. seq_printf(m, "%d:%ldM ", i,
  386. (res->Memories[i].SIMMSize > 1024) ?
  387. res->Memories[i].SIMMSize>>20 :
  388. res->Memories[i].SIMMSize);
  389. }
  390. seq_printf(m, "\n");
  391. }
  392. return 0;
  393. }
  394. static void
  395. prep_restart(char *cmd)
  396. {
  397. #define PREP_SP92 0x92 /* Special Port 92 */
  398. local_irq_disable(); /* no interrupts */
  399. /* set exception prefix high - to the prom */
  400. _nmask_and_or_msr(0, MSR_IP);
  401. /* make sure bit 0 (reset) is a 0 */
  402. outb( inb(PREP_SP92) & ~1L , PREP_SP92);
  403. /* signal a reset to system control port A - soft reset */
  404. outb( inb(PREP_SP92) | 1 , PREP_SP92);
  405. while ( 1 ) ;
  406. /* not reached */
  407. #undef PREP_SP92
  408. }
  409. static void
  410. prep_halt(void)
  411. {
  412. local_irq_disable(); /* no interrupts */
  413. /* set exception prefix high - to the prom */
  414. _nmask_and_or_msr(0, MSR_IP);
  415. while ( 1 ) ;
  416. /* not reached */
  417. }
  418. /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
  419. * known about it, so we can't power down.
  420. */
  421. static void
  422. prep_carrera_poweroff(void)
  423. {
  424. prep_halt();
  425. }
  426. /*
  427. * On most IBM PReP's, power management is handled by a Signetics 87c750
  428. * behind the Utah component on the ISA bus. To access the 750 you must write
  429. * a series of nibbles to port 0x82a (decoded by the Utah). This is described
  430. * somewhat in the IBM Carolina Technical Specification.
  431. * -Hollis
  432. */
  433. static void
  434. utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
  435. {
  436. /*
  437. * byte1: 0 0 0 1 0 d a5 a4
  438. * byte2: 0 0 0 1 a3 a2 a1 a0
  439. *
  440. * d = the bit's value, enabled or disabled
  441. * (a5 a4 a3) = the byte number, minus 20
  442. * (a2 a1 a0) = the bit number
  443. *
  444. * example: set the 5th bit of byte 21 (21.5)
  445. * a5 a4 a3 = 001 (byte 1)
  446. * a2 a1 a0 = 101 (bit 5)
  447. *
  448. * byte1 = 0001 0100 (0x14)
  449. * byte2 = 0001 1101 (0x1d)
  450. */
  451. unsigned char byte1=0x10, byte2=0x10;
  452. /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
  453. bytenum -= 20;
  454. byte1 |= (!!value) << 2; /* set d */
  455. byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
  456. byte2 |= (bytenum & 0x1) << 3; /* set a3 */
  457. byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
  458. outb(byte1, PREP_IBM_PM1); /* first nibble */
  459. mb();
  460. udelay(100); /* important: let controller recover */
  461. outb(byte2, PREP_IBM_PM1); /* second nibble */
  462. mb();
  463. udelay(100); /* important: let controller recover */
  464. }
  465. static void
  466. prep_sig750_poweroff(void)
  467. {
  468. /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
  469. local_irq_disable();
  470. /* set exception prefix high - to the prom */
  471. _nmask_and_or_msr(0, MSR_IP);
  472. utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
  473. while (1) ;
  474. /* not reached */
  475. }
  476. static int
  477. prep_show_percpuinfo(struct seq_file *m, int i)
  478. {
  479. /* PREP's without residual data will give incorrect values here */
  480. seq_printf(m, "clock\t\t: ");
  481. if (have_residual_data)
  482. seq_printf(m, "%ldMHz\n",
  483. (res->VitalProductData.ProcessorHz > 1024) ?
  484. res->VitalProductData.ProcessorHz / 1000000 :
  485. res->VitalProductData.ProcessorHz);
  486. else
  487. seq_printf(m, "???\n");
  488. return 0;
  489. }
  490. #ifdef CONFIG_SOUND_CS4232
  491. static long __init masktoint(unsigned int i)
  492. {
  493. int t = -1;
  494. while (i >> ++t)
  495. ;
  496. return (t-1);
  497. }
  498. /*
  499. * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
  500. * to distinguish sound dma-channels from others. This is because
  501. * blocksize on 16 bit dma-channels 5,6,7 is 128k, but
  502. * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
  503. */
  504. static void __init prep_init_sound(void)
  505. {
  506. PPC_DEVICE *audiodevice = NULL;
  507. /*
  508. * Get the needed resource informations from residual data.
  509. *
  510. */
  511. if (have_residual_data)
  512. audiodevice = residual_find_device(~0, NULL,
  513. MultimediaController, AudioController, -1, 0);
  514. if (audiodevice != NULL) {
  515. PnP_TAG_PACKET *pkt;
  516. pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
  517. S5_Packet, 0);
  518. if (pkt != NULL)
  519. ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
  520. pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
  521. S5_Packet, 1);
  522. if (pkt != NULL)
  523. ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
  524. }
  525. /*
  526. * These are the PReP specs' defaults for the cs4231. We use these
  527. * as fallback incase we don't have residual data.
  528. * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
  529. * will use the other values.
  530. */
  531. if (audiodevice == NULL) {
  532. switch (_prep_type) {
  533. case _PREP_IBM:
  534. ppc_cs4232_dma = 1;
  535. ppc_cs4232_dma2 = -1;
  536. break;
  537. default:
  538. ppc_cs4232_dma = 6;
  539. ppc_cs4232_dma2 = 7;
  540. }
  541. }
  542. /*
  543. * Find a way to push these informations to the cs4232 driver
  544. * Give it out with printk, when not in cmd_line?
  545. * Append it to cmd_line and saved_command_line?
  546. * Format is cs4232=io,irq,dma,dma2
  547. */
  548. }
  549. #endif /* CONFIG_SOUND_CS4232 */
  550. /*
  551. * Fill out screen_info according to the residual data. This allows us to use
  552. * at least vesafb.
  553. */
  554. static void __init
  555. prep_init_vesa(void)
  556. {
  557. #if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
  558. defined(CONFIG_FB_VESA))
  559. PPC_DEVICE *vgadev = NULL;
  560. if (have_residual_data)
  561. vgadev = residual_find_device(~0, NULL, DisplayController,
  562. SVGAController, -1, 0);
  563. if (vgadev != NULL) {
  564. PnP_TAG_PACKET *pkt;
  565. pkt = PnP_find_large_vendor_packet(
  566. (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
  567. 0x04, 0); /* 0x04 = Display Tag */
  568. if (pkt != NULL) {
  569. unsigned char *ptr = (unsigned char *)pkt;
  570. if (ptr[4]) {
  571. /* graphics mode */
  572. screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
  573. screen_info.lfb_depth = ptr[4] * 8;
  574. screen_info.lfb_width = swab16(*(short *)(ptr+6));
  575. screen_info.lfb_height = swab16(*(short *)(ptr+8));
  576. screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
  577. screen_info.lfb_base = swab32(*(long *)(ptr+12));
  578. screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
  579. }
  580. }
  581. }
  582. #endif
  583. }
  584. /*
  585. * Set DBAT 2 to access 0x80000000 so early progress messages will work
  586. */
  587. static __inline__ void
  588. prep_set_bat(void)
  589. {
  590. /* wait for all outstanding memory access to complete */
  591. mb();
  592. /* setup DBATs */
  593. mtspr(SPRN_DBAT2U, 0x80001ffe);
  594. mtspr(SPRN_DBAT2L, 0x8000002a);
  595. /* wait for updates */
  596. mb();
  597. }
  598. /*
  599. * IBM 3-digit status LED
  600. */
  601. static unsigned int ibm_statusled_base;
  602. static void
  603. ibm_statusled_progress(char *s, unsigned short hex);
  604. static int
  605. ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
  606. void * dummy3)
  607. {
  608. ibm_statusled_progress(NULL, 0x505); /* SOS */
  609. return NOTIFY_DONE;
  610. }
  611. static struct notifier_block ibm_statusled_block = {
  612. ibm_statusled_panic,
  613. NULL,
  614. INT_MAX /* try to do it first */
  615. };
  616. static void
  617. ibm_statusled_progress(char *s, unsigned short hex)
  618. {
  619. static int notifier_installed;
  620. /*
  621. * Progress uses 4 digits and we have only 3. So, we map 0xffff to
  622. * 0xfff for display switch off. Out of range values are mapped to
  623. * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
  624. * Install the panic notifier when the display is first switched off.
  625. */
  626. if (hex == 0xffff) {
  627. hex = 0xfff;
  628. if (!notifier_installed) {
  629. ++notifier_installed;
  630. notifier_chain_register(&panic_notifier_list,
  631. &ibm_statusled_block);
  632. }
  633. }
  634. else
  635. if (hex > 0xfff)
  636. hex = 0xeff;
  637. mb();
  638. outw(hex, ibm_statusled_base);
  639. }
  640. static void __init
  641. ibm_statusled_init(void)
  642. {
  643. /*
  644. * The IBM 3-digit LED display is specified in the residual data
  645. * as an operator panel device, type "System Status LED". Find
  646. * that device and determine its address. We validate all the
  647. * other parameters on the off-chance another, similar device
  648. * exists.
  649. */
  650. if (have_residual_data) {
  651. PPC_DEVICE *led;
  652. PnP_TAG_PACKET *pkt;
  653. led = residual_find_device(~0, NULL, SystemPeripheral,
  654. OperatorPanel, SystemStatusLED, 0);
  655. if (!led)
  656. return;
  657. pkt = PnP_find_packet((unsigned char *)
  658. &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
  659. if (!pkt)
  660. return;
  661. if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
  662. return;
  663. if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
  664. *(unsigned short *)pkt->S8_Pack.RangeMax)
  665. return;
  666. if (pkt->S8_Pack.IOAlign != 2)
  667. return;
  668. if (pkt->S8_Pack.IONum != 2)
  669. return;
  670. ibm_statusled_base = ld_le16((unsigned short *)
  671. (pkt->S8_Pack.RangeMin));
  672. ppc_md.progress = ibm_statusled_progress;
  673. }
  674. }
  675. static void __init
  676. prep_setup_arch(void)
  677. {
  678. unsigned char reg;
  679. int is_ide=0;
  680. /* init to some ~sane value until calibrate_delay() runs */
  681. loops_per_jiffy = 50000000;
  682. /* Lookup PCI host bridges */
  683. prep_find_bridges();
  684. /* Set up floppy in PS/2 mode */
  685. outb(0x09, SIO_CONFIG_RA);
  686. reg = inb(SIO_CONFIG_RD);
  687. reg = (reg & 0x3F) | 0x40;
  688. outb(reg, SIO_CONFIG_RD);
  689. outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
  690. switch ( _prep_type )
  691. {
  692. case _PREP_IBM:
  693. reg = inb(PREP_IBM_PLANAR);
  694. printk(KERN_INFO "IBM planar ID: %02x", reg);
  695. switch (reg) {
  696. case PREP_IBM_SANDALFOOT:
  697. prep_gen_enable_l2();
  698. setup_ibm_pci = prep_sandalfoot_setup_pci;
  699. ppc_md.power_off = prep_sig750_poweroff;
  700. ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
  701. break;
  702. case PREP_IBM_THINKPAD:
  703. prep_gen_enable_l2();
  704. setup_ibm_pci = prep_thinkpad_setup_pci;
  705. ppc_md.power_off = prep_carrera_poweroff;
  706. ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
  707. break;
  708. default:
  709. if (have_residual_data) {
  710. prep_gen_enable_l2();
  711. setup_ibm_pci = prep_residual_setup_pci;
  712. ppc_md.power_off = prep_halt;
  713. ppc_md.show_cpuinfo = prep_gen_cpuinfo;
  714. break;
  715. }
  716. else
  717. printk(" - unknown! Assuming Carolina");
  718. /* fall through */
  719. case PREP_IBM_CAROLINA_IDE_0:
  720. case PREP_IBM_CAROLINA_IDE_1:
  721. case PREP_IBM_CAROLINA_IDE_2:
  722. case PREP_IBM_CAROLINA_IDE_3:
  723. is_ide = 1;
  724. case PREP_IBM_CAROLINA_SCSI_0:
  725. case PREP_IBM_CAROLINA_SCSI_1:
  726. case PREP_IBM_CAROLINA_SCSI_2:
  727. case PREP_IBM_CAROLINA_SCSI_3:
  728. prep_carolina_enable_l2();
  729. setup_ibm_pci = prep_carolina_setup_pci;
  730. ppc_md.power_off = prep_sig750_poweroff;
  731. ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
  732. break;
  733. case PREP_IBM_TIGER1_133:
  734. case PREP_IBM_TIGER1_166:
  735. case PREP_IBM_TIGER1_180:
  736. case PREP_IBM_TIGER1_xxx:
  737. case PREP_IBM_TIGER1_333:
  738. prep_carolina_enable_l2();
  739. setup_ibm_pci = prep_tiger1_setup_pci;
  740. ppc_md.power_off = prep_sig750_poweroff;
  741. ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
  742. break;
  743. }
  744. printk("\n");
  745. /* default root device */
  746. if (is_ide)
  747. ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
  748. else
  749. ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
  750. break;
  751. case _PREP_Motorola:
  752. prep_gen_enable_l2();
  753. ppc_md.power_off = prep_halt;
  754. ppc_md.show_cpuinfo = prep_mot_cpuinfo;
  755. #ifdef CONFIG_BLK_DEV_INITRD
  756. if (initrd_start)
  757. ROOT_DEV = Root_RAM0;
  758. else
  759. #endif
  760. #ifdef CONFIG_ROOT_NFS
  761. ROOT_DEV = Root_NFS;
  762. #else
  763. ROOT_DEV = Root_SDA2;
  764. #endif
  765. break;
  766. }
  767. /* Read in NVRAM data */
  768. init_prep_nvram();
  769. /* if no bootargs, look in NVRAM */
  770. if ( cmd_line[0] == '\0' ) {
  771. char *bootargs;
  772. bootargs = prep_nvram_get_var("bootargs");
  773. if (bootargs != NULL) {
  774. strcpy(cmd_line, bootargs);
  775. /* again.. */
  776. strcpy(saved_command_line, cmd_line);
  777. }
  778. }
  779. #ifdef CONFIG_SOUND_CS4232
  780. prep_init_sound();
  781. #endif /* CONFIG_SOUND_CS4232 */
  782. prep_init_vesa();
  783. switch (_prep_type) {
  784. case _PREP_Motorola:
  785. raven_init();
  786. break;
  787. case _PREP_IBM:
  788. ibm_prep_init();
  789. break;
  790. }
  791. #ifdef CONFIG_VGA_CONSOLE
  792. /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
  793. vgacon_remap_base = 0xf0000000;
  794. conswitchp = &vga_con;
  795. #endif
  796. }
  797. /*
  798. * First, see if we can get this information from the residual data.
  799. * This is important on some IBM PReP systems. If we cannot, we let the
  800. * TODC code handle doing this.
  801. */
  802. static void __init
  803. prep_calibrate_decr(void)
  804. {
  805. if (have_residual_data) {
  806. unsigned long freq, divisor = 4;
  807. if ( res->VitalProductData.ProcessorBusHz ) {
  808. freq = res->VitalProductData.ProcessorBusHz;
  809. printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
  810. (freq/divisor)/1000000,
  811. (freq/divisor)%1000000);
  812. tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
  813. tb_ticks_per_jiffy = freq / HZ / divisor;
  814. }
  815. }
  816. else
  817. todc_calibrate_decr();
  818. }
  819. static void __init
  820. prep_init_IRQ(void)
  821. {
  822. int i;
  823. unsigned int pci_viddid, pci_did;
  824. if (OpenPIC_Addr != NULL) {
  825. openpic_init(NUM_8259_INTERRUPTS);
  826. /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
  827. openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
  828. i8259_irq);
  829. }
  830. for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
  831. irq_desc[i].handler = &i8259_pic;
  832. if (have_residual_data) {
  833. i8259_init(residual_isapic_addr());
  834. return;
  835. }
  836. /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
  837. * controller, we poll (as they have a different int-ack address). */
  838. early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
  839. pci_did = (pci_viddid & 0xffff0000) >> 16;
  840. if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
  841. && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
  842. || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
  843. i8259_init(0);
  844. else
  845. /* PCI interrupt ack address given in section 6.1.8 of the
  846. * PReP specification. */
  847. i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR);
  848. }
  849. #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
  850. /*
  851. * IDE stuff.
  852. */
  853. static int
  854. prep_ide_default_irq(unsigned long base)
  855. {
  856. switch (base) {
  857. case 0x1f0: return 13;
  858. case 0x170: return 13;
  859. case 0x1e8: return 11;
  860. case 0x168: return 10;
  861. case 0xfff0: return 14; /* MCP(N)750 ide0 */
  862. case 0xffe0: return 15; /* MCP(N)750 ide1 */
  863. default: return 0;
  864. }
  865. }
  866. static unsigned long
  867. prep_ide_default_io_base(int index)
  868. {
  869. switch (index) {
  870. case 0: return 0x1f0;
  871. case 1: return 0x170;
  872. case 2: return 0x1e8;
  873. case 3: return 0x168;
  874. default:
  875. return 0;
  876. }
  877. }
  878. #endif
  879. #ifdef CONFIG_SMP
  880. /* PReP (MTX) support */
  881. static int __init
  882. smp_prep_probe(void)
  883. {
  884. extern int mot_multi;
  885. if (mot_multi) {
  886. openpic_request_IPIs();
  887. smp_hw_index[1] = 1;
  888. return 2;
  889. }
  890. return 1;
  891. }
  892. static void __init
  893. smp_prep_kick_cpu(int nr)
  894. {
  895. *(unsigned long *)KERNELBASE = nr;
  896. asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
  897. printk("CPU1 released, waiting\n");
  898. }
  899. static void __init
  900. smp_prep_setup_cpu(int cpu_nr)
  901. {
  902. if (OpenPIC_Addr)
  903. do_openpic_setup_cpu();
  904. }
  905. static struct smp_ops_t prep_smp_ops = {
  906. smp_openpic_message_pass,
  907. smp_prep_probe,
  908. smp_prep_kick_cpu,
  909. smp_prep_setup_cpu,
  910. .give_timebase = smp_generic_give_timebase,
  911. .take_timebase = smp_generic_take_timebase,
  912. };
  913. #endif /* CONFIG_SMP */
  914. /*
  915. * Setup the bat mappings we're going to load that cover
  916. * the io areas. RAM was mapped by mapin_ram().
  917. * -- Cort
  918. */
  919. static void __init
  920. prep_map_io(void)
  921. {
  922. io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
  923. io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
  924. }
  925. static int __init
  926. prep_request_io(void)
  927. {
  928. if (_machine == _MACH_prep) {
  929. #ifdef CONFIG_NVRAM
  930. request_region(PREP_NVRAM_AS0, 0x8, "nvram");
  931. #endif
  932. request_region(0x00,0x20,"dma1");
  933. request_region(0x40,0x20,"timer");
  934. request_region(0x80,0x10,"dma page reg");
  935. request_region(0xc0,0x20,"dma2");
  936. }
  937. return 0;
  938. }
  939. device_initcall(prep_request_io);
  940. void __init
  941. prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
  942. unsigned long r6, unsigned long r7)
  943. {
  944. #ifdef CONFIG_PREP_RESIDUAL
  945. /* make a copy of residual data */
  946. if ( r3 ) {
  947. memcpy((void *)res,(void *)(r3+KERNELBASE),
  948. sizeof(RESIDUAL));
  949. }
  950. #endif
  951. isa_io_base = PREP_ISA_IO_BASE;
  952. isa_mem_base = PREP_ISA_MEM_BASE;
  953. pci_dram_offset = PREP_PCI_DRAM_OFFSET;
  954. ISA_DMA_THRESHOLD = 0x00ffffff;
  955. DMA_MODE_READ = 0x44;
  956. DMA_MODE_WRITE = 0x48;
  957. ppc_do_canonicalize_irqs = 1;
  958. /* figure out what kind of prep workstation we are */
  959. if (have_residual_data) {
  960. if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
  961. _prep_type = _PREP_IBM;
  962. else
  963. _prep_type = _PREP_Motorola;
  964. }
  965. else {
  966. /* assume motorola if no residual (netboot?) */
  967. _prep_type = _PREP_Motorola;
  968. }
  969. #ifdef CONFIG_PREP_RESIDUAL
  970. /* Switch off all residual data processing if the user requests it */
  971. if (strstr(cmd_line, "noresidual") != NULL)
  972. res = NULL;
  973. #endif
  974. /* Initialise progress early to get maximum benefit */
  975. prep_set_bat();
  976. ibm_statusled_init();
  977. ppc_md.setup_arch = prep_setup_arch;
  978. ppc_md.show_percpuinfo = prep_show_percpuinfo;
  979. ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
  980. ppc_md.init_IRQ = prep_init_IRQ;
  981. /* this gets changed later on if we have an OpenPIC -- Cort */
  982. ppc_md.get_irq = i8259_irq;
  983. ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
  984. ppc_md.restart = prep_restart;
  985. ppc_md.power_off = NULL; /* set in prep_setup_arch() */
  986. ppc_md.halt = prep_halt;
  987. ppc_md.nvram_read_val = prep_nvram_read_val;
  988. ppc_md.nvram_write_val = prep_nvram_write_val;
  989. ppc_md.time_init = todc_time_init;
  990. if (_prep_type == _PREP_IBM) {
  991. ppc_md.rtc_read_val = todc_mc146818_read_val;
  992. ppc_md.rtc_write_val = todc_mc146818_write_val;
  993. TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
  994. 8);
  995. } else {
  996. TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
  997. PREP_NVRAM_DATA, 8);
  998. }
  999. ppc_md.calibrate_decr = prep_calibrate_decr;
  1000. ppc_md.set_rtc_time = todc_set_rtc_time;
  1001. ppc_md.get_rtc_time = todc_get_rtc_time;
  1002. ppc_md.setup_io_mappings = prep_map_io;
  1003. #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
  1004. ppc_ide_md.default_irq = prep_ide_default_irq;
  1005. ppc_ide_md.default_io_base = prep_ide_default_io_base;
  1006. #endif
  1007. #ifdef CONFIG_SMP
  1008. ppc_md.smp_ops = &prep_smp_ops;
  1009. #endif /* CONFIG_SMP */
  1010. }