pxa25x.c 4.0 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/pxa25x.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code specific to PXA21x/25x/26x variants.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm.h>
  24. #include <asm/hardware.h>
  25. #include <asm/arch/irqs.h>
  26. #include <asm/arch/pxa-regs.h>
  27. #include <asm/arch/pm.h>
  28. #include <asm/arch/dma.h>
  29. #include "generic.h"
  30. /*
  31. * Various clock factors driven by the CCCR register.
  32. */
  33. /* Crystal Frequency to Memory Frequency Multiplier (L) */
  34. static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
  35. /* Memory Frequency to Run Mode Frequency Multiplier (M) */
  36. static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
  37. /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
  38. /* Note: we store the value N * 2 here. */
  39. static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
  40. /* Crystal clock */
  41. #define BASE_CLK 3686400
  42. /*
  43. * Get the clock frequency as reflected by CCCR and the turbo flag.
  44. * We assume these values have been applied via a fcs.
  45. * If info is not 0 we also display the current settings.
  46. */
  47. unsigned int get_clk_frequency_khz(int info)
  48. {
  49. unsigned long cccr, turbo;
  50. unsigned int l, L, m, M, n2, N;
  51. cccr = CCCR;
  52. asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
  53. l = L_clk_mult[(cccr >> 0) & 0x1f];
  54. m = M_clk_mult[(cccr >> 5) & 0x03];
  55. n2 = N2_clk_mult[(cccr >> 7) & 0x07];
  56. L = l * BASE_CLK;
  57. M = m * L;
  58. N = n2 * M / 2;
  59. if(info)
  60. {
  61. L += 5000;
  62. printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
  63. L / 1000000, (L % 1000000) / 10000, l );
  64. M += 5000;
  65. printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
  66. M / 1000000, (M % 1000000) / 10000, m );
  67. N += 5000;
  68. printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
  69. N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
  70. (turbo & 1) ? "" : "in" );
  71. }
  72. return (turbo & 1) ? (N/1000) : (M/1000);
  73. }
  74. EXPORT_SYMBOL(get_clk_frequency_khz);
  75. /*
  76. * Return the current memory clock frequency in units of 10kHz
  77. */
  78. unsigned int get_memclk_frequency_10khz(void)
  79. {
  80. return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
  81. }
  82. EXPORT_SYMBOL(get_memclk_frequency_10khz);
  83. /*
  84. * Return the current LCD clock frequency in units of 10kHz
  85. */
  86. unsigned int get_lcdclk_frequency_10khz(void)
  87. {
  88. return get_memclk_frequency_10khz();
  89. }
  90. EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
  91. #ifdef CONFIG_PM
  92. void pxa_cpu_pm_enter(suspend_state_t state)
  93. {
  94. extern void pxa_cpu_suspend(unsigned int);
  95. extern void pxa_cpu_resume(void);
  96. CKEN = 0;
  97. switch (state) {
  98. case PM_SUSPEND_MEM:
  99. /* set resume return address */
  100. PSPR = virt_to_phys(pxa_cpu_resume);
  101. pxa_cpu_suspend(PWRMODE_SLEEP);
  102. break;
  103. }
  104. }
  105. static struct pm_ops pxa25x_pm_ops = {
  106. .enter = pxa_pm_enter,
  107. .valid = pm_valid_only_mem,
  108. };
  109. #endif
  110. void __init pxa25x_init_irq(void)
  111. {
  112. pxa_init_irq_low();
  113. pxa_init_irq_gpio(85);
  114. }
  115. static struct platform_device *pxa25x_devices[] __initdata = {
  116. &pxamci_device,
  117. &pxaudc_device,
  118. &pxafb_device,
  119. &ffuart_device,
  120. &btuart_device,
  121. &stuart_device,
  122. &pxai2c_device,
  123. &pxai2s_device,
  124. &pxaficp_device,
  125. &pxartc_device,
  126. };
  127. static int __init pxa25x_init(void)
  128. {
  129. int ret = 0;
  130. if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
  131. if ((ret = pxa_init_dma(16)))
  132. return ret;
  133. #ifdef CONFIG_PM
  134. pm_set_ops(&pxa25x_pm_ops);
  135. #endif
  136. ret = platform_add_devices(pxa25x_devices,
  137. ARRAY_SIZE(pxa25x_devices));
  138. }
  139. /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
  140. if (cpu_is_pxa25x())
  141. ret = platform_device_register(&hwuart_device);
  142. return ret;
  143. }
  144. subsys_initcall(pxa25x_init);