exynos5420.dtsi 2.3 KB

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  1. /*
  2. * SAMSUNG EXYNOS5420 SoC device tree source
  3. *
  4. * Copyright (c) 2013 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file.
  8. * EXYNOS5420 based board files can include this file and provide
  9. * values for board specfic bindings.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include "exynos5.dtsi"
  16. / {
  17. compatible = "samsung,exynos5420";
  18. cpus {
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. cpu0: cpu@0 {
  22. device_type = "cpu";
  23. compatible = "arm,cortex-a15";
  24. reg = <0x0>;
  25. clock-frequency = <1800000000>;
  26. };
  27. cpu1: cpu@1 {
  28. device_type = "cpu";
  29. compatible = "arm,cortex-a15";
  30. reg = <0x1>;
  31. clock-frequency = <1800000000>;
  32. };
  33. cpu2: cpu@2 {
  34. device_type = "cpu";
  35. compatible = "arm,cortex-a15";
  36. reg = <0x2>;
  37. clock-frequency = <1800000000>;
  38. };
  39. cpu3: cpu@3 {
  40. device_type = "cpu";
  41. compatible = "arm,cortex-a15";
  42. reg = <0x3>;
  43. clock-frequency = <1800000000>;
  44. };
  45. };
  46. clock: clock-controller@0x10010000 {
  47. compatible = "samsung,exynos5420-clock";
  48. reg = <0x10010000 0x30000>;
  49. #clock-cells = <1>;
  50. };
  51. mct@101C0000 {
  52. compatible = "samsung,exynos4210-mct";
  53. reg = <0x101C0000 0x800>;
  54. interrupt-controller;
  55. #interrups-cells = <1>;
  56. interrupt-parent = <&mct_map>;
  57. interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>;
  58. clocks = <&clock 1>, <&clock 315>;
  59. clock-names = "fin_pll", "mct";
  60. mct_map: mct-map {
  61. #interrupt-cells = <1>;
  62. #address-cells = <0>;
  63. #size-cells = <0>;
  64. interrupt-map = <0 &combiner 23 3>,
  65. <1 &combiner 23 4>,
  66. <2 &combiner 25 2>,
  67. <3 &combiner 25 3>,
  68. <4 &gic 0 120 0>,
  69. <5 &gic 0 121 0>,
  70. <6 &gic 0 122 0>,
  71. <7 &gic 0 123 0>;
  72. };
  73. };
  74. serial@12C00000 {
  75. clocks = <&clock 257>, <&clock 128>;
  76. clock-names = "uart", "clk_uart_baud0";
  77. };
  78. serial@12C10000 {
  79. clocks = <&clock 258>, <&clock 129>;
  80. clock-names = "uart", "clk_uart_baud0";
  81. };
  82. serial@12C20000 {
  83. clocks = <&clock 259>, <&clock 130>;
  84. clock-names = "uart", "clk_uart_baud0";
  85. };
  86. serial@12C30000 {
  87. clocks = <&clock 260>, <&clock 131>;
  88. clock-names = "uart", "clk_uart_baud0";
  89. };
  90. };