pata_ali.c 19 KB

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  1. /*
  2. * pata_ali.c - ALI 15x3 PATA for new ATA layer
  3. * (C) 2005 Red Hat Inc
  4. * Alan Cox <alan@redhat.com>
  5. *
  6. * based in part upon
  7. * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
  8. *
  9. * Copyright (C) 1998-2000 Michel Aubry, Maintainer
  10. * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
  11. * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
  12. *
  13. * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
  14. * May be copied or modified under the terms of the GNU General Public License
  15. * Copyright (C) 2002 Alan Cox <alan@redhat.com>
  16. * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
  17. *
  18. * Documentation
  19. * Chipset documentation available under NDA only
  20. *
  21. * TODO/CHECK
  22. * Cannot have ATAPI on both master & slave for rev < c2 (???) but
  23. * otherwise should do atapi DMA.
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/init.h>
  29. #include <linux/blkdev.h>
  30. #include <linux/delay.h>
  31. #include <scsi/scsi_host.h>
  32. #include <linux/libata.h>
  33. #include <linux/dmi.h>
  34. #define DRV_NAME "pata_ali"
  35. #define DRV_VERSION "0.7.1"
  36. /*
  37. * Cable special cases
  38. */
  39. static struct dmi_system_id cable_dmi_table[] = {
  40. {
  41. .ident = "HP Pavilion N5430",
  42. .matches = {
  43. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  44. DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
  45. },
  46. },
  47. { }
  48. };
  49. static int ali_cable_override(struct pci_dev *pdev)
  50. {
  51. /* Fujitsu P2000 */
  52. if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
  53. return 1;
  54. /* Systems by DMI */
  55. if (dmi_check_system(cable_dmi_table))
  56. return 1;
  57. return 0;
  58. }
  59. /**
  60. * ali_c2_cable_detect - cable detection
  61. * @ap: ATA port
  62. *
  63. * Perform cable detection for C2 and later revisions
  64. */
  65. static int ali_c2_cable_detect(struct ata_port *ap)
  66. {
  67. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  68. u8 ata66;
  69. /* Certain laptops use short but suitable cables and don't
  70. implement the detect logic */
  71. if (ali_cable_override(pdev))
  72. return ATA_CBL_PATA40_SHORT;
  73. /* Host view cable detect 0x4A bit 0 primary bit 1 secondary
  74. Bit set for 40 pin */
  75. pci_read_config_byte(pdev, 0x4A, &ata66);
  76. if (ata66 & (1 << ap->port_no))
  77. return ATA_CBL_PATA40;
  78. else
  79. return ATA_CBL_PATA80;
  80. }
  81. /**
  82. * ali_early_error_handler - reset for eary chip
  83. * @ap: ATA port
  84. *
  85. * Handle the reset callback for the later chips with cable detect
  86. */
  87. static int ali_c2_pre_reset(struct ata_port *ap)
  88. {
  89. ap->cbl = ali_c2_cable_detect(ap);
  90. return ata_std_prereset(ap);
  91. }
  92. static void ali_c2_error_handler(struct ata_port *ap)
  93. {
  94. ata_bmdma_drive_eh(ap, ali_c2_pre_reset,
  95. ata_std_softreset, NULL,
  96. ata_std_postreset);
  97. }
  98. /**
  99. * ali_early_cable_detect - cable detection
  100. * @ap: ATA port
  101. *
  102. * Perform cable detection for older chipsets. This turns out to be
  103. * rather easy to implement
  104. */
  105. static int ali_early_cable_detect(struct ata_port *ap)
  106. {
  107. return ATA_CBL_PATA40;
  108. }
  109. /**
  110. * ali_early_probe_init - reset for early chip
  111. * @ap: ATA port
  112. *
  113. * Handle the reset callback for the early (pre cable detect) chips.
  114. */
  115. static int ali_early_pre_reset(struct ata_port *ap)
  116. {
  117. ap->cbl = ali_early_cable_detect(ap);
  118. return ata_std_prereset(ap);
  119. }
  120. static void ali_early_error_handler(struct ata_port *ap)
  121. {
  122. return ata_bmdma_drive_eh(ap, ali_early_pre_reset,
  123. ata_std_softreset, NULL,
  124. ata_std_postreset);
  125. }
  126. /**
  127. * ali_20_filter - filter for earlier ALI DMA
  128. * @ap: ALi ATA port
  129. * @adev: attached device
  130. *
  131. * Ensure that we do not do DMA on CD devices. We may be able to
  132. * fix that later on. Also ensure we do not do UDMA on WDC drives
  133. */
  134. static unsigned long ali_20_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask)
  135. {
  136. char model_num[40];
  137. /* No DMA on anything but a disk for now */
  138. if (adev->class != ATA_DEV_ATA)
  139. mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  140. ata_id_string(adev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
  141. if (strstr(model_num, "WDC"))
  142. return mask &= ~ATA_MASK_UDMA;
  143. return ata_pci_default_filter(ap, adev, mask);
  144. }
  145. /**
  146. * ali_fifo_control - FIFO manager
  147. * @ap: ALi channel to control
  148. * @adev: device for FIFO control
  149. * @on: 0 for off 1 for on
  150. *
  151. * Enable or disable the FIFO on a given device. Because of the way the
  152. * ALi FIFO works it provides a boost on ATA disk but can be confused by
  153. * ATAPI and we must therefore manage it.
  154. */
  155. static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
  156. {
  157. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  158. int pio_fifo = 0x54 + ap->port_no;
  159. u8 fifo;
  160. int shift = 4 * adev->devno;
  161. /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
  162. 0x00. Not all the docs agree but the behaviour we now use is the
  163. one stated in the BIOS Programming Guide */
  164. pci_read_config_byte(pdev, pio_fifo, &fifo);
  165. fifo &= ~(0x0F << shift);
  166. if (on)
  167. fifo |= (on << shift);
  168. pci_write_config_byte(pdev, pio_fifo, fifo);
  169. }
  170. /**
  171. * ali_program_modes - load mode registers
  172. * @ap: ALi channel to load
  173. * @adev: Device the timing is for
  174. * @cmd: Command timing
  175. * @data: Data timing
  176. * @ultra: UDMA timing or zero for off
  177. *
  178. * Loads the timing registers for cmd/data and disable UDMA if
  179. * ultra is zero. If ultra is set then load and enable the UDMA
  180. * timing but do not touch the command/data timing.
  181. */
  182. static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
  183. {
  184. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  185. int cas = 0x58 + 4 * ap->port_no; /* Command timing */
  186. int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
  187. int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
  188. int udmat = 0x56 + ap->port_no; /* UDMA timing */
  189. int shift = 4 * adev->devno;
  190. u8 udma;
  191. if (t != NULL) {
  192. t->setup = FIT(t->setup, 1, 8) & 7;
  193. t->act8b = FIT(t->act8b, 1, 8) & 7;
  194. t->rec8b = FIT(t->rec8b, 1, 16) & 15;
  195. t->active = FIT(t->active, 1, 8) & 7;
  196. t->recover = FIT(t->recover, 1, 16) & 15;
  197. pci_write_config_byte(pdev, cas, t->setup);
  198. pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
  199. pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
  200. }
  201. /* Set up the UDMA enable */
  202. pci_read_config_byte(pdev, udmat, &udma);
  203. udma &= ~(0x0F << shift);
  204. udma |= ultra << shift;
  205. pci_write_config_byte(pdev, udmat, udma);
  206. }
  207. /**
  208. * ali_set_piomode - set initial PIO mode data
  209. * @ap: ATA interface
  210. * @adev: ATA device
  211. *
  212. * Program the ALi registers for PIO mode. FIXME: add timings for
  213. * PIO5.
  214. */
  215. static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
  216. {
  217. struct ata_device *pair = ata_dev_pair(adev);
  218. struct ata_timing t;
  219. unsigned long T = 1000000000 / 33333; /* PCI clock based */
  220. ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
  221. if (pair) {
  222. struct ata_timing p;
  223. ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
  224. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  225. if (pair->dma_mode) {
  226. ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
  227. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  228. }
  229. }
  230. /* PIO FIFO is only permitted on ATA disk */
  231. if (adev->class != ATA_DEV_ATA)
  232. ali_fifo_control(ap, adev, 0x00);
  233. ali_program_modes(ap, adev, &t, 0);
  234. if (adev->class == ATA_DEV_ATA)
  235. ali_fifo_control(ap, adev, 0x05);
  236. }
  237. /**
  238. * ali_set_dmamode - set initial DMA mode data
  239. * @ap: ATA interface
  240. * @adev: ATA device
  241. *
  242. * FIXME: MWDMA timings
  243. */
  244. static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  245. {
  246. static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
  247. struct ata_device *pair = ata_dev_pair(adev);
  248. struct ata_timing t;
  249. unsigned long T = 1000000000 / 33333; /* PCI clock based */
  250. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  251. if (adev->class == ATA_DEV_ATA)
  252. ali_fifo_control(ap, adev, 0x08);
  253. if (adev->dma_mode >= XFER_UDMA_0) {
  254. ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
  255. if (adev->dma_mode >= XFER_UDMA_3) {
  256. u8 reg4b;
  257. pci_read_config_byte(pdev, 0x4B, &reg4b);
  258. reg4b |= 1;
  259. pci_write_config_byte(pdev, 0x4B, reg4b);
  260. }
  261. } else {
  262. ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
  263. if (pair) {
  264. struct ata_timing p;
  265. ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
  266. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  267. if (pair->dma_mode) {
  268. ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
  269. ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
  270. }
  271. }
  272. ali_program_modes(ap, adev, &t, 0);
  273. }
  274. }
  275. /**
  276. * ali_lock_sectors - Keep older devices to 255 sector mode
  277. * @ap: ATA port
  278. * @adev: Device
  279. *
  280. * Called during the bus probe for each device that is found. We use
  281. * this call to lock the sector count of the device to 255 or less on
  282. * older ALi controllers. If we didn't do this then large I/O's would
  283. * require LBA48 commands which the older ALi requires are issued by
  284. * slower PIO methods
  285. */
  286. static void ali_lock_sectors(struct ata_port *ap, struct ata_device *adev)
  287. {
  288. adev->max_sectors = 255;
  289. }
  290. static struct scsi_host_template ali_sht = {
  291. .module = THIS_MODULE,
  292. .name = DRV_NAME,
  293. .ioctl = ata_scsi_ioctl,
  294. .queuecommand = ata_scsi_queuecmd,
  295. .can_queue = ATA_DEF_QUEUE,
  296. .this_id = ATA_SHT_THIS_ID,
  297. .sg_tablesize = LIBATA_MAX_PRD,
  298. /* Keep LBA28 counts so large I/O's don't turn LBA48 and PIO
  299. with older controllers. Not locked so will grow on C5 or later */
  300. .max_sectors = 255,
  301. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  302. .emulated = ATA_SHT_EMULATED,
  303. .use_clustering = ATA_SHT_USE_CLUSTERING,
  304. .proc_name = DRV_NAME,
  305. .dma_boundary = ATA_DMA_BOUNDARY,
  306. .slave_configure = ata_scsi_slave_config,
  307. .slave_destroy = ata_scsi_slave_destroy,
  308. .bios_param = ata_std_bios_param,
  309. .resume = ata_scsi_device_resume,
  310. .suspend = ata_scsi_device_suspend,
  311. };
  312. /*
  313. * Port operations for PIO only ALi
  314. */
  315. static struct ata_port_operations ali_early_port_ops = {
  316. .port_disable = ata_port_disable,
  317. .set_piomode = ali_set_piomode,
  318. .tf_load = ata_tf_load,
  319. .tf_read = ata_tf_read,
  320. .check_status = ata_check_status,
  321. .exec_command = ata_exec_command,
  322. .dev_select = ata_std_dev_select,
  323. .freeze = ata_bmdma_freeze,
  324. .thaw = ata_bmdma_thaw,
  325. .error_handler = ali_early_error_handler,
  326. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  327. .qc_prep = ata_qc_prep,
  328. .qc_issue = ata_qc_issue_prot,
  329. .data_xfer = ata_pio_data_xfer,
  330. .irq_handler = ata_interrupt,
  331. .irq_clear = ata_bmdma_irq_clear,
  332. .port_start = ata_port_start,
  333. .port_stop = ata_port_stop,
  334. .host_stop = ata_host_stop
  335. };
  336. /*
  337. * Port operations for DMA capable ALi without cable
  338. * detect
  339. */
  340. static struct ata_port_operations ali_20_port_ops = {
  341. .port_disable = ata_port_disable,
  342. .set_piomode = ali_set_piomode,
  343. .set_dmamode = ali_set_dmamode,
  344. .mode_filter = ali_20_filter,
  345. .tf_load = ata_tf_load,
  346. .tf_read = ata_tf_read,
  347. .check_status = ata_check_status,
  348. .exec_command = ata_exec_command,
  349. .dev_select = ata_std_dev_select,
  350. .dev_config = ali_lock_sectors,
  351. .freeze = ata_bmdma_freeze,
  352. .thaw = ata_bmdma_thaw,
  353. .error_handler = ali_early_error_handler,
  354. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  355. .bmdma_setup = ata_bmdma_setup,
  356. .bmdma_start = ata_bmdma_start,
  357. .bmdma_stop = ata_bmdma_stop,
  358. .bmdma_status = ata_bmdma_status,
  359. .qc_prep = ata_qc_prep,
  360. .qc_issue = ata_qc_issue_prot,
  361. .data_xfer = ata_pio_data_xfer,
  362. .irq_handler = ata_interrupt,
  363. .irq_clear = ata_bmdma_irq_clear,
  364. .port_start = ata_port_start,
  365. .port_stop = ata_port_stop,
  366. .host_stop = ata_host_stop
  367. };
  368. /*
  369. * Port operations for DMA capable ALi with cable detect
  370. */
  371. static struct ata_port_operations ali_c2_port_ops = {
  372. .port_disable = ata_port_disable,
  373. .set_piomode = ali_set_piomode,
  374. .set_dmamode = ali_set_dmamode,
  375. .mode_filter = ata_pci_default_filter,
  376. .tf_load = ata_tf_load,
  377. .tf_read = ata_tf_read,
  378. .check_status = ata_check_status,
  379. .exec_command = ata_exec_command,
  380. .dev_select = ata_std_dev_select,
  381. .dev_config = ali_lock_sectors,
  382. .freeze = ata_bmdma_freeze,
  383. .thaw = ata_bmdma_thaw,
  384. .error_handler = ali_c2_error_handler,
  385. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  386. .bmdma_setup = ata_bmdma_setup,
  387. .bmdma_start = ata_bmdma_start,
  388. .bmdma_stop = ata_bmdma_stop,
  389. .bmdma_status = ata_bmdma_status,
  390. .qc_prep = ata_qc_prep,
  391. .qc_issue = ata_qc_issue_prot,
  392. .data_xfer = ata_pio_data_xfer,
  393. .irq_handler = ata_interrupt,
  394. .irq_clear = ata_bmdma_irq_clear,
  395. .port_start = ata_port_start,
  396. .port_stop = ata_port_stop,
  397. .host_stop = ata_host_stop
  398. };
  399. /*
  400. * Port operations for DMA capable ALi with cable detect and LBA48
  401. */
  402. static struct ata_port_operations ali_c5_port_ops = {
  403. .port_disable = ata_port_disable,
  404. .set_piomode = ali_set_piomode,
  405. .set_dmamode = ali_set_dmamode,
  406. .mode_filter = ata_pci_default_filter,
  407. .tf_load = ata_tf_load,
  408. .tf_read = ata_tf_read,
  409. .check_status = ata_check_status,
  410. .exec_command = ata_exec_command,
  411. .dev_select = ata_std_dev_select,
  412. .freeze = ata_bmdma_freeze,
  413. .thaw = ata_bmdma_thaw,
  414. .error_handler = ali_c2_error_handler,
  415. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  416. .bmdma_setup = ata_bmdma_setup,
  417. .bmdma_start = ata_bmdma_start,
  418. .bmdma_stop = ata_bmdma_stop,
  419. .bmdma_status = ata_bmdma_status,
  420. .qc_prep = ata_qc_prep,
  421. .qc_issue = ata_qc_issue_prot,
  422. .data_xfer = ata_pio_data_xfer,
  423. .irq_handler = ata_interrupt,
  424. .irq_clear = ata_bmdma_irq_clear,
  425. .port_start = ata_port_start,
  426. .port_stop = ata_port_stop,
  427. .host_stop = ata_host_stop
  428. };
  429. /**
  430. * ali_init_chipset - chip setup function
  431. * @pdev: PCI device of ATA controller
  432. *
  433. * Perform the setup on the device that must be done both at boot
  434. * and at resume time.
  435. */
  436. static void ali_init_chipset(struct pci_dev *pdev)
  437. {
  438. u8 rev, tmp;
  439. struct pci_dev *north, *isa_bridge;
  440. pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  441. /*
  442. * The chipset revision selects the driver operations and
  443. * mode data.
  444. */
  445. if (rev >= 0x20 && rev < 0xC2) {
  446. /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
  447. pci_read_config_byte(pdev, 0x4B, &tmp);
  448. /* Clear CD-ROM DMA write bit */
  449. tmp &= 0x7F;
  450. pci_write_config_byte(pdev, 0x4B, tmp);
  451. } else if (rev >= 0xC2) {
  452. /* Enable cable detection logic */
  453. pci_read_config_byte(pdev, 0x4B, &tmp);
  454. pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
  455. }
  456. north = pci_get_slot(pdev->bus, PCI_DEVFN(0,0));
  457. isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
  458. if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
  459. /* Configure the ALi bridge logic. For non ALi rely on BIOS.
  460. Set the south bridge enable bit */
  461. pci_read_config_byte(isa_bridge, 0x79, &tmp);
  462. if (rev == 0xC2)
  463. pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
  464. else if (rev > 0xC2)
  465. pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
  466. }
  467. if (rev >= 0x20) {
  468. /*
  469. * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
  470. * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
  471. * via 0x54/55.
  472. */
  473. pci_read_config_byte(pdev, 0x53, &tmp);
  474. if (rev <= 0x20)
  475. tmp &= ~0x02;
  476. if (rev >= 0xc7)
  477. tmp |= 0x03;
  478. else
  479. tmp |= 0x01; /* CD_ROM enable for DMA */
  480. pci_write_config_byte(pdev, 0x53, tmp);
  481. }
  482. pci_dev_put(isa_bridge);
  483. pci_dev_put(north);
  484. ata_pci_clear_simplex(pdev);
  485. }
  486. /**
  487. * ali_init_one - discovery callback
  488. * @pdev: PCI device ID
  489. * @id: PCI table info
  490. *
  491. * An ALi IDE interface has been discovered. Figure out what revision
  492. * and perform configuration work before handing it to the ATA layer
  493. */
  494. static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
  495. {
  496. static struct ata_port_info info_early = {
  497. .sht = &ali_sht,
  498. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  499. .pio_mask = 0x1f,
  500. .port_ops = &ali_early_port_ops
  501. };
  502. /* Revision 0x20 added DMA */
  503. static struct ata_port_info info_20 = {
  504. .sht = &ali_sht,
  505. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
  506. .pio_mask = 0x1f,
  507. .mwdma_mask = 0x07,
  508. .port_ops = &ali_20_port_ops
  509. };
  510. /* Revision 0x20 with support logic added UDMA */
  511. static struct ata_port_info info_20_udma = {
  512. .sht = &ali_sht,
  513. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
  514. .pio_mask = 0x1f,
  515. .mwdma_mask = 0x07,
  516. .udma_mask = 0x07, /* UDMA33 */
  517. .port_ops = &ali_20_port_ops
  518. };
  519. /* Revision 0xC2 adds UDMA66 */
  520. static struct ata_port_info info_c2 = {
  521. .sht = &ali_sht,
  522. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
  523. .pio_mask = 0x1f,
  524. .mwdma_mask = 0x07,
  525. .udma_mask = 0x1f,
  526. .port_ops = &ali_c2_port_ops
  527. };
  528. /* Revision 0xC3 is UDMA100 */
  529. static struct ata_port_info info_c3 = {
  530. .sht = &ali_sht,
  531. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
  532. .pio_mask = 0x1f,
  533. .mwdma_mask = 0x07,
  534. .udma_mask = 0x3f,
  535. .port_ops = &ali_c2_port_ops
  536. };
  537. /* Revision 0xC4 is UDMA133 */
  538. static struct ata_port_info info_c4 = {
  539. .sht = &ali_sht,
  540. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
  541. .pio_mask = 0x1f,
  542. .mwdma_mask = 0x07,
  543. .udma_mask = 0x7f,
  544. .port_ops = &ali_c2_port_ops
  545. };
  546. /* Revision 0xC5 is UDMA133 with LBA48 DMA */
  547. static struct ata_port_info info_c5 = {
  548. .sht = &ali_sht,
  549. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  550. .pio_mask = 0x1f,
  551. .mwdma_mask = 0x07,
  552. .udma_mask = 0x7f,
  553. .port_ops = &ali_c5_port_ops
  554. };
  555. static struct ata_port_info *port_info[2];
  556. u8 rev, tmp;
  557. struct pci_dev *isa_bridge;
  558. pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
  559. /*
  560. * The chipset revision selects the driver operations and
  561. * mode data.
  562. */
  563. if (rev < 0x20) {
  564. port_info[0] = port_info[1] = &info_early;
  565. } else if (rev < 0xC2) {
  566. port_info[0] = port_info[1] = &info_20;
  567. } else if (rev == 0xC2) {
  568. port_info[0] = port_info[1] = &info_c2;
  569. } else if (rev == 0xC3) {
  570. port_info[0] = port_info[1] = &info_c3;
  571. } else if (rev == 0xC4) {
  572. port_info[0] = port_info[1] = &info_c4;
  573. } else
  574. port_info[0] = port_info[1] = &info_c5;
  575. ali_init_chipset(pdev);
  576. isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
  577. if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
  578. /* Are we paired with a UDMA capable chip */
  579. pci_read_config_byte(isa_bridge, 0x5E, &tmp);
  580. if ((tmp & 0x1E) == 0x12)
  581. port_info[0] = port_info[1] = &info_20_udma;
  582. pci_dev_put(isa_bridge);
  583. }
  584. return ata_pci_init_one(pdev, port_info, 2);
  585. }
  586. static int ali_reinit_one(struct pci_dev *pdev)
  587. {
  588. ali_init_chipset(pdev);
  589. return ata_pci_device_resume(pdev);
  590. }
  591. static const struct pci_device_id ali[] = {
  592. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
  593. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
  594. { },
  595. };
  596. static struct pci_driver ali_pci_driver = {
  597. .name = DRV_NAME,
  598. .id_table = ali,
  599. .probe = ali_init_one,
  600. .remove = ata_pci_remove_one,
  601. .suspend = ata_pci_device_suspend,
  602. .resume = ali_reinit_one,
  603. };
  604. static int __init ali_init(void)
  605. {
  606. return pci_register_driver(&ali_pci_driver);
  607. }
  608. static void __exit ali_exit(void)
  609. {
  610. pci_unregister_driver(&ali_pci_driver);
  611. }
  612. MODULE_AUTHOR("Alan Cox");
  613. MODULE_DESCRIPTION("low-level driver for ALi PATA");
  614. MODULE_LICENSE("GPL");
  615. MODULE_DEVICE_TABLE(pci, ali);
  616. MODULE_VERSION(DRV_VERSION);
  617. module_init(ali_init);
  618. module_exit(ali_exit);