wm8960.c 29 KB

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  1. /*
  2. * wm8960.c -- WM8960 ALSA SoC Audio driver
  3. *
  4. * Author: Liam Girdwood
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/init.h>
  13. #include <linux/delay.h>
  14. #include <linux/pm.h>
  15. #include <linux/i2c.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <sound/initval.h>
  23. #include <sound/tlv.h>
  24. #include <sound/wm8960.h>
  25. #include "wm8960.h"
  26. #define AUDIO_NAME "wm8960"
  27. /* R25 - Power 1 */
  28. #define WM8960_VMID_MASK 0x180
  29. #define WM8960_VREF 0x40
  30. /* R26 - Power 2 */
  31. #define WM8960_PWR2_LOUT1 0x40
  32. #define WM8960_PWR2_ROUT1 0x20
  33. #define WM8960_PWR2_OUT3 0x02
  34. /* R28 - Anti-pop 1 */
  35. #define WM8960_POBCTRL 0x80
  36. #define WM8960_BUFDCOPEN 0x10
  37. #define WM8960_BUFIOEN 0x08
  38. #define WM8960_SOFT_ST 0x04
  39. #define WM8960_HPSTBY 0x01
  40. /* R29 - Anti-pop 2 */
  41. #define WM8960_DISOP 0x40
  42. #define WM8960_DRES_MASK 0x30
  43. /*
  44. * wm8960 register cache
  45. * We can't read the WM8960 register space when we are
  46. * using 2 wire for device control, so we cache them instead.
  47. */
  48. static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
  49. 0x0097, 0x0097, 0x0000, 0x0000,
  50. 0x0000, 0x0008, 0x0000, 0x000a,
  51. 0x01c0, 0x0000, 0x00ff, 0x00ff,
  52. 0x0000, 0x0000, 0x0000, 0x0000,
  53. 0x0000, 0x007b, 0x0100, 0x0032,
  54. 0x0000, 0x00c3, 0x00c3, 0x01c0,
  55. 0x0000, 0x0000, 0x0000, 0x0000,
  56. 0x0000, 0x0000, 0x0000, 0x0000,
  57. 0x0100, 0x0100, 0x0050, 0x0050,
  58. 0x0050, 0x0050, 0x0000, 0x0000,
  59. 0x0000, 0x0000, 0x0040, 0x0000,
  60. 0x0000, 0x0050, 0x0050, 0x0000,
  61. 0x0002, 0x0037, 0x004d, 0x0080,
  62. 0x0008, 0x0031, 0x0026, 0x00e9,
  63. };
  64. struct wm8960_priv {
  65. enum snd_soc_control_type control_type;
  66. void *control_data;
  67. int (*set_bias_level)(struct snd_soc_codec *,
  68. enum snd_soc_bias_level level);
  69. struct snd_soc_dapm_widget *lout1;
  70. struct snd_soc_dapm_widget *rout1;
  71. struct snd_soc_dapm_widget *out3;
  72. bool deemph;
  73. int playback_fs;
  74. };
  75. #define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
  76. /* enumerated controls */
  77. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  78. "Right Inverted", "Stereo Inversion"};
  79. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  80. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  81. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  82. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  83. static const struct soc_enum wm8960_enum[] = {
  84. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  85. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  86. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  87. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  88. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  89. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  90. };
  91. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  92. static int wm8960_set_deemph(struct snd_soc_codec *codec)
  93. {
  94. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  95. int val, i, best;
  96. /* If we're using deemphasis select the nearest available sample
  97. * rate.
  98. */
  99. if (wm8960->deemph) {
  100. best = 1;
  101. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  102. if (abs(deemph_settings[i] - wm8960->playback_fs) <
  103. abs(deemph_settings[best] - wm8960->playback_fs))
  104. best = i;
  105. }
  106. val = best << 1;
  107. } else {
  108. val = 0;
  109. }
  110. dev_dbg(codec->dev, "Set deemphasis %d\n", val);
  111. return snd_soc_update_bits(codec, WM8960_DACCTL1,
  112. 0x6, val);
  113. }
  114. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  115. struct snd_ctl_elem_value *ucontrol)
  116. {
  117. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  118. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  119. ucontrol->value.enumerated.item[0] = wm8960->deemph;
  120. return 0;
  121. }
  122. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  123. struct snd_ctl_elem_value *ucontrol)
  124. {
  125. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  126. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  127. int deemph = ucontrol->value.enumerated.item[0];
  128. if (deemph > 1)
  129. return -EINVAL;
  130. wm8960->deemph = deemph;
  131. return wm8960_set_deemph(codec);
  132. }
  133. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
  134. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
  135. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  136. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  137. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  138. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  139. 0, 63, 0, adc_tlv),
  140. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  141. 6, 1, 0),
  142. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  143. 7, 1, 0),
  144. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  145. 0, 255, 0, dac_tlv),
  146. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  147. 0, 127, 0, out_tlv),
  148. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  149. 7, 1, 0),
  150. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  151. 0, 127, 0, out_tlv),
  152. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  153. 7, 1, 0),
  154. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  155. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  156. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  157. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  158. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  159. SOC_ENUM("DAC Polarity", wm8960_enum[2]),
  160. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  161. wm8960_get_deemph, wm8960_put_deemph),
  162. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  163. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  164. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  165. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  166. SOC_ENUM("ALC Function", wm8960_enum[4]),
  167. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  168. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  169. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  170. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  171. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  172. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  173. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  174. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  175. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  176. SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
  177. 0, 127, 0),
  178. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  179. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  180. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  181. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  182. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  183. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  184. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  185. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  186. };
  187. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  188. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  189. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  190. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  191. };
  192. static const struct snd_kcontrol_new wm8960_lin[] = {
  193. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  194. };
  195. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  196. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  197. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  198. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  199. };
  200. static const struct snd_kcontrol_new wm8960_rin[] = {
  201. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  202. };
  203. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  204. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  205. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  206. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  207. };
  208. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  209. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  210. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  211. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  212. };
  213. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  214. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  215. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  216. };
  217. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  218. SND_SOC_DAPM_INPUT("LINPUT1"),
  219. SND_SOC_DAPM_INPUT("RINPUT1"),
  220. SND_SOC_DAPM_INPUT("LINPUT2"),
  221. SND_SOC_DAPM_INPUT("RINPUT2"),
  222. SND_SOC_DAPM_INPUT("LINPUT3"),
  223. SND_SOC_DAPM_INPUT("RINPUT3"),
  224. SND_SOC_DAPM_MICBIAS("MICB", WM8960_POWER1, 1, 0),
  225. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  226. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  227. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  228. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  229. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  230. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  231. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  232. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  233. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
  234. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
  235. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  236. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  237. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  238. &wm8960_loutput_mixer[0],
  239. ARRAY_SIZE(wm8960_loutput_mixer)),
  240. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  241. &wm8960_routput_mixer[0],
  242. ARRAY_SIZE(wm8960_routput_mixer)),
  243. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  244. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  245. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  246. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  247. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  248. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  249. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  250. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  251. SND_SOC_DAPM_OUTPUT("HP_L"),
  252. SND_SOC_DAPM_OUTPUT("HP_R"),
  253. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  254. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  255. SND_SOC_DAPM_OUTPUT("OUT3"),
  256. };
  257. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  258. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  259. &wm8960_mono_out[0],
  260. ARRAY_SIZE(wm8960_mono_out)),
  261. };
  262. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  263. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  264. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  265. };
  266. static const struct snd_soc_dapm_route audio_paths[] = {
  267. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  268. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  269. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  270. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
  271. { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
  272. { "Left Input Mixer", NULL, "LINPUT2" },
  273. { "Left Input Mixer", NULL, "LINPUT3" },
  274. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  275. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  276. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  277. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
  278. { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
  279. { "Right Input Mixer", NULL, "RINPUT2" },
  280. { "Right Input Mixer", NULL, "LINPUT3" },
  281. { "Left ADC", NULL, "Left Input Mixer" },
  282. { "Right ADC", NULL, "Right Input Mixer" },
  283. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  284. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
  285. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  286. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  287. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
  288. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  289. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  290. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  291. { "HP_L", NULL, "LOUT1 PGA" },
  292. { "HP_R", NULL, "ROUT1 PGA" },
  293. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  294. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  295. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  296. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  297. { "SPK_LN", NULL, "Left Speaker Output" },
  298. { "SPK_LP", NULL, "Left Speaker Output" },
  299. { "SPK_RN", NULL, "Right Speaker Output" },
  300. { "SPK_RP", NULL, "Right Speaker Output" },
  301. };
  302. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  303. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  304. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  305. { "OUT3", NULL, "Mono Output Mixer", }
  306. };
  307. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  308. { "HP_L", NULL, "OUT3 VMID" },
  309. { "HP_R", NULL, "OUT3 VMID" },
  310. { "OUT3 VMID", NULL, "Left Output Mixer" },
  311. { "OUT3 VMID", NULL, "Right Output Mixer" },
  312. };
  313. static int wm8960_add_widgets(struct snd_soc_codec *codec)
  314. {
  315. struct wm8960_data *pdata = codec->dev->platform_data;
  316. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  317. struct snd_soc_dapm_context *dapm = &codec->dapm;
  318. struct snd_soc_dapm_widget *w;
  319. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
  320. ARRAY_SIZE(wm8960_dapm_widgets));
  321. snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
  322. /* In capless mode OUT3 is used to provide VMID for the
  323. * headphone outputs, otherwise it is used as a mono mixer.
  324. */
  325. if (pdata && pdata->capless) {
  326. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
  327. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  328. snd_soc_dapm_add_routes(dapm, audio_paths_capless,
  329. ARRAY_SIZE(audio_paths_capless));
  330. } else {
  331. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
  332. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  333. snd_soc_dapm_add_routes(dapm, audio_paths_out3,
  334. ARRAY_SIZE(audio_paths_out3));
  335. }
  336. /* We need to power up the headphone output stage out of
  337. * sequence for capless mode. To save scanning the widget
  338. * list each time to find the desired power state do so now
  339. * and save the result.
  340. */
  341. list_for_each_entry(w, &codec->card->widgets, list) {
  342. if (w->dapm != &codec->dapm)
  343. continue;
  344. if (strcmp(w->name, "LOUT1 PGA") == 0)
  345. wm8960->lout1 = w;
  346. if (strcmp(w->name, "ROUT1 PGA") == 0)
  347. wm8960->rout1 = w;
  348. if (strcmp(w->name, "OUT3 VMID") == 0)
  349. wm8960->out3 = w;
  350. }
  351. return 0;
  352. }
  353. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  354. unsigned int fmt)
  355. {
  356. struct snd_soc_codec *codec = codec_dai->codec;
  357. u16 iface = 0;
  358. /* set master/slave audio interface */
  359. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  360. case SND_SOC_DAIFMT_CBM_CFM:
  361. iface |= 0x0040;
  362. break;
  363. case SND_SOC_DAIFMT_CBS_CFS:
  364. break;
  365. default:
  366. return -EINVAL;
  367. }
  368. /* interface format */
  369. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  370. case SND_SOC_DAIFMT_I2S:
  371. iface |= 0x0002;
  372. break;
  373. case SND_SOC_DAIFMT_RIGHT_J:
  374. break;
  375. case SND_SOC_DAIFMT_LEFT_J:
  376. iface |= 0x0001;
  377. break;
  378. case SND_SOC_DAIFMT_DSP_A:
  379. iface |= 0x0003;
  380. break;
  381. case SND_SOC_DAIFMT_DSP_B:
  382. iface |= 0x0013;
  383. break;
  384. default:
  385. return -EINVAL;
  386. }
  387. /* clock inversion */
  388. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  389. case SND_SOC_DAIFMT_NB_NF:
  390. break;
  391. case SND_SOC_DAIFMT_IB_IF:
  392. iface |= 0x0090;
  393. break;
  394. case SND_SOC_DAIFMT_IB_NF:
  395. iface |= 0x0080;
  396. break;
  397. case SND_SOC_DAIFMT_NB_IF:
  398. iface |= 0x0010;
  399. break;
  400. default:
  401. return -EINVAL;
  402. }
  403. /* set iface */
  404. snd_soc_write(codec, WM8960_IFACE1, iface);
  405. return 0;
  406. }
  407. static struct {
  408. int rate;
  409. unsigned int val;
  410. } alc_rates[] = {
  411. { 48000, 0 },
  412. { 44100, 0 },
  413. { 32000, 1 },
  414. { 22050, 2 },
  415. { 24000, 2 },
  416. { 16000, 3 },
  417. { 11250, 4 },
  418. { 12000, 4 },
  419. { 8000, 5 },
  420. };
  421. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  422. struct snd_pcm_hw_params *params,
  423. struct snd_soc_dai *dai)
  424. {
  425. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  426. struct snd_soc_codec *codec = rtd->codec;
  427. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  428. u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
  429. int i;
  430. /* bit size */
  431. switch (params_format(params)) {
  432. case SNDRV_PCM_FORMAT_S16_LE:
  433. break;
  434. case SNDRV_PCM_FORMAT_S20_3LE:
  435. iface |= 0x0004;
  436. break;
  437. case SNDRV_PCM_FORMAT_S24_LE:
  438. iface |= 0x0008;
  439. break;
  440. }
  441. /* Update filters for the new rate */
  442. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  443. wm8960->playback_fs = params_rate(params);
  444. wm8960_set_deemph(codec);
  445. } else {
  446. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  447. if (alc_rates[i].rate == params_rate(params))
  448. snd_soc_update_bits(codec,
  449. WM8960_ADDCTL3, 0x7,
  450. alc_rates[i].val);
  451. }
  452. /* set iface */
  453. snd_soc_write(codec, WM8960_IFACE1, iface);
  454. return 0;
  455. }
  456. static int wm8960_mute(struct snd_soc_dai *dai, int mute)
  457. {
  458. struct snd_soc_codec *codec = dai->codec;
  459. u16 mute_reg = snd_soc_read(codec, WM8960_DACCTL1) & 0xfff7;
  460. if (mute)
  461. snd_soc_write(codec, WM8960_DACCTL1, mute_reg | 0x8);
  462. else
  463. snd_soc_write(codec, WM8960_DACCTL1, mute_reg);
  464. return 0;
  465. }
  466. static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
  467. enum snd_soc_bias_level level)
  468. {
  469. u16 reg;
  470. switch (level) {
  471. case SND_SOC_BIAS_ON:
  472. break;
  473. case SND_SOC_BIAS_PREPARE:
  474. /* Set VMID to 2x50k */
  475. reg = snd_soc_read(codec, WM8960_POWER1);
  476. reg &= ~0x180;
  477. reg |= 0x80;
  478. snd_soc_write(codec, WM8960_POWER1, reg);
  479. break;
  480. case SND_SOC_BIAS_STANDBY:
  481. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  482. /* Enable anti-pop features */
  483. snd_soc_write(codec, WM8960_APOP1,
  484. WM8960_POBCTRL | WM8960_SOFT_ST |
  485. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  486. /* Enable & ramp VMID at 2x50k */
  487. reg = snd_soc_read(codec, WM8960_POWER1);
  488. reg |= 0x80;
  489. snd_soc_write(codec, WM8960_POWER1, reg);
  490. msleep(100);
  491. /* Enable VREF */
  492. snd_soc_write(codec, WM8960_POWER1, reg | WM8960_VREF);
  493. /* Disable anti-pop features */
  494. snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
  495. }
  496. /* Set VMID to 2x250k */
  497. reg = snd_soc_read(codec, WM8960_POWER1);
  498. reg &= ~0x180;
  499. reg |= 0x100;
  500. snd_soc_write(codec, WM8960_POWER1, reg);
  501. break;
  502. case SND_SOC_BIAS_OFF:
  503. /* Enable anti-pop features */
  504. snd_soc_write(codec, WM8960_APOP1,
  505. WM8960_POBCTRL | WM8960_SOFT_ST |
  506. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  507. /* Disable VMID and VREF, let them discharge */
  508. snd_soc_write(codec, WM8960_POWER1, 0);
  509. msleep(600);
  510. break;
  511. }
  512. codec->dapm.bias_level = level;
  513. return 0;
  514. }
  515. static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
  516. enum snd_soc_bias_level level)
  517. {
  518. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  519. int reg;
  520. switch (level) {
  521. case SND_SOC_BIAS_ON:
  522. break;
  523. case SND_SOC_BIAS_PREPARE:
  524. switch (codec->dapm.bias_level) {
  525. case SND_SOC_BIAS_STANDBY:
  526. /* Enable anti pop mode */
  527. snd_soc_update_bits(codec, WM8960_APOP1,
  528. WM8960_POBCTRL | WM8960_SOFT_ST |
  529. WM8960_BUFDCOPEN,
  530. WM8960_POBCTRL | WM8960_SOFT_ST |
  531. WM8960_BUFDCOPEN);
  532. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  533. reg = 0;
  534. if (wm8960->lout1 && wm8960->lout1->power)
  535. reg |= WM8960_PWR2_LOUT1;
  536. if (wm8960->rout1 && wm8960->rout1->power)
  537. reg |= WM8960_PWR2_ROUT1;
  538. if (wm8960->out3 && wm8960->out3->power)
  539. reg |= WM8960_PWR2_OUT3;
  540. snd_soc_update_bits(codec, WM8960_POWER2,
  541. WM8960_PWR2_LOUT1 |
  542. WM8960_PWR2_ROUT1 |
  543. WM8960_PWR2_OUT3, reg);
  544. /* Enable VMID at 2*50k */
  545. snd_soc_update_bits(codec, WM8960_POWER1,
  546. WM8960_VMID_MASK, 0x80);
  547. /* Ramp */
  548. msleep(100);
  549. /* Enable VREF */
  550. snd_soc_update_bits(codec, WM8960_POWER1,
  551. WM8960_VREF, WM8960_VREF);
  552. msleep(100);
  553. break;
  554. case SND_SOC_BIAS_ON:
  555. /* Enable anti-pop mode */
  556. snd_soc_update_bits(codec, WM8960_APOP1,
  557. WM8960_POBCTRL | WM8960_SOFT_ST |
  558. WM8960_BUFDCOPEN,
  559. WM8960_POBCTRL | WM8960_SOFT_ST |
  560. WM8960_BUFDCOPEN);
  561. /* Disable VMID and VREF */
  562. snd_soc_update_bits(codec, WM8960_POWER1,
  563. WM8960_VREF | WM8960_VMID_MASK, 0);
  564. break;
  565. default:
  566. break;
  567. }
  568. break;
  569. case SND_SOC_BIAS_STANDBY:
  570. switch (codec->dapm.bias_level) {
  571. case SND_SOC_BIAS_PREPARE:
  572. /* Disable HP discharge */
  573. snd_soc_update_bits(codec, WM8960_APOP2,
  574. WM8960_DISOP | WM8960_DRES_MASK,
  575. 0);
  576. /* Disable anti-pop features */
  577. snd_soc_update_bits(codec, WM8960_APOP1,
  578. WM8960_POBCTRL | WM8960_SOFT_ST |
  579. WM8960_BUFDCOPEN,
  580. WM8960_POBCTRL | WM8960_SOFT_ST |
  581. WM8960_BUFDCOPEN);
  582. break;
  583. default:
  584. break;
  585. }
  586. break;
  587. case SND_SOC_BIAS_OFF:
  588. break;
  589. }
  590. codec->dapm.bias_level = level;
  591. return 0;
  592. }
  593. /* PLL divisors */
  594. struct _pll_div {
  595. u32 pre_div:1;
  596. u32 n:4;
  597. u32 k:24;
  598. };
  599. /* The size in bits of the pll divide multiplied by 10
  600. * to allow rounding later */
  601. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  602. static int pll_factors(unsigned int source, unsigned int target,
  603. struct _pll_div *pll_div)
  604. {
  605. unsigned long long Kpart;
  606. unsigned int K, Ndiv, Nmod;
  607. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  608. /* Scale up target to PLL operating frequency */
  609. target *= 4;
  610. Ndiv = target / source;
  611. if (Ndiv < 6) {
  612. source >>= 1;
  613. pll_div->pre_div = 1;
  614. Ndiv = target / source;
  615. } else
  616. pll_div->pre_div = 0;
  617. if ((Ndiv < 6) || (Ndiv > 12)) {
  618. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  619. return -EINVAL;
  620. }
  621. pll_div->n = Ndiv;
  622. Nmod = target % source;
  623. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  624. do_div(Kpart, source);
  625. K = Kpart & 0xFFFFFFFF;
  626. /* Check if we need to round */
  627. if ((K % 10) >= 5)
  628. K += 5;
  629. /* Move down to proper range now rounding is done */
  630. K /= 10;
  631. pll_div->k = K;
  632. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  633. pll_div->n, pll_div->k, pll_div->pre_div);
  634. return 0;
  635. }
  636. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  637. int source, unsigned int freq_in, unsigned int freq_out)
  638. {
  639. struct snd_soc_codec *codec = codec_dai->codec;
  640. u16 reg;
  641. static struct _pll_div pll_div;
  642. int ret;
  643. if (freq_in && freq_out) {
  644. ret = pll_factors(freq_in, freq_out, &pll_div);
  645. if (ret != 0)
  646. return ret;
  647. }
  648. /* Disable the PLL: even if we are changing the frequency the
  649. * PLL needs to be disabled while we do so. */
  650. snd_soc_write(codec, WM8960_CLOCK1,
  651. snd_soc_read(codec, WM8960_CLOCK1) & ~1);
  652. snd_soc_write(codec, WM8960_POWER2,
  653. snd_soc_read(codec, WM8960_POWER2) & ~1);
  654. if (!freq_in || !freq_out)
  655. return 0;
  656. reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
  657. reg |= pll_div.pre_div << 4;
  658. reg |= pll_div.n;
  659. if (pll_div.k) {
  660. reg |= 0x20;
  661. snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
  662. snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
  663. snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
  664. }
  665. snd_soc_write(codec, WM8960_PLL1, reg);
  666. /* Turn it on */
  667. snd_soc_write(codec, WM8960_POWER2,
  668. snd_soc_read(codec, WM8960_POWER2) | 1);
  669. msleep(250);
  670. snd_soc_write(codec, WM8960_CLOCK1,
  671. snd_soc_read(codec, WM8960_CLOCK1) | 1);
  672. return 0;
  673. }
  674. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  675. int div_id, int div)
  676. {
  677. struct snd_soc_codec *codec = codec_dai->codec;
  678. u16 reg;
  679. switch (div_id) {
  680. case WM8960_SYSCLKDIV:
  681. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
  682. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  683. break;
  684. case WM8960_DACDIV:
  685. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
  686. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  687. break;
  688. case WM8960_OPCLKDIV:
  689. reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
  690. snd_soc_write(codec, WM8960_PLL1, reg | div);
  691. break;
  692. case WM8960_DCLKDIV:
  693. reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
  694. snd_soc_write(codec, WM8960_CLOCK2, reg | div);
  695. break;
  696. case WM8960_TOCLKSEL:
  697. reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
  698. snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
  699. break;
  700. default:
  701. return -EINVAL;
  702. }
  703. return 0;
  704. }
  705. static int wm8960_set_bias_level(struct snd_soc_codec *codec,
  706. enum snd_soc_bias_level level)
  707. {
  708. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  709. return wm8960->set_bias_level(codec, level);
  710. }
  711. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  712. #define WM8960_FORMATS \
  713. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  714. SNDRV_PCM_FMTBIT_S24_LE)
  715. static struct snd_soc_dai_ops wm8960_dai_ops = {
  716. .hw_params = wm8960_hw_params,
  717. .digital_mute = wm8960_mute,
  718. .set_fmt = wm8960_set_dai_fmt,
  719. .set_clkdiv = wm8960_set_dai_clkdiv,
  720. .set_pll = wm8960_set_dai_pll,
  721. };
  722. static struct snd_soc_dai_driver wm8960_dai = {
  723. .name = "wm8960-hifi",
  724. .playback = {
  725. .stream_name = "Playback",
  726. .channels_min = 1,
  727. .channels_max = 2,
  728. .rates = WM8960_RATES,
  729. .formats = WM8960_FORMATS,},
  730. .capture = {
  731. .stream_name = "Capture",
  732. .channels_min = 1,
  733. .channels_max = 2,
  734. .rates = WM8960_RATES,
  735. .formats = WM8960_FORMATS,},
  736. .ops = &wm8960_dai_ops,
  737. .symmetric_rates = 1,
  738. };
  739. static int wm8960_suspend(struct snd_soc_codec *codec, pm_message_t state)
  740. {
  741. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  742. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  743. return 0;
  744. }
  745. static int wm8960_resume(struct snd_soc_codec *codec)
  746. {
  747. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  748. int i;
  749. u8 data[2];
  750. u16 *cache = codec->reg_cache;
  751. /* Sync reg_cache with the hardware */
  752. for (i = 0; i < ARRAY_SIZE(wm8960_reg); i++) {
  753. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  754. data[1] = cache[i] & 0x00ff;
  755. codec->hw_write(codec->control_data, data, 2);
  756. }
  757. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  758. return 0;
  759. }
  760. static int wm8960_probe(struct snd_soc_codec *codec)
  761. {
  762. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  763. struct wm8960_data *pdata = dev_get_platdata(codec->dev);
  764. int ret;
  765. u16 reg;
  766. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  767. codec->control_data = wm8960->control_data;
  768. if (!pdata) {
  769. dev_warn(codec->dev, "No platform data supplied\n");
  770. } else {
  771. if (pdata->dres > WM8960_DRES_MAX) {
  772. dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
  773. pdata->dres = 0;
  774. }
  775. if (pdata->capless)
  776. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  777. }
  778. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
  779. if (ret < 0) {
  780. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  781. return ret;
  782. }
  783. ret = wm8960_reset(codec);
  784. if (ret < 0) {
  785. dev_err(codec->dev, "Failed to issue reset\n");
  786. return ret;
  787. }
  788. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  789. /* Latch the update bits */
  790. reg = snd_soc_read(codec, WM8960_LINVOL);
  791. snd_soc_write(codec, WM8960_LINVOL, reg | 0x100);
  792. reg = snd_soc_read(codec, WM8960_RINVOL);
  793. snd_soc_write(codec, WM8960_RINVOL, reg | 0x100);
  794. reg = snd_soc_read(codec, WM8960_LADC);
  795. snd_soc_write(codec, WM8960_LADC, reg | 0x100);
  796. reg = snd_soc_read(codec, WM8960_RADC);
  797. snd_soc_write(codec, WM8960_RADC, reg | 0x100);
  798. reg = snd_soc_read(codec, WM8960_LDAC);
  799. snd_soc_write(codec, WM8960_LDAC, reg | 0x100);
  800. reg = snd_soc_read(codec, WM8960_RDAC);
  801. snd_soc_write(codec, WM8960_RDAC, reg | 0x100);
  802. reg = snd_soc_read(codec, WM8960_LOUT1);
  803. snd_soc_write(codec, WM8960_LOUT1, reg | 0x100);
  804. reg = snd_soc_read(codec, WM8960_ROUT1);
  805. snd_soc_write(codec, WM8960_ROUT1, reg | 0x100);
  806. reg = snd_soc_read(codec, WM8960_LOUT2);
  807. snd_soc_write(codec, WM8960_LOUT2, reg | 0x100);
  808. reg = snd_soc_read(codec, WM8960_ROUT2);
  809. snd_soc_write(codec, WM8960_ROUT2, reg | 0x100);
  810. snd_soc_add_controls(codec, wm8960_snd_controls,
  811. ARRAY_SIZE(wm8960_snd_controls));
  812. wm8960_add_widgets(codec);
  813. return 0;
  814. }
  815. /* power down chip */
  816. static int wm8960_remove(struct snd_soc_codec *codec)
  817. {
  818. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  819. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  820. return 0;
  821. }
  822. static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
  823. .probe = wm8960_probe,
  824. .remove = wm8960_remove,
  825. .suspend = wm8960_suspend,
  826. .resume = wm8960_resume,
  827. .set_bias_level = wm8960_set_bias_level,
  828. .reg_cache_size = ARRAY_SIZE(wm8960_reg),
  829. .reg_word_size = sizeof(u16),
  830. .reg_cache_default = wm8960_reg,
  831. };
  832. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  833. static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
  834. const struct i2c_device_id *id)
  835. {
  836. struct wm8960_priv *wm8960;
  837. int ret;
  838. wm8960 = kzalloc(sizeof(struct wm8960_priv), GFP_KERNEL);
  839. if (wm8960 == NULL)
  840. return -ENOMEM;
  841. i2c_set_clientdata(i2c, wm8960);
  842. wm8960->control_type = SND_SOC_I2C;
  843. wm8960->control_data = i2c;
  844. ret = snd_soc_register_codec(&i2c->dev,
  845. &soc_codec_dev_wm8960, &wm8960_dai, 1);
  846. if (ret < 0)
  847. kfree(wm8960);
  848. return ret;
  849. }
  850. static __devexit int wm8960_i2c_remove(struct i2c_client *client)
  851. {
  852. snd_soc_unregister_codec(&client->dev);
  853. kfree(i2c_get_clientdata(client));
  854. return 0;
  855. }
  856. static const struct i2c_device_id wm8960_i2c_id[] = {
  857. { "wm8960", 0 },
  858. { }
  859. };
  860. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  861. static struct i2c_driver wm8960_i2c_driver = {
  862. .driver = {
  863. .name = "wm8960-codec",
  864. .owner = THIS_MODULE,
  865. },
  866. .probe = wm8960_i2c_probe,
  867. .remove = __devexit_p(wm8960_i2c_remove),
  868. .id_table = wm8960_i2c_id,
  869. };
  870. #endif
  871. static int __init wm8960_modinit(void)
  872. {
  873. int ret = 0;
  874. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  875. ret = i2c_add_driver(&wm8960_i2c_driver);
  876. if (ret != 0) {
  877. printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
  878. ret);
  879. }
  880. #endif
  881. return ret;
  882. }
  883. module_init(wm8960_modinit);
  884. static void __exit wm8960_exit(void)
  885. {
  886. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  887. i2c_del_driver(&wm8960_i2c_driver);
  888. #endif
  889. }
  890. module_exit(wm8960_exit);
  891. MODULE_DESCRIPTION("ASoC WM8960 driver");
  892. MODULE_AUTHOR("Liam Girdwood");
  893. MODULE_LICENSE("GPL");