twl6040.c 46 KB

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  1. /*
  2. * ALSA SoC TWL6040 codec driver
  3. *
  4. * Author: Misael Lopez Cruz <x0052729@ti.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/gpio.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/slab.h>
  30. #include <linux/i2c/twl.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/soc.h>
  35. #include <sound/initval.h>
  36. #include <sound/tlv.h>
  37. #include "twl6040.h"
  38. #define TWL6040_RATES SNDRV_PCM_RATE_8000_96000
  39. #define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
  40. #define TWL6040_OUTHS_0dB 0x00
  41. #define TWL6040_OUTHS_M30dB 0x0F
  42. #define TWL6040_OUTHF_0dB 0x03
  43. #define TWL6040_OUTHF_M52dB 0x1D
  44. #define TWL6040_RAMP_NONE 0
  45. #define TWL6040_RAMP_UP 1
  46. #define TWL6040_RAMP_DOWN 2
  47. #define TWL6040_HSL_VOL_MASK 0x0F
  48. #define TWL6040_HSL_VOL_SHIFT 0
  49. #define TWL6040_HSR_VOL_MASK 0xF0
  50. #define TWL6040_HSR_VOL_SHIFT 4
  51. #define TWL6040_HF_VOL_MASK 0x1F
  52. #define TWL6040_HF_VOL_SHIFT 0
  53. struct twl6040_output {
  54. u16 active;
  55. u16 left_vol;
  56. u16 right_vol;
  57. u16 left_step;
  58. u16 right_step;
  59. unsigned int step_delay;
  60. u16 ramp;
  61. u16 mute;
  62. struct completion ramp_done;
  63. };
  64. struct twl6040_jack_data {
  65. struct snd_soc_jack *jack;
  66. int report;
  67. };
  68. /* codec private data */
  69. struct twl6040_data {
  70. int audpwron;
  71. int naudint;
  72. int codec_powered;
  73. int pll;
  74. int non_lp;
  75. unsigned int sysclk;
  76. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  77. struct completion ready;
  78. struct twl6040_jack_data hs_jack;
  79. struct snd_soc_codec *codec;
  80. struct workqueue_struct *workqueue;
  81. struct delayed_work delayed_work;
  82. struct mutex mutex;
  83. struct twl6040_output headset;
  84. struct twl6040_output handsfree;
  85. struct workqueue_struct *hf_workqueue;
  86. struct workqueue_struct *hs_workqueue;
  87. struct delayed_work hs_delayed_work;
  88. struct delayed_work hf_delayed_work;
  89. };
  90. /*
  91. * twl6040 register cache & default register settings
  92. */
  93. static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = {
  94. 0x00, /* not used 0x00 */
  95. 0x4B, /* TWL6040_ASICID (ro) 0x01 */
  96. 0x00, /* TWL6040_ASICREV (ro) 0x02 */
  97. 0x00, /* TWL6040_INTID 0x03 */
  98. 0x00, /* TWL6040_INTMR 0x04 */
  99. 0x00, /* TWL6040_NCPCTRL 0x05 */
  100. 0x00, /* TWL6040_LDOCTL 0x06 */
  101. 0x60, /* TWL6040_HPPLLCTL 0x07 */
  102. 0x00, /* TWL6040_LPPLLCTL 0x08 */
  103. 0x4A, /* TWL6040_LPPLLDIV 0x09 */
  104. 0x00, /* TWL6040_AMICBCTL 0x0A */
  105. 0x00, /* TWL6040_DMICBCTL 0x0B */
  106. 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */
  107. 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */
  108. 0x00, /* TWL6040_MICGAIN 0x0E */
  109. 0x1B, /* TWL6040_LINEGAIN 0x0F */
  110. 0x00, /* TWL6040_HSLCTL 0x10 */
  111. 0x00, /* TWL6040_HSRCTL 0x11 */
  112. 0x00, /* TWL6040_HSGAIN 0x12 */
  113. 0x00, /* TWL6040_EARCTL 0x13 */
  114. 0x00, /* TWL6040_HFLCTL 0x14 */
  115. 0x00, /* TWL6040_HFLGAIN 0x15 */
  116. 0x00, /* TWL6040_HFRCTL 0x16 */
  117. 0x00, /* TWL6040_HFRGAIN 0x17 */
  118. 0x00, /* TWL6040_VIBCTLL 0x18 */
  119. 0x00, /* TWL6040_VIBDATL 0x19 */
  120. 0x00, /* TWL6040_VIBCTLR 0x1A */
  121. 0x00, /* TWL6040_VIBDATR 0x1B */
  122. 0x00, /* TWL6040_HKCTL1 0x1C */
  123. 0x00, /* TWL6040_HKCTL2 0x1D */
  124. 0x00, /* TWL6040_GPOCTL 0x1E */
  125. 0x00, /* TWL6040_ALB 0x1F */
  126. 0x00, /* TWL6040_DLB 0x20 */
  127. 0x00, /* not used 0x21 */
  128. 0x00, /* not used 0x22 */
  129. 0x00, /* not used 0x23 */
  130. 0x00, /* not used 0x24 */
  131. 0x00, /* not used 0x25 */
  132. 0x00, /* not used 0x26 */
  133. 0x00, /* not used 0x27 */
  134. 0x00, /* TWL6040_TRIM1 0x28 */
  135. 0x00, /* TWL6040_TRIM2 0x29 */
  136. 0x00, /* TWL6040_TRIM3 0x2A */
  137. 0x00, /* TWL6040_HSOTRIM 0x2B */
  138. 0x00, /* TWL6040_HFOTRIM 0x2C */
  139. 0x09, /* TWL6040_ACCCTL 0x2D */
  140. 0x00, /* TWL6040_STATUS (ro) 0x2E */
  141. };
  142. /*
  143. * twl6040 vio/gnd registers:
  144. * registers under vio/gnd supply can be accessed
  145. * before the power-up sequence, after NRESPWRON goes high
  146. */
  147. static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = {
  148. TWL6040_REG_ASICID,
  149. TWL6040_REG_ASICREV,
  150. TWL6040_REG_INTID,
  151. TWL6040_REG_INTMR,
  152. TWL6040_REG_NCPCTL,
  153. TWL6040_REG_LDOCTL,
  154. TWL6040_REG_AMICBCTL,
  155. TWL6040_REG_DMICBCTL,
  156. TWL6040_REG_HKCTL1,
  157. TWL6040_REG_HKCTL2,
  158. TWL6040_REG_GPOCTL,
  159. TWL6040_REG_TRIM1,
  160. TWL6040_REG_TRIM2,
  161. TWL6040_REG_TRIM3,
  162. TWL6040_REG_HSOTRIM,
  163. TWL6040_REG_HFOTRIM,
  164. TWL6040_REG_ACCCTL,
  165. TWL6040_REG_STATUS,
  166. };
  167. /*
  168. * twl6040 vdd/vss registers:
  169. * registers under vdd/vss supplies can only be accessed
  170. * after the power-up sequence
  171. */
  172. static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = {
  173. TWL6040_REG_HPPLLCTL,
  174. TWL6040_REG_LPPLLCTL,
  175. TWL6040_REG_LPPLLDIV,
  176. TWL6040_REG_MICLCTL,
  177. TWL6040_REG_MICRCTL,
  178. TWL6040_REG_MICGAIN,
  179. TWL6040_REG_LINEGAIN,
  180. TWL6040_REG_HSLCTL,
  181. TWL6040_REG_HSRCTL,
  182. TWL6040_REG_HSGAIN,
  183. TWL6040_REG_EARCTL,
  184. TWL6040_REG_HFLCTL,
  185. TWL6040_REG_HFLGAIN,
  186. TWL6040_REG_HFRCTL,
  187. TWL6040_REG_HFRGAIN,
  188. TWL6040_REG_VIBCTLL,
  189. TWL6040_REG_VIBDATL,
  190. TWL6040_REG_VIBCTLR,
  191. TWL6040_REG_VIBDATR,
  192. TWL6040_REG_ALB,
  193. TWL6040_REG_DLB,
  194. };
  195. /*
  196. * read twl6040 register cache
  197. */
  198. static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec,
  199. unsigned int reg)
  200. {
  201. u8 *cache = codec->reg_cache;
  202. if (reg >= TWL6040_CACHEREGNUM)
  203. return -EIO;
  204. return cache[reg];
  205. }
  206. /*
  207. * write twl6040 register cache
  208. */
  209. static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec,
  210. u8 reg, u8 value)
  211. {
  212. u8 *cache = codec->reg_cache;
  213. if (reg >= TWL6040_CACHEREGNUM)
  214. return;
  215. cache[reg] = value;
  216. }
  217. /*
  218. * read from twl6040 hardware register
  219. */
  220. static int twl6040_read_reg_volatile(struct snd_soc_codec *codec,
  221. unsigned int reg)
  222. {
  223. u8 value;
  224. if (reg >= TWL6040_CACHEREGNUM)
  225. return -EIO;
  226. twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &value, reg);
  227. twl6040_write_reg_cache(codec, reg, value);
  228. return value;
  229. }
  230. /*
  231. * write to the twl6040 register space
  232. */
  233. static int twl6040_write(struct snd_soc_codec *codec,
  234. unsigned int reg, unsigned int value)
  235. {
  236. if (reg >= TWL6040_CACHEREGNUM)
  237. return -EIO;
  238. twl6040_write_reg_cache(codec, reg, value);
  239. return twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, value, reg);
  240. }
  241. static void twl6040_init_vio_regs(struct snd_soc_codec *codec)
  242. {
  243. u8 *cache = codec->reg_cache;
  244. int reg, i;
  245. /* allow registers to be accessed by i2c */
  246. twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]);
  247. for (i = 0; i < TWL6040_VIOREGNUM; i++) {
  248. reg = twl6040_vio_reg[i];
  249. /* skip read-only registers (ASICID, ASICREV, STATUS) */
  250. switch (reg) {
  251. case TWL6040_REG_ASICID:
  252. case TWL6040_REG_ASICREV:
  253. case TWL6040_REG_STATUS:
  254. continue;
  255. default:
  256. break;
  257. }
  258. twl6040_write(codec, reg, cache[reg]);
  259. }
  260. }
  261. static void twl6040_init_vdd_regs(struct snd_soc_codec *codec)
  262. {
  263. u8 *cache = codec->reg_cache;
  264. int reg, i;
  265. for (i = 0; i < TWL6040_VDDREGNUM; i++) {
  266. reg = twl6040_vdd_reg[i];
  267. twl6040_write(codec, reg, cache[reg]);
  268. }
  269. }
  270. /*
  271. * Ramp HS PGA volume to minimise pops at stream startup and shutdown.
  272. */
  273. static inline int twl6040_hs_ramp_step(struct snd_soc_codec *codec,
  274. unsigned int left_step, unsigned int right_step)
  275. {
  276. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  277. struct twl6040_output *headset = &priv->headset;
  278. int left_complete = 0, right_complete = 0;
  279. u8 reg, val;
  280. /* left channel */
  281. left_step = (left_step > 0xF) ? 0xF : left_step;
  282. reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
  283. val = (~reg & TWL6040_HSL_VOL_MASK);
  284. if (headset->ramp == TWL6040_RAMP_UP) {
  285. /* ramp step up */
  286. if (val < headset->left_vol) {
  287. val += left_step;
  288. reg &= ~TWL6040_HSL_VOL_MASK;
  289. twl6040_write(codec, TWL6040_REG_HSGAIN,
  290. (reg | (~val & TWL6040_HSL_VOL_MASK)));
  291. } else {
  292. left_complete = 1;
  293. }
  294. } else if (headset->ramp == TWL6040_RAMP_DOWN) {
  295. /* ramp step down */
  296. if (val > 0x0) {
  297. val -= left_step;
  298. reg &= ~TWL6040_HSL_VOL_MASK;
  299. twl6040_write(codec, TWL6040_REG_HSGAIN, reg |
  300. (~val & TWL6040_HSL_VOL_MASK));
  301. } else {
  302. left_complete = 1;
  303. }
  304. }
  305. /* right channel */
  306. right_step = (right_step > 0xF) ? 0xF : right_step;
  307. reg = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN);
  308. val = (~reg & TWL6040_HSR_VOL_MASK) >> TWL6040_HSR_VOL_SHIFT;
  309. if (headset->ramp == TWL6040_RAMP_UP) {
  310. /* ramp step up */
  311. if (val < headset->right_vol) {
  312. val += right_step;
  313. reg &= ~TWL6040_HSR_VOL_MASK;
  314. twl6040_write(codec, TWL6040_REG_HSGAIN,
  315. (reg | (~val << TWL6040_HSR_VOL_SHIFT)));
  316. } else {
  317. right_complete = 1;
  318. }
  319. } else if (headset->ramp == TWL6040_RAMP_DOWN) {
  320. /* ramp step down */
  321. if (val > 0x0) {
  322. val -= right_step;
  323. reg &= ~TWL6040_HSR_VOL_MASK;
  324. twl6040_write(codec, TWL6040_REG_HSGAIN,
  325. reg | (~val << TWL6040_HSR_VOL_SHIFT));
  326. } else {
  327. right_complete = 1;
  328. }
  329. }
  330. return left_complete & right_complete;
  331. }
  332. /*
  333. * Ramp HF PGA volume to minimise pops at stream startup and shutdown.
  334. */
  335. static inline int twl6040_hf_ramp_step(struct snd_soc_codec *codec,
  336. unsigned int left_step, unsigned int right_step)
  337. {
  338. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  339. struct twl6040_output *handsfree = &priv->handsfree;
  340. int left_complete = 0, right_complete = 0;
  341. u16 reg, val;
  342. /* left channel */
  343. left_step = (left_step > 0x1D) ? 0x1D : left_step;
  344. reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFLGAIN);
  345. reg = 0x1D - reg;
  346. val = (reg & TWL6040_HF_VOL_MASK);
  347. if (handsfree->ramp == TWL6040_RAMP_UP) {
  348. /* ramp step up */
  349. if (val < handsfree->left_vol) {
  350. val += left_step;
  351. reg &= ~TWL6040_HF_VOL_MASK;
  352. twl6040_write(codec, TWL6040_REG_HFLGAIN,
  353. reg | (0x1D - val));
  354. } else {
  355. left_complete = 1;
  356. }
  357. } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
  358. /* ramp step down */
  359. if (val > 0) {
  360. val -= left_step;
  361. reg &= ~TWL6040_HF_VOL_MASK;
  362. twl6040_write(codec, TWL6040_REG_HFLGAIN,
  363. reg | (0x1D - val));
  364. } else {
  365. left_complete = 1;
  366. }
  367. }
  368. /* right channel */
  369. right_step = (right_step > 0x1D) ? 0x1D : right_step;
  370. reg = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN);
  371. reg = 0x1D - reg;
  372. val = (reg & TWL6040_HF_VOL_MASK);
  373. if (handsfree->ramp == TWL6040_RAMP_UP) {
  374. /* ramp step up */
  375. if (val < handsfree->right_vol) {
  376. val += right_step;
  377. reg &= ~TWL6040_HF_VOL_MASK;
  378. twl6040_write(codec, TWL6040_REG_HFRGAIN,
  379. reg | (0x1D - val));
  380. } else {
  381. right_complete = 1;
  382. }
  383. } else if (handsfree->ramp == TWL6040_RAMP_DOWN) {
  384. /* ramp step down */
  385. if (val > 0) {
  386. val -= right_step;
  387. reg &= ~TWL6040_HF_VOL_MASK;
  388. twl6040_write(codec, TWL6040_REG_HFRGAIN,
  389. reg | (0x1D - val));
  390. }
  391. }
  392. return left_complete & right_complete;
  393. }
  394. /*
  395. * This work ramps both output PGAs at stream start/stop time to
  396. * minimise pop associated with DAPM power switching.
  397. */
  398. static void twl6040_pga_hs_work(struct work_struct *work)
  399. {
  400. struct twl6040_data *priv =
  401. container_of(work, struct twl6040_data, hs_delayed_work.work);
  402. struct snd_soc_codec *codec = priv->codec;
  403. struct twl6040_output *headset = &priv->headset;
  404. unsigned int delay = headset->step_delay;
  405. int i, headset_complete;
  406. /* do we need to ramp at all ? */
  407. if (headset->ramp == TWL6040_RAMP_NONE)
  408. return;
  409. /* HS PGA volumes have 4 bits of resolution to ramp */
  410. for (i = 0; i <= 16; i++) {
  411. headset_complete = 1;
  412. if (headset->ramp != TWL6040_RAMP_NONE)
  413. headset_complete = twl6040_hs_ramp_step(codec,
  414. headset->left_step,
  415. headset->right_step);
  416. /* ramp finished ? */
  417. if (headset_complete)
  418. break;
  419. /*
  420. * TODO: tune: delay is longer over 0dB
  421. * as increases are larger.
  422. */
  423. if (i >= 8)
  424. schedule_timeout_interruptible(msecs_to_jiffies(delay +
  425. (delay >> 1)));
  426. else
  427. schedule_timeout_interruptible(msecs_to_jiffies(delay));
  428. }
  429. if (headset->ramp == TWL6040_RAMP_DOWN) {
  430. headset->active = 0;
  431. complete(&headset->ramp_done);
  432. } else {
  433. headset->active = 1;
  434. }
  435. headset->ramp = TWL6040_RAMP_NONE;
  436. }
  437. static void twl6040_pga_hf_work(struct work_struct *work)
  438. {
  439. struct twl6040_data *priv =
  440. container_of(work, struct twl6040_data, hf_delayed_work.work);
  441. struct snd_soc_codec *codec = priv->codec;
  442. struct twl6040_output *handsfree = &priv->handsfree;
  443. unsigned int delay = handsfree->step_delay;
  444. int i, handsfree_complete;
  445. /* do we need to ramp at all ? */
  446. if (handsfree->ramp == TWL6040_RAMP_NONE)
  447. return;
  448. /* HF PGA volumes have 5 bits of resolution to ramp */
  449. for (i = 0; i <= 32; i++) {
  450. handsfree_complete = 1;
  451. if (handsfree->ramp != TWL6040_RAMP_NONE)
  452. handsfree_complete = twl6040_hf_ramp_step(codec,
  453. handsfree->left_step,
  454. handsfree->right_step);
  455. /* ramp finished ? */
  456. if (handsfree_complete)
  457. break;
  458. /*
  459. * TODO: tune: delay is longer over 0dB
  460. * as increases are larger.
  461. */
  462. if (i >= 16)
  463. schedule_timeout_interruptible(msecs_to_jiffies(delay +
  464. (delay >> 1)));
  465. else
  466. schedule_timeout_interruptible(msecs_to_jiffies(delay));
  467. }
  468. if (handsfree->ramp == TWL6040_RAMP_DOWN) {
  469. handsfree->active = 0;
  470. complete(&handsfree->ramp_done);
  471. } else
  472. handsfree->active = 1;
  473. handsfree->ramp = TWL6040_RAMP_NONE;
  474. }
  475. static int pga_event(struct snd_soc_dapm_widget *w,
  476. struct snd_kcontrol *kcontrol, int event)
  477. {
  478. struct snd_soc_codec *codec = w->codec;
  479. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  480. struct twl6040_output *out;
  481. struct delayed_work *work;
  482. struct workqueue_struct *queue;
  483. switch (w->shift) {
  484. case 2:
  485. case 3:
  486. out = &priv->headset;
  487. work = &priv->hs_delayed_work;
  488. queue = priv->hs_workqueue;
  489. out->step_delay = 5; /* 5 ms between volume ramp steps */
  490. break;
  491. case 4:
  492. out = &priv->handsfree;
  493. work = &priv->hf_delayed_work;
  494. queue = priv->hf_workqueue;
  495. out->step_delay = 5; /* 5 ms between volume ramp steps */
  496. if (SND_SOC_DAPM_EVENT_ON(event))
  497. priv->non_lp++;
  498. else
  499. priv->non_lp--;
  500. break;
  501. default:
  502. return -1;
  503. }
  504. switch (event) {
  505. case SND_SOC_DAPM_POST_PMU:
  506. if (out->active)
  507. break;
  508. /* don't use volume ramp for power-up */
  509. out->left_step = out->left_vol;
  510. out->right_step = out->right_vol;
  511. if (!delayed_work_pending(work)) {
  512. out->ramp = TWL6040_RAMP_UP;
  513. queue_delayed_work(queue, work,
  514. msecs_to_jiffies(1));
  515. }
  516. break;
  517. case SND_SOC_DAPM_PRE_PMD:
  518. if (!out->active)
  519. break;
  520. if (!delayed_work_pending(work)) {
  521. /* use volume ramp for power-down */
  522. out->left_step = 1;
  523. out->right_step = 1;
  524. out->ramp = TWL6040_RAMP_DOWN;
  525. INIT_COMPLETION(out->ramp_done);
  526. queue_delayed_work(queue, work,
  527. msecs_to_jiffies(1));
  528. wait_for_completion_timeout(&out->ramp_done,
  529. msecs_to_jiffies(2000));
  530. }
  531. break;
  532. }
  533. return 0;
  534. }
  535. /* twl6040 codec manual power-up sequence */
  536. static void twl6040_power_up(struct snd_soc_codec *codec)
  537. {
  538. u8 ncpctl, ldoctl, lppllctl, accctl;
  539. ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
  540. ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
  541. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  542. accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
  543. /* enable reference system */
  544. ldoctl |= TWL6040_REFENA;
  545. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  546. msleep(10);
  547. /* enable internal oscillator */
  548. ldoctl |= TWL6040_OSCENA;
  549. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  550. udelay(10);
  551. /* enable high-side ldo */
  552. ldoctl |= TWL6040_HSLDOENA;
  553. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  554. udelay(244);
  555. /* enable negative charge pump */
  556. ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN;
  557. twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
  558. udelay(488);
  559. /* enable low-side ldo */
  560. ldoctl |= TWL6040_LSLDOENA;
  561. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  562. udelay(244);
  563. /* enable low-power pll */
  564. lppllctl |= TWL6040_LPLLENA;
  565. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  566. /* reset state machine */
  567. accctl |= TWL6040_RESETSPLIT;
  568. twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
  569. mdelay(5);
  570. accctl &= ~TWL6040_RESETSPLIT;
  571. twl6040_write(codec, TWL6040_REG_ACCCTL, accctl);
  572. /* disable internal oscillator */
  573. ldoctl &= ~TWL6040_OSCENA;
  574. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  575. }
  576. /* twl6040 codec manual power-down sequence */
  577. static void twl6040_power_down(struct snd_soc_codec *codec)
  578. {
  579. u8 ncpctl, ldoctl, lppllctl, accctl;
  580. ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL);
  581. ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL);
  582. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  583. accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL);
  584. /* enable internal oscillator */
  585. ldoctl |= TWL6040_OSCENA;
  586. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  587. udelay(10);
  588. /* disable low-power pll */
  589. lppllctl &= ~TWL6040_LPLLENA;
  590. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  591. /* disable low-side ldo */
  592. ldoctl &= ~TWL6040_LSLDOENA;
  593. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  594. udelay(244);
  595. /* disable negative charge pump */
  596. ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN);
  597. twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl);
  598. udelay(488);
  599. /* disable high-side ldo */
  600. ldoctl &= ~TWL6040_HSLDOENA;
  601. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  602. udelay(244);
  603. /* disable internal oscillator */
  604. ldoctl &= ~TWL6040_OSCENA;
  605. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  606. /* disable reference system */
  607. ldoctl &= ~TWL6040_REFENA;
  608. twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl);
  609. msleep(10);
  610. }
  611. /* set headset dac and driver power mode */
  612. static int headset_power_mode(struct snd_soc_codec *codec, int high_perf)
  613. {
  614. int hslctl, hsrctl;
  615. int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL;
  616. hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL);
  617. hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL);
  618. if (high_perf) {
  619. hslctl &= ~mask;
  620. hsrctl &= ~mask;
  621. } else {
  622. hslctl |= mask;
  623. hsrctl |= mask;
  624. }
  625. twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl);
  626. twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl);
  627. return 0;
  628. }
  629. static int twl6040_hs_dac_event(struct snd_soc_dapm_widget *w,
  630. struct snd_kcontrol *kcontrol, int event)
  631. {
  632. msleep(1);
  633. return 0;
  634. }
  635. static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w,
  636. struct snd_kcontrol *kcontrol, int event)
  637. {
  638. struct snd_soc_codec *codec = w->codec;
  639. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  640. if (SND_SOC_DAPM_EVENT_ON(event))
  641. priv->non_lp++;
  642. else
  643. priv->non_lp--;
  644. msleep(1);
  645. return 0;
  646. }
  647. static void twl6040_hs_jack_report(struct snd_soc_codec *codec,
  648. struct snd_soc_jack *jack, int report)
  649. {
  650. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  651. int status;
  652. mutex_lock(&priv->mutex);
  653. /* Sync status */
  654. status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS);
  655. if (status & TWL6040_PLUGCOMP)
  656. snd_soc_jack_report(jack, report, report);
  657. else
  658. snd_soc_jack_report(jack, 0, report);
  659. mutex_unlock(&priv->mutex);
  660. }
  661. void twl6040_hs_jack_detect(struct snd_soc_codec *codec,
  662. struct snd_soc_jack *jack, int report)
  663. {
  664. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  665. struct twl6040_jack_data *hs_jack = &priv->hs_jack;
  666. hs_jack->jack = jack;
  667. hs_jack->report = report;
  668. twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
  669. }
  670. EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect);
  671. static void twl6040_accessory_work(struct work_struct *work)
  672. {
  673. struct twl6040_data *priv = container_of(work,
  674. struct twl6040_data, delayed_work.work);
  675. struct snd_soc_codec *codec = priv->codec;
  676. struct twl6040_jack_data *hs_jack = &priv->hs_jack;
  677. twl6040_hs_jack_report(codec, hs_jack->jack, hs_jack->report);
  678. }
  679. /* audio interrupt handler */
  680. static irqreturn_t twl6040_naudint_handler(int irq, void *data)
  681. {
  682. struct snd_soc_codec *codec = data;
  683. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  684. u8 intid;
  685. twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID);
  686. if (intid & TWL6040_THINT)
  687. dev_alert(codec->dev, "die temp over-limit detection\n");
  688. if ((intid & TWL6040_PLUGINT) || (intid & TWL6040_UNPLUGINT))
  689. queue_delayed_work(priv->workqueue, &priv->delayed_work,
  690. msecs_to_jiffies(200));
  691. if (intid & TWL6040_HOOKINT)
  692. dev_info(codec->dev, "hook detection\n");
  693. if (intid & TWL6040_HFINT)
  694. dev_alert(codec->dev, "hf drivers over current detection\n");
  695. if (intid & TWL6040_VIBINT)
  696. dev_alert(codec->dev, "vib drivers over current detection\n");
  697. if (intid & TWL6040_READYINT)
  698. complete(&priv->ready);
  699. return IRQ_HANDLED;
  700. }
  701. static int twl6040_put_volsw(struct snd_kcontrol *kcontrol,
  702. struct snd_ctl_elem_value *ucontrol)
  703. {
  704. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  705. struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
  706. struct twl6040_output *out = NULL;
  707. struct soc_mixer_control *mc =
  708. (struct soc_mixer_control *)kcontrol->private_value;
  709. int ret;
  710. unsigned int reg = mc->reg;
  711. /* For HS and HF we shadow the values and only actually write
  712. * them out when active in order to ensure the amplifier comes on
  713. * as quietly as possible. */
  714. switch (reg) {
  715. case TWL6040_REG_HSGAIN:
  716. out = &twl6040_priv->headset;
  717. break;
  718. default:
  719. break;
  720. }
  721. if (out) {
  722. out->left_vol = ucontrol->value.integer.value[0];
  723. out->right_vol = ucontrol->value.integer.value[1];
  724. if (!out->active)
  725. return 1;
  726. }
  727. ret = snd_soc_put_volsw(kcontrol, ucontrol);
  728. if (ret < 0)
  729. return ret;
  730. return 1;
  731. }
  732. static int twl6040_get_volsw(struct snd_kcontrol *kcontrol,
  733. struct snd_ctl_elem_value *ucontrol)
  734. {
  735. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  736. struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
  737. struct twl6040_output *out = &twl6040_priv->headset;
  738. struct soc_mixer_control *mc =
  739. (struct soc_mixer_control *)kcontrol->private_value;
  740. unsigned int reg = mc->reg;
  741. switch (reg) {
  742. case TWL6040_REG_HSGAIN:
  743. out = &twl6040_priv->headset;
  744. ucontrol->value.integer.value[0] = out->left_vol;
  745. ucontrol->value.integer.value[1] = out->right_vol;
  746. return 0;
  747. default:
  748. break;
  749. }
  750. return snd_soc_get_volsw(kcontrol, ucontrol);
  751. }
  752. static int twl6040_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
  753. struct snd_ctl_elem_value *ucontrol)
  754. {
  755. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  756. struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
  757. struct twl6040_output *out = NULL;
  758. struct soc_mixer_control *mc =
  759. (struct soc_mixer_control *)kcontrol->private_value;
  760. int ret;
  761. unsigned int reg = mc->reg;
  762. /* For HS and HF we shadow the values and only actually write
  763. * them out when active in order to ensure the amplifier comes on
  764. * as quietly as possible. */
  765. switch (reg) {
  766. case TWL6040_REG_HFLGAIN:
  767. case TWL6040_REG_HFRGAIN:
  768. out = &twl6040_priv->handsfree;
  769. break;
  770. default:
  771. break;
  772. }
  773. if (out) {
  774. out->left_vol = ucontrol->value.integer.value[0];
  775. out->right_vol = ucontrol->value.integer.value[1];
  776. if (!out->active)
  777. return 1;
  778. }
  779. ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
  780. if (ret < 0)
  781. return ret;
  782. return 1;
  783. }
  784. static int twl6040_get_volsw_2r(struct snd_kcontrol *kcontrol,
  785. struct snd_ctl_elem_value *ucontrol)
  786. {
  787. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  788. struct twl6040_data *twl6040_priv = snd_soc_codec_get_drvdata(codec);
  789. struct twl6040_output *out = &twl6040_priv->handsfree;
  790. struct soc_mixer_control *mc =
  791. (struct soc_mixer_control *)kcontrol->private_value;
  792. unsigned int reg = mc->reg;
  793. /* If these are cached registers use the cache */
  794. switch (reg) {
  795. case TWL6040_REG_HFLGAIN:
  796. case TWL6040_REG_HFRGAIN:
  797. out = &twl6040_priv->handsfree;
  798. ucontrol->value.integer.value[0] = out->left_vol;
  799. ucontrol->value.integer.value[1] = out->right_vol;
  800. return 0;
  801. default:
  802. break;
  803. }
  804. return snd_soc_get_volsw_2r(kcontrol, ucontrol);
  805. }
  806. /* double control with volume update */
  807. #define SOC_TWL6040_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax,\
  808. xinvert, tlv_array)\
  809. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
  810. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
  811. SNDRV_CTL_ELEM_ACCESS_READWRITE,\
  812. .tlv.p = (tlv_array), \
  813. .info = snd_soc_info_volsw, .get = twl6040_get_volsw, \
  814. .put = twl6040_put_volsw, \
  815. .private_value = (unsigned long)&(struct soc_mixer_control) \
  816. {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
  817. .max = xmax, .platform_max = xmax, .invert = xinvert} }
  818. /* double control with volume update */
  819. #define SOC_TWL6040_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax,\
  820. xinvert, tlv_array)\
  821. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
  822. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
  823. SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  824. SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
  825. .tlv.p = (tlv_array), \
  826. .info = snd_soc_info_volsw_2r, \
  827. .get = twl6040_get_volsw_2r, .put = twl6040_put_volsw_2r_vu, \
  828. .private_value = (unsigned long)&(struct soc_mixer_control) \
  829. {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
  830. .rshift = xshift, .max = xmax, .invert = xinvert}, }
  831. /*
  832. * MICATT volume control:
  833. * from -6 to 0 dB in 6 dB steps
  834. */
  835. static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0);
  836. /*
  837. * MICGAIN volume control:
  838. * from -6 to 30 dB in 6 dB steps
  839. */
  840. static DECLARE_TLV_DB_SCALE(mic_amp_tlv, -600, 600, 0);
  841. /*
  842. * AFMGAIN volume control:
  843. * from 18 to 24 dB in 6 dB steps
  844. */
  845. static DECLARE_TLV_DB_SCALE(afm_amp_tlv, 1800, 600, 0);
  846. /*
  847. * HSGAIN volume control:
  848. * from -30 to 0 dB in 2 dB steps
  849. */
  850. static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0);
  851. /*
  852. * HFGAIN volume control:
  853. * from -52 to 6 dB in 2 dB steps
  854. */
  855. static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0);
  856. /*
  857. * EPGAIN volume control:
  858. * from -24 to 6 dB in 2 dB steps
  859. */
  860. static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0);
  861. /* Left analog microphone selection */
  862. static const char *twl6040_amicl_texts[] =
  863. {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"};
  864. /* Right analog microphone selection */
  865. static const char *twl6040_amicr_texts[] =
  866. {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"};
  867. static const struct soc_enum twl6040_enum[] = {
  868. SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts),
  869. SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts),
  870. };
  871. static const char *twl6040_hs_texts[] = {
  872. "Off", "HS DAC", "Line-In amp"
  873. };
  874. static const struct soc_enum twl6040_hs_enum[] = {
  875. SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
  876. twl6040_hs_texts),
  877. SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, ARRAY_SIZE(twl6040_hs_texts),
  878. twl6040_hs_texts),
  879. };
  880. static const char *twl6040_hf_texts[] = {
  881. "Off", "HF DAC", "Line-In amp"
  882. };
  883. static const struct soc_enum twl6040_hf_enum[] = {
  884. SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
  885. twl6040_hf_texts),
  886. SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, ARRAY_SIZE(twl6040_hf_texts),
  887. twl6040_hf_texts),
  888. };
  889. static const struct snd_kcontrol_new amicl_control =
  890. SOC_DAPM_ENUM("Route", twl6040_enum[0]);
  891. static const struct snd_kcontrol_new amicr_control =
  892. SOC_DAPM_ENUM("Route", twl6040_enum[1]);
  893. /* Headset DAC playback switches */
  894. static const struct snd_kcontrol_new hsl_mux_controls =
  895. SOC_DAPM_ENUM("Route", twl6040_hs_enum[0]);
  896. static const struct snd_kcontrol_new hsr_mux_controls =
  897. SOC_DAPM_ENUM("Route", twl6040_hs_enum[1]);
  898. /* Handsfree DAC playback switches */
  899. static const struct snd_kcontrol_new hfl_mux_controls =
  900. SOC_DAPM_ENUM("Route", twl6040_hf_enum[0]);
  901. static const struct snd_kcontrol_new hfr_mux_controls =
  902. SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]);
  903. static const struct snd_kcontrol_new ep_driver_switch_controls =
  904. SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0);
  905. static const struct snd_kcontrol_new twl6040_snd_controls[] = {
  906. /* Capture gains */
  907. SOC_DOUBLE_TLV("Capture Preamplifier Volume",
  908. TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv),
  909. SOC_DOUBLE_TLV("Capture Volume",
  910. TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv),
  911. /* AFM gains */
  912. SOC_DOUBLE_TLV("Aux FM Volume",
  913. TWL6040_REG_LINEGAIN, 0, 4, 0xF, 0, afm_amp_tlv),
  914. /* Playback gains */
  915. SOC_TWL6040_DOUBLE_TLV("Headset Playback Volume",
  916. TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv),
  917. SOC_TWL6040_DOUBLE_R_TLV("Handsfree Playback Volume",
  918. TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv),
  919. SOC_SINGLE_TLV("Earphone Playback Volume",
  920. TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv),
  921. };
  922. static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = {
  923. /* Inputs */
  924. SND_SOC_DAPM_INPUT("MAINMIC"),
  925. SND_SOC_DAPM_INPUT("HSMIC"),
  926. SND_SOC_DAPM_INPUT("SUBMIC"),
  927. SND_SOC_DAPM_INPUT("AFML"),
  928. SND_SOC_DAPM_INPUT("AFMR"),
  929. /* Outputs */
  930. SND_SOC_DAPM_OUTPUT("HSOL"),
  931. SND_SOC_DAPM_OUTPUT("HSOR"),
  932. SND_SOC_DAPM_OUTPUT("HFL"),
  933. SND_SOC_DAPM_OUTPUT("HFR"),
  934. SND_SOC_DAPM_OUTPUT("EP"),
  935. /* Analog input muxes for the capture amplifiers */
  936. SND_SOC_DAPM_MUX("Analog Left Capture Route",
  937. SND_SOC_NOPM, 0, 0, &amicl_control),
  938. SND_SOC_DAPM_MUX("Analog Right Capture Route",
  939. SND_SOC_NOPM, 0, 0, &amicr_control),
  940. /* Analog capture PGAs */
  941. SND_SOC_DAPM_PGA("MicAmpL",
  942. TWL6040_REG_MICLCTL, 0, 0, NULL, 0),
  943. SND_SOC_DAPM_PGA("MicAmpR",
  944. TWL6040_REG_MICRCTL, 0, 0, NULL, 0),
  945. /* Auxiliary FM PGAs */
  946. SND_SOC_DAPM_PGA("AFMAmpL",
  947. TWL6040_REG_MICLCTL, 1, 0, NULL, 0),
  948. SND_SOC_DAPM_PGA("AFMAmpR",
  949. TWL6040_REG_MICRCTL, 1, 0, NULL, 0),
  950. /* ADCs */
  951. SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture",
  952. TWL6040_REG_MICLCTL, 2, 0),
  953. SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture",
  954. TWL6040_REG_MICRCTL, 2, 0),
  955. /* Microphone bias */
  956. SND_SOC_DAPM_MICBIAS("Headset Mic Bias",
  957. TWL6040_REG_AMICBCTL, 0, 0),
  958. SND_SOC_DAPM_MICBIAS("Main Mic Bias",
  959. TWL6040_REG_AMICBCTL, 4, 0),
  960. SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias",
  961. TWL6040_REG_DMICBCTL, 0, 0),
  962. SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias",
  963. TWL6040_REG_DMICBCTL, 4, 0),
  964. /* DACs */
  965. SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback",
  966. TWL6040_REG_HSLCTL, 0, 0,
  967. twl6040_hs_dac_event,
  968. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  969. SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback",
  970. TWL6040_REG_HSRCTL, 0, 0,
  971. twl6040_hs_dac_event,
  972. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  973. SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback",
  974. TWL6040_REG_HFLCTL, 0, 0,
  975. twl6040_power_mode_event,
  976. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  977. SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback",
  978. TWL6040_REG_HFRCTL, 0, 0,
  979. twl6040_power_mode_event,
  980. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  981. SND_SOC_DAPM_MUX("HF Left Playback",
  982. SND_SOC_NOPM, 0, 0, &hfl_mux_controls),
  983. SND_SOC_DAPM_MUX("HF Right Playback",
  984. SND_SOC_NOPM, 0, 0, &hfr_mux_controls),
  985. /* Analog playback Muxes */
  986. SND_SOC_DAPM_MUX("HS Left Playback",
  987. SND_SOC_NOPM, 0, 0, &hsl_mux_controls),
  988. SND_SOC_DAPM_MUX("HS Right Playback",
  989. SND_SOC_NOPM, 0, 0, &hsr_mux_controls),
  990. /* Analog playback drivers */
  991. SND_SOC_DAPM_OUT_DRV_E("Handsfree Left Driver",
  992. TWL6040_REG_HFLCTL, 4, 0, NULL, 0,
  993. pga_event,
  994. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  995. SND_SOC_DAPM_OUT_DRV_E("Handsfree Right Driver",
  996. TWL6040_REG_HFRCTL, 4, 0, NULL, 0,
  997. pga_event,
  998. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  999. SND_SOC_DAPM_OUT_DRV_E("Headset Left Driver",
  1000. TWL6040_REG_HSLCTL, 2, 0, NULL, 0,
  1001. pga_event,
  1002. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  1003. SND_SOC_DAPM_OUT_DRV_E("Headset Right Driver",
  1004. TWL6040_REG_HSRCTL, 2, 0, NULL, 0,
  1005. pga_event,
  1006. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  1007. SND_SOC_DAPM_SWITCH_E("Earphone Driver",
  1008. SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls,
  1009. twl6040_power_mode_event,
  1010. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  1011. /* Analog playback PGAs */
  1012. SND_SOC_DAPM_PGA("HFDAC Left PGA",
  1013. TWL6040_REG_HFLCTL, 1, 0, NULL, 0),
  1014. SND_SOC_DAPM_PGA("HFDAC Right PGA",
  1015. TWL6040_REG_HFRCTL, 1, 0, NULL, 0),
  1016. };
  1017. static const struct snd_soc_dapm_route intercon[] = {
  1018. /* Capture path */
  1019. {"Analog Left Capture Route", "Headset Mic", "HSMIC"},
  1020. {"Analog Left Capture Route", "Main Mic", "MAINMIC"},
  1021. {"Analog Left Capture Route", "Aux/FM Left", "AFML"},
  1022. {"Analog Right Capture Route", "Headset Mic", "HSMIC"},
  1023. {"Analog Right Capture Route", "Sub Mic", "SUBMIC"},
  1024. {"Analog Right Capture Route", "Aux/FM Right", "AFMR"},
  1025. {"MicAmpL", NULL, "Analog Left Capture Route"},
  1026. {"MicAmpR", NULL, "Analog Right Capture Route"},
  1027. {"ADC Left", NULL, "MicAmpL"},
  1028. {"ADC Right", NULL, "MicAmpR"},
  1029. /* AFM path */
  1030. {"AFMAmpL", "NULL", "AFML"},
  1031. {"AFMAmpR", "NULL", "AFMR"},
  1032. {"HS Left Playback", "HS DAC", "HSDAC Left"},
  1033. {"HS Left Playback", "Line-In amp", "AFMAmpL"},
  1034. {"HS Right Playback", "HS DAC", "HSDAC Right"},
  1035. {"HS Right Playback", "Line-In amp", "AFMAmpR"},
  1036. {"Headset Left Driver", "NULL", "HS Left Playback"},
  1037. {"Headset Right Driver", "NULL", "HS Right Playback"},
  1038. {"HSOL", NULL, "Headset Left Driver"},
  1039. {"HSOR", NULL, "Headset Right Driver"},
  1040. /* Earphone playback path */
  1041. {"Earphone Driver", "Switch", "HSDAC Left"},
  1042. {"EP", NULL, "Earphone Driver"},
  1043. {"HF Left Playback", "HF DAC", "HFDAC Left"},
  1044. {"HF Left Playback", "Line-In amp", "AFMAmpL"},
  1045. {"HF Right Playback", "HF DAC", "HFDAC Right"},
  1046. {"HF Right Playback", "Line-In amp", "AFMAmpR"},
  1047. {"HFDAC Left PGA", NULL, "HF Left Playback"},
  1048. {"HFDAC Right PGA", NULL, "HF Right Playback"},
  1049. {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"},
  1050. {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"},
  1051. {"HFL", NULL, "Handsfree Left Driver"},
  1052. {"HFR", NULL, "Handsfree Right Driver"},
  1053. };
  1054. static int twl6040_add_widgets(struct snd_soc_codec *codec)
  1055. {
  1056. struct snd_soc_dapm_context *dapm = &codec->dapm;
  1057. snd_soc_dapm_new_controls(dapm, twl6040_dapm_widgets,
  1058. ARRAY_SIZE(twl6040_dapm_widgets));
  1059. snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
  1060. snd_soc_dapm_new_widgets(dapm);
  1061. return 0;
  1062. }
  1063. static int twl6040_power_up_completion(struct snd_soc_codec *codec,
  1064. int naudint)
  1065. {
  1066. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  1067. int time_left;
  1068. u8 intid;
  1069. time_left = wait_for_completion_timeout(&priv->ready,
  1070. msecs_to_jiffies(144));
  1071. if (!time_left) {
  1072. twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid,
  1073. TWL6040_REG_INTID);
  1074. if (!(intid & TWL6040_READYINT)) {
  1075. dev_err(codec->dev, "timeout waiting for READYINT\n");
  1076. return -ETIMEDOUT;
  1077. }
  1078. }
  1079. priv->codec_powered = 1;
  1080. return 0;
  1081. }
  1082. static int twl6040_set_bias_level(struct snd_soc_codec *codec,
  1083. enum snd_soc_bias_level level)
  1084. {
  1085. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  1086. int audpwron = priv->audpwron;
  1087. int naudint = priv->naudint;
  1088. int ret;
  1089. switch (level) {
  1090. case SND_SOC_BIAS_ON:
  1091. break;
  1092. case SND_SOC_BIAS_PREPARE:
  1093. break;
  1094. case SND_SOC_BIAS_STANDBY:
  1095. if (priv->codec_powered)
  1096. break;
  1097. if (gpio_is_valid(audpwron)) {
  1098. /* use AUDPWRON line */
  1099. gpio_set_value(audpwron, 1);
  1100. /* wait for power-up completion */
  1101. ret = twl6040_power_up_completion(codec, naudint);
  1102. if (ret)
  1103. return ret;
  1104. /* sync registers updated during power-up sequence */
  1105. twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
  1106. twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
  1107. twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL);
  1108. } else {
  1109. /* use manual power-up sequence */
  1110. twl6040_power_up(codec);
  1111. priv->codec_powered = 1;
  1112. }
  1113. /* initialize vdd/vss registers with reg_cache */
  1114. twl6040_init_vdd_regs(codec);
  1115. /* Set external boost GPO */
  1116. twl6040_write(codec, TWL6040_REG_GPOCTL, 0x02);
  1117. /* Set initial minimal gain values */
  1118. twl6040_write(codec, TWL6040_REG_HSGAIN, 0xFF);
  1119. twl6040_write(codec, TWL6040_REG_EARCTL, 0x1E);
  1120. twl6040_write(codec, TWL6040_REG_HFLGAIN, 0x1D);
  1121. twl6040_write(codec, TWL6040_REG_HFRGAIN, 0x1D);
  1122. break;
  1123. case SND_SOC_BIAS_OFF:
  1124. if (!priv->codec_powered)
  1125. break;
  1126. if (gpio_is_valid(audpwron)) {
  1127. /* use AUDPWRON line */
  1128. gpio_set_value(audpwron, 0);
  1129. /* power-down sequence latency */
  1130. udelay(500);
  1131. /* sync registers updated during power-down sequence */
  1132. twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL);
  1133. twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL);
  1134. twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL,
  1135. 0x00);
  1136. } else {
  1137. /* use manual power-down sequence */
  1138. twl6040_power_down(codec);
  1139. }
  1140. priv->codec_powered = 0;
  1141. break;
  1142. }
  1143. codec->dapm.bias_level = level;
  1144. return 0;
  1145. }
  1146. /* set of rates for each pll: low-power and high-performance */
  1147. static unsigned int lp_rates[] = {
  1148. 88200,
  1149. 96000,
  1150. };
  1151. static struct snd_pcm_hw_constraint_list lp_constraints = {
  1152. .count = ARRAY_SIZE(lp_rates),
  1153. .list = lp_rates,
  1154. };
  1155. static unsigned int hp_rates[] = {
  1156. 96000,
  1157. };
  1158. static struct snd_pcm_hw_constraint_list hp_constraints = {
  1159. .count = ARRAY_SIZE(hp_rates),
  1160. .list = hp_rates,
  1161. };
  1162. static int twl6040_startup(struct snd_pcm_substream *substream,
  1163. struct snd_soc_dai *dai)
  1164. {
  1165. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1166. struct snd_soc_codec *codec = rtd->codec;
  1167. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  1168. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1169. SNDRV_PCM_HW_PARAM_RATE,
  1170. priv->sysclk_constraints);
  1171. return 0;
  1172. }
  1173. static int twl6040_hw_params(struct snd_pcm_substream *substream,
  1174. struct snd_pcm_hw_params *params,
  1175. struct snd_soc_dai *dai)
  1176. {
  1177. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1178. struct snd_soc_codec *codec = rtd->codec;
  1179. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  1180. u8 lppllctl;
  1181. int rate;
  1182. /* nothing to do for high-perf pll, it supports only 48 kHz */
  1183. if (priv->pll == TWL6040_HPPLL_ID)
  1184. return 0;
  1185. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  1186. rate = params_rate(params);
  1187. switch (rate) {
  1188. case 11250:
  1189. case 22500:
  1190. case 44100:
  1191. case 88200:
  1192. lppllctl |= TWL6040_LPLLFIN;
  1193. priv->sysclk = 17640000;
  1194. break;
  1195. case 8000:
  1196. case 16000:
  1197. case 32000:
  1198. case 48000:
  1199. case 96000:
  1200. lppllctl &= ~TWL6040_LPLLFIN;
  1201. priv->sysclk = 19200000;
  1202. break;
  1203. default:
  1204. dev_err(codec->dev, "unsupported rate %d\n", rate);
  1205. return -EINVAL;
  1206. }
  1207. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  1208. return 0;
  1209. }
  1210. static int twl6040_prepare(struct snd_pcm_substream *substream,
  1211. struct snd_soc_dai *dai)
  1212. {
  1213. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1214. struct snd_soc_codec *codec = rtd->codec;
  1215. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  1216. if (!priv->sysclk) {
  1217. dev_err(codec->dev,
  1218. "no mclk configured, call set_sysclk() on init\n");
  1219. return -EINVAL;
  1220. }
  1221. /*
  1222. * capture is not supported at 17.64 MHz,
  1223. * it's reserved for headset low-power playback scenario
  1224. */
  1225. if ((priv->sysclk == 17640000) &&
  1226. substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  1227. dev_err(codec->dev,
  1228. "capture mode is not supported at %dHz\n",
  1229. priv->sysclk);
  1230. return -EINVAL;
  1231. }
  1232. if ((priv->sysclk == 17640000) && priv->non_lp) {
  1233. dev_err(codec->dev,
  1234. "some enabled paths aren't supported at %dHz\n",
  1235. priv->sysclk);
  1236. return -EPERM;
  1237. }
  1238. return 0;
  1239. }
  1240. static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1241. int clk_id, unsigned int freq, int dir)
  1242. {
  1243. struct snd_soc_codec *codec = codec_dai->codec;
  1244. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  1245. u8 hppllctl, lppllctl;
  1246. hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL);
  1247. lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL);
  1248. switch (clk_id) {
  1249. case TWL6040_SYSCLK_SEL_LPPLL:
  1250. switch (freq) {
  1251. case 32768:
  1252. /* headset dac and driver must be in low-power mode */
  1253. headset_power_mode(codec, 0);
  1254. /* clk32k input requires low-power pll */
  1255. lppllctl |= TWL6040_LPLLENA;
  1256. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  1257. mdelay(5);
  1258. lppllctl &= ~TWL6040_HPLLSEL;
  1259. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  1260. hppllctl &= ~TWL6040_HPLLENA;
  1261. twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
  1262. break;
  1263. default:
  1264. dev_err(codec->dev, "unknown mclk freq %d\n", freq);
  1265. return -EINVAL;
  1266. }
  1267. /* lppll divider */
  1268. switch (priv->sysclk) {
  1269. case 17640000:
  1270. lppllctl |= TWL6040_LPLLFIN;
  1271. break;
  1272. case 19200000:
  1273. lppllctl &= ~TWL6040_LPLLFIN;
  1274. break;
  1275. default:
  1276. /* sysclk not yet configured */
  1277. lppllctl &= ~TWL6040_LPLLFIN;
  1278. priv->sysclk = 19200000;
  1279. break;
  1280. }
  1281. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  1282. priv->pll = TWL6040_LPPLL_ID;
  1283. priv->sysclk_constraints = &lp_constraints;
  1284. break;
  1285. case TWL6040_SYSCLK_SEL_HPPLL:
  1286. hppllctl &= ~TWL6040_MCLK_MSK;
  1287. switch (freq) {
  1288. case 12000000:
  1289. /* mclk input, pll enabled */
  1290. hppllctl |= TWL6040_MCLK_12000KHZ |
  1291. TWL6040_HPLLSQRBP |
  1292. TWL6040_HPLLENA;
  1293. break;
  1294. case 19200000:
  1295. /* mclk input, pll disabled */
  1296. hppllctl |= TWL6040_MCLK_19200KHZ |
  1297. TWL6040_HPLLSQRENA |
  1298. TWL6040_HPLLBP;
  1299. break;
  1300. case 26000000:
  1301. /* mclk input, pll enabled */
  1302. hppllctl |= TWL6040_MCLK_26000KHZ |
  1303. TWL6040_HPLLSQRBP |
  1304. TWL6040_HPLLENA;
  1305. break;
  1306. case 38400000:
  1307. /* clk slicer, pll disabled */
  1308. hppllctl |= TWL6040_MCLK_38400KHZ |
  1309. TWL6040_HPLLSQRENA |
  1310. TWL6040_HPLLBP;
  1311. break;
  1312. default:
  1313. dev_err(codec->dev, "unknown mclk freq %d\n", freq);
  1314. return -EINVAL;
  1315. }
  1316. /* headset dac and driver must be in high-performance mode */
  1317. headset_power_mode(codec, 1);
  1318. twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl);
  1319. udelay(500);
  1320. lppllctl |= TWL6040_HPLLSEL;
  1321. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  1322. lppllctl &= ~TWL6040_LPLLENA;
  1323. twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl);
  1324. /* high-performance pll can provide only 19.2 MHz */
  1325. priv->pll = TWL6040_HPPLL_ID;
  1326. priv->sysclk = 19200000;
  1327. priv->sysclk_constraints = &hp_constraints;
  1328. break;
  1329. default:
  1330. dev_err(codec->dev, "unknown clk_id %d\n", clk_id);
  1331. return -EINVAL;
  1332. }
  1333. return 0;
  1334. }
  1335. static struct snd_soc_dai_ops twl6040_dai_ops = {
  1336. .startup = twl6040_startup,
  1337. .hw_params = twl6040_hw_params,
  1338. .prepare = twl6040_prepare,
  1339. .set_sysclk = twl6040_set_dai_sysclk,
  1340. };
  1341. static struct snd_soc_dai_driver twl6040_dai = {
  1342. .name = "twl6040-hifi",
  1343. .playback = {
  1344. .stream_name = "Playback",
  1345. .channels_min = 1,
  1346. .channels_max = 4,
  1347. .rates = TWL6040_RATES,
  1348. .formats = TWL6040_FORMATS,
  1349. },
  1350. .capture = {
  1351. .stream_name = "Capture",
  1352. .channels_min = 1,
  1353. .channels_max = 2,
  1354. .rates = TWL6040_RATES,
  1355. .formats = TWL6040_FORMATS,
  1356. },
  1357. .ops = &twl6040_dai_ops,
  1358. };
  1359. #ifdef CONFIG_PM
  1360. static int twl6040_suspend(struct snd_soc_codec *codec, pm_message_t state)
  1361. {
  1362. twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1363. return 0;
  1364. }
  1365. static int twl6040_resume(struct snd_soc_codec *codec)
  1366. {
  1367. twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1368. twl6040_set_bias_level(codec, codec->dapm.suspend_bias_level);
  1369. return 0;
  1370. }
  1371. #else
  1372. #define twl6040_suspend NULL
  1373. #define twl6040_resume NULL
  1374. #endif
  1375. static int twl6040_probe(struct snd_soc_codec *codec)
  1376. {
  1377. struct twl4030_codec_data *twl_codec = codec->dev->platform_data;
  1378. struct twl6040_data *priv;
  1379. int audpwron, naudint;
  1380. int ret = 0;
  1381. u8 icrev, intmr = TWL6040_ALLINT_MSK;
  1382. priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL);
  1383. if (priv == NULL)
  1384. return -ENOMEM;
  1385. snd_soc_codec_set_drvdata(codec, priv);
  1386. priv->codec = codec;
  1387. twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &icrev, TWL6040_REG_ASICREV);
  1388. if (twl_codec && (icrev > 0))
  1389. audpwron = twl_codec->audpwron_gpio;
  1390. else
  1391. audpwron = -EINVAL;
  1392. if (twl_codec)
  1393. naudint = twl_codec->naudint_irq;
  1394. else
  1395. naudint = 0;
  1396. priv->audpwron = audpwron;
  1397. priv->naudint = naudint;
  1398. priv->workqueue = create_singlethread_workqueue("twl6040-codec");
  1399. if (!priv->workqueue)
  1400. goto work_err;
  1401. INIT_DELAYED_WORK(&priv->delayed_work, twl6040_accessory_work);
  1402. mutex_init(&priv->mutex);
  1403. init_completion(&priv->ready);
  1404. init_completion(&priv->headset.ramp_done);
  1405. init_completion(&priv->handsfree.ramp_done);
  1406. if (gpio_is_valid(audpwron)) {
  1407. ret = gpio_request(audpwron, "audpwron");
  1408. if (ret)
  1409. goto gpio1_err;
  1410. ret = gpio_direction_output(audpwron, 0);
  1411. if (ret)
  1412. goto gpio2_err;
  1413. priv->codec_powered = 0;
  1414. /* enable only codec ready interrupt */
  1415. intmr &= ~(TWL6040_READYMSK | TWL6040_PLUGMSK);
  1416. /* reset interrupt status to allow correct power up sequence */
  1417. twl6040_read_reg_volatile(codec, TWL6040_REG_INTID);
  1418. }
  1419. twl6040_write(codec, TWL6040_REG_INTMR, intmr);
  1420. if (naudint) {
  1421. /* audio interrupt */
  1422. ret = request_threaded_irq(naudint, NULL,
  1423. twl6040_naudint_handler,
  1424. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  1425. "twl6040_codec", codec);
  1426. if (ret)
  1427. goto gpio2_err;
  1428. }
  1429. /* init vio registers */
  1430. twl6040_init_vio_regs(codec);
  1431. priv->hf_workqueue = create_singlethread_workqueue("twl6040-hf");
  1432. if (priv->hf_workqueue == NULL) {
  1433. ret = -ENOMEM;
  1434. goto irq_err;
  1435. }
  1436. priv->hs_workqueue = create_singlethread_workqueue("twl6040-hs");
  1437. if (priv->hs_workqueue == NULL) {
  1438. ret = -ENOMEM;
  1439. goto wq_err;
  1440. }
  1441. INIT_DELAYED_WORK(&priv->hs_delayed_work, twl6040_pga_hs_work);
  1442. INIT_DELAYED_WORK(&priv->hf_delayed_work, twl6040_pga_hf_work);
  1443. /* power on device */
  1444. ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1445. if (ret)
  1446. goto bias_err;
  1447. snd_soc_add_controls(codec, twl6040_snd_controls,
  1448. ARRAY_SIZE(twl6040_snd_controls));
  1449. twl6040_add_widgets(codec);
  1450. return 0;
  1451. bias_err:
  1452. destroy_workqueue(priv->hs_workqueue);
  1453. wq_err:
  1454. destroy_workqueue(priv->hf_workqueue);
  1455. irq_err:
  1456. if (naudint)
  1457. free_irq(naudint, codec);
  1458. gpio2_err:
  1459. if (gpio_is_valid(audpwron))
  1460. gpio_free(audpwron);
  1461. gpio1_err:
  1462. destroy_workqueue(priv->workqueue);
  1463. work_err:
  1464. kfree(priv);
  1465. return ret;
  1466. }
  1467. static int twl6040_remove(struct snd_soc_codec *codec)
  1468. {
  1469. struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec);
  1470. int audpwron = priv->audpwron;
  1471. int naudint = priv->naudint;
  1472. twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1473. if (gpio_is_valid(audpwron))
  1474. gpio_free(audpwron);
  1475. if (naudint)
  1476. free_irq(naudint, codec);
  1477. destroy_workqueue(priv->workqueue);
  1478. destroy_workqueue(priv->hf_workqueue);
  1479. destroy_workqueue(priv->hs_workqueue);
  1480. kfree(priv);
  1481. return 0;
  1482. }
  1483. static struct snd_soc_codec_driver soc_codec_dev_twl6040 = {
  1484. .probe = twl6040_probe,
  1485. .remove = twl6040_remove,
  1486. .suspend = twl6040_suspend,
  1487. .resume = twl6040_resume,
  1488. .read = twl6040_read_reg_cache,
  1489. .write = twl6040_write,
  1490. .set_bias_level = twl6040_set_bias_level,
  1491. .reg_cache_size = ARRAY_SIZE(twl6040_reg),
  1492. .reg_word_size = sizeof(u8),
  1493. .reg_cache_default = twl6040_reg,
  1494. };
  1495. static int __devinit twl6040_codec_probe(struct platform_device *pdev)
  1496. {
  1497. return snd_soc_register_codec(&pdev->dev,
  1498. &soc_codec_dev_twl6040, &twl6040_dai, 1);
  1499. }
  1500. static int __devexit twl6040_codec_remove(struct platform_device *pdev)
  1501. {
  1502. snd_soc_unregister_codec(&pdev->dev);
  1503. return 0;
  1504. }
  1505. static struct platform_driver twl6040_codec_driver = {
  1506. .driver = {
  1507. .name = "twl6040-codec",
  1508. .owner = THIS_MODULE,
  1509. },
  1510. .probe = twl6040_codec_probe,
  1511. .remove = __devexit_p(twl6040_codec_remove),
  1512. };
  1513. static int __init twl6040_codec_init(void)
  1514. {
  1515. return platform_driver_register(&twl6040_codec_driver);
  1516. }
  1517. module_init(twl6040_codec_init);
  1518. static void __exit twl6040_codec_exit(void)
  1519. {
  1520. platform_driver_unregister(&twl6040_codec_driver);
  1521. }
  1522. module_exit(twl6040_codec_exit);
  1523. MODULE_DESCRIPTION("ASoC TWL6040 codec driver");
  1524. MODULE_AUTHOR("Misael Lopez Cruz");
  1525. MODULE_LICENSE("GPL");