bf5xx-i2s.c 8.0 KB

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  1. /*
  2. * File: sound/soc/blackfin/bf5xx-i2s.c
  3. * Author: Cliff Cai <Cliff.Cai@analog.com>
  4. *
  5. * Created: Tue June 06 2008
  6. * Description: Blackfin I2S CPU DAI driver
  7. *
  8. * Modified:
  9. * Copyright 2008 Analog Devices Inc.
  10. *
  11. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, see the file COPYING, or write
  25. * to the Free Software Foundation, Inc.,
  26. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  27. */
  28. #include <linux/init.h>
  29. #include <linux/module.h>
  30. #include <linux/device.h>
  31. #include <linux/delay.h>
  32. #include <sound/core.h>
  33. #include <sound/pcm.h>
  34. #include <sound/pcm_params.h>
  35. #include <sound/initval.h>
  36. #include <sound/soc.h>
  37. #include <asm/irq.h>
  38. #include <asm/portmux.h>
  39. #include <linux/mutex.h>
  40. #include <linux/gpio.h>
  41. #include "bf5xx-sport.h"
  42. struct bf5xx_i2s_port {
  43. u16 tcr1;
  44. u16 rcr1;
  45. u16 tcr2;
  46. u16 rcr2;
  47. int configured;
  48. };
  49. static struct bf5xx_i2s_port bf5xx_i2s;
  50. static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM;
  51. static struct sport_param sport_params[2] = {
  52. {
  53. .dma_rx_chan = CH_SPORT0_RX,
  54. .dma_tx_chan = CH_SPORT0_TX,
  55. .err_irq = IRQ_SPORT0_ERROR,
  56. .regs = (struct sport_register *)SPORT0_TCR1,
  57. },
  58. {
  59. .dma_rx_chan = CH_SPORT1_RX,
  60. .dma_tx_chan = CH_SPORT1_TX,
  61. .err_irq = IRQ_SPORT1_ERROR,
  62. .regs = (struct sport_register *)SPORT1_TCR1,
  63. }
  64. };
  65. /*
  66. * Setting the TFS pin selector for SPORT 0 based on whether the selected
  67. * port id F or G. If the port is F then no conflict should exist for the
  68. * TFS. When Port G is selected and EMAC then there is a conflict between
  69. * the PHY interrupt line and TFS. Current settings prevent the conflict
  70. * by ignoring the TFS pin when Port G is selected. This allows both
  71. * codecs and EMAC using Port G concurrently.
  72. */
  73. #ifdef CONFIG_BF527_SPORT0_PORTG
  74. #define LOCAL_SPORT0_TFS (0)
  75. #else
  76. #define LOCAL_SPORT0_TFS (P_SPORT0_TFS)
  77. #endif
  78. static u16 sport_req[][7] = { {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  79. P_SPORT0_DRPRI, P_SPORT0_RSCLK, LOCAL_SPORT0_TFS, 0},
  80. {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, P_SPORT1_DRPRI,
  81. P_SPORT1_RSCLK, P_SPORT1_TFS, 0} };
  82. static int bf5xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
  83. unsigned int fmt)
  84. {
  85. int ret = 0;
  86. /* interface format:support I2S,slave mode */
  87. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  88. case SND_SOC_DAIFMT_I2S:
  89. bf5xx_i2s.tcr1 |= TFSR | TCKFE;
  90. bf5xx_i2s.rcr1 |= RFSR | RCKFE;
  91. bf5xx_i2s.tcr2 |= TSFSE;
  92. bf5xx_i2s.rcr2 |= RSFSE;
  93. break;
  94. case SND_SOC_DAIFMT_DSP_A:
  95. bf5xx_i2s.tcr1 |= TFSR;
  96. bf5xx_i2s.rcr1 |= RFSR;
  97. break;
  98. case SND_SOC_DAIFMT_LEFT_J:
  99. ret = -EINVAL;
  100. break;
  101. default:
  102. printk(KERN_ERR "%s: Unknown DAI format type\n", __func__);
  103. ret = -EINVAL;
  104. break;
  105. }
  106. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  107. case SND_SOC_DAIFMT_CBM_CFM:
  108. break;
  109. case SND_SOC_DAIFMT_CBS_CFS:
  110. case SND_SOC_DAIFMT_CBM_CFS:
  111. case SND_SOC_DAIFMT_CBS_CFM:
  112. ret = -EINVAL;
  113. break;
  114. default:
  115. printk(KERN_ERR "%s: Unknown DAI master type\n", __func__);
  116. ret = -EINVAL;
  117. break;
  118. }
  119. return ret;
  120. }
  121. static int bf5xx_i2s_hw_params(struct snd_pcm_substream *substream,
  122. struct snd_pcm_hw_params *params,
  123. struct snd_soc_dai *dai)
  124. {
  125. int ret = 0;
  126. bf5xx_i2s.tcr2 &= ~0x1f;
  127. bf5xx_i2s.rcr2 &= ~0x1f;
  128. switch (params_format(params)) {
  129. case SNDRV_PCM_FORMAT_S16_LE:
  130. bf5xx_i2s.tcr2 |= 15;
  131. bf5xx_i2s.rcr2 |= 15;
  132. sport_handle->wdsize = 2;
  133. break;
  134. case SNDRV_PCM_FORMAT_S24_LE:
  135. bf5xx_i2s.tcr2 |= 23;
  136. bf5xx_i2s.rcr2 |= 23;
  137. sport_handle->wdsize = 3;
  138. break;
  139. case SNDRV_PCM_FORMAT_S32_LE:
  140. bf5xx_i2s.tcr2 |= 31;
  141. bf5xx_i2s.rcr2 |= 31;
  142. sport_handle->wdsize = 4;
  143. break;
  144. }
  145. if (!bf5xx_i2s.configured) {
  146. /*
  147. * TX and RX are not independent,they are enabled at the
  148. * same time, even if only one side is running. So, we
  149. * need to configure both of them at the time when the first
  150. * stream is opened.
  151. *
  152. * CPU DAI:slave mode.
  153. */
  154. bf5xx_i2s.configured = 1;
  155. ret = sport_config_rx(sport_handle, bf5xx_i2s.rcr1,
  156. bf5xx_i2s.rcr2, 0, 0);
  157. if (ret) {
  158. pr_err("SPORT is busy!\n");
  159. return -EBUSY;
  160. }
  161. ret = sport_config_tx(sport_handle, bf5xx_i2s.tcr1,
  162. bf5xx_i2s.tcr2, 0, 0);
  163. if (ret) {
  164. pr_err("SPORT is busy!\n");
  165. return -EBUSY;
  166. }
  167. }
  168. return 0;
  169. }
  170. static void bf5xx_i2s_shutdown(struct snd_pcm_substream *substream,
  171. struct snd_soc_dai *dai)
  172. {
  173. pr_debug("%s enter\n", __func__);
  174. /* No active stream, SPORT is allowed to be configured again. */
  175. if (!dai->active)
  176. bf5xx_i2s.configured = 0;
  177. }
  178. static int bf5xx_i2s_probe(struct snd_soc_dai *dai)
  179. {
  180. pr_debug("%s enter\n", __func__);
  181. if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) {
  182. pr_err("Requesting Peripherals failed\n");
  183. return -EFAULT;
  184. }
  185. /* request DMA for SPORT */
  186. sport_handle = sport_init(&sport_params[sport_num], 4, \
  187. 2 * sizeof(u32), NULL);
  188. if (!sport_handle) {
  189. peripheral_free_list(&sport_req[sport_num][0]);
  190. return -ENODEV;
  191. }
  192. return 0;
  193. }
  194. static int bf5xx_i2s_remove(struct snd_soc_dai *dai)
  195. {
  196. pr_debug("%s enter\n", __func__);
  197. peripheral_free_list(&sport_req[sport_num][0]);
  198. return 0;
  199. }
  200. #ifdef CONFIG_PM
  201. static int bf5xx_i2s_suspend(struct snd_soc_dai *dai)
  202. {
  203. pr_debug("%s : sport %d\n", __func__, dai->id);
  204. if (dai->capture_active)
  205. sport_rx_stop(sport_handle);
  206. if (dai->playback_active)
  207. sport_tx_stop(sport_handle);
  208. return 0;
  209. }
  210. static int bf5xx_i2s_resume(struct snd_soc_dai *dai)
  211. {
  212. int ret;
  213. pr_debug("%s : sport %d\n", __func__, dai->id);
  214. ret = sport_config_rx(sport_handle, bf5xx_i2s.rcr1,
  215. bf5xx_i2s.rcr2, 0, 0);
  216. if (ret) {
  217. pr_err("SPORT is busy!\n");
  218. return -EBUSY;
  219. }
  220. ret = sport_config_tx(sport_handle, bf5xx_i2s.tcr1,
  221. bf5xx_i2s.tcr2, 0, 0);
  222. if (ret) {
  223. pr_err("SPORT is busy!\n");
  224. return -EBUSY;
  225. }
  226. return 0;
  227. }
  228. #else
  229. #define bf5xx_i2s_suspend NULL
  230. #define bf5xx_i2s_resume NULL
  231. #endif
  232. #define BF5XX_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  233. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
  234. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
  235. SNDRV_PCM_RATE_96000)
  236. #define BF5XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |\
  237. SNDRV_PCM_FMTBIT_S32_LE)
  238. static struct snd_soc_dai_ops bf5xx_i2s_dai_ops = {
  239. .shutdown = bf5xx_i2s_shutdown,
  240. .hw_params = bf5xx_i2s_hw_params,
  241. .set_fmt = bf5xx_i2s_set_dai_fmt,
  242. };
  243. static struct snd_soc_dai_driver bf5xx_i2s_dai = {
  244. .probe = bf5xx_i2s_probe,
  245. .remove = bf5xx_i2s_remove,
  246. .suspend = bf5xx_i2s_suspend,
  247. .resume = bf5xx_i2s_resume,
  248. .playback = {
  249. .channels_min = 1,
  250. .channels_max = 2,
  251. .rates = BF5XX_I2S_RATES,
  252. .formats = BF5XX_I2S_FORMATS,},
  253. .capture = {
  254. .channels_min = 1,
  255. .channels_max = 2,
  256. .rates = BF5XX_I2S_RATES,
  257. .formats = BF5XX_I2S_FORMATS,},
  258. .ops = &bf5xx_i2s_dai_ops,
  259. };
  260. static int bfin_i2s_drv_probe(struct platform_device *pdev)
  261. {
  262. return snd_soc_register_dai(&pdev->dev, &bf5xx_i2s_dai);
  263. }
  264. static int __devexit bfin_i2s_drv_remove(struct platform_device *pdev)
  265. {
  266. snd_soc_unregister_dai(&pdev->dev);
  267. return 0;
  268. }
  269. static struct platform_driver bfin_i2s_driver = {
  270. .probe = bfin_i2s_drv_probe,
  271. .remove = __devexit_p(bfin_i2s_drv_remove),
  272. .driver = {
  273. .name = "bf5xx-i2s",
  274. .owner = THIS_MODULE,
  275. },
  276. };
  277. static int __init bfin_i2s_init(void)
  278. {
  279. return platform_driver_register(&bfin_i2s_driver);
  280. }
  281. static void __exit bfin_i2s_exit(void)
  282. {
  283. platform_driver_unregister(&bfin_i2s_driver);
  284. }
  285. module_init(bfin_i2s_init);
  286. module_exit(bfin_i2s_exit);
  287. /* Module information */
  288. MODULE_AUTHOR("Cliff Cai");
  289. MODULE_DESCRIPTION("I2S driver for ADI Blackfin");
  290. MODULE_LICENSE("GPL");