chip.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674
  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include "internals.h"
  18. /**
  19. * irq_set_chip - set the irq chip for an irq
  20. * @irq: irq number
  21. * @chip: pointer to irq chip description structure
  22. */
  23. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  24. {
  25. unsigned long flags;
  26. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  27. if (!desc)
  28. return -EINVAL;
  29. if (!chip)
  30. chip = &no_irq_chip;
  31. desc->irq_data.chip = chip;
  32. irq_put_desc_unlock(desc, flags);
  33. /*
  34. * For !CONFIG_SPARSE_IRQ make the irq show up in
  35. * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
  36. * already marked, and this call is harmless.
  37. */
  38. irq_reserve_irq(irq);
  39. return 0;
  40. }
  41. EXPORT_SYMBOL(irq_set_chip);
  42. /**
  43. * irq_set_type - set the irq trigger type for an irq
  44. * @irq: irq number
  45. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  46. */
  47. int irq_set_irq_type(unsigned int irq, unsigned int type)
  48. {
  49. unsigned long flags;
  50. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
  51. int ret = 0;
  52. if (!desc)
  53. return -EINVAL;
  54. type &= IRQ_TYPE_SENSE_MASK;
  55. if (type != IRQ_TYPE_NONE)
  56. ret = __irq_set_trigger(desc, irq, type);
  57. irq_put_desc_busunlock(desc, flags);
  58. return ret;
  59. }
  60. EXPORT_SYMBOL(irq_set_irq_type);
  61. /**
  62. * irq_set_handler_data - set irq handler data for an irq
  63. * @irq: Interrupt number
  64. * @data: Pointer to interrupt specific data
  65. *
  66. * Set the hardware irq controller data for an irq
  67. */
  68. int irq_set_handler_data(unsigned int irq, void *data)
  69. {
  70. unsigned long flags;
  71. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  72. if (!desc)
  73. return -EINVAL;
  74. desc->irq_data.handler_data = data;
  75. irq_put_desc_unlock(desc, flags);
  76. return 0;
  77. }
  78. EXPORT_SYMBOL(irq_set_handler_data);
  79. /**
  80. * irq_set_msi_desc - set MSI descriptor data for an irq
  81. * @irq: Interrupt number
  82. * @entry: Pointer to MSI descriptor data
  83. *
  84. * Set the MSI descriptor entry for an irq
  85. */
  86. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  87. {
  88. unsigned long flags;
  89. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  90. if (!desc)
  91. return -EINVAL;
  92. desc->irq_data.msi_desc = entry;
  93. if (entry)
  94. entry->irq = irq;
  95. irq_put_desc_unlock(desc, flags);
  96. return 0;
  97. }
  98. /**
  99. * irq_set_chip_data - set irq chip data for an irq
  100. * @irq: Interrupt number
  101. * @data: Pointer to chip specific data
  102. *
  103. * Set the hardware irq chip data for an irq
  104. */
  105. int irq_set_chip_data(unsigned int irq, void *data)
  106. {
  107. unsigned long flags;
  108. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  109. if (!desc)
  110. return -EINVAL;
  111. desc->irq_data.chip_data = data;
  112. irq_put_desc_unlock(desc, flags);
  113. return 0;
  114. }
  115. EXPORT_SYMBOL(irq_set_chip_data);
  116. struct irq_data *irq_get_irq_data(unsigned int irq)
  117. {
  118. struct irq_desc *desc = irq_to_desc(irq);
  119. return desc ? &desc->irq_data : NULL;
  120. }
  121. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  122. static void irq_state_clr_disabled(struct irq_desc *desc)
  123. {
  124. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  125. }
  126. static void irq_state_set_disabled(struct irq_desc *desc)
  127. {
  128. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  129. }
  130. static void irq_state_clr_masked(struct irq_desc *desc)
  131. {
  132. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  133. }
  134. static void irq_state_set_masked(struct irq_desc *desc)
  135. {
  136. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  137. }
  138. int irq_startup(struct irq_desc *desc)
  139. {
  140. irq_state_clr_disabled(desc);
  141. desc->depth = 0;
  142. if (desc->irq_data.chip->irq_startup) {
  143. int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  144. irq_state_clr_masked(desc);
  145. return ret;
  146. }
  147. irq_enable(desc);
  148. return 0;
  149. }
  150. void irq_shutdown(struct irq_desc *desc)
  151. {
  152. irq_state_set_disabled(desc);
  153. desc->depth = 1;
  154. if (desc->irq_data.chip->irq_shutdown)
  155. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  156. if (desc->irq_data.chip->irq_disable)
  157. desc->irq_data.chip->irq_disable(&desc->irq_data);
  158. else
  159. desc->irq_data.chip->irq_mask(&desc->irq_data);
  160. irq_state_set_masked(desc);
  161. }
  162. void irq_enable(struct irq_desc *desc)
  163. {
  164. irq_state_clr_disabled(desc);
  165. if (desc->irq_data.chip->irq_enable)
  166. desc->irq_data.chip->irq_enable(&desc->irq_data);
  167. else
  168. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  169. irq_state_clr_masked(desc);
  170. }
  171. void irq_disable(struct irq_desc *desc)
  172. {
  173. irq_state_set_disabled(desc);
  174. if (desc->irq_data.chip->irq_disable) {
  175. desc->irq_data.chip->irq_disable(&desc->irq_data);
  176. irq_state_set_masked(desc);
  177. }
  178. }
  179. static inline void mask_ack_irq(struct irq_desc *desc)
  180. {
  181. if (desc->irq_data.chip->irq_mask_ack)
  182. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  183. else {
  184. desc->irq_data.chip->irq_mask(&desc->irq_data);
  185. if (desc->irq_data.chip->irq_ack)
  186. desc->irq_data.chip->irq_ack(&desc->irq_data);
  187. }
  188. irq_state_set_masked(desc);
  189. }
  190. void mask_irq(struct irq_desc *desc)
  191. {
  192. if (desc->irq_data.chip->irq_mask) {
  193. desc->irq_data.chip->irq_mask(&desc->irq_data);
  194. irq_state_set_masked(desc);
  195. }
  196. }
  197. void unmask_irq(struct irq_desc *desc)
  198. {
  199. if (desc->irq_data.chip->irq_unmask) {
  200. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  201. irq_state_clr_masked(desc);
  202. }
  203. }
  204. /*
  205. * handle_nested_irq - Handle a nested irq from a irq thread
  206. * @irq: the interrupt number
  207. *
  208. * Handle interrupts which are nested into a threaded interrupt
  209. * handler. The handler function is called inside the calling
  210. * threads context.
  211. */
  212. void handle_nested_irq(unsigned int irq)
  213. {
  214. struct irq_desc *desc = irq_to_desc(irq);
  215. struct irqaction *action;
  216. irqreturn_t action_ret;
  217. might_sleep();
  218. raw_spin_lock_irq(&desc->lock);
  219. kstat_incr_irqs_this_cpu(irq, desc);
  220. action = desc->action;
  221. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data)))
  222. goto out_unlock;
  223. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  224. raw_spin_unlock_irq(&desc->lock);
  225. action_ret = action->thread_fn(action->irq, action->dev_id);
  226. if (!noirqdebug)
  227. note_interrupt(irq, desc, action_ret);
  228. raw_spin_lock_irq(&desc->lock);
  229. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  230. out_unlock:
  231. raw_spin_unlock_irq(&desc->lock);
  232. }
  233. EXPORT_SYMBOL_GPL(handle_nested_irq);
  234. static bool irq_check_poll(struct irq_desc *desc)
  235. {
  236. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  237. return false;
  238. return irq_wait_for_poll(desc);
  239. }
  240. /**
  241. * handle_simple_irq - Simple and software-decoded IRQs.
  242. * @irq: the interrupt number
  243. * @desc: the interrupt description structure for this irq
  244. *
  245. * Simple interrupts are either sent from a demultiplexing interrupt
  246. * handler or come from hardware, where no interrupt hardware control
  247. * is necessary.
  248. *
  249. * Note: The caller is expected to handle the ack, clear, mask and
  250. * unmask issues if necessary.
  251. */
  252. void
  253. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  254. {
  255. raw_spin_lock(&desc->lock);
  256. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  257. if (!irq_check_poll(desc))
  258. goto out_unlock;
  259. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  260. kstat_incr_irqs_this_cpu(irq, desc);
  261. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
  262. goto out_unlock;
  263. handle_irq_event(desc);
  264. out_unlock:
  265. raw_spin_unlock(&desc->lock);
  266. }
  267. /**
  268. * handle_level_irq - Level type irq handler
  269. * @irq: the interrupt number
  270. * @desc: the interrupt description structure for this irq
  271. *
  272. * Level type interrupts are active as long as the hardware line has
  273. * the active level. This may require to mask the interrupt and unmask
  274. * it after the associated handler has acknowledged the device, so the
  275. * interrupt line is back to inactive.
  276. */
  277. void
  278. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  279. {
  280. raw_spin_lock(&desc->lock);
  281. mask_ack_irq(desc);
  282. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  283. if (!irq_check_poll(desc))
  284. goto out_unlock;
  285. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  286. kstat_incr_irqs_this_cpu(irq, desc);
  287. /*
  288. * If its disabled or no action available
  289. * keep it masked and get out of here
  290. */
  291. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
  292. goto out_unlock;
  293. handle_irq_event(desc);
  294. if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
  295. unmask_irq(desc);
  296. out_unlock:
  297. raw_spin_unlock(&desc->lock);
  298. }
  299. EXPORT_SYMBOL_GPL(handle_level_irq);
  300. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  301. static inline void preflow_handler(struct irq_desc *desc)
  302. {
  303. if (desc->preflow_handler)
  304. desc->preflow_handler(&desc->irq_data);
  305. }
  306. #else
  307. static inline void preflow_handler(struct irq_desc *desc) { }
  308. #endif
  309. /**
  310. * handle_fasteoi_irq - irq handler for transparent controllers
  311. * @irq: the interrupt number
  312. * @desc: the interrupt description structure for this irq
  313. *
  314. * Only a single callback will be issued to the chip: an ->eoi()
  315. * call when the interrupt has been serviced. This enables support
  316. * for modern forms of interrupt handlers, which handle the flow
  317. * details in hardware, transparently.
  318. */
  319. void
  320. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  321. {
  322. raw_spin_lock(&desc->lock);
  323. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  324. if (!irq_check_poll(desc))
  325. goto out;
  326. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  327. kstat_incr_irqs_this_cpu(irq, desc);
  328. /*
  329. * If its disabled or no action available
  330. * then mask it and get out of here:
  331. */
  332. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  333. desc->istate |= IRQS_PENDING;
  334. mask_irq(desc);
  335. goto out;
  336. }
  337. if (desc->istate & IRQS_ONESHOT)
  338. mask_irq(desc);
  339. preflow_handler(desc);
  340. handle_irq_event(desc);
  341. out_eoi:
  342. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  343. out_unlock:
  344. raw_spin_unlock(&desc->lock);
  345. return;
  346. out:
  347. if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
  348. goto out_eoi;
  349. goto out_unlock;
  350. }
  351. /**
  352. * handle_edge_irq - edge type IRQ handler
  353. * @irq: the interrupt number
  354. * @desc: the interrupt description structure for this irq
  355. *
  356. * Interrupt occures on the falling and/or rising edge of a hardware
  357. * signal. The occurence is latched into the irq controller hardware
  358. * and must be acked in order to be reenabled. After the ack another
  359. * interrupt can happen on the same source even before the first one
  360. * is handled by the associated event handler. If this happens it
  361. * might be necessary to disable (mask) the interrupt depending on the
  362. * controller hardware. This requires to reenable the interrupt inside
  363. * of the loop which handles the interrupts which have arrived while
  364. * the handler was running. If all pending interrupts are handled, the
  365. * loop is left.
  366. */
  367. void
  368. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  369. {
  370. raw_spin_lock(&desc->lock);
  371. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  372. /*
  373. * If we're currently running this IRQ, or its disabled,
  374. * we shouldn't process the IRQ. Mark it pending, handle
  375. * the necessary masking and go out
  376. */
  377. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  378. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  379. if (!irq_check_poll(desc)) {
  380. desc->istate |= IRQS_PENDING;
  381. mask_ack_irq(desc);
  382. goto out_unlock;
  383. }
  384. }
  385. kstat_incr_irqs_this_cpu(irq, desc);
  386. /* Start handling the irq */
  387. desc->irq_data.chip->irq_ack(&desc->irq_data);
  388. do {
  389. if (unlikely(!desc->action)) {
  390. mask_irq(desc);
  391. goto out_unlock;
  392. }
  393. /*
  394. * When another irq arrived while we were handling
  395. * one, we could have masked the irq.
  396. * Renable it, if it was not disabled in meantime.
  397. */
  398. if (unlikely(desc->istate & IRQS_PENDING)) {
  399. if (!irqd_irq_disabled(&desc->irq_data) &&
  400. irqd_irq_masked(&desc->irq_data))
  401. unmask_irq(desc);
  402. }
  403. handle_irq_event(desc);
  404. } while ((desc->istate & IRQS_PENDING) &&
  405. !irqd_irq_disabled(&desc->irq_data));
  406. out_unlock:
  407. raw_spin_unlock(&desc->lock);
  408. }
  409. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  410. /**
  411. * handle_edge_eoi_irq - edge eoi type IRQ handler
  412. * @irq: the interrupt number
  413. * @desc: the interrupt description structure for this irq
  414. *
  415. * Similar as the above handle_edge_irq, but using eoi and w/o the
  416. * mask/unmask logic.
  417. */
  418. void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
  419. {
  420. struct irq_chip *chip = irq_desc_get_chip(desc);
  421. raw_spin_lock(&desc->lock);
  422. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  423. /*
  424. * If we're currently running this IRQ, or its disabled,
  425. * we shouldn't process the IRQ. Mark it pending, handle
  426. * the necessary masking and go out
  427. */
  428. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  429. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  430. if (!irq_check_poll(desc)) {
  431. desc->istate |= IRQS_PENDING;
  432. goto out_eoi;
  433. }
  434. }
  435. kstat_incr_irqs_this_cpu(irq, desc);
  436. do {
  437. if (unlikely(!desc->action))
  438. goto out_eoi;
  439. handle_irq_event(desc);
  440. } while ((desc->istate & IRQS_PENDING) &&
  441. !irqd_irq_disabled(&desc->irq_data));
  442. out_unlock:
  443. chip->irq_eoi(&desc->irq_data);
  444. raw_spin_unlock(&desc->lock);
  445. }
  446. #endif
  447. /**
  448. * handle_percpu_irq - Per CPU local irq handler
  449. * @irq: the interrupt number
  450. * @desc: the interrupt description structure for this irq
  451. *
  452. * Per CPU interrupts on SMP machines without locking requirements
  453. */
  454. void
  455. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  456. {
  457. struct irq_chip *chip = irq_desc_get_chip(desc);
  458. kstat_incr_irqs_this_cpu(irq, desc);
  459. if (chip->irq_ack)
  460. chip->irq_ack(&desc->irq_data);
  461. handle_irq_event_percpu(desc, desc->action);
  462. if (chip->irq_eoi)
  463. chip->irq_eoi(&desc->irq_data);
  464. }
  465. void
  466. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  467. const char *name)
  468. {
  469. unsigned long flags;
  470. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
  471. if (!desc)
  472. return;
  473. if (!handle) {
  474. handle = handle_bad_irq;
  475. } else {
  476. if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
  477. goto out;
  478. }
  479. /* Uninstall? */
  480. if (handle == handle_bad_irq) {
  481. if (desc->irq_data.chip != &no_irq_chip)
  482. mask_ack_irq(desc);
  483. irq_state_set_disabled(desc);
  484. desc->depth = 1;
  485. }
  486. desc->handle_irq = handle;
  487. desc->name = name;
  488. if (handle != handle_bad_irq && is_chained) {
  489. irq_settings_set_noprobe(desc);
  490. irq_settings_set_norequest(desc);
  491. irq_startup(desc);
  492. }
  493. out:
  494. irq_put_desc_busunlock(desc, flags);
  495. }
  496. EXPORT_SYMBOL_GPL(__irq_set_handler);
  497. void
  498. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  499. irq_flow_handler_t handle, const char *name)
  500. {
  501. irq_set_chip(irq, chip);
  502. __irq_set_handler(irq, handle, 0, name);
  503. }
  504. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  505. {
  506. unsigned long flags;
  507. struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
  508. if (!desc)
  509. return;
  510. irq_settings_clr_and_set(desc, clr, set);
  511. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  512. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  513. if (irq_settings_has_no_balance_set(desc))
  514. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  515. if (irq_settings_is_per_cpu(desc))
  516. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  517. if (irq_settings_can_move_pcntxt(desc))
  518. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  519. if (irq_settings_is_level(desc))
  520. irqd_set(&desc->irq_data, IRQD_LEVEL);
  521. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  522. irq_put_desc_unlock(desc, flags);
  523. }
  524. /**
  525. * irq_cpu_online - Invoke all irq_cpu_online functions.
  526. *
  527. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  528. * for each.
  529. */
  530. void irq_cpu_online(void)
  531. {
  532. struct irq_desc *desc;
  533. struct irq_chip *chip;
  534. unsigned long flags;
  535. unsigned int irq;
  536. for_each_active_irq(irq) {
  537. desc = irq_to_desc(irq);
  538. if (!desc)
  539. continue;
  540. raw_spin_lock_irqsave(&desc->lock, flags);
  541. chip = irq_data_get_irq_chip(&desc->irq_data);
  542. if (chip && chip->irq_cpu_online &&
  543. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  544. !irqd_irq_disabled(&desc->irq_data)))
  545. chip->irq_cpu_online(&desc->irq_data);
  546. raw_spin_unlock_irqrestore(&desc->lock, flags);
  547. }
  548. }
  549. /**
  550. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  551. *
  552. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  553. * for each.
  554. */
  555. void irq_cpu_offline(void)
  556. {
  557. struct irq_desc *desc;
  558. struct irq_chip *chip;
  559. unsigned long flags;
  560. unsigned int irq;
  561. for_each_active_irq(irq) {
  562. desc = irq_to_desc(irq);
  563. if (!desc)
  564. continue;
  565. raw_spin_lock_irqsave(&desc->lock, flags);
  566. chip = irq_data_get_irq_chip(&desc->irq_data);
  567. if (chip && chip->irq_cpu_offline &&
  568. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  569. !irqd_irq_disabled(&desc->irq_data)))
  570. chip->irq_cpu_offline(&desc->irq_data);
  571. raw_spin_unlock_irqrestore(&desc->lock, flags);
  572. }
  573. }