ath79_wdt.c 6.7 KB

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  1. /*
  2. * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
  3. *
  4. * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6. *
  7. * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
  8. * Author: Deepak Saxena <dsaxena@plexity.net>
  9. * Copyright 2004 (c) MontaVista, Software, Inc.
  10. *
  11. * which again was based on sa1100 driver,
  12. * Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License version 2 as published
  16. * by the Free Software Foundation.
  17. *
  18. */
  19. #include <linux/bitops.h>
  20. #include <linux/errno.h>
  21. #include <linux/fs.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/module.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/types.h>
  29. #include <linux/watchdog.h>
  30. #include <linux/clk.h>
  31. #include <linux/err.h>
  32. #include <asm/mach-ath79/ath79.h>
  33. #include <asm/mach-ath79/ar71xx_regs.h>
  34. #define DRIVER_NAME "ath79-wdt"
  35. #define WDT_TIMEOUT 15 /* seconds */
  36. #define WDOG_CTRL_LAST_RESET BIT(31)
  37. #define WDOG_CTRL_ACTION_MASK 3
  38. #define WDOG_CTRL_ACTION_NONE 0 /* no action */
  39. #define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
  40. #define WDOG_CTRL_ACTION_NMI 2 /* NMI */
  41. #define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
  42. static int nowayout = WATCHDOG_NOWAYOUT;
  43. module_param(nowayout, int, 0);
  44. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  45. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  46. static int timeout = WDT_TIMEOUT;
  47. module_param(timeout, int, 0);
  48. MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
  49. "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");
  50. static unsigned long wdt_flags;
  51. #define WDT_FLAGS_BUSY 0
  52. #define WDT_FLAGS_EXPECT_CLOSE 1
  53. static struct clk *wdt_clk;
  54. static unsigned long wdt_freq;
  55. static int boot_status;
  56. static int max_timeout;
  57. static inline void ath79_wdt_keepalive(void)
  58. {
  59. ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout);
  60. }
  61. static inline void ath79_wdt_enable(void)
  62. {
  63. ath79_wdt_keepalive();
  64. ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
  65. }
  66. static inline void ath79_wdt_disable(void)
  67. {
  68. ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
  69. }
  70. static int ath79_wdt_set_timeout(int val)
  71. {
  72. if (val < 1 || val > max_timeout)
  73. return -EINVAL;
  74. timeout = val;
  75. ath79_wdt_keepalive();
  76. return 0;
  77. }
  78. static int ath79_wdt_open(struct inode *inode, struct file *file)
  79. {
  80. if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
  81. return -EBUSY;
  82. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  83. ath79_wdt_enable();
  84. return nonseekable_open(inode, file);
  85. }
  86. static int ath79_wdt_release(struct inode *inode, struct file *file)
  87. {
  88. if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags))
  89. ath79_wdt_disable();
  90. else {
  91. pr_crit(DRIVER_NAME ": device closed unexpectedly, "
  92. "watchdog timer will not stop!\n");
  93. ath79_wdt_keepalive();
  94. }
  95. clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
  96. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  97. return 0;
  98. }
  99. static ssize_t ath79_wdt_write(struct file *file, const char *data,
  100. size_t len, loff_t *ppos)
  101. {
  102. if (len) {
  103. if (!nowayout) {
  104. size_t i;
  105. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  106. for (i = 0; i != len; i++) {
  107. char c;
  108. if (get_user(c, data + i))
  109. return -EFAULT;
  110. if (c == 'V')
  111. set_bit(WDT_FLAGS_EXPECT_CLOSE,
  112. &wdt_flags);
  113. }
  114. }
  115. ath79_wdt_keepalive();
  116. }
  117. return len;
  118. }
  119. static const struct watchdog_info ath79_wdt_info = {
  120. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  121. WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
  122. .firmware_version = 0,
  123. .identity = "ATH79 watchdog",
  124. };
  125. static long ath79_wdt_ioctl(struct file *file, unsigned int cmd,
  126. unsigned long arg)
  127. {
  128. void __user *argp = (void __user *)arg;
  129. int __user *p = argp;
  130. int err;
  131. int t;
  132. switch (cmd) {
  133. case WDIOC_GETSUPPORT:
  134. err = copy_to_user(argp, &ath79_wdt_info,
  135. sizeof(ath79_wdt_info)) ? -EFAULT : 0;
  136. break;
  137. case WDIOC_GETSTATUS:
  138. err = put_user(0, p);
  139. break;
  140. case WDIOC_GETBOOTSTATUS:
  141. err = put_user(boot_status, p);
  142. break;
  143. case WDIOC_KEEPALIVE:
  144. ath79_wdt_keepalive();
  145. err = 0;
  146. break;
  147. case WDIOC_SETTIMEOUT:
  148. err = get_user(t, p);
  149. if (err)
  150. break;
  151. err = ath79_wdt_set_timeout(t);
  152. if (err)
  153. break;
  154. /* fallthrough */
  155. case WDIOC_GETTIMEOUT:
  156. err = put_user(timeout, p);
  157. break;
  158. default:
  159. err = -ENOTTY;
  160. break;
  161. }
  162. return err;
  163. }
  164. static const struct file_operations ath79_wdt_fops = {
  165. .owner = THIS_MODULE,
  166. .llseek = no_llseek,
  167. .write = ath79_wdt_write,
  168. .unlocked_ioctl = ath79_wdt_ioctl,
  169. .open = ath79_wdt_open,
  170. .release = ath79_wdt_release,
  171. };
  172. static struct miscdevice ath79_wdt_miscdev = {
  173. .minor = WATCHDOG_MINOR,
  174. .name = "watchdog",
  175. .fops = &ath79_wdt_fops,
  176. };
  177. static int __devinit ath79_wdt_probe(struct platform_device *pdev)
  178. {
  179. u32 ctrl;
  180. int err;
  181. wdt_clk = clk_get(&pdev->dev, "wdt");
  182. if (IS_ERR(wdt_clk))
  183. return PTR_ERR(wdt_clk);
  184. err = clk_enable(wdt_clk);
  185. if (err)
  186. goto err_clk_put;
  187. wdt_freq = clk_get_rate(wdt_clk);
  188. if (!wdt_freq) {
  189. err = -EINVAL;
  190. goto err_clk_disable;
  191. }
  192. max_timeout = (0xfffffffful / wdt_freq);
  193. if (timeout < 1 || timeout > max_timeout) {
  194. timeout = max_timeout;
  195. dev_info(&pdev->dev,
  196. "timeout value must be 0 < timeout < %d, using %d\n",
  197. max_timeout, timeout);
  198. }
  199. ctrl = ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
  200. boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
  201. err = misc_register(&ath79_wdt_miscdev);
  202. if (err) {
  203. dev_err(&pdev->dev,
  204. "unable to register misc device, err=%d\n", err);
  205. goto err_clk_disable;
  206. }
  207. return 0;
  208. err_clk_disable:
  209. clk_disable(wdt_clk);
  210. err_clk_put:
  211. clk_put(wdt_clk);
  212. return err;
  213. }
  214. static int __devexit ath79_wdt_remove(struct platform_device *pdev)
  215. {
  216. misc_deregister(&ath79_wdt_miscdev);
  217. clk_disable(wdt_clk);
  218. clk_put(wdt_clk);
  219. return 0;
  220. }
  221. static void ath97_wdt_shutdown(struct platform_device *pdev)
  222. {
  223. ath79_wdt_disable();
  224. }
  225. static struct platform_driver ath79_wdt_driver = {
  226. .remove = __devexit_p(ath79_wdt_remove),
  227. .shutdown = ath97_wdt_shutdown,
  228. .driver = {
  229. .name = DRIVER_NAME,
  230. .owner = THIS_MODULE,
  231. },
  232. };
  233. static int __init ath79_wdt_init(void)
  234. {
  235. return platform_driver_probe(&ath79_wdt_driver, ath79_wdt_probe);
  236. }
  237. module_init(ath79_wdt_init);
  238. static void __exit ath79_wdt_exit(void)
  239. {
  240. platform_driver_unregister(&ath79_wdt_driver);
  241. }
  242. module_exit(ath79_wdt_exit);
  243. MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
  244. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
  245. MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
  246. MODULE_LICENSE("GPL v2");
  247. MODULE_ALIAS("platform:" DRIVER_NAME);
  248. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);