panel-tpo-td043mtea1.c 12 KB

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  1. /*
  2. * LCD panel driver for TPO TD043MTEA1
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/delay.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/gpio.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <plat/display.h>
  19. #define TPO_R02_MODE(x) ((x) & 7)
  20. #define TPO_R02_MODE_800x480 7
  21. #define TPO_R02_NCLK_RISING BIT(3)
  22. #define TPO_R02_HSYNC_HIGH BIT(4)
  23. #define TPO_R02_VSYNC_HIGH BIT(5)
  24. #define TPO_R03_NSTANDBY BIT(0)
  25. #define TPO_R03_EN_CP_CLK BIT(1)
  26. #define TPO_R03_EN_VGL_PUMP BIT(2)
  27. #define TPO_R03_EN_PWM BIT(3)
  28. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  29. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  30. #define TPO_R03_SOFTWARE_CTL BIT(7)
  31. #define TPO_R04_NFLIP_H BIT(0)
  32. #define TPO_R04_NFLIP_V BIT(1)
  33. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  34. #define TPO_R04_VGL_FREQ_1H BIT(4)
  35. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  36. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  37. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  38. TPO_R03_SOFTWARE_CTL)
  39. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  40. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  41. static const u16 tpo_td043_def_gamma[12] = {
  42. 106, 200, 289, 375, 460, 543, 625, 705, 785, 864, 942, 1020
  43. };
  44. struct tpo_td043_device {
  45. struct spi_device *spi;
  46. struct regulator *vcc_reg;
  47. u16 gamma[12];
  48. u32 mode;
  49. u32 hmirror:1;
  50. u32 vmirror:1;
  51. };
  52. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  53. {
  54. struct spi_message m;
  55. struct spi_transfer xfer;
  56. u16 w;
  57. int r;
  58. spi_message_init(&m);
  59. memset(&xfer, 0, sizeof(xfer));
  60. w = ((u16)addr << 10) | (1 << 8) | data;
  61. xfer.tx_buf = &w;
  62. xfer.bits_per_word = 16;
  63. xfer.len = 2;
  64. spi_message_add_tail(&xfer, &m);
  65. r = spi_sync(spi, &m);
  66. if (r < 0)
  67. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  68. return r;
  69. }
  70. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  71. {
  72. u8 i, val;
  73. /* gamma bits [9:8] */
  74. for (val = i = 0; i < 4; i++)
  75. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  76. tpo_td043_write(spi, 0x11, val);
  77. for (val = i = 0; i < 4; i++)
  78. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  79. tpo_td043_write(spi, 0x12, val);
  80. for (val = i = 0; i < 4; i++)
  81. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  82. tpo_td043_write(spi, 0x13, val);
  83. /* gamma bits [7:0] */
  84. for (val = i = 0; i < 12; i++)
  85. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  86. }
  87. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  88. {
  89. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
  90. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  91. if (h)
  92. reg4 &= ~TPO_R04_NFLIP_H;
  93. if (v)
  94. reg4 &= ~TPO_R04_NFLIP_V;
  95. return tpo_td043_write(spi, 4, reg4);
  96. }
  97. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  98. {
  99. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  100. tpo_td043->hmirror = enable;
  101. return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  102. tpo_td043->vmirror);
  103. }
  104. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  105. {
  106. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  107. return tpo_td043->hmirror;
  108. }
  109. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  110. struct device_attribute *attr, char *buf)
  111. {
  112. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  113. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
  114. }
  115. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  116. struct device_attribute *attr, const char *buf, size_t count)
  117. {
  118. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  119. long val;
  120. int ret;
  121. ret = strict_strtol(buf, 0, &val);
  122. if (ret < 0)
  123. return ret;
  124. ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
  125. if (ret < 0)
  126. return ret;
  127. tpo_td043->vmirror = val;
  128. return count;
  129. }
  130. static ssize_t tpo_td043_mode_show(struct device *dev,
  131. struct device_attribute *attr, char *buf)
  132. {
  133. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  134. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
  135. }
  136. static ssize_t tpo_td043_mode_store(struct device *dev,
  137. struct device_attribute *attr, const char *buf, size_t count)
  138. {
  139. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  140. long val;
  141. int ret;
  142. ret = strict_strtol(buf, 0, &val);
  143. if (ret != 0 || val & ~7)
  144. return -EINVAL;
  145. tpo_td043->mode = val;
  146. val |= TPO_R02_NCLK_RISING;
  147. tpo_td043_write(tpo_td043->spi, 2, val);
  148. return count;
  149. }
  150. static ssize_t tpo_td043_gamma_show(struct device *dev,
  151. struct device_attribute *attr, char *buf)
  152. {
  153. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  154. ssize_t len = 0;
  155. int ret;
  156. int i;
  157. for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
  158. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  159. tpo_td043->gamma[i]);
  160. if (ret < 0)
  161. return ret;
  162. len += ret;
  163. }
  164. buf[len - 1] = '\n';
  165. return len;
  166. }
  167. static ssize_t tpo_td043_gamma_store(struct device *dev,
  168. struct device_attribute *attr, const char *buf, size_t count)
  169. {
  170. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  171. unsigned int g[12];
  172. int ret;
  173. int i;
  174. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  175. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  176. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  177. if (ret != 12)
  178. return -EINVAL;
  179. for (i = 0; i < 12; i++)
  180. tpo_td043->gamma[i] = g[i];
  181. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  182. return count;
  183. }
  184. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  185. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  186. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  187. tpo_td043_mode_show, tpo_td043_mode_store);
  188. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  189. tpo_td043_gamma_show, tpo_td043_gamma_store);
  190. static struct attribute *tpo_td043_attrs[] = {
  191. &dev_attr_vmirror.attr,
  192. &dev_attr_mode.attr,
  193. &dev_attr_gamma.attr,
  194. NULL,
  195. };
  196. static struct attribute_group tpo_td043_attr_group = {
  197. .attrs = tpo_td043_attrs,
  198. };
  199. static const struct omap_video_timings tpo_td043_timings = {
  200. .x_res = 800,
  201. .y_res = 480,
  202. .pixel_clock = 36000,
  203. .hsw = 1,
  204. .hfp = 68,
  205. .hbp = 214,
  206. .vsw = 1,
  207. .vfp = 39,
  208. .vbp = 34,
  209. };
  210. static int tpo_td043_power_on(struct omap_dss_device *dssdev)
  211. {
  212. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  213. int nreset_gpio = dssdev->reset_gpio;
  214. int r;
  215. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  216. return 0;
  217. r = omapdss_dpi_display_enable(dssdev);
  218. if (r)
  219. goto err0;
  220. if (dssdev->platform_enable) {
  221. r = dssdev->platform_enable(dssdev);
  222. if (r)
  223. goto err1;
  224. }
  225. regulator_enable(tpo_td043->vcc_reg);
  226. /* wait for power up */
  227. msleep(160);
  228. if (gpio_is_valid(nreset_gpio))
  229. gpio_set_value(nreset_gpio, 1);
  230. tpo_td043_write(tpo_td043->spi, 2,
  231. TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
  232. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
  233. tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
  234. tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
  235. tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  236. tpo_td043->vmirror);
  237. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  238. return 0;
  239. err1:
  240. omapdss_dpi_display_disable(dssdev);
  241. err0:
  242. return r;
  243. }
  244. static void tpo_td043_power_off(struct omap_dss_device *dssdev)
  245. {
  246. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  247. int nreset_gpio = dssdev->reset_gpio;
  248. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  249. return;
  250. tpo_td043_write(tpo_td043->spi, 3,
  251. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  252. if (gpio_is_valid(nreset_gpio))
  253. gpio_set_value(nreset_gpio, 0);
  254. /* wait for at least 2 vsyncs before cutting off power */
  255. msleep(50);
  256. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
  257. regulator_disable(tpo_td043->vcc_reg);
  258. if (dssdev->platform_disable)
  259. dssdev->platform_disable(dssdev);
  260. omapdss_dpi_display_disable(dssdev);
  261. }
  262. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  263. {
  264. int ret;
  265. dev_dbg(&dssdev->dev, "enable\n");
  266. ret = tpo_td043_power_on(dssdev);
  267. if (ret)
  268. return ret;
  269. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  270. return 0;
  271. }
  272. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  273. {
  274. dev_dbg(&dssdev->dev, "disable\n");
  275. tpo_td043_power_off(dssdev);
  276. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  277. }
  278. static int tpo_td043_suspend(struct omap_dss_device *dssdev)
  279. {
  280. tpo_td043_power_off(dssdev);
  281. dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
  282. return 0;
  283. }
  284. static int tpo_td043_resume(struct omap_dss_device *dssdev)
  285. {
  286. int r = 0;
  287. r = tpo_td043_power_on(dssdev);
  288. if (r)
  289. return r;
  290. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  291. return 0;
  292. }
  293. static int tpo_td043_probe(struct omap_dss_device *dssdev)
  294. {
  295. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  296. int nreset_gpio = dssdev->reset_gpio;
  297. int ret = 0;
  298. dev_dbg(&dssdev->dev, "probe\n");
  299. if (tpo_td043 == NULL) {
  300. dev_err(&dssdev->dev, "missing tpo_td043_device\n");
  301. return -ENODEV;
  302. }
  303. dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IHS |
  304. OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IPC;
  305. dssdev->panel.timings = tpo_td043_timings;
  306. dssdev->ctrl.pixel_size = 24;
  307. tpo_td043->mode = TPO_R02_MODE_800x480;
  308. memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
  309. tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
  310. if (IS_ERR(tpo_td043->vcc_reg)) {
  311. dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
  312. ret = PTR_ERR(tpo_td043->vcc_reg);
  313. goto fail_regulator;
  314. }
  315. if (gpio_is_valid(nreset_gpio)) {
  316. ret = gpio_request(nreset_gpio, "lcd reset");
  317. if (ret < 0) {
  318. dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
  319. goto fail_gpio_req;
  320. }
  321. ret = gpio_direction_output(nreset_gpio, 0);
  322. if (ret < 0) {
  323. dev_err(&dssdev->dev, "couldn't set GPIO direction\n");
  324. goto fail_gpio_direction;
  325. }
  326. }
  327. ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  328. if (ret)
  329. dev_warn(&dssdev->dev, "failed to create sysfs files\n");
  330. return 0;
  331. fail_gpio_direction:
  332. gpio_free(nreset_gpio);
  333. fail_gpio_req:
  334. regulator_put(tpo_td043->vcc_reg);
  335. fail_regulator:
  336. kfree(tpo_td043);
  337. return ret;
  338. }
  339. static void tpo_td043_remove(struct omap_dss_device *dssdev)
  340. {
  341. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  342. int nreset_gpio = dssdev->reset_gpio;
  343. dev_dbg(&dssdev->dev, "remove\n");
  344. sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  345. regulator_put(tpo_td043->vcc_reg);
  346. if (gpio_is_valid(nreset_gpio))
  347. gpio_free(nreset_gpio);
  348. }
  349. static struct omap_dss_driver tpo_td043_driver = {
  350. .probe = tpo_td043_probe,
  351. .remove = tpo_td043_remove,
  352. .enable = tpo_td043_enable,
  353. .disable = tpo_td043_disable,
  354. .suspend = tpo_td043_suspend,
  355. .resume = tpo_td043_resume,
  356. .set_mirror = tpo_td043_set_hmirror,
  357. .get_mirror = tpo_td043_get_hmirror,
  358. .driver = {
  359. .name = "tpo_td043mtea1_panel",
  360. .owner = THIS_MODULE,
  361. },
  362. };
  363. static int tpo_td043_spi_probe(struct spi_device *spi)
  364. {
  365. struct omap_dss_device *dssdev = spi->dev.platform_data;
  366. struct tpo_td043_device *tpo_td043;
  367. int ret;
  368. if (dssdev == NULL) {
  369. dev_err(&spi->dev, "missing dssdev\n");
  370. return -ENODEV;
  371. }
  372. spi->bits_per_word = 16;
  373. spi->mode = SPI_MODE_0;
  374. ret = spi_setup(spi);
  375. if (ret < 0) {
  376. dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
  377. return ret;
  378. }
  379. tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
  380. if (tpo_td043 == NULL)
  381. return -ENOMEM;
  382. tpo_td043->spi = spi;
  383. dev_set_drvdata(&spi->dev, tpo_td043);
  384. dev_set_drvdata(&dssdev->dev, tpo_td043);
  385. omap_dss_register_driver(&tpo_td043_driver);
  386. return 0;
  387. }
  388. static int __devexit tpo_td043_spi_remove(struct spi_device *spi)
  389. {
  390. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
  391. omap_dss_unregister_driver(&tpo_td043_driver);
  392. kfree(tpo_td043);
  393. return 0;
  394. }
  395. static struct spi_driver tpo_td043_spi_driver = {
  396. .driver = {
  397. .name = "tpo_td043mtea1_panel_spi",
  398. .bus = &spi_bus_type,
  399. .owner = THIS_MODULE,
  400. },
  401. .probe = tpo_td043_spi_probe,
  402. .remove = __devexit_p(tpo_td043_spi_remove),
  403. };
  404. static int __init tpo_td043_init(void)
  405. {
  406. return spi_register_driver(&tpo_td043_spi_driver);
  407. }
  408. static void __exit tpo_td043_exit(void)
  409. {
  410. spi_unregister_driver(&tpo_td043_spi_driver);
  411. }
  412. module_init(tpo_td043_init);
  413. module_exit(tpo_td043_exit);
  414. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  415. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  416. MODULE_LICENSE("GPL");