fsl_qe_udc.c 65 KB

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  1. /*
  2. * driver/usb/gadget/fsl_qe_udc.c
  3. *
  4. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  5. *
  6. * Xie Xiaobo <X.Xie@freescale.com>
  7. * Li Yang <leoli@freescale.com>
  8. * Based on bareboard code from Shlomi Gridish.
  9. *
  10. * Description:
  11. * Freescle QE/CPM USB Pheripheral Controller Driver
  12. * The controller can be found on MPC8360, MPC8272, and etc.
  13. * MPC8360 Rev 1.1 may need QE mircocode update
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #undef USB_TRACE
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ioport.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/err.h>
  28. #include <linux/slab.h>
  29. #include <linux/list.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/io.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/of_address.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/usb/ch9.h>
  37. #include <linux/usb/gadget.h>
  38. #include <linux/usb/otg.h>
  39. #include <asm/qe.h>
  40. #include <asm/cpm.h>
  41. #include <asm/dma.h>
  42. #include <asm/reg.h>
  43. #include "fsl_qe_udc.h"
  44. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  45. #define DRIVER_AUTHOR "Xie XiaoBo"
  46. #define DRIVER_VERSION "1.0"
  47. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  48. static const char driver_name[] = "fsl_qe_udc";
  49. static const char driver_desc[] = DRIVER_DESC;
  50. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  51. static const char *const ep_name[] = {
  52. "ep0-control", /* everyone has ep0 */
  53. /* 3 configurable endpoints */
  54. "ep1",
  55. "ep2",
  56. "ep3",
  57. };
  58. static struct usb_endpoint_descriptor qe_ep0_desc = {
  59. .bLength = USB_DT_ENDPOINT_SIZE,
  60. .bDescriptorType = USB_DT_ENDPOINT,
  61. .bEndpointAddress = 0,
  62. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  63. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  64. };
  65. /* it is initialized in probe() */
  66. static struct qe_udc *udc_controller;
  67. /********************************************************************
  68. * Internal Used Function Start
  69. ********************************************************************/
  70. /*-----------------------------------------------------------------
  71. * done() - retire a request; caller blocked irqs
  72. *--------------------------------------------------------------*/
  73. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  74. {
  75. struct qe_udc *udc = ep->udc;
  76. unsigned char stopped = ep->stopped;
  77. /* the req->queue pointer is used by ep_queue() func, in which
  78. * the request will be added into a udc_ep->queue 'd tail
  79. * so here the req will be dropped from the ep->queue
  80. */
  81. list_del_init(&req->queue);
  82. /* req.status should be set as -EINPROGRESS in ep_queue() */
  83. if (req->req.status == -EINPROGRESS)
  84. req->req.status = status;
  85. else
  86. status = req->req.status;
  87. if (req->mapped) {
  88. dma_unmap_single(udc->gadget.dev.parent,
  89. req->req.dma, req->req.length,
  90. ep_is_in(ep)
  91. ? DMA_TO_DEVICE
  92. : DMA_FROM_DEVICE);
  93. req->req.dma = DMA_ADDR_INVALID;
  94. req->mapped = 0;
  95. } else
  96. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  97. req->req.dma, req->req.length,
  98. ep_is_in(ep)
  99. ? DMA_TO_DEVICE
  100. : DMA_FROM_DEVICE);
  101. if (status && (status != -ESHUTDOWN))
  102. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  103. ep->ep.name, &req->req, status,
  104. req->req.actual, req->req.length);
  105. /* don't modify queue heads during completion callback */
  106. ep->stopped = 1;
  107. spin_unlock(&udc->lock);
  108. /* this complete() should a func implemented by gadget layer,
  109. * eg fsg->bulk_in_complete() */
  110. if (req->req.complete)
  111. req->req.complete(&ep->ep, &req->req);
  112. spin_lock(&udc->lock);
  113. ep->stopped = stopped;
  114. }
  115. /*-----------------------------------------------------------------
  116. * nuke(): delete all requests related to this ep
  117. *--------------------------------------------------------------*/
  118. static void nuke(struct qe_ep *ep, int status)
  119. {
  120. /* Whether this eq has request linked */
  121. while (!list_empty(&ep->queue)) {
  122. struct qe_req *req = NULL;
  123. req = list_entry(ep->queue.next, struct qe_req, queue);
  124. done(ep, req, status);
  125. }
  126. }
  127. /*---------------------------------------------------------------------------*
  128. * USB and Endpoint manipulate process, include parameter and register *
  129. *---------------------------------------------------------------------------*/
  130. /* @value: 1--set stall 0--clean stall */
  131. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  132. {
  133. u16 tem_usep;
  134. u8 epnum = ep->epnum;
  135. struct qe_udc *udc = ep->udc;
  136. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  137. tem_usep = tem_usep & ~USB_RHS_MASK;
  138. if (value == 1)
  139. tem_usep |= USB_RHS_STALL;
  140. else if (ep->dir == USB_DIR_IN)
  141. tem_usep |= USB_RHS_IGNORE_OUT;
  142. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  143. return 0;
  144. }
  145. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  146. {
  147. u16 tem_usep;
  148. u8 epnum = ep->epnum;
  149. struct qe_udc *udc = ep->udc;
  150. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  151. tem_usep = tem_usep & ~USB_THS_MASK;
  152. if (value == 1)
  153. tem_usep |= USB_THS_STALL;
  154. else if (ep->dir == USB_DIR_OUT)
  155. tem_usep |= USB_THS_IGNORE_IN;
  156. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  157. return 0;
  158. }
  159. static int qe_ep0_stall(struct qe_udc *udc)
  160. {
  161. qe_eptx_stall_change(&udc->eps[0], 1);
  162. qe_eprx_stall_change(&udc->eps[0], 1);
  163. udc_controller->ep0_state = WAIT_FOR_SETUP;
  164. udc_controller->ep0_dir = 0;
  165. return 0;
  166. }
  167. static int qe_eprx_nack(struct qe_ep *ep)
  168. {
  169. u8 epnum = ep->epnum;
  170. struct qe_udc *udc = ep->udc;
  171. if (ep->state == EP_STATE_IDLE) {
  172. /* Set the ep's nack */
  173. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  174. USB_RHS_MASK, USB_RHS_NACK);
  175. /* Mask Rx and Busy interrupts */
  176. clrbits16(&udc->usb_regs->usb_usbmr,
  177. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  178. ep->state = EP_STATE_NACK;
  179. }
  180. return 0;
  181. }
  182. static int qe_eprx_normal(struct qe_ep *ep)
  183. {
  184. struct qe_udc *udc = ep->udc;
  185. if (ep->state == EP_STATE_NACK) {
  186. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  187. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  188. /* Unmask RX interrupts */
  189. out_be16(&udc->usb_regs->usb_usber,
  190. USB_E_BSY_MASK | USB_E_RXB_MASK);
  191. setbits16(&udc->usb_regs->usb_usbmr,
  192. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  193. ep->state = EP_STATE_IDLE;
  194. ep->has_data = 0;
  195. }
  196. return 0;
  197. }
  198. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  199. {
  200. if (ep->udc->soc_type == PORT_CPM)
  201. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  202. CPM_USB_STOP_TX_OPCODE);
  203. else
  204. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  205. ep->epnum, 0);
  206. return 0;
  207. }
  208. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  209. {
  210. if (ep->udc->soc_type == PORT_CPM)
  211. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  212. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  213. else
  214. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  215. ep->epnum, 0);
  216. return 0;
  217. }
  218. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  219. {
  220. struct qe_udc *udc = ep->udc;
  221. int i;
  222. i = (int)ep->epnum;
  223. qe_ep_cmd_stoptx(ep);
  224. out_8(&udc->usb_regs->usb_uscom,
  225. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  226. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  227. out_be32(&udc->ep_param[i]->tstate, 0);
  228. out_be16(&udc->ep_param[i]->tbcnt, 0);
  229. ep->c_txbd = ep->txbase;
  230. ep->n_txbd = ep->txbase;
  231. qe_ep_cmd_restarttx(ep);
  232. return 0;
  233. }
  234. static int qe_ep_filltxfifo(struct qe_ep *ep)
  235. {
  236. struct qe_udc *udc = ep->udc;
  237. out_8(&udc->usb_regs->usb_uscom,
  238. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  239. return 0;
  240. }
  241. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  242. {
  243. struct qe_ep *ep;
  244. u32 bdring_len;
  245. struct qe_bd __iomem *bd;
  246. int i;
  247. ep = &udc->eps[pipe_num];
  248. if (ep->dir == USB_DIR_OUT)
  249. bdring_len = USB_BDRING_LEN_RX;
  250. else
  251. bdring_len = USB_BDRING_LEN;
  252. bd = ep->rxbase;
  253. for (i = 0; i < (bdring_len - 1); i++) {
  254. out_be32((u32 __iomem *)bd, R_E | R_I);
  255. bd++;
  256. }
  257. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  258. bd = ep->txbase;
  259. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  260. out_be32(&bd->buf, 0);
  261. out_be32((u32 __iomem *)bd, 0);
  262. bd++;
  263. }
  264. out_be32((u32 __iomem *)bd, T_W);
  265. return 0;
  266. }
  267. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  268. {
  269. struct qe_ep *ep;
  270. u16 tmpusep;
  271. ep = &udc->eps[pipe_num];
  272. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  273. tmpusep &= ~USB_RTHS_MASK;
  274. switch (ep->dir) {
  275. case USB_DIR_BOTH:
  276. qe_ep_flushtxfifo(ep);
  277. break;
  278. case USB_DIR_OUT:
  279. tmpusep |= USB_THS_IGNORE_IN;
  280. break;
  281. case USB_DIR_IN:
  282. qe_ep_flushtxfifo(ep);
  283. tmpusep |= USB_RHS_IGNORE_OUT;
  284. break;
  285. default:
  286. break;
  287. }
  288. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  289. qe_epbds_reset(udc, pipe_num);
  290. return 0;
  291. }
  292. static int qe_ep_toggledata01(struct qe_ep *ep)
  293. {
  294. ep->data01 ^= 0x1;
  295. return 0;
  296. }
  297. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  298. {
  299. struct qe_ep *ep = &udc->eps[pipe_num];
  300. unsigned long tmp_addr = 0;
  301. struct usb_ep_para __iomem *epparam;
  302. int i;
  303. struct qe_bd __iomem *bd;
  304. int bdring_len;
  305. if (ep->dir == USB_DIR_OUT)
  306. bdring_len = USB_BDRING_LEN_RX;
  307. else
  308. bdring_len = USB_BDRING_LEN;
  309. epparam = udc->ep_param[pipe_num];
  310. /* alloc multi-ram for BD rings and set the ep parameters */
  311. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  312. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  313. if (IS_ERR_VALUE(tmp_addr))
  314. return -ENOMEM;
  315. out_be16(&epparam->rbase, (u16)tmp_addr);
  316. out_be16(&epparam->tbase, (u16)(tmp_addr +
  317. (sizeof(struct qe_bd) * bdring_len)));
  318. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  319. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  320. ep->rxbase = cpm_muram_addr(tmp_addr);
  321. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  322. * bdring_len));
  323. ep->n_rxbd = ep->rxbase;
  324. ep->e_rxbd = ep->rxbase;
  325. ep->n_txbd = ep->txbase;
  326. ep->c_txbd = ep->txbase;
  327. ep->data01 = 0; /* data0 */
  328. /* Init TX and RX bds */
  329. bd = ep->rxbase;
  330. for (i = 0; i < bdring_len - 1; i++) {
  331. out_be32(&bd->buf, 0);
  332. out_be32((u32 __iomem *)bd, 0);
  333. bd++;
  334. }
  335. out_be32(&bd->buf, 0);
  336. out_be32((u32 __iomem *)bd, R_W);
  337. bd = ep->txbase;
  338. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  339. out_be32(&bd->buf, 0);
  340. out_be32((u32 __iomem *)bd, 0);
  341. bd++;
  342. }
  343. out_be32(&bd->buf, 0);
  344. out_be32((u32 __iomem *)bd, T_W);
  345. return 0;
  346. }
  347. static int qe_ep_rxbd_update(struct qe_ep *ep)
  348. {
  349. unsigned int size;
  350. int i;
  351. unsigned int tmp;
  352. struct qe_bd __iomem *bd;
  353. unsigned int bdring_len;
  354. if (ep->rxbase == NULL)
  355. return -EINVAL;
  356. bd = ep->rxbase;
  357. ep->rxframe = kmalloc(sizeof(*ep->rxframe), GFP_ATOMIC);
  358. if (ep->rxframe == NULL) {
  359. dev_err(ep->udc->dev, "malloc rxframe failed\n");
  360. return -ENOMEM;
  361. }
  362. qe_frame_init(ep->rxframe);
  363. if (ep->dir == USB_DIR_OUT)
  364. bdring_len = USB_BDRING_LEN_RX;
  365. else
  366. bdring_len = USB_BDRING_LEN;
  367. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  368. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  369. if (ep->rxbuffer == NULL) {
  370. dev_err(ep->udc->dev, "malloc rxbuffer failed,size=%d\n",
  371. size);
  372. kfree(ep->rxframe);
  373. return -ENOMEM;
  374. }
  375. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  376. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  377. ep->rxbuf_d = dma_map_single(udc_controller->gadget.dev.parent,
  378. ep->rxbuffer,
  379. size,
  380. DMA_FROM_DEVICE);
  381. ep->rxbufmap = 1;
  382. } else {
  383. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  384. ep->rxbuf_d, size,
  385. DMA_FROM_DEVICE);
  386. ep->rxbufmap = 0;
  387. }
  388. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  389. tmp = ep->rxbuf_d;
  390. tmp = (u32)(((tmp >> 2) << 2) + 4);
  391. for (i = 0; i < bdring_len - 1; i++) {
  392. out_be32(&bd->buf, tmp);
  393. out_be32((u32 __iomem *)bd, (R_E | R_I));
  394. tmp = tmp + size;
  395. bd++;
  396. }
  397. out_be32(&bd->buf, tmp);
  398. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  399. return 0;
  400. }
  401. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  402. {
  403. struct qe_ep *ep = &udc->eps[pipe_num];
  404. struct usb_ep_para __iomem *epparam;
  405. u16 usep, logepnum;
  406. u16 tmp;
  407. u8 rtfcr = 0;
  408. epparam = udc->ep_param[pipe_num];
  409. usep = 0;
  410. logepnum = (ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  411. usep |= (logepnum << USB_EPNUM_SHIFT);
  412. switch (ep->desc->bmAttributes & 0x03) {
  413. case USB_ENDPOINT_XFER_BULK:
  414. usep |= USB_TRANS_BULK;
  415. break;
  416. case USB_ENDPOINT_XFER_ISOC:
  417. usep |= USB_TRANS_ISO;
  418. break;
  419. case USB_ENDPOINT_XFER_INT:
  420. usep |= USB_TRANS_INT;
  421. break;
  422. default:
  423. usep |= USB_TRANS_CTR;
  424. break;
  425. }
  426. switch (ep->dir) {
  427. case USB_DIR_OUT:
  428. usep |= USB_THS_IGNORE_IN;
  429. break;
  430. case USB_DIR_IN:
  431. usep |= USB_RHS_IGNORE_OUT;
  432. break;
  433. default:
  434. break;
  435. }
  436. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  437. rtfcr = 0x30;
  438. out_8(&epparam->rbmr, rtfcr);
  439. out_8(&epparam->tbmr, rtfcr);
  440. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  441. /* MRBLR must be divisble by 4 */
  442. tmp = (u16)(((tmp >> 2) << 2) + 4);
  443. out_be16(&epparam->mrblr, tmp);
  444. return 0;
  445. }
  446. static int qe_ep_init(struct qe_udc *udc,
  447. unsigned char pipe_num,
  448. const struct usb_endpoint_descriptor *desc)
  449. {
  450. struct qe_ep *ep = &udc->eps[pipe_num];
  451. unsigned long flags;
  452. int reval = 0;
  453. u16 max = 0;
  454. max = le16_to_cpu(desc->wMaxPacketSize);
  455. /* check the max package size validate for this endpoint */
  456. /* Refer to USB2.0 spec table 9-13,
  457. */
  458. if (pipe_num != 0) {
  459. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  460. case USB_ENDPOINT_XFER_BULK:
  461. if (strstr(ep->ep.name, "-iso")
  462. || strstr(ep->ep.name, "-int"))
  463. goto en_done;
  464. switch (udc->gadget.speed) {
  465. case USB_SPEED_HIGH:
  466. if ((max == 128) || (max == 256) || (max == 512))
  467. break;
  468. default:
  469. switch (max) {
  470. case 4:
  471. case 8:
  472. case 16:
  473. case 32:
  474. case 64:
  475. break;
  476. default:
  477. case USB_SPEED_LOW:
  478. goto en_done;
  479. }
  480. }
  481. break;
  482. case USB_ENDPOINT_XFER_INT:
  483. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  484. goto en_done;
  485. switch (udc->gadget.speed) {
  486. case USB_SPEED_HIGH:
  487. if (max <= 1024)
  488. break;
  489. case USB_SPEED_FULL:
  490. if (max <= 64)
  491. break;
  492. default:
  493. if (max <= 8)
  494. break;
  495. goto en_done;
  496. }
  497. break;
  498. case USB_ENDPOINT_XFER_ISOC:
  499. if (strstr(ep->ep.name, "-bulk")
  500. || strstr(ep->ep.name, "-int"))
  501. goto en_done;
  502. switch (udc->gadget.speed) {
  503. case USB_SPEED_HIGH:
  504. if (max <= 1024)
  505. break;
  506. case USB_SPEED_FULL:
  507. if (max <= 1023)
  508. break;
  509. default:
  510. goto en_done;
  511. }
  512. break;
  513. case USB_ENDPOINT_XFER_CONTROL:
  514. if (strstr(ep->ep.name, "-iso")
  515. || strstr(ep->ep.name, "-int"))
  516. goto en_done;
  517. switch (udc->gadget.speed) {
  518. case USB_SPEED_HIGH:
  519. case USB_SPEED_FULL:
  520. switch (max) {
  521. case 1:
  522. case 2:
  523. case 4:
  524. case 8:
  525. case 16:
  526. case 32:
  527. case 64:
  528. break;
  529. default:
  530. goto en_done;
  531. }
  532. case USB_SPEED_LOW:
  533. switch (max) {
  534. case 1:
  535. case 2:
  536. case 4:
  537. case 8:
  538. break;
  539. default:
  540. goto en_done;
  541. }
  542. default:
  543. goto en_done;
  544. }
  545. break;
  546. default:
  547. goto en_done;
  548. }
  549. } /* if ep0*/
  550. spin_lock_irqsave(&udc->lock, flags);
  551. /* initialize ep structure */
  552. ep->ep.maxpacket = max;
  553. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  554. ep->desc = desc;
  555. ep->stopped = 0;
  556. ep->init = 1;
  557. if (pipe_num == 0) {
  558. ep->dir = USB_DIR_BOTH;
  559. udc->ep0_dir = USB_DIR_OUT;
  560. udc->ep0_state = WAIT_FOR_SETUP;
  561. } else {
  562. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  563. case USB_DIR_OUT:
  564. ep->dir = USB_DIR_OUT;
  565. break;
  566. case USB_DIR_IN:
  567. ep->dir = USB_DIR_IN;
  568. default:
  569. break;
  570. }
  571. }
  572. /* hardware special operation */
  573. qe_ep_bd_init(udc, pipe_num);
  574. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  575. reval = qe_ep_rxbd_update(ep);
  576. if (reval)
  577. goto en_done1;
  578. }
  579. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  580. ep->txframe = kmalloc(sizeof(*ep->txframe), GFP_ATOMIC);
  581. if (ep->txframe == NULL) {
  582. dev_err(udc->dev, "malloc txframe failed\n");
  583. goto en_done2;
  584. }
  585. qe_frame_init(ep->txframe);
  586. }
  587. qe_ep_register_init(udc, pipe_num);
  588. /* Now HW will be NAKing transfers to that EP,
  589. * until a buffer is queued to it. */
  590. spin_unlock_irqrestore(&udc->lock, flags);
  591. return 0;
  592. en_done2:
  593. kfree(ep->rxbuffer);
  594. kfree(ep->rxframe);
  595. en_done1:
  596. spin_unlock_irqrestore(&udc->lock, flags);
  597. en_done:
  598. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  599. return -ENODEV;
  600. }
  601. static inline void qe_usb_enable(void)
  602. {
  603. setbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  604. }
  605. static inline void qe_usb_disable(void)
  606. {
  607. clrbits8(&udc_controller->usb_regs->usb_usmod, USB_MODE_EN);
  608. }
  609. /*----------------------------------------------------------------------------*
  610. * USB and EP basic manipulate function end *
  611. *----------------------------------------------------------------------------*/
  612. /******************************************************************************
  613. UDC transmit and receive process
  614. ******************************************************************************/
  615. static void recycle_one_rxbd(struct qe_ep *ep)
  616. {
  617. u32 bdstatus;
  618. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  619. bdstatus = R_I | R_E | (bdstatus & R_W);
  620. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  621. if (bdstatus & R_W)
  622. ep->e_rxbd = ep->rxbase;
  623. else
  624. ep->e_rxbd++;
  625. }
  626. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  627. {
  628. u32 bdstatus;
  629. struct qe_bd __iomem *bd, *nextbd;
  630. unsigned char stop = 0;
  631. nextbd = ep->n_rxbd;
  632. bd = ep->e_rxbd;
  633. bdstatus = in_be32((u32 __iomem *)bd);
  634. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  635. bdstatus = R_E | R_I | (bdstatus & R_W);
  636. out_be32((u32 __iomem *)bd, bdstatus);
  637. if (bdstatus & R_W)
  638. bd = ep->rxbase;
  639. else
  640. bd++;
  641. bdstatus = in_be32((u32 __iomem *)bd);
  642. if (stopatnext && (bd == nextbd))
  643. stop = 1;
  644. }
  645. ep->e_rxbd = bd;
  646. }
  647. static void ep_recycle_rxbds(struct qe_ep *ep)
  648. {
  649. struct qe_bd __iomem *bd = ep->n_rxbd;
  650. u32 bdstatus;
  651. u8 epnum = ep->epnum;
  652. struct qe_udc *udc = ep->udc;
  653. bdstatus = in_be32((u32 __iomem *)bd);
  654. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  655. bd = ep->rxbase +
  656. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  657. in_be16(&udc->ep_param[epnum]->rbase))
  658. >> 3);
  659. bdstatus = in_be32((u32 __iomem *)bd);
  660. if (bdstatus & R_W)
  661. bd = ep->rxbase;
  662. else
  663. bd++;
  664. ep->e_rxbd = bd;
  665. recycle_rxbds(ep, 0);
  666. ep->e_rxbd = ep->n_rxbd;
  667. } else
  668. recycle_rxbds(ep, 1);
  669. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  670. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  671. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  672. qe_eprx_normal(ep);
  673. ep->localnack = 0;
  674. }
  675. static void setup_received_handle(struct qe_udc *udc,
  676. struct usb_ctrlrequest *setup);
  677. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  678. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  679. /* when BD PID is setup, handle the packet */
  680. static int ep0_setup_handle(struct qe_udc *udc)
  681. {
  682. struct qe_ep *ep = &udc->eps[0];
  683. struct qe_frame *pframe;
  684. unsigned int fsize;
  685. u8 *cp;
  686. pframe = ep->rxframe;
  687. if ((frame_get_info(pframe) & PID_SETUP)
  688. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  689. fsize = frame_get_length(pframe);
  690. if (unlikely(fsize != 8))
  691. return -EINVAL;
  692. cp = (u8 *)&udc->local_setup_buff;
  693. memcpy(cp, pframe->data, fsize);
  694. ep->data01 = 1;
  695. /* handle the usb command base on the usb_ctrlrequest */
  696. setup_received_handle(udc, &udc->local_setup_buff);
  697. return 0;
  698. }
  699. return -EINVAL;
  700. }
  701. static int qe_ep0_rx(struct qe_udc *udc)
  702. {
  703. struct qe_ep *ep = &udc->eps[0];
  704. struct qe_frame *pframe;
  705. struct qe_bd __iomem *bd;
  706. u32 bdstatus, length;
  707. u32 vaddr;
  708. pframe = ep->rxframe;
  709. if (ep->dir == USB_DIR_IN) {
  710. dev_err(udc->dev, "ep0 not a control endpoint\n");
  711. return -EINVAL;
  712. }
  713. bd = ep->n_rxbd;
  714. bdstatus = in_be32((u32 __iomem *)bd);
  715. length = bdstatus & BD_LENGTH_MASK;
  716. while (!(bdstatus & R_E) && length) {
  717. if ((bdstatus & R_F) && (bdstatus & R_L)
  718. && !(bdstatus & R_ERROR)) {
  719. if (length == USB_CRC_SIZE) {
  720. udc->ep0_state = WAIT_FOR_SETUP;
  721. dev_vdbg(udc->dev,
  722. "receive a ZLP in status phase\n");
  723. } else {
  724. qe_frame_clean(pframe);
  725. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  726. frame_set_data(pframe, (u8 *)vaddr);
  727. frame_set_length(pframe,
  728. (length - USB_CRC_SIZE));
  729. frame_set_status(pframe, FRAME_OK);
  730. switch (bdstatus & R_PID) {
  731. case R_PID_SETUP:
  732. frame_set_info(pframe, PID_SETUP);
  733. break;
  734. case R_PID_DATA1:
  735. frame_set_info(pframe, PID_DATA1);
  736. break;
  737. default:
  738. frame_set_info(pframe, PID_DATA0);
  739. break;
  740. }
  741. if ((bdstatus & R_PID) == R_PID_SETUP)
  742. ep0_setup_handle(udc);
  743. else
  744. qe_ep_rxframe_handle(ep);
  745. }
  746. } else {
  747. dev_err(udc->dev, "The receive frame with error!\n");
  748. }
  749. /* note: don't clear the rxbd's buffer address */
  750. recycle_one_rxbd(ep);
  751. /* Get next BD */
  752. if (bdstatus & R_W)
  753. bd = ep->rxbase;
  754. else
  755. bd++;
  756. bdstatus = in_be32((u32 __iomem *)bd);
  757. length = bdstatus & BD_LENGTH_MASK;
  758. }
  759. ep->n_rxbd = bd;
  760. return 0;
  761. }
  762. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  763. {
  764. struct qe_frame *pframe;
  765. u8 framepid = 0;
  766. unsigned int fsize;
  767. u8 *cp;
  768. struct qe_req *req;
  769. pframe = ep->rxframe;
  770. if (frame_get_info(pframe) & PID_DATA1)
  771. framepid = 0x1;
  772. if (framepid != ep->data01) {
  773. dev_err(ep->udc->dev, "the data01 error!\n");
  774. return -EIO;
  775. }
  776. fsize = frame_get_length(pframe);
  777. if (list_empty(&ep->queue)) {
  778. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  779. } else {
  780. req = list_entry(ep->queue.next, struct qe_req, queue);
  781. cp = (u8 *)(req->req.buf) + req->req.actual;
  782. if (cp) {
  783. memcpy(cp, pframe->data, fsize);
  784. req->req.actual += fsize;
  785. if ((fsize < ep->ep.maxpacket) ||
  786. (req->req.actual >= req->req.length)) {
  787. if (ep->epnum == 0)
  788. ep0_req_complete(ep->udc, req);
  789. else
  790. done(ep, req, 0);
  791. if (list_empty(&ep->queue) && ep->epnum != 0)
  792. qe_eprx_nack(ep);
  793. }
  794. }
  795. }
  796. qe_ep_toggledata01(ep);
  797. return 0;
  798. }
  799. static void ep_rx_tasklet(unsigned long data)
  800. {
  801. struct qe_udc *udc = (struct qe_udc *)data;
  802. struct qe_ep *ep;
  803. struct qe_frame *pframe;
  804. struct qe_bd __iomem *bd;
  805. unsigned long flags;
  806. u32 bdstatus, length;
  807. u32 vaddr, i;
  808. spin_lock_irqsave(&udc->lock, flags);
  809. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  810. ep = &udc->eps[i];
  811. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  812. dev_dbg(udc->dev,
  813. "This is a transmit ep or disable tasklet!\n");
  814. continue;
  815. }
  816. pframe = ep->rxframe;
  817. bd = ep->n_rxbd;
  818. bdstatus = in_be32((u32 __iomem *)bd);
  819. length = bdstatus & BD_LENGTH_MASK;
  820. while (!(bdstatus & R_E) && length) {
  821. if (list_empty(&ep->queue)) {
  822. qe_eprx_nack(ep);
  823. dev_dbg(udc->dev,
  824. "The rxep have noreq %d\n",
  825. ep->has_data);
  826. break;
  827. }
  828. if ((bdstatus & R_F) && (bdstatus & R_L)
  829. && !(bdstatus & R_ERROR)) {
  830. qe_frame_clean(pframe);
  831. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  832. frame_set_data(pframe, (u8 *)vaddr);
  833. frame_set_length(pframe,
  834. (length - USB_CRC_SIZE));
  835. frame_set_status(pframe, FRAME_OK);
  836. switch (bdstatus & R_PID) {
  837. case R_PID_DATA1:
  838. frame_set_info(pframe, PID_DATA1);
  839. break;
  840. case R_PID_SETUP:
  841. frame_set_info(pframe, PID_SETUP);
  842. break;
  843. default:
  844. frame_set_info(pframe, PID_DATA0);
  845. break;
  846. }
  847. /* handle the rx frame */
  848. qe_ep_rxframe_handle(ep);
  849. } else {
  850. dev_err(udc->dev,
  851. "error in received frame\n");
  852. }
  853. /* note: don't clear the rxbd's buffer address */
  854. /*clear the length */
  855. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  856. ep->has_data--;
  857. if (!(ep->localnack))
  858. recycle_one_rxbd(ep);
  859. /* Get next BD */
  860. if (bdstatus & R_W)
  861. bd = ep->rxbase;
  862. else
  863. bd++;
  864. bdstatus = in_be32((u32 __iomem *)bd);
  865. length = bdstatus & BD_LENGTH_MASK;
  866. }
  867. ep->n_rxbd = bd;
  868. if (ep->localnack)
  869. ep_recycle_rxbds(ep);
  870. ep->enable_tasklet = 0;
  871. } /* for i=1 */
  872. spin_unlock_irqrestore(&udc->lock, flags);
  873. }
  874. static int qe_ep_rx(struct qe_ep *ep)
  875. {
  876. struct qe_udc *udc;
  877. struct qe_frame *pframe;
  878. struct qe_bd __iomem *bd;
  879. u16 swoffs, ucoffs, emptybds;
  880. udc = ep->udc;
  881. pframe = ep->rxframe;
  882. if (ep->dir == USB_DIR_IN) {
  883. dev_err(udc->dev, "transmit ep in rx function\n");
  884. return -EINVAL;
  885. }
  886. bd = ep->n_rxbd;
  887. swoffs = (u16)(bd - ep->rxbase);
  888. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  889. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  890. if (swoffs < ucoffs)
  891. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  892. else
  893. emptybds = swoffs - ucoffs;
  894. if (emptybds < MIN_EMPTY_BDS) {
  895. qe_eprx_nack(ep);
  896. ep->localnack = 1;
  897. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  898. }
  899. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  900. if (list_empty(&ep->queue)) {
  901. qe_eprx_nack(ep);
  902. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  903. ep->has_data);
  904. return 0;
  905. }
  906. tasklet_schedule(&udc->rx_tasklet);
  907. ep->enable_tasklet = 1;
  908. return 0;
  909. }
  910. /* send data from a frame, no matter what tx_req */
  911. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  912. {
  913. struct qe_udc *udc = ep->udc;
  914. struct qe_bd __iomem *bd;
  915. u16 saveusbmr;
  916. u32 bdstatus, pidmask;
  917. u32 paddr;
  918. if (ep->dir == USB_DIR_OUT) {
  919. dev_err(udc->dev, "receive ep passed to tx function\n");
  920. return -EINVAL;
  921. }
  922. /* Disable the Tx interrupt */
  923. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  924. out_be16(&udc->usb_regs->usb_usbmr,
  925. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  926. bd = ep->n_txbd;
  927. bdstatus = in_be32((u32 __iomem *)bd);
  928. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  929. if (frame_get_length(frame) == 0) {
  930. frame_set_data(frame, udc->nullbuf);
  931. frame_set_length(frame, 2);
  932. frame->info |= (ZLP | NO_CRC);
  933. dev_vdbg(udc->dev, "the frame size = 0\n");
  934. }
  935. paddr = virt_to_phys((void *)frame->data);
  936. out_be32(&bd->buf, paddr);
  937. bdstatus = (bdstatus&T_W);
  938. if (!(frame_get_info(frame) & NO_CRC))
  939. bdstatus |= T_R | T_I | T_L | T_TC
  940. | frame_get_length(frame);
  941. else
  942. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  943. /* if the packet is a ZLP in status phase */
  944. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  945. ep->data01 = 0x1;
  946. if (ep->data01) {
  947. pidmask = T_PID_DATA1;
  948. frame->info |= PID_DATA1;
  949. } else {
  950. pidmask = T_PID_DATA0;
  951. frame->info |= PID_DATA0;
  952. }
  953. bdstatus |= T_CNF;
  954. bdstatus |= pidmask;
  955. out_be32((u32 __iomem *)bd, bdstatus);
  956. qe_ep_filltxfifo(ep);
  957. /* enable the TX interrupt */
  958. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  959. qe_ep_toggledata01(ep);
  960. if (bdstatus & T_W)
  961. ep->n_txbd = ep->txbase;
  962. else
  963. ep->n_txbd++;
  964. return 0;
  965. } else {
  966. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  967. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  968. return -EBUSY;
  969. }
  970. }
  971. /* when a bd was transmitted, the function can
  972. * handle the tx_req, not include ep0 */
  973. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  974. {
  975. if (ep->tx_req != NULL) {
  976. if (!restart) {
  977. int asent = ep->last;
  978. ep->sent += asent;
  979. ep->last -= asent;
  980. } else {
  981. ep->last = 0;
  982. }
  983. /* a request already were transmitted completely */
  984. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  985. ep->tx_req->req.actual = (unsigned int)ep->sent;
  986. done(ep, ep->tx_req, 0);
  987. ep->tx_req = NULL;
  988. ep->last = 0;
  989. ep->sent = 0;
  990. }
  991. }
  992. /* we should gain a new tx_req fot this endpoint */
  993. if (ep->tx_req == NULL) {
  994. if (!list_empty(&ep->queue)) {
  995. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  996. queue);
  997. ep->last = 0;
  998. ep->sent = 0;
  999. }
  1000. }
  1001. return 0;
  1002. }
  1003. /* give a frame and a tx_req, send some data */
  1004. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1005. {
  1006. unsigned int size;
  1007. u8 *buf;
  1008. qe_frame_clean(frame);
  1009. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1010. ep->ep.maxpacket);
  1011. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1012. if (buf && size) {
  1013. ep->last = size;
  1014. frame_set_data(frame, buf);
  1015. frame_set_length(frame, size);
  1016. frame_set_status(frame, FRAME_OK);
  1017. frame_set_info(frame, 0);
  1018. return qe_ep_tx(ep, frame);
  1019. }
  1020. return -EIO;
  1021. }
  1022. /* give a frame struct,send a ZLP */
  1023. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1024. {
  1025. struct qe_udc *udc = ep->udc;
  1026. if (frame == NULL)
  1027. return -ENODEV;
  1028. qe_frame_clean(frame);
  1029. frame_set_data(frame, (u8 *)udc->nullbuf);
  1030. frame_set_length(frame, 2);
  1031. frame_set_status(frame, FRAME_OK);
  1032. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1033. return qe_ep_tx(ep, frame);
  1034. }
  1035. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1036. {
  1037. struct qe_req *req = ep->tx_req;
  1038. int reval;
  1039. if (req == NULL)
  1040. return -ENODEV;
  1041. if ((req->req.length - ep->sent) > 0)
  1042. reval = qe_usb_senddata(ep, frame);
  1043. else
  1044. reval = sendnulldata(ep, frame, 0);
  1045. return reval;
  1046. }
  1047. /* if direction is DIR_IN, the status is Device->Host
  1048. * if direction is DIR_OUT, the status transaction is Device<-Host
  1049. * in status phase, udc create a request and gain status */
  1050. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1051. {
  1052. struct qe_ep *ep = &udc->eps[0];
  1053. if (direction == USB_DIR_IN) {
  1054. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1055. udc->ep0_dir = USB_DIR_IN;
  1056. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1057. } else {
  1058. udc->ep0_dir = USB_DIR_OUT;
  1059. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1060. }
  1061. return 0;
  1062. }
  1063. /* a request complete in ep0, whether gadget request or udc request */
  1064. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1065. {
  1066. struct qe_ep *ep = &udc->eps[0];
  1067. /* because usb and ep's status already been set in ch9setaddress() */
  1068. switch (udc->ep0_state) {
  1069. case DATA_STATE_XMIT:
  1070. done(ep, req, 0);
  1071. /* receive status phase */
  1072. if (ep0_prime_status(udc, USB_DIR_OUT))
  1073. qe_ep0_stall(udc);
  1074. break;
  1075. case DATA_STATE_NEED_ZLP:
  1076. done(ep, req, 0);
  1077. udc->ep0_state = WAIT_FOR_SETUP;
  1078. break;
  1079. case DATA_STATE_RECV:
  1080. done(ep, req, 0);
  1081. /* send status phase */
  1082. if (ep0_prime_status(udc, USB_DIR_IN))
  1083. qe_ep0_stall(udc);
  1084. break;
  1085. case WAIT_FOR_OUT_STATUS:
  1086. done(ep, req, 0);
  1087. udc->ep0_state = WAIT_FOR_SETUP;
  1088. break;
  1089. case WAIT_FOR_SETUP:
  1090. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1091. break;
  1092. default:
  1093. qe_ep0_stall(udc);
  1094. break;
  1095. }
  1096. }
  1097. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1098. {
  1099. struct qe_req *tx_req = NULL;
  1100. struct qe_frame *frame = ep->txframe;
  1101. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1102. if (!restart)
  1103. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1104. else
  1105. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1106. return 0;
  1107. }
  1108. tx_req = ep->tx_req;
  1109. if (tx_req != NULL) {
  1110. if (!restart) {
  1111. int asent = ep->last;
  1112. ep->sent += asent;
  1113. ep->last -= asent;
  1114. } else {
  1115. ep->last = 0;
  1116. }
  1117. /* a request already were transmitted completely */
  1118. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1119. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1120. ep0_req_complete(ep->udc, ep->tx_req);
  1121. ep->tx_req = NULL;
  1122. ep->last = 0;
  1123. ep->sent = 0;
  1124. }
  1125. } else {
  1126. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1127. }
  1128. return 0;
  1129. }
  1130. static int ep0_txframe_handle(struct qe_ep *ep)
  1131. {
  1132. /* if have error, transmit again */
  1133. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1134. qe_ep_flushtxfifo(ep);
  1135. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1136. if (frame_get_info(ep->txframe) & PID_DATA0)
  1137. ep->data01 = 0;
  1138. else
  1139. ep->data01 = 1;
  1140. ep0_txcomplete(ep, 1);
  1141. } else
  1142. ep0_txcomplete(ep, 0);
  1143. frame_create_tx(ep, ep->txframe);
  1144. return 0;
  1145. }
  1146. static int qe_ep0_txconf(struct qe_ep *ep)
  1147. {
  1148. struct qe_bd __iomem *bd;
  1149. struct qe_frame *pframe;
  1150. u32 bdstatus;
  1151. bd = ep->c_txbd;
  1152. bdstatus = in_be32((u32 __iomem *)bd);
  1153. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1154. pframe = ep->txframe;
  1155. /* clear and recycle the BD */
  1156. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1157. out_be32(&bd->buf, 0);
  1158. if (bdstatus & T_W)
  1159. ep->c_txbd = ep->txbase;
  1160. else
  1161. ep->c_txbd++;
  1162. if (ep->c_txbd == ep->n_txbd) {
  1163. if (bdstatus & DEVICE_T_ERROR) {
  1164. frame_set_status(pframe, FRAME_ERROR);
  1165. if (bdstatus & T_TO)
  1166. pframe->status |= TX_ER_TIMEOUT;
  1167. if (bdstatus & T_UN)
  1168. pframe->status |= TX_ER_UNDERUN;
  1169. }
  1170. ep0_txframe_handle(ep);
  1171. }
  1172. bd = ep->c_txbd;
  1173. bdstatus = in_be32((u32 __iomem *)bd);
  1174. }
  1175. return 0;
  1176. }
  1177. static int ep_txframe_handle(struct qe_ep *ep)
  1178. {
  1179. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1180. qe_ep_flushtxfifo(ep);
  1181. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1182. if (frame_get_info(ep->txframe) & PID_DATA0)
  1183. ep->data01 = 0;
  1184. else
  1185. ep->data01 = 1;
  1186. txcomplete(ep, 1);
  1187. } else
  1188. txcomplete(ep, 0);
  1189. frame_create_tx(ep, ep->txframe); /* send the data */
  1190. return 0;
  1191. }
  1192. /* confirm the already trainsmited bd */
  1193. static int qe_ep_txconf(struct qe_ep *ep)
  1194. {
  1195. struct qe_bd __iomem *bd;
  1196. struct qe_frame *pframe = NULL;
  1197. u32 bdstatus;
  1198. unsigned char breakonrxinterrupt = 0;
  1199. bd = ep->c_txbd;
  1200. bdstatus = in_be32((u32 __iomem *)bd);
  1201. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1202. pframe = ep->txframe;
  1203. if (bdstatus & DEVICE_T_ERROR) {
  1204. frame_set_status(pframe, FRAME_ERROR);
  1205. if (bdstatus & T_TO)
  1206. pframe->status |= TX_ER_TIMEOUT;
  1207. if (bdstatus & T_UN)
  1208. pframe->status |= TX_ER_UNDERUN;
  1209. }
  1210. /* clear and recycle the BD */
  1211. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1212. out_be32(&bd->buf, 0);
  1213. if (bdstatus & T_W)
  1214. ep->c_txbd = ep->txbase;
  1215. else
  1216. ep->c_txbd++;
  1217. /* handle the tx frame */
  1218. ep_txframe_handle(ep);
  1219. bd = ep->c_txbd;
  1220. bdstatus = in_be32((u32 __iomem *)bd);
  1221. }
  1222. if (breakonrxinterrupt)
  1223. return -EIO;
  1224. else
  1225. return 0;
  1226. }
  1227. /* Add a request in queue, and try to transmit a packet */
  1228. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1229. {
  1230. int reval = 0;
  1231. if (ep->tx_req == NULL) {
  1232. ep->sent = 0;
  1233. ep->last = 0;
  1234. txcomplete(ep, 0); /* can gain a new tx_req */
  1235. reval = frame_create_tx(ep, ep->txframe);
  1236. }
  1237. return reval;
  1238. }
  1239. /* Maybe this is a good ideal */
  1240. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1241. {
  1242. struct qe_udc *udc = ep->udc;
  1243. struct qe_frame *pframe = NULL;
  1244. struct qe_bd __iomem *bd;
  1245. u32 bdstatus, length;
  1246. u32 vaddr, fsize;
  1247. u8 *cp;
  1248. u8 finish_req = 0;
  1249. u8 framepid;
  1250. if (list_empty(&ep->queue)) {
  1251. dev_vdbg(udc->dev, "the req already finish!\n");
  1252. return 0;
  1253. }
  1254. pframe = ep->rxframe;
  1255. bd = ep->n_rxbd;
  1256. bdstatus = in_be32((u32 __iomem *)bd);
  1257. length = bdstatus & BD_LENGTH_MASK;
  1258. while (!(bdstatus & R_E) && length) {
  1259. if (finish_req)
  1260. break;
  1261. if ((bdstatus & R_F) && (bdstatus & R_L)
  1262. && !(bdstatus & R_ERROR)) {
  1263. qe_frame_clean(pframe);
  1264. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1265. frame_set_data(pframe, (u8 *)vaddr);
  1266. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1267. frame_set_status(pframe, FRAME_OK);
  1268. switch (bdstatus & R_PID) {
  1269. case R_PID_DATA1:
  1270. frame_set_info(pframe, PID_DATA1); break;
  1271. default:
  1272. frame_set_info(pframe, PID_DATA0); break;
  1273. }
  1274. /* handle the rx frame */
  1275. if (frame_get_info(pframe) & PID_DATA1)
  1276. framepid = 0x1;
  1277. else
  1278. framepid = 0;
  1279. if (framepid != ep->data01) {
  1280. dev_vdbg(udc->dev, "the data01 error!\n");
  1281. } else {
  1282. fsize = frame_get_length(pframe);
  1283. cp = (u8 *)(req->req.buf) + req->req.actual;
  1284. if (cp) {
  1285. memcpy(cp, pframe->data, fsize);
  1286. req->req.actual += fsize;
  1287. if ((fsize < ep->ep.maxpacket)
  1288. || (req->req.actual >=
  1289. req->req.length)) {
  1290. finish_req = 1;
  1291. done(ep, req, 0);
  1292. if (list_empty(&ep->queue))
  1293. qe_eprx_nack(ep);
  1294. }
  1295. }
  1296. qe_ep_toggledata01(ep);
  1297. }
  1298. } else {
  1299. dev_err(udc->dev, "The receive frame with error!\n");
  1300. }
  1301. /* note: don't clear the rxbd's buffer address *
  1302. * only Clear the length */
  1303. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1304. ep->has_data--;
  1305. /* Get next BD */
  1306. if (bdstatus & R_W)
  1307. bd = ep->rxbase;
  1308. else
  1309. bd++;
  1310. bdstatus = in_be32((u32 __iomem *)bd);
  1311. length = bdstatus & BD_LENGTH_MASK;
  1312. }
  1313. ep->n_rxbd = bd;
  1314. ep_recycle_rxbds(ep);
  1315. return 0;
  1316. }
  1317. /* only add the request in queue */
  1318. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1319. {
  1320. if (ep->state == EP_STATE_NACK) {
  1321. if (ep->has_data <= 0) {
  1322. /* Enable rx and unmask rx interrupt */
  1323. qe_eprx_normal(ep);
  1324. } else {
  1325. /* Copy the exist BD data */
  1326. ep_req_rx(ep, req);
  1327. }
  1328. }
  1329. return 0;
  1330. }
  1331. /********************************************************************
  1332. Internal Used Function End
  1333. ********************************************************************/
  1334. /*-----------------------------------------------------------------------
  1335. Endpoint Management Functions For Gadget
  1336. -----------------------------------------------------------------------*/
  1337. static int qe_ep_enable(struct usb_ep *_ep,
  1338. const struct usb_endpoint_descriptor *desc)
  1339. {
  1340. struct qe_udc *udc;
  1341. struct qe_ep *ep;
  1342. int retval = 0;
  1343. unsigned char epnum;
  1344. ep = container_of(_ep, struct qe_ep, ep);
  1345. /* catch various bogus parameters */
  1346. if (!_ep || !desc || ep->desc || _ep->name == ep_name[0] ||
  1347. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1348. return -EINVAL;
  1349. udc = ep->udc;
  1350. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1351. return -ESHUTDOWN;
  1352. epnum = (u8)desc->bEndpointAddress & 0xF;
  1353. retval = qe_ep_init(udc, epnum, desc);
  1354. if (retval != 0) {
  1355. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1356. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1357. return -EINVAL;
  1358. }
  1359. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1360. return 0;
  1361. }
  1362. static int qe_ep_disable(struct usb_ep *_ep)
  1363. {
  1364. struct qe_udc *udc;
  1365. struct qe_ep *ep;
  1366. unsigned long flags;
  1367. unsigned int size;
  1368. ep = container_of(_ep, struct qe_ep, ep);
  1369. udc = ep->udc;
  1370. if (!_ep || !ep->desc) {
  1371. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1372. return -EINVAL;
  1373. }
  1374. spin_lock_irqsave(&udc->lock, flags);
  1375. /* Nuke all pending requests (does flush) */
  1376. nuke(ep, -ESHUTDOWN);
  1377. ep->desc = NULL;
  1378. ep->stopped = 1;
  1379. ep->tx_req = NULL;
  1380. qe_ep_reset(udc, ep->epnum);
  1381. spin_unlock_irqrestore(&udc->lock, flags);
  1382. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1383. if (ep->dir == USB_DIR_OUT)
  1384. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1385. (USB_BDRING_LEN_RX + 1);
  1386. else
  1387. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1388. (USB_BDRING_LEN + 1);
  1389. if (ep->dir != USB_DIR_IN) {
  1390. kfree(ep->rxframe);
  1391. if (ep->rxbufmap) {
  1392. dma_unmap_single(udc_controller->gadget.dev.parent,
  1393. ep->rxbuf_d, size,
  1394. DMA_FROM_DEVICE);
  1395. ep->rxbuf_d = DMA_ADDR_INVALID;
  1396. } else {
  1397. dma_sync_single_for_cpu(
  1398. udc_controller->gadget.dev.parent,
  1399. ep->rxbuf_d, size,
  1400. DMA_FROM_DEVICE);
  1401. }
  1402. kfree(ep->rxbuffer);
  1403. }
  1404. if (ep->dir != USB_DIR_OUT)
  1405. kfree(ep->txframe);
  1406. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1407. return 0;
  1408. }
  1409. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1410. {
  1411. struct qe_req *req;
  1412. req = kzalloc(sizeof(*req), gfp_flags);
  1413. if (!req)
  1414. return NULL;
  1415. req->req.dma = DMA_ADDR_INVALID;
  1416. INIT_LIST_HEAD(&req->queue);
  1417. return &req->req;
  1418. }
  1419. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1420. {
  1421. struct qe_req *req;
  1422. req = container_of(_req, struct qe_req, req);
  1423. if (_req)
  1424. kfree(req);
  1425. }
  1426. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1427. {
  1428. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1429. struct qe_req *req = container_of(_req, struct qe_req, req);
  1430. struct qe_udc *udc;
  1431. int reval;
  1432. udc = ep->udc;
  1433. /* catch various bogus parameters */
  1434. if (!_req || !req->req.complete || !req->req.buf
  1435. || !list_empty(&req->queue)) {
  1436. dev_dbg(udc->dev, "bad params\n");
  1437. return -EINVAL;
  1438. }
  1439. if (!_ep || (!ep->desc && ep_index(ep))) {
  1440. dev_dbg(udc->dev, "bad ep\n");
  1441. return -EINVAL;
  1442. }
  1443. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1444. return -ESHUTDOWN;
  1445. req->ep = ep;
  1446. /* map virtual address to hardware */
  1447. if (req->req.dma == DMA_ADDR_INVALID) {
  1448. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1449. req->req.buf,
  1450. req->req.length,
  1451. ep_is_in(ep)
  1452. ? DMA_TO_DEVICE :
  1453. DMA_FROM_DEVICE);
  1454. req->mapped = 1;
  1455. } else {
  1456. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1457. req->req.dma, req->req.length,
  1458. ep_is_in(ep)
  1459. ? DMA_TO_DEVICE :
  1460. DMA_FROM_DEVICE);
  1461. req->mapped = 0;
  1462. }
  1463. req->req.status = -EINPROGRESS;
  1464. req->req.actual = 0;
  1465. list_add_tail(&req->queue, &ep->queue);
  1466. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1467. ep->name, req->req.length);
  1468. /* push the request to device */
  1469. if (ep_is_in(ep))
  1470. reval = ep_req_send(ep, req);
  1471. /* EP0 */
  1472. if (ep_index(ep) == 0 && req->req.length > 0) {
  1473. if (ep_is_in(ep))
  1474. udc->ep0_state = DATA_STATE_XMIT;
  1475. else
  1476. udc->ep0_state = DATA_STATE_RECV;
  1477. }
  1478. if (ep->dir == USB_DIR_OUT)
  1479. reval = ep_req_receive(ep, req);
  1480. return 0;
  1481. }
  1482. /* queues (submits) an I/O request to an endpoint */
  1483. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1484. gfp_t gfp_flags)
  1485. {
  1486. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1487. struct qe_udc *udc = ep->udc;
  1488. unsigned long flags;
  1489. int ret;
  1490. spin_lock_irqsave(&udc->lock, flags);
  1491. ret = __qe_ep_queue(_ep, _req);
  1492. spin_unlock_irqrestore(&udc->lock, flags);
  1493. return ret;
  1494. }
  1495. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1496. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1497. {
  1498. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1499. struct qe_req *req;
  1500. unsigned long flags;
  1501. if (!_ep || !_req)
  1502. return -EINVAL;
  1503. spin_lock_irqsave(&ep->udc->lock, flags);
  1504. /* make sure it's actually queued on this endpoint */
  1505. list_for_each_entry(req, &ep->queue, queue) {
  1506. if (&req->req == _req)
  1507. break;
  1508. }
  1509. if (&req->req != _req) {
  1510. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1511. return -EINVAL;
  1512. }
  1513. done(ep, req, -ECONNRESET);
  1514. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1515. return 0;
  1516. }
  1517. /*-----------------------------------------------------------------
  1518. * modify the endpoint halt feature
  1519. * @ep: the non-isochronous endpoint being stalled
  1520. * @value: 1--set halt 0--clear halt
  1521. * Returns zero, or a negative error code.
  1522. *----------------------------------------------------------------*/
  1523. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1524. {
  1525. struct qe_ep *ep;
  1526. unsigned long flags;
  1527. int status = -EOPNOTSUPP;
  1528. struct qe_udc *udc;
  1529. ep = container_of(_ep, struct qe_ep, ep);
  1530. if (!_ep || !ep->desc) {
  1531. status = -EINVAL;
  1532. goto out;
  1533. }
  1534. udc = ep->udc;
  1535. /* Attempt to halt IN ep will fail if any transfer requests
  1536. * are still queue */
  1537. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1538. status = -EAGAIN;
  1539. goto out;
  1540. }
  1541. status = 0;
  1542. spin_lock_irqsave(&ep->udc->lock, flags);
  1543. qe_eptx_stall_change(ep, value);
  1544. qe_eprx_stall_change(ep, value);
  1545. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1546. if (ep->epnum == 0) {
  1547. udc->ep0_state = WAIT_FOR_SETUP;
  1548. udc->ep0_dir = 0;
  1549. }
  1550. /* set data toggle to DATA0 on clear halt */
  1551. if (value == 0)
  1552. ep->data01 = 0;
  1553. out:
  1554. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1555. value ? "set" : "clear", status);
  1556. return status;
  1557. }
  1558. static struct usb_ep_ops qe_ep_ops = {
  1559. .enable = qe_ep_enable,
  1560. .disable = qe_ep_disable,
  1561. .alloc_request = qe_alloc_request,
  1562. .free_request = qe_free_request,
  1563. .queue = qe_ep_queue,
  1564. .dequeue = qe_ep_dequeue,
  1565. .set_halt = qe_ep_set_halt,
  1566. };
  1567. /*------------------------------------------------------------------------
  1568. Gadget Driver Layer Operations
  1569. ------------------------------------------------------------------------*/
  1570. /* Get the current frame number */
  1571. static int qe_get_frame(struct usb_gadget *gadget)
  1572. {
  1573. u16 tmp;
  1574. tmp = in_be16(&udc_controller->usb_param->frame_n);
  1575. if (tmp & 0x8000)
  1576. tmp = tmp & 0x07ff;
  1577. else
  1578. tmp = -EINVAL;
  1579. return (int)tmp;
  1580. }
  1581. /* Tries to wake up the host connected to this gadget
  1582. *
  1583. * Return : 0-success
  1584. * Negative-this feature not enabled by host or not supported by device hw
  1585. */
  1586. static int qe_wakeup(struct usb_gadget *gadget)
  1587. {
  1588. return -ENOTSUPP;
  1589. }
  1590. /* Notify controller that VBUS is powered, Called by whatever
  1591. detects VBUS sessions */
  1592. static int qe_vbus_session(struct usb_gadget *gadget, int is_active)
  1593. {
  1594. return -ENOTSUPP;
  1595. }
  1596. /* constrain controller's VBUS power usage
  1597. * This call is used by gadget drivers during SET_CONFIGURATION calls,
  1598. * reporting how much power the device may consume. For example, this
  1599. * could affect how quickly batteries are recharged.
  1600. *
  1601. * Returns zero on success, else negative errno.
  1602. */
  1603. static int qe_vbus_draw(struct usb_gadget *gadget, unsigned mA)
  1604. {
  1605. return -ENOTSUPP;
  1606. }
  1607. /* Change Data+ pullup status
  1608. * this func is used by usb_gadget_connect/disconnect
  1609. */
  1610. static int qe_pullup(struct usb_gadget *gadget, int is_on)
  1611. {
  1612. return -ENOTSUPP;
  1613. }
  1614. /* defined in usb_gadget.h */
  1615. static struct usb_gadget_ops qe_gadget_ops = {
  1616. .get_frame = qe_get_frame,
  1617. .wakeup = qe_wakeup,
  1618. /* .set_selfpowered = qe_set_selfpowered,*/ /* always selfpowered */
  1619. .vbus_session = qe_vbus_session,
  1620. .vbus_draw = qe_vbus_draw,
  1621. .pullup = qe_pullup,
  1622. };
  1623. /*-------------------------------------------------------------------------
  1624. USB ep0 Setup process in BUS Enumeration
  1625. -------------------------------------------------------------------------*/
  1626. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1627. {
  1628. struct qe_ep *ep = &udc->eps[pipe];
  1629. nuke(ep, -ECONNRESET);
  1630. ep->tx_req = NULL;
  1631. return 0;
  1632. }
  1633. static int reset_queues(struct qe_udc *udc)
  1634. {
  1635. u8 pipe;
  1636. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1637. udc_reset_ep_queue(udc, pipe);
  1638. /* report disconnect; the driver is already quiesced */
  1639. spin_unlock(&udc->lock);
  1640. udc->driver->disconnect(&udc->gadget);
  1641. spin_lock(&udc->lock);
  1642. return 0;
  1643. }
  1644. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1645. u16 length)
  1646. {
  1647. /* Save the new address to device struct */
  1648. udc->device_address = (u8) value;
  1649. /* Update usb state */
  1650. udc->usb_state = USB_STATE_ADDRESS;
  1651. /* Status phase , send a ZLP */
  1652. if (ep0_prime_status(udc, USB_DIR_IN))
  1653. qe_ep0_stall(udc);
  1654. }
  1655. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1656. {
  1657. struct qe_req *req = container_of(_req, struct qe_req, req);
  1658. req->req.buf = NULL;
  1659. kfree(req);
  1660. }
  1661. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1662. u16 index, u16 length)
  1663. {
  1664. u16 usb_status = 0;
  1665. struct qe_req *req;
  1666. struct qe_ep *ep;
  1667. int status = 0;
  1668. ep = &udc->eps[0];
  1669. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1670. /* Get device status */
  1671. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1672. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1673. /* Get interface status */
  1674. /* We don't have interface information in udc driver */
  1675. usb_status = 0;
  1676. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1677. /* Get endpoint status */
  1678. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1679. struct qe_ep *target_ep = &udc->eps[pipe];
  1680. u16 usep;
  1681. /* stall if endpoint doesn't exist */
  1682. if (!target_ep->desc)
  1683. goto stall;
  1684. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1685. if (index & USB_DIR_IN) {
  1686. if (target_ep->dir != USB_DIR_IN)
  1687. goto stall;
  1688. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1689. usb_status = 1 << USB_ENDPOINT_HALT;
  1690. } else {
  1691. if (target_ep->dir != USB_DIR_OUT)
  1692. goto stall;
  1693. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1694. usb_status = 1 << USB_ENDPOINT_HALT;
  1695. }
  1696. }
  1697. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1698. struct qe_req, req);
  1699. req->req.length = 2;
  1700. req->req.buf = udc->statusbuf;
  1701. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1702. req->req.status = -EINPROGRESS;
  1703. req->req.actual = 0;
  1704. req->req.complete = ownercomplete;
  1705. udc->ep0_dir = USB_DIR_IN;
  1706. /* data phase */
  1707. status = __qe_ep_queue(&ep->ep, &req->req);
  1708. if (status == 0)
  1709. return;
  1710. stall:
  1711. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1712. qe_ep0_stall(udc);
  1713. }
  1714. /* only handle the setup request, suppose the device in normal status */
  1715. static void setup_received_handle(struct qe_udc *udc,
  1716. struct usb_ctrlrequest *setup)
  1717. {
  1718. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1719. u16 wValue = le16_to_cpu(setup->wValue);
  1720. u16 wIndex = le16_to_cpu(setup->wIndex);
  1721. u16 wLength = le16_to_cpu(setup->wLength);
  1722. /* clear the previous request in the ep0 */
  1723. udc_reset_ep_queue(udc, 0);
  1724. if (setup->bRequestType & USB_DIR_IN)
  1725. udc->ep0_dir = USB_DIR_IN;
  1726. else
  1727. udc->ep0_dir = USB_DIR_OUT;
  1728. switch (setup->bRequest) {
  1729. case USB_REQ_GET_STATUS:
  1730. /* Data+Status phase form udc */
  1731. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1732. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1733. break;
  1734. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1735. wLength);
  1736. return;
  1737. case USB_REQ_SET_ADDRESS:
  1738. /* Status phase from udc */
  1739. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1740. USB_RECIP_DEVICE))
  1741. break;
  1742. ch9setaddress(udc, wValue, wIndex, wLength);
  1743. return;
  1744. case USB_REQ_CLEAR_FEATURE:
  1745. case USB_REQ_SET_FEATURE:
  1746. /* Requests with no data phase, status phase from udc */
  1747. if ((setup->bRequestType & USB_TYPE_MASK)
  1748. != USB_TYPE_STANDARD)
  1749. break;
  1750. if ((setup->bRequestType & USB_RECIP_MASK)
  1751. == USB_RECIP_ENDPOINT) {
  1752. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1753. struct qe_ep *ep;
  1754. if (wValue != 0 || wLength != 0
  1755. || pipe > USB_MAX_ENDPOINTS)
  1756. break;
  1757. ep = &udc->eps[pipe];
  1758. spin_unlock(&udc->lock);
  1759. qe_ep_set_halt(&ep->ep,
  1760. (setup->bRequest == USB_REQ_SET_FEATURE)
  1761. ? 1 : 0);
  1762. spin_lock(&udc->lock);
  1763. }
  1764. ep0_prime_status(udc, USB_DIR_IN);
  1765. return;
  1766. default:
  1767. break;
  1768. }
  1769. if (wLength) {
  1770. /* Data phase from gadget, status phase from udc */
  1771. if (setup->bRequestType & USB_DIR_IN) {
  1772. udc->ep0_state = DATA_STATE_XMIT;
  1773. udc->ep0_dir = USB_DIR_IN;
  1774. } else {
  1775. udc->ep0_state = DATA_STATE_RECV;
  1776. udc->ep0_dir = USB_DIR_OUT;
  1777. }
  1778. spin_unlock(&udc->lock);
  1779. if (udc->driver->setup(&udc->gadget,
  1780. &udc->local_setup_buff) < 0)
  1781. qe_ep0_stall(udc);
  1782. spin_lock(&udc->lock);
  1783. } else {
  1784. /* No data phase, IN status from gadget */
  1785. udc->ep0_dir = USB_DIR_IN;
  1786. spin_unlock(&udc->lock);
  1787. if (udc->driver->setup(&udc->gadget,
  1788. &udc->local_setup_buff) < 0)
  1789. qe_ep0_stall(udc);
  1790. spin_lock(&udc->lock);
  1791. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1792. }
  1793. }
  1794. /*-------------------------------------------------------------------------
  1795. USB Interrupt handlers
  1796. -------------------------------------------------------------------------*/
  1797. static void suspend_irq(struct qe_udc *udc)
  1798. {
  1799. udc->resume_state = udc->usb_state;
  1800. udc->usb_state = USB_STATE_SUSPENDED;
  1801. /* report suspend to the driver ,serial.c not support this*/
  1802. if (udc->driver->suspend)
  1803. udc->driver->suspend(&udc->gadget);
  1804. }
  1805. static void resume_irq(struct qe_udc *udc)
  1806. {
  1807. udc->usb_state = udc->resume_state;
  1808. udc->resume_state = 0;
  1809. /* report resume to the driver , serial.c not support this*/
  1810. if (udc->driver->resume)
  1811. udc->driver->resume(&udc->gadget);
  1812. }
  1813. static void idle_irq(struct qe_udc *udc)
  1814. {
  1815. u8 usbs;
  1816. usbs = in_8(&udc->usb_regs->usb_usbs);
  1817. if (usbs & USB_IDLE_STATUS_MASK) {
  1818. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1819. suspend_irq(udc);
  1820. } else {
  1821. if (udc->usb_state == USB_STATE_SUSPENDED)
  1822. resume_irq(udc);
  1823. }
  1824. }
  1825. static int reset_irq(struct qe_udc *udc)
  1826. {
  1827. unsigned char i;
  1828. if (udc->usb_state == USB_STATE_DEFAULT)
  1829. return 0;
  1830. qe_usb_disable();
  1831. out_8(&udc->usb_regs->usb_usadr, 0);
  1832. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1833. if (udc->eps[i].init)
  1834. qe_ep_reset(udc, i);
  1835. }
  1836. reset_queues(udc);
  1837. udc->usb_state = USB_STATE_DEFAULT;
  1838. udc->ep0_state = WAIT_FOR_SETUP;
  1839. udc->ep0_dir = USB_DIR_OUT;
  1840. qe_usb_enable();
  1841. return 0;
  1842. }
  1843. static int bsy_irq(struct qe_udc *udc)
  1844. {
  1845. return 0;
  1846. }
  1847. static int txe_irq(struct qe_udc *udc)
  1848. {
  1849. return 0;
  1850. }
  1851. /* ep0 tx interrupt also in here */
  1852. static int tx_irq(struct qe_udc *udc)
  1853. {
  1854. struct qe_ep *ep;
  1855. struct qe_bd __iomem *bd;
  1856. int i, res = 0;
  1857. if ((udc->usb_state == USB_STATE_ADDRESS)
  1858. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1859. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1860. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1861. ep = &udc->eps[i];
  1862. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1863. bd = ep->c_txbd;
  1864. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1865. && (in_be32(&bd->buf))) {
  1866. /* confirm the transmitted bd */
  1867. if (ep->epnum == 0)
  1868. res = qe_ep0_txconf(ep);
  1869. else
  1870. res = qe_ep_txconf(ep);
  1871. }
  1872. }
  1873. }
  1874. return res;
  1875. }
  1876. /* setup packect's rx is handle in the function too */
  1877. static void rx_irq(struct qe_udc *udc)
  1878. {
  1879. struct qe_ep *ep;
  1880. struct qe_bd __iomem *bd;
  1881. int i;
  1882. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1883. ep = &udc->eps[i];
  1884. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1885. bd = ep->n_rxbd;
  1886. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1887. && (in_be32(&bd->buf))) {
  1888. if (ep->epnum == 0) {
  1889. qe_ep0_rx(udc);
  1890. } else {
  1891. /*non-setup package receive*/
  1892. qe_ep_rx(ep);
  1893. }
  1894. }
  1895. }
  1896. }
  1897. }
  1898. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1899. {
  1900. struct qe_udc *udc = (struct qe_udc *)_udc;
  1901. u16 irq_src;
  1902. irqreturn_t status = IRQ_NONE;
  1903. unsigned long flags;
  1904. spin_lock_irqsave(&udc->lock, flags);
  1905. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1906. in_be16(&udc->usb_regs->usb_usbmr);
  1907. /* Clear notification bits */
  1908. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1909. /* USB Interrupt */
  1910. if (irq_src & USB_E_IDLE_MASK) {
  1911. idle_irq(udc);
  1912. irq_src &= ~USB_E_IDLE_MASK;
  1913. status = IRQ_HANDLED;
  1914. }
  1915. if (irq_src & USB_E_TXB_MASK) {
  1916. tx_irq(udc);
  1917. irq_src &= ~USB_E_TXB_MASK;
  1918. status = IRQ_HANDLED;
  1919. }
  1920. if (irq_src & USB_E_RXB_MASK) {
  1921. rx_irq(udc);
  1922. irq_src &= ~USB_E_RXB_MASK;
  1923. status = IRQ_HANDLED;
  1924. }
  1925. if (irq_src & USB_E_RESET_MASK) {
  1926. reset_irq(udc);
  1927. irq_src &= ~USB_E_RESET_MASK;
  1928. status = IRQ_HANDLED;
  1929. }
  1930. if (irq_src & USB_E_BSY_MASK) {
  1931. bsy_irq(udc);
  1932. irq_src &= ~USB_E_BSY_MASK;
  1933. status = IRQ_HANDLED;
  1934. }
  1935. if (irq_src & USB_E_TXE_MASK) {
  1936. txe_irq(udc);
  1937. irq_src &= ~USB_E_TXE_MASK;
  1938. status = IRQ_HANDLED;
  1939. }
  1940. spin_unlock_irqrestore(&udc->lock, flags);
  1941. return status;
  1942. }
  1943. /*-------------------------------------------------------------------------
  1944. Gadget driver probe and unregister.
  1945. --------------------------------------------------------------------------*/
  1946. int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
  1947. int (*bind)(struct usb_gadget *))
  1948. {
  1949. int retval;
  1950. unsigned long flags = 0;
  1951. /* standard operations */
  1952. if (!udc_controller)
  1953. return -ENODEV;
  1954. if (!driver || (driver->speed != USB_SPEED_FULL
  1955. && driver->speed != USB_SPEED_HIGH)
  1956. || !bind || !driver->disconnect || !driver->setup)
  1957. return -EINVAL;
  1958. if (udc_controller->driver)
  1959. return -EBUSY;
  1960. /* lock is needed but whether should use this lock or another */
  1961. spin_lock_irqsave(&udc_controller->lock, flags);
  1962. driver->driver.bus = NULL;
  1963. /* hook up the driver */
  1964. udc_controller->driver = driver;
  1965. udc_controller->gadget.dev.driver = &driver->driver;
  1966. udc_controller->gadget.speed = (enum usb_device_speed)(driver->speed);
  1967. spin_unlock_irqrestore(&udc_controller->lock, flags);
  1968. retval = bind(&udc_controller->gadget);
  1969. if (retval) {
  1970. dev_err(udc_controller->dev, "bind to %s --> %d",
  1971. driver->driver.name, retval);
  1972. udc_controller->gadget.dev.driver = NULL;
  1973. udc_controller->driver = NULL;
  1974. return retval;
  1975. }
  1976. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1977. qe_usb_enable();
  1978. out_be16(&udc_controller->usb_regs->usb_usber, 0xffff);
  1979. out_be16(&udc_controller->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1980. udc_controller->usb_state = USB_STATE_ATTACHED;
  1981. udc_controller->ep0_state = WAIT_FOR_SETUP;
  1982. udc_controller->ep0_dir = USB_DIR_OUT;
  1983. dev_info(udc_controller->dev, "%s bind to driver %s \n",
  1984. udc_controller->gadget.name, driver->driver.name);
  1985. return 0;
  1986. }
  1987. EXPORT_SYMBOL(usb_gadget_probe_driver);
  1988. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  1989. {
  1990. struct qe_ep *loop_ep;
  1991. unsigned long flags;
  1992. if (!udc_controller)
  1993. return -ENODEV;
  1994. if (!driver || driver != udc_controller->driver)
  1995. return -EINVAL;
  1996. /* stop usb controller, disable intr */
  1997. qe_usb_disable();
  1998. /* in fact, no needed */
  1999. udc_controller->usb_state = USB_STATE_ATTACHED;
  2000. udc_controller->ep0_state = WAIT_FOR_SETUP;
  2001. udc_controller->ep0_dir = 0;
  2002. /* stand operation */
  2003. spin_lock_irqsave(&udc_controller->lock, flags);
  2004. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  2005. nuke(&udc_controller->eps[0], -ESHUTDOWN);
  2006. list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
  2007. ep.ep_list)
  2008. nuke(loop_ep, -ESHUTDOWN);
  2009. spin_unlock_irqrestore(&udc_controller->lock, flags);
  2010. /* report disconnect; the controller is already quiesced */
  2011. driver->disconnect(&udc_controller->gadget);
  2012. /* unbind gadget and unhook driver. */
  2013. driver->unbind(&udc_controller->gadget);
  2014. udc_controller->gadget.dev.driver = NULL;
  2015. udc_controller->driver = NULL;
  2016. dev_info(udc_controller->dev, "unregistered gadget driver '%s'\r\n",
  2017. driver->driver.name);
  2018. return 0;
  2019. }
  2020. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  2021. /* udc structure's alloc and setup, include ep-param alloc */
  2022. static struct qe_udc __devinit *qe_udc_config(struct platform_device *ofdev)
  2023. {
  2024. struct qe_udc *udc;
  2025. struct device_node *np = ofdev->dev.of_node;
  2026. unsigned int tmp_addr = 0;
  2027. struct usb_device_para __iomem *usbpram;
  2028. unsigned int i;
  2029. u64 size;
  2030. u32 offset;
  2031. udc = kzalloc(sizeof(*udc), GFP_KERNEL);
  2032. if (udc == NULL) {
  2033. dev_err(&ofdev->dev, "malloc udc failed\n");
  2034. goto cleanup;
  2035. }
  2036. udc->dev = &ofdev->dev;
  2037. /* get default address of usb parameter in MURAM from device tree */
  2038. offset = *of_get_address(np, 1, &size, NULL);
  2039. udc->usb_param = cpm_muram_addr(offset);
  2040. memset_io(udc->usb_param, 0, size);
  2041. usbpram = udc->usb_param;
  2042. out_be16(&usbpram->frame_n, 0);
  2043. out_be32(&usbpram->rstate, 0);
  2044. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  2045. sizeof(struct usb_ep_para)),
  2046. USB_EP_PARA_ALIGNMENT);
  2047. if (IS_ERR_VALUE(tmp_addr))
  2048. goto cleanup;
  2049. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  2050. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  2051. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  2052. tmp_addr += 32;
  2053. }
  2054. memset_io(udc->ep_param[0], 0,
  2055. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  2056. udc->resume_state = USB_STATE_NOTATTACHED;
  2057. udc->usb_state = USB_STATE_POWERED;
  2058. udc->ep0_dir = 0;
  2059. spin_lock_init(&udc->lock);
  2060. return udc;
  2061. cleanup:
  2062. kfree(udc);
  2063. return NULL;
  2064. }
  2065. /* USB Controller register init */
  2066. static int __devinit qe_udc_reg_init(struct qe_udc *udc)
  2067. {
  2068. struct usb_ctlr __iomem *qe_usbregs;
  2069. qe_usbregs = udc->usb_regs;
  2070. /* Spec says that we must enable the USB controller to change mode. */
  2071. out_8(&qe_usbregs->usb_usmod, 0x01);
  2072. /* Mode changed, now disable it, since muram isn't initialized yet. */
  2073. out_8(&qe_usbregs->usb_usmod, 0x00);
  2074. /* Initialize the rest. */
  2075. out_be16(&qe_usbregs->usb_usbmr, 0);
  2076. out_8(&qe_usbregs->usb_uscom, 0);
  2077. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2078. return 0;
  2079. }
  2080. static int __devinit qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2081. {
  2082. struct qe_ep *ep = &udc->eps[pipe_num];
  2083. ep->udc = udc;
  2084. strcpy(ep->name, ep_name[pipe_num]);
  2085. ep->ep.name = ep_name[pipe_num];
  2086. ep->ep.ops = &qe_ep_ops;
  2087. ep->stopped = 1;
  2088. ep->ep.maxpacket = (unsigned short) ~0;
  2089. ep->desc = NULL;
  2090. ep->dir = 0xff;
  2091. ep->epnum = (u8)pipe_num;
  2092. ep->sent = 0;
  2093. ep->last = 0;
  2094. ep->init = 0;
  2095. ep->rxframe = NULL;
  2096. ep->txframe = NULL;
  2097. ep->tx_req = NULL;
  2098. ep->state = EP_STATE_IDLE;
  2099. ep->has_data = 0;
  2100. /* the queue lists any req for this ep */
  2101. INIT_LIST_HEAD(&ep->queue);
  2102. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2103. if (pipe_num != 0)
  2104. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2105. ep->gadget = &udc->gadget;
  2106. return 0;
  2107. }
  2108. /*-----------------------------------------------------------------------
  2109. * UDC device Driver operation functions *
  2110. *----------------------------------------------------------------------*/
  2111. static void qe_udc_release(struct device *dev)
  2112. {
  2113. int i = 0;
  2114. complete(udc_controller->done);
  2115. cpm_muram_free(cpm_muram_offset(udc_controller->ep_param[0]));
  2116. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2117. udc_controller->ep_param[i] = NULL;
  2118. kfree(udc_controller);
  2119. udc_controller = NULL;
  2120. }
  2121. /* Driver probe functions */
  2122. static int __devinit qe_udc_probe(struct platform_device *ofdev)
  2123. {
  2124. struct device_node *np = ofdev->dev.of_node;
  2125. struct qe_ep *ep;
  2126. unsigned int ret = 0;
  2127. unsigned int i;
  2128. const void *prop;
  2129. if (!ofdev->dev.of_match)
  2130. return -EINVAL;
  2131. prop = of_get_property(np, "mode", NULL);
  2132. if (!prop || strcmp(prop, "peripheral"))
  2133. return -ENODEV;
  2134. /* Initialize the udc structure including QH member and other member */
  2135. udc_controller = qe_udc_config(ofdev);
  2136. if (!udc_controller) {
  2137. dev_err(&ofdev->dev, "failed to initialize\n");
  2138. return -ENOMEM;
  2139. }
  2140. udc_controller->soc_type = (unsigned long)ofdev->dev.of_match->data;
  2141. udc_controller->usb_regs = of_iomap(np, 0);
  2142. if (!udc_controller->usb_regs) {
  2143. ret = -ENOMEM;
  2144. goto err1;
  2145. }
  2146. /* initialize usb hw reg except for regs for EP,
  2147. * leave usbintr reg untouched*/
  2148. qe_udc_reg_init(udc_controller);
  2149. /* here comes the stand operations for probe
  2150. * set the qe_udc->gadget.xxx */
  2151. udc_controller->gadget.ops = &qe_gadget_ops;
  2152. /* gadget.ep0 is a pointer */
  2153. udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
  2154. INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
  2155. /* modify in register gadget process */
  2156. udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
  2157. /* name: Identifies the controller hardware type. */
  2158. udc_controller->gadget.name = driver_name;
  2159. device_initialize(&udc_controller->gadget.dev);
  2160. dev_set_name(&udc_controller->gadget.dev, "gadget");
  2161. udc_controller->gadget.dev.release = qe_udc_release;
  2162. udc_controller->gadget.dev.parent = &ofdev->dev;
  2163. /* initialize qe_ep struct */
  2164. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2165. /* because the ep type isn't decide here so
  2166. * qe_ep_init() should be called in ep_enable() */
  2167. /* setup the qe_ep struct and link ep.ep.list
  2168. * into gadget.ep_list */
  2169. qe_ep_config(udc_controller, (unsigned char)i);
  2170. }
  2171. /* ep0 initialization in here */
  2172. ret = qe_ep_init(udc_controller, 0, &qe_ep0_desc);
  2173. if (ret)
  2174. goto err2;
  2175. /* create a buf for ZLP send, need to remain zeroed */
  2176. udc_controller->nullbuf = kzalloc(256, GFP_KERNEL);
  2177. if (udc_controller->nullbuf == NULL) {
  2178. dev_err(udc_controller->dev, "cannot alloc nullbuf\n");
  2179. ret = -ENOMEM;
  2180. goto err3;
  2181. }
  2182. /* buffer for data of get_status request */
  2183. udc_controller->statusbuf = kzalloc(2, GFP_KERNEL);
  2184. if (udc_controller->statusbuf == NULL) {
  2185. ret = -ENOMEM;
  2186. goto err4;
  2187. }
  2188. udc_controller->nullp = virt_to_phys((void *)udc_controller->nullbuf);
  2189. if (udc_controller->nullp == DMA_ADDR_INVALID) {
  2190. udc_controller->nullp = dma_map_single(
  2191. udc_controller->gadget.dev.parent,
  2192. udc_controller->nullbuf,
  2193. 256,
  2194. DMA_TO_DEVICE);
  2195. udc_controller->nullmap = 1;
  2196. } else {
  2197. dma_sync_single_for_device(udc_controller->gadget.dev.parent,
  2198. udc_controller->nullp, 256,
  2199. DMA_TO_DEVICE);
  2200. }
  2201. tasklet_init(&udc_controller->rx_tasklet, ep_rx_tasklet,
  2202. (unsigned long)udc_controller);
  2203. /* request irq and disable DR */
  2204. udc_controller->usb_irq = irq_of_parse_and_map(np, 0);
  2205. if (!udc_controller->usb_irq) {
  2206. ret = -EINVAL;
  2207. goto err_noirq;
  2208. }
  2209. ret = request_irq(udc_controller->usb_irq, qe_udc_irq, 0,
  2210. driver_name, udc_controller);
  2211. if (ret) {
  2212. dev_err(udc_controller->dev, "cannot request irq %d err %d \n",
  2213. udc_controller->usb_irq, ret);
  2214. goto err5;
  2215. }
  2216. ret = device_add(&udc_controller->gadget.dev);
  2217. if (ret)
  2218. goto err6;
  2219. dev_info(udc_controller->dev,
  2220. "%s USB controller initialized as device\n",
  2221. (udc_controller->soc_type == PORT_QE) ? "QE" : "CPM");
  2222. return 0;
  2223. err6:
  2224. free_irq(udc_controller->usb_irq, udc_controller);
  2225. err5:
  2226. irq_dispose_mapping(udc_controller->usb_irq);
  2227. err_noirq:
  2228. if (udc_controller->nullmap) {
  2229. dma_unmap_single(udc_controller->gadget.dev.parent,
  2230. udc_controller->nullp, 256,
  2231. DMA_TO_DEVICE);
  2232. udc_controller->nullp = DMA_ADDR_INVALID;
  2233. } else {
  2234. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2235. udc_controller->nullp, 256,
  2236. DMA_TO_DEVICE);
  2237. }
  2238. kfree(udc_controller->statusbuf);
  2239. err4:
  2240. kfree(udc_controller->nullbuf);
  2241. err3:
  2242. ep = &udc_controller->eps[0];
  2243. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2244. kfree(ep->rxframe);
  2245. kfree(ep->rxbuffer);
  2246. kfree(ep->txframe);
  2247. err2:
  2248. iounmap(udc_controller->usb_regs);
  2249. err1:
  2250. kfree(udc_controller);
  2251. udc_controller = NULL;
  2252. return ret;
  2253. }
  2254. #ifdef CONFIG_PM
  2255. static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
  2256. {
  2257. return -ENOTSUPP;
  2258. }
  2259. static int qe_udc_resume(struct platform_device *dev)
  2260. {
  2261. return -ENOTSUPP;
  2262. }
  2263. #endif
  2264. static int __devexit qe_udc_remove(struct platform_device *ofdev)
  2265. {
  2266. struct qe_ep *ep;
  2267. unsigned int size;
  2268. DECLARE_COMPLETION(done);
  2269. if (!udc_controller)
  2270. return -ENODEV;
  2271. udc_controller->done = &done;
  2272. tasklet_disable(&udc_controller->rx_tasklet);
  2273. if (udc_controller->nullmap) {
  2274. dma_unmap_single(udc_controller->gadget.dev.parent,
  2275. udc_controller->nullp, 256,
  2276. DMA_TO_DEVICE);
  2277. udc_controller->nullp = DMA_ADDR_INVALID;
  2278. } else {
  2279. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2280. udc_controller->nullp, 256,
  2281. DMA_TO_DEVICE);
  2282. }
  2283. kfree(udc_controller->statusbuf);
  2284. kfree(udc_controller->nullbuf);
  2285. ep = &udc_controller->eps[0];
  2286. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2287. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2288. kfree(ep->rxframe);
  2289. if (ep->rxbufmap) {
  2290. dma_unmap_single(udc_controller->gadget.dev.parent,
  2291. ep->rxbuf_d, size,
  2292. DMA_FROM_DEVICE);
  2293. ep->rxbuf_d = DMA_ADDR_INVALID;
  2294. } else {
  2295. dma_sync_single_for_cpu(udc_controller->gadget.dev.parent,
  2296. ep->rxbuf_d, size,
  2297. DMA_FROM_DEVICE);
  2298. }
  2299. kfree(ep->rxbuffer);
  2300. kfree(ep->txframe);
  2301. free_irq(udc_controller->usb_irq, udc_controller);
  2302. irq_dispose_mapping(udc_controller->usb_irq);
  2303. tasklet_kill(&udc_controller->rx_tasklet);
  2304. iounmap(udc_controller->usb_regs);
  2305. device_unregister(&udc_controller->gadget.dev);
  2306. /* wait for release() of gadget.dev to free udc */
  2307. wait_for_completion(&done);
  2308. return 0;
  2309. }
  2310. /*-------------------------------------------------------------------------*/
  2311. static const struct of_device_id qe_udc_match[] __devinitconst = {
  2312. {
  2313. .compatible = "fsl,mpc8323-qe-usb",
  2314. .data = (void *)PORT_QE,
  2315. },
  2316. {
  2317. .compatible = "fsl,mpc8360-qe-usb",
  2318. .data = (void *)PORT_QE,
  2319. },
  2320. {
  2321. .compatible = "fsl,mpc8272-cpm-usb",
  2322. .data = (void *)PORT_CPM,
  2323. },
  2324. {},
  2325. };
  2326. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2327. static struct platform_driver udc_driver = {
  2328. .driver = {
  2329. .name = (char *)driver_name,
  2330. .owner = THIS_MODULE,
  2331. .of_match_table = qe_udc_match,
  2332. },
  2333. .probe = qe_udc_probe,
  2334. .remove = __devexit_p(qe_udc_remove),
  2335. #ifdef CONFIG_PM
  2336. .suspend = qe_udc_suspend,
  2337. .resume = qe_udc_resume,
  2338. #endif
  2339. };
  2340. static int __init qe_udc_init(void)
  2341. {
  2342. printk(KERN_INFO "%s: %s, %s\n", driver_name, driver_desc,
  2343. DRIVER_VERSION);
  2344. return platform_driver_register(&udc_driver);
  2345. }
  2346. static void __exit qe_udc_exit(void)
  2347. {
  2348. platform_driver_unregister(&udc_driver);
  2349. }
  2350. module_init(qe_udc_init);
  2351. module_exit(qe_udc_exit);
  2352. MODULE_DESCRIPTION(DRIVER_DESC);
  2353. MODULE_AUTHOR(DRIVER_AUTHOR);
  2354. MODULE_LICENSE("GPL");