qla_mbx.c 107 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/gfp.h>
  10. /*
  11. * qla2x00_mailbox_command
  12. * Issue mailbox command and waits for completion.
  13. *
  14. * Input:
  15. * ha = adapter block pointer.
  16. * mcp = driver internal mbx struct pointer.
  17. *
  18. * Output:
  19. * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
  20. *
  21. * Returns:
  22. * 0 : QLA_SUCCESS = cmd performed success
  23. * 1 : QLA_FUNCTION_FAILED (error encountered)
  24. * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
  25. *
  26. * Context:
  27. * Kernel context.
  28. */
  29. static int
  30. qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
  31. {
  32. int rval;
  33. unsigned long flags = 0;
  34. device_reg_t __iomem *reg;
  35. uint8_t abort_active;
  36. uint8_t io_lock_on;
  37. uint16_t command = 0;
  38. uint16_t *iptr;
  39. uint16_t __iomem *optr;
  40. uint32_t cnt;
  41. uint32_t mboxes;
  42. unsigned long wait_time;
  43. struct qla_hw_data *ha = vha->hw;
  44. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  45. if (ha->pdev->error_state > pci_channel_io_frozen)
  46. return QLA_FUNCTION_TIMEOUT;
  47. if (vha->device_flags & DFLG_DEV_FAILED) {
  48. DEBUG2_3_11(qla_printk(KERN_WARNING, ha,
  49. "%s(%ld): Device in failed state, "
  50. "timeout MBX Exiting.\n",
  51. __func__, base_vha->host_no));
  52. return QLA_FUNCTION_TIMEOUT;
  53. }
  54. reg = ha->iobase;
  55. io_lock_on = base_vha->flags.init_done;
  56. rval = QLA_SUCCESS;
  57. abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  58. DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no));
  59. if (ha->flags.pci_channel_io_perm_failure) {
  60. DEBUG(printk("%s(%ld): Perm failure on EEH, timeout MBX "
  61. "Exiting.\n", __func__, vha->host_no));
  62. return QLA_FUNCTION_TIMEOUT;
  63. }
  64. if (ha->flags.isp82xx_fw_hung) {
  65. /* Setting Link-Down error */
  66. mcp->mb[0] = MBS_LINK_DOWN_ERROR;
  67. rval = QLA_FUNCTION_FAILED;
  68. goto premature_exit;
  69. }
  70. /*
  71. * Wait for active mailbox commands to finish by waiting at most tov
  72. * seconds. This is to serialize actual issuing of mailbox cmds during
  73. * non ISP abort time.
  74. */
  75. if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
  76. /* Timeout occurred. Return error. */
  77. DEBUG2_3_11(printk("%s(%ld): cmd access timeout. "
  78. "Exiting.\n", __func__, base_vha->host_no));
  79. return QLA_FUNCTION_TIMEOUT;
  80. }
  81. ha->flags.mbox_busy = 1;
  82. /* Save mailbox command for debug */
  83. ha->mcp = mcp;
  84. DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
  85. base_vha->host_no, mcp->mb[0]));
  86. spin_lock_irqsave(&ha->hardware_lock, flags);
  87. /* Load mailbox registers. */
  88. if (IS_QLA82XX(ha))
  89. optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
  90. else if (IS_FWI2_CAPABLE(ha) && !IS_QLA82XX(ha))
  91. optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
  92. else
  93. optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
  94. iptr = mcp->mb;
  95. command = mcp->mb[0];
  96. mboxes = mcp->out_mb;
  97. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  98. if (IS_QLA2200(ha) && cnt == 8)
  99. optr =
  100. (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
  101. if (mboxes & BIT_0)
  102. WRT_REG_WORD(optr, *iptr);
  103. mboxes >>= 1;
  104. optr++;
  105. iptr++;
  106. }
  107. #if defined(QL_DEBUG_LEVEL_1)
  108. printk("%s(%ld): Loaded MBX registers (displayed in bytes) = \n",
  109. __func__, base_vha->host_no);
  110. qla2x00_dump_buffer((uint8_t *)mcp->mb, 16);
  111. printk("\n");
  112. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x10), 16);
  113. printk("\n");
  114. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x20), 8);
  115. printk("\n");
  116. printk("%s(%ld): I/O address = %p.\n", __func__, base_vha->host_no,
  117. optr);
  118. qla2x00_dump_regs(base_vha);
  119. #endif
  120. /* Issue set host interrupt command to send cmd out. */
  121. ha->flags.mbox_int = 0;
  122. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  123. /* Unlock mbx registers and wait for interrupt */
  124. DEBUG11(printk("%s(%ld): going to unlock irq & waiting for interrupt. "
  125. "jiffies=%lx.\n", __func__, base_vha->host_no, jiffies));
  126. /* Wait for mbx cmd completion until timeout */
  127. if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
  128. set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  129. if (IS_QLA82XX(ha)) {
  130. if (RD_REG_DWORD(&reg->isp82.hint) &
  131. HINT_MBX_INT_PENDING) {
  132. spin_unlock_irqrestore(&ha->hardware_lock,
  133. flags);
  134. DEBUG2_3_11(printk(KERN_INFO
  135. "%s(%ld): Pending Mailbox timeout. "
  136. "Exiting.\n", __func__, base_vha->host_no));
  137. rval = QLA_FUNCTION_TIMEOUT;
  138. goto premature_exit;
  139. }
  140. WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
  141. } else if (IS_FWI2_CAPABLE(ha))
  142. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  143. else
  144. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  145. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  146. wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
  147. clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  148. } else {
  149. DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__,
  150. base_vha->host_no, command));
  151. if (IS_QLA82XX(ha)) {
  152. if (RD_REG_DWORD(&reg->isp82.hint) &
  153. HINT_MBX_INT_PENDING) {
  154. spin_unlock_irqrestore(&ha->hardware_lock,
  155. flags);
  156. DEBUG2_3_11(printk(KERN_INFO
  157. "%s(%ld): Pending Mailbox timeout. "
  158. "Exiting.\n", __func__, base_vha->host_no));
  159. rval = QLA_FUNCTION_TIMEOUT;
  160. goto premature_exit;
  161. }
  162. WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
  163. } else if (IS_FWI2_CAPABLE(ha))
  164. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  165. else
  166. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  167. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  168. wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
  169. while (!ha->flags.mbox_int) {
  170. if (time_after(jiffies, wait_time))
  171. break;
  172. /* Check for pending interrupts. */
  173. qla2x00_poll(ha->rsp_q_map[0]);
  174. if (!ha->flags.mbox_int &&
  175. !(IS_QLA2200(ha) &&
  176. command == MBC_LOAD_RISC_RAM_EXTENDED))
  177. msleep(10);
  178. } /* while */
  179. DEBUG17(qla_printk(KERN_WARNING, ha,
  180. "Waited %d sec\n",
  181. (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)));
  182. }
  183. /* Check whether we timed out */
  184. if (ha->flags.mbox_int) {
  185. uint16_t *iptr2;
  186. DEBUG3_11(printk("%s(%ld): cmd %x completed.\n", __func__,
  187. base_vha->host_no, command));
  188. /* Got interrupt. Clear the flag. */
  189. ha->flags.mbox_int = 0;
  190. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  191. if (ha->flags.isp82xx_fw_hung) {
  192. ha->flags.mbox_busy = 0;
  193. /* Setting Link-Down error */
  194. mcp->mb[0] = MBS_LINK_DOWN_ERROR;
  195. ha->mcp = NULL;
  196. rval = QLA_FUNCTION_FAILED;
  197. goto premature_exit;
  198. }
  199. if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
  200. rval = QLA_FUNCTION_FAILED;
  201. /* Load return mailbox registers. */
  202. iptr2 = mcp->mb;
  203. iptr = (uint16_t *)&ha->mailbox_out[0];
  204. mboxes = mcp->in_mb;
  205. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  206. if (mboxes & BIT_0)
  207. *iptr2 = *iptr;
  208. mboxes >>= 1;
  209. iptr2++;
  210. iptr++;
  211. }
  212. } else {
  213. #if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) || \
  214. defined(QL_DEBUG_LEVEL_11)
  215. uint16_t mb0;
  216. uint32_t ictrl;
  217. if (IS_FWI2_CAPABLE(ha)) {
  218. mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
  219. ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
  220. } else {
  221. mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
  222. ictrl = RD_REG_WORD(&reg->isp.ictrl);
  223. }
  224. printk("%s(%ld): **** MB Command Timeout for cmd %x ****\n",
  225. __func__, base_vha->host_no, command);
  226. printk("%s(%ld): icontrol=%x jiffies=%lx\n", __func__,
  227. base_vha->host_no, ictrl, jiffies);
  228. printk("%s(%ld): *** mailbox[0] = 0x%x ***\n", __func__,
  229. base_vha->host_no, mb0);
  230. qla2x00_dump_regs(base_vha);
  231. #endif
  232. rval = QLA_FUNCTION_TIMEOUT;
  233. }
  234. ha->flags.mbox_busy = 0;
  235. /* Clean up */
  236. ha->mcp = NULL;
  237. if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
  238. DEBUG11(printk("%s(%ld): checking for additional resp "
  239. "interrupt.\n", __func__, base_vha->host_no));
  240. /* polling mode for non isp_abort commands. */
  241. qla2x00_poll(ha->rsp_q_map[0]);
  242. }
  243. if (rval == QLA_FUNCTION_TIMEOUT &&
  244. mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
  245. if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
  246. ha->flags.eeh_busy) {
  247. /* not in dpc. schedule it for dpc to take over. */
  248. DEBUG(printk("%s(%ld): timeout schedule "
  249. "isp_abort_needed.\n", __func__,
  250. base_vha->host_no));
  251. DEBUG2_3_11(printk("%s(%ld): timeout schedule "
  252. "isp_abort_needed.\n", __func__,
  253. base_vha->host_no));
  254. if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
  255. !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
  256. !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  257. qla_printk(KERN_WARNING, ha,
  258. "Mailbox command timeout occured. "
  259. "Scheduling ISP " "abort. eeh_busy: 0x%x\n",
  260. ha->flags.eeh_busy);
  261. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  262. qla2xxx_wake_dpc(vha);
  263. }
  264. } else if (!abort_active) {
  265. /* call abort directly since we are in the DPC thread */
  266. DEBUG(printk("%s(%ld): timeout calling abort_isp\n",
  267. __func__, base_vha->host_no));
  268. DEBUG2_3_11(printk("%s(%ld): timeout calling "
  269. "abort_isp\n", __func__, base_vha->host_no));
  270. if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
  271. !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
  272. !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  273. qla_printk(KERN_WARNING, ha,
  274. "Mailbox command timeout occured. "
  275. "Issuing ISP abort.\n");
  276. set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
  277. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  278. if (ha->isp_ops->abort_isp(vha)) {
  279. /* Failed. retry later. */
  280. set_bit(ISP_ABORT_NEEDED,
  281. &vha->dpc_flags);
  282. }
  283. clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
  284. DEBUG(printk("%s(%ld): finished abort_isp\n",
  285. __func__, vha->host_no));
  286. DEBUG2_3_11(printk(
  287. "%s(%ld): finished abort_isp\n",
  288. __func__, vha->host_no));
  289. }
  290. }
  291. }
  292. premature_exit:
  293. /* Allow next mbx cmd to come in. */
  294. complete(&ha->mbx_cmd_comp);
  295. if (rval) {
  296. DEBUG2_3_11(printk("%s(%ld): **** FAILED. mbx0=%x, mbx1=%x, "
  297. "mbx2=%x, cmd=%x ****\n", __func__, base_vha->host_no,
  298. mcp->mb[0], mcp->mb[1], mcp->mb[2], command));
  299. } else {
  300. DEBUG11(printk("%s(%ld): done.\n", __func__,
  301. base_vha->host_no));
  302. }
  303. return rval;
  304. }
  305. int
  306. qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
  307. uint32_t risc_code_size)
  308. {
  309. int rval;
  310. struct qla_hw_data *ha = vha->hw;
  311. mbx_cmd_t mc;
  312. mbx_cmd_t *mcp = &mc;
  313. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  314. if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
  315. mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
  316. mcp->mb[8] = MSW(risc_addr);
  317. mcp->out_mb = MBX_8|MBX_0;
  318. } else {
  319. mcp->mb[0] = MBC_LOAD_RISC_RAM;
  320. mcp->out_mb = MBX_0;
  321. }
  322. mcp->mb[1] = LSW(risc_addr);
  323. mcp->mb[2] = MSW(req_dma);
  324. mcp->mb[3] = LSW(req_dma);
  325. mcp->mb[6] = MSW(MSD(req_dma));
  326. mcp->mb[7] = LSW(MSD(req_dma));
  327. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  328. if (IS_FWI2_CAPABLE(ha)) {
  329. mcp->mb[4] = MSW(risc_code_size);
  330. mcp->mb[5] = LSW(risc_code_size);
  331. mcp->out_mb |= MBX_5|MBX_4;
  332. } else {
  333. mcp->mb[4] = LSW(risc_code_size);
  334. mcp->out_mb |= MBX_4;
  335. }
  336. mcp->in_mb = MBX_0;
  337. mcp->tov = MBX_TOV_SECONDS;
  338. mcp->flags = 0;
  339. rval = qla2x00_mailbox_command(vha, mcp);
  340. if (rval != QLA_SUCCESS) {
  341. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  342. vha->host_no, rval, mcp->mb[0]));
  343. } else {
  344. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  345. }
  346. return rval;
  347. }
  348. #define EXTENDED_BB_CREDITS BIT_0
  349. /*
  350. * qla2x00_execute_fw
  351. * Start adapter firmware.
  352. *
  353. * Input:
  354. * ha = adapter block pointer.
  355. * TARGET_QUEUE_LOCK must be released.
  356. * ADAPTER_STATE_LOCK must be released.
  357. *
  358. * Returns:
  359. * qla2x00 local function return status code.
  360. *
  361. * Context:
  362. * Kernel context.
  363. */
  364. int
  365. qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
  366. {
  367. int rval;
  368. struct qla_hw_data *ha = vha->hw;
  369. mbx_cmd_t mc;
  370. mbx_cmd_t *mcp = &mc;
  371. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  372. mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
  373. mcp->out_mb = MBX_0;
  374. mcp->in_mb = MBX_0;
  375. if (IS_FWI2_CAPABLE(ha)) {
  376. mcp->mb[1] = MSW(risc_addr);
  377. mcp->mb[2] = LSW(risc_addr);
  378. mcp->mb[3] = 0;
  379. if (IS_QLA81XX(ha)) {
  380. struct nvram_81xx *nv = ha->nvram;
  381. mcp->mb[4] = (nv->enhanced_features &
  382. EXTENDED_BB_CREDITS);
  383. } else
  384. mcp->mb[4] = 0;
  385. mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
  386. mcp->in_mb |= MBX_1;
  387. } else {
  388. mcp->mb[1] = LSW(risc_addr);
  389. mcp->out_mb |= MBX_1;
  390. if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  391. mcp->mb[2] = 0;
  392. mcp->out_mb |= MBX_2;
  393. }
  394. }
  395. mcp->tov = MBX_TOV_SECONDS;
  396. mcp->flags = 0;
  397. rval = qla2x00_mailbox_command(vha, mcp);
  398. if (rval != QLA_SUCCESS) {
  399. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  400. vha->host_no, rval, mcp->mb[0]));
  401. } else {
  402. if (IS_FWI2_CAPABLE(ha)) {
  403. DEBUG11(printk("%s(%ld): done exchanges=%x.\n",
  404. __func__, vha->host_no, mcp->mb[1]));
  405. } else {
  406. DEBUG11(printk("%s(%ld): done.\n", __func__,
  407. vha->host_no));
  408. }
  409. }
  410. return rval;
  411. }
  412. /*
  413. * qla2x00_get_fw_version
  414. * Get firmware version.
  415. *
  416. * Input:
  417. * ha: adapter state pointer.
  418. * major: pointer for major number.
  419. * minor: pointer for minor number.
  420. * subminor: pointer for subminor number.
  421. *
  422. * Returns:
  423. * qla2x00 local function return status code.
  424. *
  425. * Context:
  426. * Kernel context.
  427. */
  428. int
  429. qla2x00_get_fw_version(scsi_qla_host_t *vha, uint16_t *major, uint16_t *minor,
  430. uint16_t *subminor, uint16_t *attributes, uint32_t *memory, uint8_t *mpi,
  431. uint32_t *mpi_caps, uint8_t *phy)
  432. {
  433. int rval;
  434. mbx_cmd_t mc;
  435. mbx_cmd_t *mcp = &mc;
  436. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  437. mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
  438. mcp->out_mb = MBX_0;
  439. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  440. if (IS_QLA81XX(vha->hw))
  441. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
  442. mcp->flags = 0;
  443. mcp->tov = MBX_TOV_SECONDS;
  444. rval = qla2x00_mailbox_command(vha, mcp);
  445. if (rval != QLA_SUCCESS)
  446. goto failed;
  447. /* Return mailbox data. */
  448. *major = mcp->mb[1];
  449. *minor = mcp->mb[2];
  450. *subminor = mcp->mb[3];
  451. *attributes = mcp->mb[6];
  452. if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
  453. *memory = 0x1FFFF; /* Defaults to 128KB. */
  454. else
  455. *memory = (mcp->mb[5] << 16) | mcp->mb[4];
  456. if (IS_QLA81XX(vha->hw)) {
  457. mpi[0] = mcp->mb[10] & 0xff;
  458. mpi[1] = mcp->mb[11] >> 8;
  459. mpi[2] = mcp->mb[11] & 0xff;
  460. *mpi_caps = (mcp->mb[12] << 16) | mcp->mb[13];
  461. phy[0] = mcp->mb[8] & 0xff;
  462. phy[1] = mcp->mb[9] >> 8;
  463. phy[2] = mcp->mb[9] & 0xff;
  464. }
  465. failed:
  466. if (rval != QLA_SUCCESS) {
  467. /*EMPTY*/
  468. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  469. vha->host_no, rval));
  470. } else {
  471. /*EMPTY*/
  472. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  473. }
  474. return rval;
  475. }
  476. /*
  477. * qla2x00_get_fw_options
  478. * Set firmware options.
  479. *
  480. * Input:
  481. * ha = adapter block pointer.
  482. * fwopt = pointer for firmware options.
  483. *
  484. * Returns:
  485. * qla2x00 local function return status code.
  486. *
  487. * Context:
  488. * Kernel context.
  489. */
  490. int
  491. qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  492. {
  493. int rval;
  494. mbx_cmd_t mc;
  495. mbx_cmd_t *mcp = &mc;
  496. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  497. mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
  498. mcp->out_mb = MBX_0;
  499. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  500. mcp->tov = MBX_TOV_SECONDS;
  501. mcp->flags = 0;
  502. rval = qla2x00_mailbox_command(vha, mcp);
  503. if (rval != QLA_SUCCESS) {
  504. /*EMPTY*/
  505. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  506. vha->host_no, rval));
  507. } else {
  508. fwopts[0] = mcp->mb[0];
  509. fwopts[1] = mcp->mb[1];
  510. fwopts[2] = mcp->mb[2];
  511. fwopts[3] = mcp->mb[3];
  512. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  513. }
  514. return rval;
  515. }
  516. /*
  517. * qla2x00_set_fw_options
  518. * Set firmware options.
  519. *
  520. * Input:
  521. * ha = adapter block pointer.
  522. * fwopt = pointer for firmware options.
  523. *
  524. * Returns:
  525. * qla2x00 local function return status code.
  526. *
  527. * Context:
  528. * Kernel context.
  529. */
  530. int
  531. qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  532. {
  533. int rval;
  534. mbx_cmd_t mc;
  535. mbx_cmd_t *mcp = &mc;
  536. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  537. mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
  538. mcp->mb[1] = fwopts[1];
  539. mcp->mb[2] = fwopts[2];
  540. mcp->mb[3] = fwopts[3];
  541. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  542. mcp->in_mb = MBX_0;
  543. if (IS_FWI2_CAPABLE(vha->hw)) {
  544. mcp->in_mb |= MBX_1;
  545. } else {
  546. mcp->mb[10] = fwopts[10];
  547. mcp->mb[11] = fwopts[11];
  548. mcp->mb[12] = 0; /* Undocumented, but used */
  549. mcp->out_mb |= MBX_12|MBX_11|MBX_10;
  550. }
  551. mcp->tov = MBX_TOV_SECONDS;
  552. mcp->flags = 0;
  553. rval = qla2x00_mailbox_command(vha, mcp);
  554. fwopts[0] = mcp->mb[0];
  555. if (rval != QLA_SUCCESS) {
  556. /*EMPTY*/
  557. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x/%x).\n", __func__,
  558. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  559. } else {
  560. /*EMPTY*/
  561. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  562. }
  563. return rval;
  564. }
  565. /*
  566. * qla2x00_mbx_reg_test
  567. * Mailbox register wrap test.
  568. *
  569. * Input:
  570. * ha = adapter block pointer.
  571. * TARGET_QUEUE_LOCK must be released.
  572. * ADAPTER_STATE_LOCK must be released.
  573. *
  574. * Returns:
  575. * qla2x00 local function return status code.
  576. *
  577. * Context:
  578. * Kernel context.
  579. */
  580. int
  581. qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
  582. {
  583. int rval;
  584. mbx_cmd_t mc;
  585. mbx_cmd_t *mcp = &mc;
  586. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): entered.\n", vha->host_no));
  587. mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
  588. mcp->mb[1] = 0xAAAA;
  589. mcp->mb[2] = 0x5555;
  590. mcp->mb[3] = 0xAA55;
  591. mcp->mb[4] = 0x55AA;
  592. mcp->mb[5] = 0xA5A5;
  593. mcp->mb[6] = 0x5A5A;
  594. mcp->mb[7] = 0x2525;
  595. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  596. mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  597. mcp->tov = MBX_TOV_SECONDS;
  598. mcp->flags = 0;
  599. rval = qla2x00_mailbox_command(vha, mcp);
  600. if (rval == QLA_SUCCESS) {
  601. if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
  602. mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
  603. rval = QLA_FUNCTION_FAILED;
  604. if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
  605. mcp->mb[7] != 0x2525)
  606. rval = QLA_FUNCTION_FAILED;
  607. }
  608. if (rval != QLA_SUCCESS) {
  609. /*EMPTY*/
  610. DEBUG2_3_11(printk("qla2x00_mbx_reg_test(%ld): failed=%x.\n",
  611. vha->host_no, rval));
  612. } else {
  613. /*EMPTY*/
  614. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): done.\n",
  615. vha->host_no));
  616. }
  617. return rval;
  618. }
  619. /*
  620. * qla2x00_verify_checksum
  621. * Verify firmware checksum.
  622. *
  623. * Input:
  624. * ha = adapter block pointer.
  625. * TARGET_QUEUE_LOCK must be released.
  626. * ADAPTER_STATE_LOCK must be released.
  627. *
  628. * Returns:
  629. * qla2x00 local function return status code.
  630. *
  631. * Context:
  632. * Kernel context.
  633. */
  634. int
  635. qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
  636. {
  637. int rval;
  638. mbx_cmd_t mc;
  639. mbx_cmd_t *mcp = &mc;
  640. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  641. mcp->mb[0] = MBC_VERIFY_CHECKSUM;
  642. mcp->out_mb = MBX_0;
  643. mcp->in_mb = MBX_0;
  644. if (IS_FWI2_CAPABLE(vha->hw)) {
  645. mcp->mb[1] = MSW(risc_addr);
  646. mcp->mb[2] = LSW(risc_addr);
  647. mcp->out_mb |= MBX_2|MBX_1;
  648. mcp->in_mb |= MBX_2|MBX_1;
  649. } else {
  650. mcp->mb[1] = LSW(risc_addr);
  651. mcp->out_mb |= MBX_1;
  652. mcp->in_mb |= MBX_1;
  653. }
  654. mcp->tov = MBX_TOV_SECONDS;
  655. mcp->flags = 0;
  656. rval = qla2x00_mailbox_command(vha, mcp);
  657. if (rval != QLA_SUCCESS) {
  658. DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__,
  659. vha->host_no, rval, IS_FWI2_CAPABLE(vha->hw) ?
  660. (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1]));
  661. } else {
  662. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  663. }
  664. return rval;
  665. }
  666. /*
  667. * qla2x00_issue_iocb
  668. * Issue IOCB using mailbox command
  669. *
  670. * Input:
  671. * ha = adapter state pointer.
  672. * buffer = buffer pointer.
  673. * phys_addr = physical address of buffer.
  674. * size = size of buffer.
  675. * TARGET_QUEUE_LOCK must be released.
  676. * ADAPTER_STATE_LOCK must be released.
  677. *
  678. * Returns:
  679. * qla2x00 local function return status code.
  680. *
  681. * Context:
  682. * Kernel context.
  683. */
  684. int
  685. qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
  686. dma_addr_t phys_addr, size_t size, uint32_t tov)
  687. {
  688. int rval;
  689. mbx_cmd_t mc;
  690. mbx_cmd_t *mcp = &mc;
  691. mcp->mb[0] = MBC_IOCB_COMMAND_A64;
  692. mcp->mb[1] = 0;
  693. mcp->mb[2] = MSW(phys_addr);
  694. mcp->mb[3] = LSW(phys_addr);
  695. mcp->mb[6] = MSW(MSD(phys_addr));
  696. mcp->mb[7] = LSW(MSD(phys_addr));
  697. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  698. mcp->in_mb = MBX_2|MBX_0;
  699. mcp->tov = tov;
  700. mcp->flags = 0;
  701. rval = qla2x00_mailbox_command(vha, mcp);
  702. if (rval != QLA_SUCCESS) {
  703. /*EMPTY*/
  704. DEBUG(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x\n",
  705. vha->host_no, rval));
  706. } else {
  707. sts_entry_t *sts_entry = (sts_entry_t *) buffer;
  708. /* Mask reserved bits. */
  709. sts_entry->entry_status &=
  710. IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
  711. }
  712. return rval;
  713. }
  714. int
  715. qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
  716. size_t size)
  717. {
  718. return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
  719. MBX_TOV_SECONDS);
  720. }
  721. /*
  722. * qla2x00_abort_command
  723. * Abort command aborts a specified IOCB.
  724. *
  725. * Input:
  726. * ha = adapter block pointer.
  727. * sp = SB structure pointer.
  728. *
  729. * Returns:
  730. * qla2x00 local function return status code.
  731. *
  732. * Context:
  733. * Kernel context.
  734. */
  735. int
  736. qla2x00_abort_command(srb_t *sp)
  737. {
  738. unsigned long flags = 0;
  739. int rval;
  740. uint32_t handle = 0;
  741. mbx_cmd_t mc;
  742. mbx_cmd_t *mcp = &mc;
  743. fc_port_t *fcport = sp->fcport;
  744. scsi_qla_host_t *vha = fcport->vha;
  745. struct qla_hw_data *ha = vha->hw;
  746. struct req_que *req = vha->req;
  747. DEBUG11(printk("qla2x00_abort_command(%ld): entered.\n", vha->host_no));
  748. spin_lock_irqsave(&ha->hardware_lock, flags);
  749. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  750. if (req->outstanding_cmds[handle] == sp)
  751. break;
  752. }
  753. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  754. if (handle == MAX_OUTSTANDING_COMMANDS) {
  755. /* command not found */
  756. return QLA_FUNCTION_FAILED;
  757. }
  758. mcp->mb[0] = MBC_ABORT_COMMAND;
  759. if (HAS_EXTENDED_IDS(ha))
  760. mcp->mb[1] = fcport->loop_id;
  761. else
  762. mcp->mb[1] = fcport->loop_id << 8;
  763. mcp->mb[2] = (uint16_t)handle;
  764. mcp->mb[3] = (uint16_t)(handle >> 16);
  765. mcp->mb[6] = (uint16_t)sp->cmd->device->lun;
  766. mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  767. mcp->in_mb = MBX_0;
  768. mcp->tov = MBX_TOV_SECONDS;
  769. mcp->flags = 0;
  770. rval = qla2x00_mailbox_command(vha, mcp);
  771. if (rval != QLA_SUCCESS) {
  772. DEBUG2_3_11(printk("qla2x00_abort_command(%ld): failed=%x.\n",
  773. vha->host_no, rval));
  774. } else {
  775. DEBUG11(printk("qla2x00_abort_command(%ld): done.\n",
  776. vha->host_no));
  777. }
  778. return rval;
  779. }
  780. int
  781. qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  782. {
  783. int rval, rval2;
  784. mbx_cmd_t mc;
  785. mbx_cmd_t *mcp = &mc;
  786. scsi_qla_host_t *vha;
  787. struct req_que *req;
  788. struct rsp_que *rsp;
  789. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  790. l = l;
  791. vha = fcport->vha;
  792. req = vha->hw->req_q_map[0];
  793. rsp = req->rsp;
  794. mcp->mb[0] = MBC_ABORT_TARGET;
  795. mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
  796. if (HAS_EXTENDED_IDS(vha->hw)) {
  797. mcp->mb[1] = fcport->loop_id;
  798. mcp->mb[10] = 0;
  799. mcp->out_mb |= MBX_10;
  800. } else {
  801. mcp->mb[1] = fcport->loop_id << 8;
  802. }
  803. mcp->mb[2] = vha->hw->loop_reset_delay;
  804. mcp->mb[9] = vha->vp_idx;
  805. mcp->in_mb = MBX_0;
  806. mcp->tov = MBX_TOV_SECONDS;
  807. mcp->flags = 0;
  808. rval = qla2x00_mailbox_command(vha, mcp);
  809. if (rval != QLA_SUCCESS) {
  810. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  811. vha->host_no, rval));
  812. }
  813. /* Issue marker IOCB. */
  814. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
  815. MK_SYNC_ID);
  816. if (rval2 != QLA_SUCCESS) {
  817. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  818. "(%x).\n", __func__, vha->host_no, rval2));
  819. } else {
  820. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  821. }
  822. return rval;
  823. }
  824. int
  825. qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  826. {
  827. int rval, rval2;
  828. mbx_cmd_t mc;
  829. mbx_cmd_t *mcp = &mc;
  830. scsi_qla_host_t *vha;
  831. struct req_que *req;
  832. struct rsp_que *rsp;
  833. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  834. vha = fcport->vha;
  835. req = vha->hw->req_q_map[0];
  836. rsp = req->rsp;
  837. mcp->mb[0] = MBC_LUN_RESET;
  838. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  839. if (HAS_EXTENDED_IDS(vha->hw))
  840. mcp->mb[1] = fcport->loop_id;
  841. else
  842. mcp->mb[1] = fcport->loop_id << 8;
  843. mcp->mb[2] = l;
  844. mcp->mb[3] = 0;
  845. mcp->mb[9] = vha->vp_idx;
  846. mcp->in_mb = MBX_0;
  847. mcp->tov = MBX_TOV_SECONDS;
  848. mcp->flags = 0;
  849. rval = qla2x00_mailbox_command(vha, mcp);
  850. if (rval != QLA_SUCCESS) {
  851. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  852. vha->host_no, rval));
  853. }
  854. /* Issue marker IOCB. */
  855. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  856. MK_SYNC_ID_LUN);
  857. if (rval2 != QLA_SUCCESS) {
  858. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  859. "(%x).\n", __func__, vha->host_no, rval2));
  860. } else {
  861. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  862. }
  863. return rval;
  864. }
  865. /*
  866. * qla2x00_get_adapter_id
  867. * Get adapter ID and topology.
  868. *
  869. * Input:
  870. * ha = adapter block pointer.
  871. * id = pointer for loop ID.
  872. * al_pa = pointer for AL_PA.
  873. * area = pointer for area.
  874. * domain = pointer for domain.
  875. * top = pointer for topology.
  876. * TARGET_QUEUE_LOCK must be released.
  877. * ADAPTER_STATE_LOCK must be released.
  878. *
  879. * Returns:
  880. * qla2x00 local function return status code.
  881. *
  882. * Context:
  883. * Kernel context.
  884. */
  885. int
  886. qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
  887. uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
  888. {
  889. int rval;
  890. mbx_cmd_t mc;
  891. mbx_cmd_t *mcp = &mc;
  892. DEBUG11(printk("qla2x00_get_adapter_id(%ld): entered.\n",
  893. vha->host_no));
  894. mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
  895. mcp->mb[9] = vha->vp_idx;
  896. mcp->out_mb = MBX_9|MBX_0;
  897. mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  898. if (IS_QLA8XXX_TYPE(vha->hw))
  899. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
  900. mcp->tov = MBX_TOV_SECONDS;
  901. mcp->flags = 0;
  902. rval = qla2x00_mailbox_command(vha, mcp);
  903. if (mcp->mb[0] == MBS_COMMAND_ERROR)
  904. rval = QLA_COMMAND_ERROR;
  905. else if (mcp->mb[0] == MBS_INVALID_COMMAND)
  906. rval = QLA_INVALID_COMMAND;
  907. /* Return data. */
  908. *id = mcp->mb[1];
  909. *al_pa = LSB(mcp->mb[2]);
  910. *area = MSB(mcp->mb[2]);
  911. *domain = LSB(mcp->mb[3]);
  912. *top = mcp->mb[6];
  913. *sw_cap = mcp->mb[7];
  914. if (rval != QLA_SUCCESS) {
  915. /*EMPTY*/
  916. DEBUG2_3_11(printk("qla2x00_get_adapter_id(%ld): failed=%x.\n",
  917. vha->host_no, rval));
  918. } else {
  919. DEBUG11(printk("qla2x00_get_adapter_id(%ld): done.\n",
  920. vha->host_no));
  921. if (IS_QLA8XXX_TYPE(vha->hw)) {
  922. vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
  923. vha->fcoe_fcf_idx = mcp->mb[10];
  924. vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
  925. vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
  926. vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
  927. vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
  928. vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
  929. vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
  930. }
  931. }
  932. return rval;
  933. }
  934. /*
  935. * qla2x00_get_retry_cnt
  936. * Get current firmware login retry count and delay.
  937. *
  938. * Input:
  939. * ha = adapter block pointer.
  940. * retry_cnt = pointer to login retry count.
  941. * tov = pointer to login timeout value.
  942. *
  943. * Returns:
  944. * qla2x00 local function return status code.
  945. *
  946. * Context:
  947. * Kernel context.
  948. */
  949. int
  950. qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
  951. uint16_t *r_a_tov)
  952. {
  953. int rval;
  954. uint16_t ratov;
  955. mbx_cmd_t mc;
  956. mbx_cmd_t *mcp = &mc;
  957. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): entered.\n",
  958. vha->host_no));
  959. mcp->mb[0] = MBC_GET_RETRY_COUNT;
  960. mcp->out_mb = MBX_0;
  961. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  962. mcp->tov = MBX_TOV_SECONDS;
  963. mcp->flags = 0;
  964. rval = qla2x00_mailbox_command(vha, mcp);
  965. if (rval != QLA_SUCCESS) {
  966. /*EMPTY*/
  967. DEBUG2_3_11(printk("qla2x00_get_retry_cnt(%ld): failed = %x.\n",
  968. vha->host_no, mcp->mb[0]));
  969. } else {
  970. /* Convert returned data and check our values. */
  971. *r_a_tov = mcp->mb[3] / 2;
  972. ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
  973. if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
  974. /* Update to the larger values */
  975. *retry_cnt = (uint8_t)mcp->mb[1];
  976. *tov = ratov;
  977. }
  978. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): done. mb3=%d "
  979. "ratov=%d.\n", vha->host_no, mcp->mb[3], ratov));
  980. }
  981. return rval;
  982. }
  983. /*
  984. * qla2x00_init_firmware
  985. * Initialize adapter firmware.
  986. *
  987. * Input:
  988. * ha = adapter block pointer.
  989. * dptr = Initialization control block pointer.
  990. * size = size of initialization control block.
  991. * TARGET_QUEUE_LOCK must be released.
  992. * ADAPTER_STATE_LOCK must be released.
  993. *
  994. * Returns:
  995. * qla2x00 local function return status code.
  996. *
  997. * Context:
  998. * Kernel context.
  999. */
  1000. int
  1001. qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
  1002. {
  1003. int rval;
  1004. mbx_cmd_t mc;
  1005. mbx_cmd_t *mcp = &mc;
  1006. struct qla_hw_data *ha = vha->hw;
  1007. DEBUG11(printk("qla2x00_init_firmware(%ld): entered.\n",
  1008. vha->host_no));
  1009. if (IS_QLA82XX(ha) && ql2xdbwr)
  1010. qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
  1011. (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
  1012. if (ha->flags.npiv_supported)
  1013. mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
  1014. else
  1015. mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
  1016. mcp->mb[1] = 0;
  1017. mcp->mb[2] = MSW(ha->init_cb_dma);
  1018. mcp->mb[3] = LSW(ha->init_cb_dma);
  1019. mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
  1020. mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
  1021. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1022. if (IS_QLA81XX(ha) && ha->ex_init_cb->ex_version) {
  1023. mcp->mb[1] = BIT_0;
  1024. mcp->mb[10] = MSW(ha->ex_init_cb_dma);
  1025. mcp->mb[11] = LSW(ha->ex_init_cb_dma);
  1026. mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
  1027. mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
  1028. mcp->mb[14] = sizeof(*ha->ex_init_cb);
  1029. mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
  1030. }
  1031. mcp->in_mb = MBX_0;
  1032. mcp->buf_size = size;
  1033. mcp->flags = MBX_DMA_OUT;
  1034. mcp->tov = MBX_TOV_SECONDS;
  1035. rval = qla2x00_mailbox_command(vha, mcp);
  1036. if (rval != QLA_SUCCESS) {
  1037. /*EMPTY*/
  1038. DEBUG2_3_11(printk("qla2x00_init_firmware(%ld): failed=%x "
  1039. "mb0=%x.\n",
  1040. vha->host_no, rval, mcp->mb[0]));
  1041. } else {
  1042. /*EMPTY*/
  1043. DEBUG11(printk("qla2x00_init_firmware(%ld): done.\n",
  1044. vha->host_no));
  1045. }
  1046. return rval;
  1047. }
  1048. /*
  1049. * qla2x00_get_port_database
  1050. * Issue normal/enhanced get port database mailbox command
  1051. * and copy device name as necessary.
  1052. *
  1053. * Input:
  1054. * ha = adapter state pointer.
  1055. * dev = structure pointer.
  1056. * opt = enhanced cmd option byte.
  1057. *
  1058. * Returns:
  1059. * qla2x00 local function return status code.
  1060. *
  1061. * Context:
  1062. * Kernel context.
  1063. */
  1064. int
  1065. qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
  1066. {
  1067. int rval;
  1068. mbx_cmd_t mc;
  1069. mbx_cmd_t *mcp = &mc;
  1070. port_database_t *pd;
  1071. struct port_database_24xx *pd24;
  1072. dma_addr_t pd_dma;
  1073. struct qla_hw_data *ha = vha->hw;
  1074. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1075. pd24 = NULL;
  1076. pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
  1077. if (pd == NULL) {
  1078. DEBUG2_3(printk("%s(%ld): failed to allocate Port Database "
  1079. "structure.\n", __func__, vha->host_no));
  1080. return QLA_MEMORY_ALLOC_FAILED;
  1081. }
  1082. memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
  1083. mcp->mb[0] = MBC_GET_PORT_DATABASE;
  1084. if (opt != 0 && !IS_FWI2_CAPABLE(ha))
  1085. mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
  1086. mcp->mb[2] = MSW(pd_dma);
  1087. mcp->mb[3] = LSW(pd_dma);
  1088. mcp->mb[6] = MSW(MSD(pd_dma));
  1089. mcp->mb[7] = LSW(MSD(pd_dma));
  1090. mcp->mb[9] = vha->vp_idx;
  1091. mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1092. mcp->in_mb = MBX_0;
  1093. if (IS_FWI2_CAPABLE(ha)) {
  1094. mcp->mb[1] = fcport->loop_id;
  1095. mcp->mb[10] = opt;
  1096. mcp->out_mb |= MBX_10|MBX_1;
  1097. mcp->in_mb |= MBX_1;
  1098. } else if (HAS_EXTENDED_IDS(ha)) {
  1099. mcp->mb[1] = fcport->loop_id;
  1100. mcp->mb[10] = opt;
  1101. mcp->out_mb |= MBX_10|MBX_1;
  1102. } else {
  1103. mcp->mb[1] = fcport->loop_id << 8 | opt;
  1104. mcp->out_mb |= MBX_1;
  1105. }
  1106. mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
  1107. PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
  1108. mcp->flags = MBX_DMA_IN;
  1109. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1110. rval = qla2x00_mailbox_command(vha, mcp);
  1111. if (rval != QLA_SUCCESS)
  1112. goto gpd_error_out;
  1113. if (IS_FWI2_CAPABLE(ha)) {
  1114. pd24 = (struct port_database_24xx *) pd;
  1115. /* Check for logged in state. */
  1116. if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
  1117. pd24->last_login_state != PDS_PRLI_COMPLETE) {
  1118. DEBUG2(printk("%s(%ld): Unable to verify "
  1119. "login-state (%x/%x) for loop_id %x\n",
  1120. __func__, vha->host_no,
  1121. pd24->current_login_state,
  1122. pd24->last_login_state, fcport->loop_id));
  1123. rval = QLA_FUNCTION_FAILED;
  1124. goto gpd_error_out;
  1125. }
  1126. /* Names are little-endian. */
  1127. memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
  1128. memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
  1129. /* Get port_id of device. */
  1130. fcport->d_id.b.domain = pd24->port_id[0];
  1131. fcport->d_id.b.area = pd24->port_id[1];
  1132. fcport->d_id.b.al_pa = pd24->port_id[2];
  1133. fcport->d_id.b.rsvd_1 = 0;
  1134. /* If not target must be initiator or unknown type. */
  1135. if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
  1136. fcport->port_type = FCT_INITIATOR;
  1137. else
  1138. fcport->port_type = FCT_TARGET;
  1139. } else {
  1140. /* Check for logged in state. */
  1141. if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
  1142. pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
  1143. rval = QLA_FUNCTION_FAILED;
  1144. goto gpd_error_out;
  1145. }
  1146. /* Names are little-endian. */
  1147. memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
  1148. memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
  1149. /* Get port_id of device. */
  1150. fcport->d_id.b.domain = pd->port_id[0];
  1151. fcport->d_id.b.area = pd->port_id[3];
  1152. fcport->d_id.b.al_pa = pd->port_id[2];
  1153. fcport->d_id.b.rsvd_1 = 0;
  1154. /* If not target must be initiator or unknown type. */
  1155. if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
  1156. fcport->port_type = FCT_INITIATOR;
  1157. else
  1158. fcport->port_type = FCT_TARGET;
  1159. /* Passback COS information. */
  1160. fcport->supported_classes = (pd->options & BIT_4) ?
  1161. FC_COS_CLASS2: FC_COS_CLASS3;
  1162. }
  1163. gpd_error_out:
  1164. dma_pool_free(ha->s_dma_pool, pd, pd_dma);
  1165. if (rval != QLA_SUCCESS) {
  1166. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  1167. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1168. } else {
  1169. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1170. }
  1171. return rval;
  1172. }
  1173. /*
  1174. * qla2x00_get_firmware_state
  1175. * Get adapter firmware state.
  1176. *
  1177. * Input:
  1178. * ha = adapter block pointer.
  1179. * dptr = pointer for firmware state.
  1180. * TARGET_QUEUE_LOCK must be released.
  1181. * ADAPTER_STATE_LOCK must be released.
  1182. *
  1183. * Returns:
  1184. * qla2x00 local function return status code.
  1185. *
  1186. * Context:
  1187. * Kernel context.
  1188. */
  1189. int
  1190. qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
  1191. {
  1192. int rval;
  1193. mbx_cmd_t mc;
  1194. mbx_cmd_t *mcp = &mc;
  1195. DEBUG11(printk("qla2x00_get_firmware_state(%ld): entered.\n",
  1196. vha->host_no));
  1197. mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
  1198. mcp->out_mb = MBX_0;
  1199. if (IS_FWI2_CAPABLE(vha->hw))
  1200. mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  1201. else
  1202. mcp->in_mb = MBX_1|MBX_0;
  1203. mcp->tov = MBX_TOV_SECONDS;
  1204. mcp->flags = 0;
  1205. rval = qla2x00_mailbox_command(vha, mcp);
  1206. /* Return firmware states. */
  1207. states[0] = mcp->mb[1];
  1208. if (IS_FWI2_CAPABLE(vha->hw)) {
  1209. states[1] = mcp->mb[2];
  1210. states[2] = mcp->mb[3];
  1211. states[3] = mcp->mb[4];
  1212. states[4] = mcp->mb[5];
  1213. }
  1214. if (rval != QLA_SUCCESS) {
  1215. /*EMPTY*/
  1216. DEBUG2_3_11(printk("qla2x00_get_firmware_state(%ld): "
  1217. "failed=%x.\n", vha->host_no, rval));
  1218. } else {
  1219. /*EMPTY*/
  1220. DEBUG11(printk("qla2x00_get_firmware_state(%ld): done.\n",
  1221. vha->host_no));
  1222. }
  1223. return rval;
  1224. }
  1225. /*
  1226. * qla2x00_get_port_name
  1227. * Issue get port name mailbox command.
  1228. * Returned name is in big endian format.
  1229. *
  1230. * Input:
  1231. * ha = adapter block pointer.
  1232. * loop_id = loop ID of device.
  1233. * name = pointer for name.
  1234. * TARGET_QUEUE_LOCK must be released.
  1235. * ADAPTER_STATE_LOCK must be released.
  1236. *
  1237. * Returns:
  1238. * qla2x00 local function return status code.
  1239. *
  1240. * Context:
  1241. * Kernel context.
  1242. */
  1243. int
  1244. qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
  1245. uint8_t opt)
  1246. {
  1247. int rval;
  1248. mbx_cmd_t mc;
  1249. mbx_cmd_t *mcp = &mc;
  1250. DEBUG11(printk("qla2x00_get_port_name(%ld): entered.\n",
  1251. vha->host_no));
  1252. mcp->mb[0] = MBC_GET_PORT_NAME;
  1253. mcp->mb[9] = vha->vp_idx;
  1254. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  1255. if (HAS_EXTENDED_IDS(vha->hw)) {
  1256. mcp->mb[1] = loop_id;
  1257. mcp->mb[10] = opt;
  1258. mcp->out_mb |= MBX_10;
  1259. } else {
  1260. mcp->mb[1] = loop_id << 8 | opt;
  1261. }
  1262. mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1263. mcp->tov = MBX_TOV_SECONDS;
  1264. mcp->flags = 0;
  1265. rval = qla2x00_mailbox_command(vha, mcp);
  1266. if (rval != QLA_SUCCESS) {
  1267. /*EMPTY*/
  1268. DEBUG2_3_11(printk("qla2x00_get_port_name(%ld): failed=%x.\n",
  1269. vha->host_no, rval));
  1270. } else {
  1271. if (name != NULL) {
  1272. /* This function returns name in big endian. */
  1273. name[0] = MSB(mcp->mb[2]);
  1274. name[1] = LSB(mcp->mb[2]);
  1275. name[2] = MSB(mcp->mb[3]);
  1276. name[3] = LSB(mcp->mb[3]);
  1277. name[4] = MSB(mcp->mb[6]);
  1278. name[5] = LSB(mcp->mb[6]);
  1279. name[6] = MSB(mcp->mb[7]);
  1280. name[7] = LSB(mcp->mb[7]);
  1281. }
  1282. DEBUG11(printk("qla2x00_get_port_name(%ld): done.\n",
  1283. vha->host_no));
  1284. }
  1285. return rval;
  1286. }
  1287. /*
  1288. * qla2x00_lip_reset
  1289. * Issue LIP reset mailbox command.
  1290. *
  1291. * Input:
  1292. * ha = adapter block pointer.
  1293. * TARGET_QUEUE_LOCK must be released.
  1294. * ADAPTER_STATE_LOCK must be released.
  1295. *
  1296. * Returns:
  1297. * qla2x00 local function return status code.
  1298. *
  1299. * Context:
  1300. * Kernel context.
  1301. */
  1302. int
  1303. qla2x00_lip_reset(scsi_qla_host_t *vha)
  1304. {
  1305. int rval;
  1306. mbx_cmd_t mc;
  1307. mbx_cmd_t *mcp = &mc;
  1308. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1309. if (IS_QLA8XXX_TYPE(vha->hw)) {
  1310. /* Logout across all FCFs. */
  1311. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1312. mcp->mb[1] = BIT_1;
  1313. mcp->mb[2] = 0;
  1314. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1315. } else if (IS_FWI2_CAPABLE(vha->hw)) {
  1316. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1317. mcp->mb[1] = BIT_6;
  1318. mcp->mb[2] = 0;
  1319. mcp->mb[3] = vha->hw->loop_reset_delay;
  1320. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1321. } else {
  1322. mcp->mb[0] = MBC_LIP_RESET;
  1323. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1324. if (HAS_EXTENDED_IDS(vha->hw)) {
  1325. mcp->mb[1] = 0x00ff;
  1326. mcp->mb[10] = 0;
  1327. mcp->out_mb |= MBX_10;
  1328. } else {
  1329. mcp->mb[1] = 0xff00;
  1330. }
  1331. mcp->mb[2] = vha->hw->loop_reset_delay;
  1332. mcp->mb[3] = 0;
  1333. }
  1334. mcp->in_mb = MBX_0;
  1335. mcp->tov = MBX_TOV_SECONDS;
  1336. mcp->flags = 0;
  1337. rval = qla2x00_mailbox_command(vha, mcp);
  1338. if (rval != QLA_SUCCESS) {
  1339. /*EMPTY*/
  1340. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n",
  1341. __func__, vha->host_no, rval));
  1342. } else {
  1343. /*EMPTY*/
  1344. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1345. }
  1346. return rval;
  1347. }
  1348. /*
  1349. * qla2x00_send_sns
  1350. * Send SNS command.
  1351. *
  1352. * Input:
  1353. * ha = adapter block pointer.
  1354. * sns = pointer for command.
  1355. * cmd_size = command size.
  1356. * buf_size = response/command size.
  1357. * TARGET_QUEUE_LOCK must be released.
  1358. * ADAPTER_STATE_LOCK must be released.
  1359. *
  1360. * Returns:
  1361. * qla2x00 local function return status code.
  1362. *
  1363. * Context:
  1364. * Kernel context.
  1365. */
  1366. int
  1367. qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
  1368. uint16_t cmd_size, size_t buf_size)
  1369. {
  1370. int rval;
  1371. mbx_cmd_t mc;
  1372. mbx_cmd_t *mcp = &mc;
  1373. DEBUG11(printk("qla2x00_send_sns(%ld): entered.\n",
  1374. vha->host_no));
  1375. DEBUG11(printk("qla2x00_send_sns: retry cnt=%d ratov=%d total "
  1376. "tov=%d.\n", vha->hw->retry_count, vha->hw->login_timeout,
  1377. mcp->tov));
  1378. mcp->mb[0] = MBC_SEND_SNS_COMMAND;
  1379. mcp->mb[1] = cmd_size;
  1380. mcp->mb[2] = MSW(sns_phys_address);
  1381. mcp->mb[3] = LSW(sns_phys_address);
  1382. mcp->mb[6] = MSW(MSD(sns_phys_address));
  1383. mcp->mb[7] = LSW(MSD(sns_phys_address));
  1384. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1385. mcp->in_mb = MBX_0|MBX_1;
  1386. mcp->buf_size = buf_size;
  1387. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
  1388. mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
  1389. rval = qla2x00_mailbox_command(vha, mcp);
  1390. if (rval != QLA_SUCCESS) {
  1391. /*EMPTY*/
  1392. DEBUG(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1393. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1394. DEBUG2_3_11(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1395. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1396. } else {
  1397. /*EMPTY*/
  1398. DEBUG11(printk("qla2x00_send_sns(%ld): done.\n", vha->host_no));
  1399. }
  1400. return rval;
  1401. }
  1402. int
  1403. qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1404. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1405. {
  1406. int rval;
  1407. struct logio_entry_24xx *lg;
  1408. dma_addr_t lg_dma;
  1409. uint32_t iop[2];
  1410. struct qla_hw_data *ha = vha->hw;
  1411. struct req_que *req;
  1412. struct rsp_que *rsp;
  1413. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1414. if (ha->flags.cpu_affinity_enabled)
  1415. req = ha->req_q_map[0];
  1416. else
  1417. req = vha->req;
  1418. rsp = req->rsp;
  1419. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1420. if (lg == NULL) {
  1421. DEBUG2_3(printk("%s(%ld): failed to allocate Login IOCB.\n",
  1422. __func__, vha->host_no));
  1423. return QLA_MEMORY_ALLOC_FAILED;
  1424. }
  1425. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1426. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1427. lg->entry_count = 1;
  1428. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1429. lg->nport_handle = cpu_to_le16(loop_id);
  1430. lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
  1431. if (opt & BIT_0)
  1432. lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
  1433. if (opt & BIT_1)
  1434. lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
  1435. lg->port_id[0] = al_pa;
  1436. lg->port_id[1] = area;
  1437. lg->port_id[2] = domain;
  1438. lg->vp_index = vha->vp_idx;
  1439. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1440. if (rval != QLA_SUCCESS) {
  1441. DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB "
  1442. "(%x).\n", __func__, vha->host_no, rval));
  1443. } else if (lg->entry_status != 0) {
  1444. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1445. "-- error status (%x).\n", __func__, vha->host_no,
  1446. lg->entry_status));
  1447. rval = QLA_FUNCTION_FAILED;
  1448. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1449. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1450. iop[1] = le32_to_cpu(lg->io_parameter[1]);
  1451. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1452. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1453. vha->host_no, le16_to_cpu(lg->comp_status), iop[0],
  1454. iop[1]));
  1455. switch (iop[0]) {
  1456. case LSC_SCODE_PORTID_USED:
  1457. mb[0] = MBS_PORT_ID_USED;
  1458. mb[1] = LSW(iop[1]);
  1459. break;
  1460. case LSC_SCODE_NPORT_USED:
  1461. mb[0] = MBS_LOOP_ID_USED;
  1462. break;
  1463. case LSC_SCODE_NOLINK:
  1464. case LSC_SCODE_NOIOCB:
  1465. case LSC_SCODE_NOXCB:
  1466. case LSC_SCODE_CMD_FAILED:
  1467. case LSC_SCODE_NOFABRIC:
  1468. case LSC_SCODE_FW_NOT_READY:
  1469. case LSC_SCODE_NOT_LOGGED_IN:
  1470. case LSC_SCODE_NOPCB:
  1471. case LSC_SCODE_ELS_REJECT:
  1472. case LSC_SCODE_CMD_PARAM_ERR:
  1473. case LSC_SCODE_NONPORT:
  1474. case LSC_SCODE_LOGGED_IN:
  1475. case LSC_SCODE_NOFLOGI_ACC:
  1476. default:
  1477. mb[0] = MBS_COMMAND_ERROR;
  1478. break;
  1479. }
  1480. } else {
  1481. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1482. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1483. mb[0] = MBS_COMMAND_COMPLETE;
  1484. mb[1] = 0;
  1485. if (iop[0] & BIT_4) {
  1486. if (iop[0] & BIT_8)
  1487. mb[1] |= BIT_1;
  1488. } else
  1489. mb[1] = BIT_0;
  1490. /* Passback COS information. */
  1491. mb[10] = 0;
  1492. if (lg->io_parameter[7] || lg->io_parameter[8])
  1493. mb[10] |= BIT_0; /* Class 2. */
  1494. if (lg->io_parameter[9] || lg->io_parameter[10])
  1495. mb[10] |= BIT_1; /* Class 3. */
  1496. }
  1497. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1498. return rval;
  1499. }
  1500. /*
  1501. * qla2x00_login_fabric
  1502. * Issue login fabric port mailbox command.
  1503. *
  1504. * Input:
  1505. * ha = adapter block pointer.
  1506. * loop_id = device loop ID.
  1507. * domain = device domain.
  1508. * area = device area.
  1509. * al_pa = device AL_PA.
  1510. * status = pointer for return status.
  1511. * opt = command options.
  1512. * TARGET_QUEUE_LOCK must be released.
  1513. * ADAPTER_STATE_LOCK must be released.
  1514. *
  1515. * Returns:
  1516. * qla2x00 local function return status code.
  1517. *
  1518. * Context:
  1519. * Kernel context.
  1520. */
  1521. int
  1522. qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1523. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1524. {
  1525. int rval;
  1526. mbx_cmd_t mc;
  1527. mbx_cmd_t *mcp = &mc;
  1528. struct qla_hw_data *ha = vha->hw;
  1529. DEBUG11(printk("qla2x00_login_fabric(%ld): entered.\n", vha->host_no));
  1530. mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
  1531. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1532. if (HAS_EXTENDED_IDS(ha)) {
  1533. mcp->mb[1] = loop_id;
  1534. mcp->mb[10] = opt;
  1535. mcp->out_mb |= MBX_10;
  1536. } else {
  1537. mcp->mb[1] = (loop_id << 8) | opt;
  1538. }
  1539. mcp->mb[2] = domain;
  1540. mcp->mb[3] = area << 8 | al_pa;
  1541. mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
  1542. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1543. mcp->flags = 0;
  1544. rval = qla2x00_mailbox_command(vha, mcp);
  1545. /* Return mailbox statuses. */
  1546. if (mb != NULL) {
  1547. mb[0] = mcp->mb[0];
  1548. mb[1] = mcp->mb[1];
  1549. mb[2] = mcp->mb[2];
  1550. mb[6] = mcp->mb[6];
  1551. mb[7] = mcp->mb[7];
  1552. /* COS retrieved from Get-Port-Database mailbox command. */
  1553. mb[10] = 0;
  1554. }
  1555. if (rval != QLA_SUCCESS) {
  1556. /* RLU tmp code: need to change main mailbox_command function to
  1557. * return ok even when the mailbox completion value is not
  1558. * SUCCESS. The caller needs to be responsible to interpret
  1559. * the return values of this mailbox command if we're not
  1560. * to change too much of the existing code.
  1561. */
  1562. if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
  1563. mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
  1564. mcp->mb[0] == 0x4006)
  1565. rval = QLA_SUCCESS;
  1566. /*EMPTY*/
  1567. DEBUG2_3_11(printk("qla2x00_login_fabric(%ld): failed=%x "
  1568. "mb[0]=%x mb[1]=%x mb[2]=%x.\n", vha->host_no, rval,
  1569. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  1570. } else {
  1571. /*EMPTY*/
  1572. DEBUG11(printk("qla2x00_login_fabric(%ld): done.\n",
  1573. vha->host_no));
  1574. }
  1575. return rval;
  1576. }
  1577. /*
  1578. * qla2x00_login_local_device
  1579. * Issue login loop port mailbox command.
  1580. *
  1581. * Input:
  1582. * ha = adapter block pointer.
  1583. * loop_id = device loop ID.
  1584. * opt = command options.
  1585. *
  1586. * Returns:
  1587. * Return status code.
  1588. *
  1589. * Context:
  1590. * Kernel context.
  1591. *
  1592. */
  1593. int
  1594. qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
  1595. uint16_t *mb_ret, uint8_t opt)
  1596. {
  1597. int rval;
  1598. mbx_cmd_t mc;
  1599. mbx_cmd_t *mcp = &mc;
  1600. struct qla_hw_data *ha = vha->hw;
  1601. if (IS_FWI2_CAPABLE(ha))
  1602. return qla24xx_login_fabric(vha, fcport->loop_id,
  1603. fcport->d_id.b.domain, fcport->d_id.b.area,
  1604. fcport->d_id.b.al_pa, mb_ret, opt);
  1605. DEBUG3(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1606. mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
  1607. if (HAS_EXTENDED_IDS(ha))
  1608. mcp->mb[1] = fcport->loop_id;
  1609. else
  1610. mcp->mb[1] = fcport->loop_id << 8;
  1611. mcp->mb[2] = opt;
  1612. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1613. mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
  1614. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1615. mcp->flags = 0;
  1616. rval = qla2x00_mailbox_command(vha, mcp);
  1617. /* Return mailbox statuses. */
  1618. if (mb_ret != NULL) {
  1619. mb_ret[0] = mcp->mb[0];
  1620. mb_ret[1] = mcp->mb[1];
  1621. mb_ret[6] = mcp->mb[6];
  1622. mb_ret[7] = mcp->mb[7];
  1623. }
  1624. if (rval != QLA_SUCCESS) {
  1625. /* AV tmp code: need to change main mailbox_command function to
  1626. * return ok even when the mailbox completion value is not
  1627. * SUCCESS. The caller needs to be responsible to interpret
  1628. * the return values of this mailbox command if we're not
  1629. * to change too much of the existing code.
  1630. */
  1631. if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
  1632. rval = QLA_SUCCESS;
  1633. DEBUG(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1634. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1635. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1636. DEBUG2_3(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1637. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1638. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1639. } else {
  1640. /*EMPTY*/
  1641. DEBUG3(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1642. }
  1643. return (rval);
  1644. }
  1645. int
  1646. qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1647. uint8_t area, uint8_t al_pa)
  1648. {
  1649. int rval;
  1650. struct logio_entry_24xx *lg;
  1651. dma_addr_t lg_dma;
  1652. struct qla_hw_data *ha = vha->hw;
  1653. struct req_que *req;
  1654. struct rsp_que *rsp;
  1655. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1656. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1657. if (lg == NULL) {
  1658. DEBUG2_3(printk("%s(%ld): failed to allocate Logout IOCB.\n",
  1659. __func__, vha->host_no));
  1660. return QLA_MEMORY_ALLOC_FAILED;
  1661. }
  1662. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1663. if (ql2xmaxqueues > 1)
  1664. req = ha->req_q_map[0];
  1665. else
  1666. req = vha->req;
  1667. rsp = req->rsp;
  1668. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1669. lg->entry_count = 1;
  1670. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1671. lg->nport_handle = cpu_to_le16(loop_id);
  1672. lg->control_flags =
  1673. __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1674. lg->port_id[0] = al_pa;
  1675. lg->port_id[1] = area;
  1676. lg->port_id[2] = domain;
  1677. lg->vp_index = vha->vp_idx;
  1678. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1679. if (rval != QLA_SUCCESS) {
  1680. DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB "
  1681. "(%x).\n", __func__, vha->host_no, rval));
  1682. } else if (lg->entry_status != 0) {
  1683. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1684. "-- error status (%x).\n", __func__, vha->host_no,
  1685. lg->entry_status));
  1686. rval = QLA_FUNCTION_FAILED;
  1687. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1688. DEBUG2_3_11(printk("%s(%ld %d): failed to complete IOCB "
  1689. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1690. vha->host_no, vha->vp_idx, le16_to_cpu(lg->comp_status),
  1691. le32_to_cpu(lg->io_parameter[0]),
  1692. le32_to_cpu(lg->io_parameter[1])));
  1693. } else {
  1694. /*EMPTY*/
  1695. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1696. }
  1697. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1698. return rval;
  1699. }
  1700. /*
  1701. * qla2x00_fabric_logout
  1702. * Issue logout fabric port mailbox command.
  1703. *
  1704. * Input:
  1705. * ha = adapter block pointer.
  1706. * loop_id = device loop ID.
  1707. * TARGET_QUEUE_LOCK must be released.
  1708. * ADAPTER_STATE_LOCK must be released.
  1709. *
  1710. * Returns:
  1711. * qla2x00 local function return status code.
  1712. *
  1713. * Context:
  1714. * Kernel context.
  1715. */
  1716. int
  1717. qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1718. uint8_t area, uint8_t al_pa)
  1719. {
  1720. int rval;
  1721. mbx_cmd_t mc;
  1722. mbx_cmd_t *mcp = &mc;
  1723. DEBUG11(printk("qla2x00_fabric_logout(%ld): entered.\n",
  1724. vha->host_no));
  1725. mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
  1726. mcp->out_mb = MBX_1|MBX_0;
  1727. if (HAS_EXTENDED_IDS(vha->hw)) {
  1728. mcp->mb[1] = loop_id;
  1729. mcp->mb[10] = 0;
  1730. mcp->out_mb |= MBX_10;
  1731. } else {
  1732. mcp->mb[1] = loop_id << 8;
  1733. }
  1734. mcp->in_mb = MBX_1|MBX_0;
  1735. mcp->tov = MBX_TOV_SECONDS;
  1736. mcp->flags = 0;
  1737. rval = qla2x00_mailbox_command(vha, mcp);
  1738. if (rval != QLA_SUCCESS) {
  1739. /*EMPTY*/
  1740. DEBUG2_3_11(printk("qla2x00_fabric_logout(%ld): failed=%x "
  1741. "mbx1=%x.\n", vha->host_no, rval, mcp->mb[1]));
  1742. } else {
  1743. /*EMPTY*/
  1744. DEBUG11(printk("qla2x00_fabric_logout(%ld): done.\n",
  1745. vha->host_no));
  1746. }
  1747. return rval;
  1748. }
  1749. /*
  1750. * qla2x00_full_login_lip
  1751. * Issue full login LIP mailbox command.
  1752. *
  1753. * Input:
  1754. * ha = adapter block pointer.
  1755. * TARGET_QUEUE_LOCK must be released.
  1756. * ADAPTER_STATE_LOCK must be released.
  1757. *
  1758. * Returns:
  1759. * qla2x00 local function return status code.
  1760. *
  1761. * Context:
  1762. * Kernel context.
  1763. */
  1764. int
  1765. qla2x00_full_login_lip(scsi_qla_host_t *vha)
  1766. {
  1767. int rval;
  1768. mbx_cmd_t mc;
  1769. mbx_cmd_t *mcp = &mc;
  1770. DEBUG11(printk("qla2x00_full_login_lip(%ld): entered.\n",
  1771. vha->host_no));
  1772. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1773. mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
  1774. mcp->mb[2] = 0;
  1775. mcp->mb[3] = 0;
  1776. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1777. mcp->in_mb = MBX_0;
  1778. mcp->tov = MBX_TOV_SECONDS;
  1779. mcp->flags = 0;
  1780. rval = qla2x00_mailbox_command(vha, mcp);
  1781. if (rval != QLA_SUCCESS) {
  1782. /*EMPTY*/
  1783. DEBUG2_3_11(printk("qla2x00_full_login_lip(%ld): failed=%x.\n",
  1784. vha->host_no, rval));
  1785. } else {
  1786. /*EMPTY*/
  1787. DEBUG11(printk("qla2x00_full_login_lip(%ld): done.\n",
  1788. vha->host_no));
  1789. }
  1790. return rval;
  1791. }
  1792. /*
  1793. * qla2x00_get_id_list
  1794. *
  1795. * Input:
  1796. * ha = adapter block pointer.
  1797. *
  1798. * Returns:
  1799. * qla2x00 local function return status code.
  1800. *
  1801. * Context:
  1802. * Kernel context.
  1803. */
  1804. int
  1805. qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
  1806. uint16_t *entries)
  1807. {
  1808. int rval;
  1809. mbx_cmd_t mc;
  1810. mbx_cmd_t *mcp = &mc;
  1811. DEBUG11(printk("qla2x00_get_id_list(%ld): entered.\n",
  1812. vha->host_no));
  1813. if (id_list == NULL)
  1814. return QLA_FUNCTION_FAILED;
  1815. mcp->mb[0] = MBC_GET_ID_LIST;
  1816. mcp->out_mb = MBX_0;
  1817. if (IS_FWI2_CAPABLE(vha->hw)) {
  1818. mcp->mb[2] = MSW(id_list_dma);
  1819. mcp->mb[3] = LSW(id_list_dma);
  1820. mcp->mb[6] = MSW(MSD(id_list_dma));
  1821. mcp->mb[7] = LSW(MSD(id_list_dma));
  1822. mcp->mb[8] = 0;
  1823. mcp->mb[9] = vha->vp_idx;
  1824. mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
  1825. } else {
  1826. mcp->mb[1] = MSW(id_list_dma);
  1827. mcp->mb[2] = LSW(id_list_dma);
  1828. mcp->mb[3] = MSW(MSD(id_list_dma));
  1829. mcp->mb[6] = LSW(MSD(id_list_dma));
  1830. mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
  1831. }
  1832. mcp->in_mb = MBX_1|MBX_0;
  1833. mcp->tov = MBX_TOV_SECONDS;
  1834. mcp->flags = 0;
  1835. rval = qla2x00_mailbox_command(vha, mcp);
  1836. if (rval != QLA_SUCCESS) {
  1837. /*EMPTY*/
  1838. DEBUG2_3_11(printk("qla2x00_get_id_list(%ld): failed=%x.\n",
  1839. vha->host_no, rval));
  1840. } else {
  1841. *entries = mcp->mb[1];
  1842. DEBUG11(printk("qla2x00_get_id_list(%ld): done.\n",
  1843. vha->host_no));
  1844. }
  1845. return rval;
  1846. }
  1847. /*
  1848. * qla2x00_get_resource_cnts
  1849. * Get current firmware resource counts.
  1850. *
  1851. * Input:
  1852. * ha = adapter block pointer.
  1853. *
  1854. * Returns:
  1855. * qla2x00 local function return status code.
  1856. *
  1857. * Context:
  1858. * Kernel context.
  1859. */
  1860. int
  1861. qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
  1862. uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
  1863. uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
  1864. {
  1865. int rval;
  1866. mbx_cmd_t mc;
  1867. mbx_cmd_t *mcp = &mc;
  1868. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1869. mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
  1870. mcp->out_mb = MBX_0;
  1871. mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1872. if (IS_QLA81XX(vha->hw))
  1873. mcp->in_mb |= MBX_12;
  1874. mcp->tov = MBX_TOV_SECONDS;
  1875. mcp->flags = 0;
  1876. rval = qla2x00_mailbox_command(vha, mcp);
  1877. if (rval != QLA_SUCCESS) {
  1878. /*EMPTY*/
  1879. DEBUG2_3_11(printk("%s(%ld): failed = %x.\n", __func__,
  1880. vha->host_no, mcp->mb[0]));
  1881. } else {
  1882. DEBUG11(printk("%s(%ld): done. mb1=%x mb2=%x mb3=%x mb6=%x "
  1883. "mb7=%x mb10=%x mb11=%x mb12=%x.\n", __func__,
  1884. vha->host_no, mcp->mb[1], mcp->mb[2], mcp->mb[3],
  1885. mcp->mb[6], mcp->mb[7], mcp->mb[10], mcp->mb[11],
  1886. mcp->mb[12]));
  1887. if (cur_xchg_cnt)
  1888. *cur_xchg_cnt = mcp->mb[3];
  1889. if (orig_xchg_cnt)
  1890. *orig_xchg_cnt = mcp->mb[6];
  1891. if (cur_iocb_cnt)
  1892. *cur_iocb_cnt = mcp->mb[7];
  1893. if (orig_iocb_cnt)
  1894. *orig_iocb_cnt = mcp->mb[10];
  1895. if (vha->hw->flags.npiv_supported && max_npiv_vports)
  1896. *max_npiv_vports = mcp->mb[11];
  1897. if (IS_QLA81XX(vha->hw) && max_fcfs)
  1898. *max_fcfs = mcp->mb[12];
  1899. }
  1900. return (rval);
  1901. }
  1902. #if defined(QL_DEBUG_LEVEL_3)
  1903. /*
  1904. * qla2x00_get_fcal_position_map
  1905. * Get FCAL (LILP) position map using mailbox command
  1906. *
  1907. * Input:
  1908. * ha = adapter state pointer.
  1909. * pos_map = buffer pointer (can be NULL).
  1910. *
  1911. * Returns:
  1912. * qla2x00 local function return status code.
  1913. *
  1914. * Context:
  1915. * Kernel context.
  1916. */
  1917. int
  1918. qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
  1919. {
  1920. int rval;
  1921. mbx_cmd_t mc;
  1922. mbx_cmd_t *mcp = &mc;
  1923. char *pmap;
  1924. dma_addr_t pmap_dma;
  1925. struct qla_hw_data *ha = vha->hw;
  1926. pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
  1927. if (pmap == NULL) {
  1928. DEBUG2_3_11(printk("%s(%ld): **** Mem Alloc Failed ****",
  1929. __func__, vha->host_no));
  1930. return QLA_MEMORY_ALLOC_FAILED;
  1931. }
  1932. memset(pmap, 0, FCAL_MAP_SIZE);
  1933. mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
  1934. mcp->mb[2] = MSW(pmap_dma);
  1935. mcp->mb[3] = LSW(pmap_dma);
  1936. mcp->mb[6] = MSW(MSD(pmap_dma));
  1937. mcp->mb[7] = LSW(MSD(pmap_dma));
  1938. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1939. mcp->in_mb = MBX_1|MBX_0;
  1940. mcp->buf_size = FCAL_MAP_SIZE;
  1941. mcp->flags = MBX_DMA_IN;
  1942. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1943. rval = qla2x00_mailbox_command(vha, mcp);
  1944. if (rval == QLA_SUCCESS) {
  1945. DEBUG11(printk("%s(%ld): (mb0=%x/mb1=%x) FC/AL Position Map "
  1946. "size (%x)\n", __func__, vha->host_no, mcp->mb[0],
  1947. mcp->mb[1], (unsigned)pmap[0]));
  1948. DEBUG11(qla2x00_dump_buffer(pmap, pmap[0] + 1));
  1949. if (pos_map)
  1950. memcpy(pos_map, pmap, FCAL_MAP_SIZE);
  1951. }
  1952. dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
  1953. if (rval != QLA_SUCCESS) {
  1954. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1955. vha->host_no, rval));
  1956. } else {
  1957. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1958. }
  1959. return rval;
  1960. }
  1961. #endif
  1962. /*
  1963. * qla2x00_get_link_status
  1964. *
  1965. * Input:
  1966. * ha = adapter block pointer.
  1967. * loop_id = device loop ID.
  1968. * ret_buf = pointer to link status return buffer.
  1969. *
  1970. * Returns:
  1971. * 0 = success.
  1972. * BIT_0 = mem alloc error.
  1973. * BIT_1 = mailbox error.
  1974. */
  1975. int
  1976. qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
  1977. struct link_statistics *stats, dma_addr_t stats_dma)
  1978. {
  1979. int rval;
  1980. mbx_cmd_t mc;
  1981. mbx_cmd_t *mcp = &mc;
  1982. uint32_t *siter, *diter, dwords;
  1983. struct qla_hw_data *ha = vha->hw;
  1984. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1985. mcp->mb[0] = MBC_GET_LINK_STATUS;
  1986. mcp->mb[2] = MSW(stats_dma);
  1987. mcp->mb[3] = LSW(stats_dma);
  1988. mcp->mb[6] = MSW(MSD(stats_dma));
  1989. mcp->mb[7] = LSW(MSD(stats_dma));
  1990. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1991. mcp->in_mb = MBX_0;
  1992. if (IS_FWI2_CAPABLE(ha)) {
  1993. mcp->mb[1] = loop_id;
  1994. mcp->mb[4] = 0;
  1995. mcp->mb[10] = 0;
  1996. mcp->out_mb |= MBX_10|MBX_4|MBX_1;
  1997. mcp->in_mb |= MBX_1;
  1998. } else if (HAS_EXTENDED_IDS(ha)) {
  1999. mcp->mb[1] = loop_id;
  2000. mcp->mb[10] = 0;
  2001. mcp->out_mb |= MBX_10|MBX_1;
  2002. } else {
  2003. mcp->mb[1] = loop_id << 8;
  2004. mcp->out_mb |= MBX_1;
  2005. }
  2006. mcp->tov = MBX_TOV_SECONDS;
  2007. mcp->flags = IOCTL_CMD;
  2008. rval = qla2x00_mailbox_command(vha, mcp);
  2009. if (rval == QLA_SUCCESS) {
  2010. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2011. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  2012. __func__, vha->host_no, mcp->mb[0]));
  2013. rval = QLA_FUNCTION_FAILED;
  2014. } else {
  2015. /* Copy over data -- firmware data is LE. */
  2016. dwords = offsetof(struct link_statistics, unused1) / 4;
  2017. siter = diter = &stats->link_fail_cnt;
  2018. while (dwords--)
  2019. *diter++ = le32_to_cpu(*siter++);
  2020. }
  2021. } else {
  2022. /* Failed. */
  2023. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2024. vha->host_no, rval));
  2025. }
  2026. return rval;
  2027. }
  2028. int
  2029. qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
  2030. dma_addr_t stats_dma)
  2031. {
  2032. int rval;
  2033. mbx_cmd_t mc;
  2034. mbx_cmd_t *mcp = &mc;
  2035. uint32_t *siter, *diter, dwords;
  2036. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2037. mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
  2038. mcp->mb[2] = MSW(stats_dma);
  2039. mcp->mb[3] = LSW(stats_dma);
  2040. mcp->mb[6] = MSW(MSD(stats_dma));
  2041. mcp->mb[7] = LSW(MSD(stats_dma));
  2042. mcp->mb[8] = sizeof(struct link_statistics) / 4;
  2043. mcp->mb[9] = vha->vp_idx;
  2044. mcp->mb[10] = 0;
  2045. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  2046. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  2047. mcp->tov = MBX_TOV_SECONDS;
  2048. mcp->flags = IOCTL_CMD;
  2049. rval = qla2x00_mailbox_command(vha, mcp);
  2050. if (rval == QLA_SUCCESS) {
  2051. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2052. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  2053. __func__, vha->host_no, mcp->mb[0]));
  2054. rval = QLA_FUNCTION_FAILED;
  2055. } else {
  2056. /* Copy over data -- firmware data is LE. */
  2057. dwords = sizeof(struct link_statistics) / 4;
  2058. siter = diter = &stats->link_fail_cnt;
  2059. while (dwords--)
  2060. *diter++ = le32_to_cpu(*siter++);
  2061. }
  2062. } else {
  2063. /* Failed. */
  2064. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2065. vha->host_no, rval));
  2066. }
  2067. return rval;
  2068. }
  2069. int
  2070. qla24xx_abort_command(srb_t *sp)
  2071. {
  2072. int rval;
  2073. unsigned long flags = 0;
  2074. struct abort_entry_24xx *abt;
  2075. dma_addr_t abt_dma;
  2076. uint32_t handle;
  2077. fc_port_t *fcport = sp->fcport;
  2078. struct scsi_qla_host *vha = fcport->vha;
  2079. struct qla_hw_data *ha = vha->hw;
  2080. struct req_que *req = vha->req;
  2081. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2082. spin_lock_irqsave(&ha->hardware_lock, flags);
  2083. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  2084. if (req->outstanding_cmds[handle] == sp)
  2085. break;
  2086. }
  2087. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2088. if (handle == MAX_OUTSTANDING_COMMANDS) {
  2089. /* Command not found. */
  2090. return QLA_FUNCTION_FAILED;
  2091. }
  2092. abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
  2093. if (abt == NULL) {
  2094. DEBUG2_3(printk("%s(%ld): failed to allocate Abort IOCB.\n",
  2095. __func__, vha->host_no));
  2096. return QLA_MEMORY_ALLOC_FAILED;
  2097. }
  2098. memset(abt, 0, sizeof(struct abort_entry_24xx));
  2099. abt->entry_type = ABORT_IOCB_TYPE;
  2100. abt->entry_count = 1;
  2101. abt->handle = MAKE_HANDLE(req->id, abt->handle);
  2102. abt->nport_handle = cpu_to_le16(fcport->loop_id);
  2103. abt->handle_to_abort = handle;
  2104. abt->port_id[0] = fcport->d_id.b.al_pa;
  2105. abt->port_id[1] = fcport->d_id.b.area;
  2106. abt->port_id[2] = fcport->d_id.b.domain;
  2107. abt->vp_index = fcport->vp_idx;
  2108. abt->req_que_no = cpu_to_le16(req->id);
  2109. rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
  2110. if (rval != QLA_SUCCESS) {
  2111. DEBUG2_3_11(printk("%s(%ld): failed to issue IOCB (%x).\n",
  2112. __func__, vha->host_no, rval));
  2113. } else if (abt->entry_status != 0) {
  2114. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2115. "-- error status (%x).\n", __func__, vha->host_no,
  2116. abt->entry_status));
  2117. rval = QLA_FUNCTION_FAILED;
  2118. } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
  2119. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2120. "-- completion status (%x).\n", __func__, vha->host_no,
  2121. le16_to_cpu(abt->nport_handle)));
  2122. rval = QLA_FUNCTION_FAILED;
  2123. } else {
  2124. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2125. }
  2126. dma_pool_free(ha->s_dma_pool, abt, abt_dma);
  2127. return rval;
  2128. }
  2129. struct tsk_mgmt_cmd {
  2130. union {
  2131. struct tsk_mgmt_entry tsk;
  2132. struct sts_entry_24xx sts;
  2133. } p;
  2134. };
  2135. static int
  2136. __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
  2137. unsigned int l, int tag)
  2138. {
  2139. int rval, rval2;
  2140. struct tsk_mgmt_cmd *tsk;
  2141. struct sts_entry_24xx *sts;
  2142. dma_addr_t tsk_dma;
  2143. scsi_qla_host_t *vha;
  2144. struct qla_hw_data *ha;
  2145. struct req_que *req;
  2146. struct rsp_que *rsp;
  2147. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  2148. vha = fcport->vha;
  2149. ha = vha->hw;
  2150. req = vha->req;
  2151. if (ha->flags.cpu_affinity_enabled)
  2152. rsp = ha->rsp_q_map[tag + 1];
  2153. else
  2154. rsp = req->rsp;
  2155. tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
  2156. if (tsk == NULL) {
  2157. DEBUG2_3(printk("%s(%ld): failed to allocate Task Management "
  2158. "IOCB.\n", __func__, vha->host_no));
  2159. return QLA_MEMORY_ALLOC_FAILED;
  2160. }
  2161. memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
  2162. tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
  2163. tsk->p.tsk.entry_count = 1;
  2164. tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
  2165. tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
  2166. tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  2167. tsk->p.tsk.control_flags = cpu_to_le32(type);
  2168. tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
  2169. tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
  2170. tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
  2171. tsk->p.tsk.vp_index = fcport->vp_idx;
  2172. if (type == TCF_LUN_RESET) {
  2173. int_to_scsilun(l, &tsk->p.tsk.lun);
  2174. host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
  2175. sizeof(tsk->p.tsk.lun));
  2176. }
  2177. sts = &tsk->p.sts;
  2178. rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
  2179. if (rval != QLA_SUCCESS) {
  2180. DEBUG2_3_11(printk("%s(%ld): failed to issue %s Reset IOCB "
  2181. "(%x).\n", __func__, vha->host_no, name, rval));
  2182. } else if (sts->entry_status != 0) {
  2183. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2184. "-- error status (%x).\n", __func__, vha->host_no,
  2185. sts->entry_status));
  2186. rval = QLA_FUNCTION_FAILED;
  2187. } else if (sts->comp_status !=
  2188. __constant_cpu_to_le16(CS_COMPLETE)) {
  2189. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2190. "-- completion status (%x).\n", __func__,
  2191. vha->host_no, le16_to_cpu(sts->comp_status)));
  2192. rval = QLA_FUNCTION_FAILED;
  2193. } else if (le16_to_cpu(sts->scsi_status) &
  2194. SS_RESPONSE_INFO_LEN_VALID) {
  2195. if (le32_to_cpu(sts->rsp_data_len) < 4) {
  2196. DEBUG2_3_11(printk("%s(%ld): ignoring inconsistent "
  2197. "data length -- not enough response info (%d).\n",
  2198. __func__, vha->host_no,
  2199. le32_to_cpu(sts->rsp_data_len)));
  2200. } else if (sts->data[3]) {
  2201. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2202. "-- response (%x).\n", __func__,
  2203. vha->host_no, sts->data[3]));
  2204. rval = QLA_FUNCTION_FAILED;
  2205. }
  2206. }
  2207. /* Issue marker IOCB. */
  2208. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  2209. type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
  2210. if (rval2 != QLA_SUCCESS) {
  2211. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  2212. "(%x).\n", __func__, vha->host_no, rval2));
  2213. } else {
  2214. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2215. }
  2216. dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
  2217. return rval;
  2218. }
  2219. int
  2220. qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  2221. {
  2222. struct qla_hw_data *ha = fcport->vha->hw;
  2223. if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
  2224. return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
  2225. return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
  2226. }
  2227. int
  2228. qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  2229. {
  2230. struct qla_hw_data *ha = fcport->vha->hw;
  2231. if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
  2232. return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
  2233. return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
  2234. }
  2235. int
  2236. qla2x00_system_error(scsi_qla_host_t *vha)
  2237. {
  2238. int rval;
  2239. mbx_cmd_t mc;
  2240. mbx_cmd_t *mcp = &mc;
  2241. struct qla_hw_data *ha = vha->hw;
  2242. if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
  2243. return QLA_FUNCTION_FAILED;
  2244. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2245. mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
  2246. mcp->out_mb = MBX_0;
  2247. mcp->in_mb = MBX_0;
  2248. mcp->tov = 5;
  2249. mcp->flags = 0;
  2250. rval = qla2x00_mailbox_command(vha, mcp);
  2251. if (rval != QLA_SUCCESS) {
  2252. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2253. vha->host_no, rval));
  2254. } else {
  2255. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2256. }
  2257. return rval;
  2258. }
  2259. /**
  2260. * qla2x00_set_serdes_params() -
  2261. * @ha: HA context
  2262. *
  2263. * Returns
  2264. */
  2265. int
  2266. qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
  2267. uint16_t sw_em_2g, uint16_t sw_em_4g)
  2268. {
  2269. int rval;
  2270. mbx_cmd_t mc;
  2271. mbx_cmd_t *mcp = &mc;
  2272. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2273. mcp->mb[0] = MBC_SERDES_PARAMS;
  2274. mcp->mb[1] = BIT_0;
  2275. mcp->mb[2] = sw_em_1g | BIT_15;
  2276. mcp->mb[3] = sw_em_2g | BIT_15;
  2277. mcp->mb[4] = sw_em_4g | BIT_15;
  2278. mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2279. mcp->in_mb = MBX_0;
  2280. mcp->tov = MBX_TOV_SECONDS;
  2281. mcp->flags = 0;
  2282. rval = qla2x00_mailbox_command(vha, mcp);
  2283. if (rval != QLA_SUCCESS) {
  2284. /*EMPTY*/
  2285. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2286. vha->host_no, rval, mcp->mb[0]));
  2287. } else {
  2288. /*EMPTY*/
  2289. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2290. }
  2291. return rval;
  2292. }
  2293. int
  2294. qla2x00_stop_firmware(scsi_qla_host_t *vha)
  2295. {
  2296. int rval;
  2297. mbx_cmd_t mc;
  2298. mbx_cmd_t *mcp = &mc;
  2299. if (!IS_FWI2_CAPABLE(vha->hw))
  2300. return QLA_FUNCTION_FAILED;
  2301. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2302. mcp->mb[0] = MBC_STOP_FIRMWARE;
  2303. mcp->out_mb = MBX_0;
  2304. mcp->in_mb = MBX_0;
  2305. mcp->tov = 5;
  2306. mcp->flags = 0;
  2307. rval = qla2x00_mailbox_command(vha, mcp);
  2308. if (rval != QLA_SUCCESS) {
  2309. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2310. vha->host_no, rval));
  2311. if (mcp->mb[0] == MBS_INVALID_COMMAND)
  2312. rval = QLA_INVALID_COMMAND;
  2313. } else {
  2314. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2315. }
  2316. return rval;
  2317. }
  2318. int
  2319. qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
  2320. uint16_t buffers)
  2321. {
  2322. int rval;
  2323. mbx_cmd_t mc;
  2324. mbx_cmd_t *mcp = &mc;
  2325. if (!IS_FWI2_CAPABLE(vha->hw))
  2326. return QLA_FUNCTION_FAILED;
  2327. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2328. return QLA_FUNCTION_FAILED;
  2329. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2330. mcp->mb[0] = MBC_TRACE_CONTROL;
  2331. mcp->mb[1] = TC_EFT_ENABLE;
  2332. mcp->mb[2] = LSW(eft_dma);
  2333. mcp->mb[3] = MSW(eft_dma);
  2334. mcp->mb[4] = LSW(MSD(eft_dma));
  2335. mcp->mb[5] = MSW(MSD(eft_dma));
  2336. mcp->mb[6] = buffers;
  2337. mcp->mb[7] = TC_AEN_DISABLE;
  2338. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2339. mcp->in_mb = MBX_1|MBX_0;
  2340. mcp->tov = MBX_TOV_SECONDS;
  2341. mcp->flags = 0;
  2342. rval = qla2x00_mailbox_command(vha, mcp);
  2343. if (rval != QLA_SUCCESS) {
  2344. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2345. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2346. } else {
  2347. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2348. }
  2349. return rval;
  2350. }
  2351. int
  2352. qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
  2353. {
  2354. int rval;
  2355. mbx_cmd_t mc;
  2356. mbx_cmd_t *mcp = &mc;
  2357. if (!IS_FWI2_CAPABLE(vha->hw))
  2358. return QLA_FUNCTION_FAILED;
  2359. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2360. return QLA_FUNCTION_FAILED;
  2361. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2362. mcp->mb[0] = MBC_TRACE_CONTROL;
  2363. mcp->mb[1] = TC_EFT_DISABLE;
  2364. mcp->out_mb = MBX_1|MBX_0;
  2365. mcp->in_mb = MBX_1|MBX_0;
  2366. mcp->tov = MBX_TOV_SECONDS;
  2367. mcp->flags = 0;
  2368. rval = qla2x00_mailbox_command(vha, mcp);
  2369. if (rval != QLA_SUCCESS) {
  2370. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2371. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2372. } else {
  2373. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2374. }
  2375. return rval;
  2376. }
  2377. int
  2378. qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
  2379. uint16_t buffers, uint16_t *mb, uint32_t *dwords)
  2380. {
  2381. int rval;
  2382. mbx_cmd_t mc;
  2383. mbx_cmd_t *mcp = &mc;
  2384. if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw))
  2385. return QLA_FUNCTION_FAILED;
  2386. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2387. return QLA_FUNCTION_FAILED;
  2388. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2389. mcp->mb[0] = MBC_TRACE_CONTROL;
  2390. mcp->mb[1] = TC_FCE_ENABLE;
  2391. mcp->mb[2] = LSW(fce_dma);
  2392. mcp->mb[3] = MSW(fce_dma);
  2393. mcp->mb[4] = LSW(MSD(fce_dma));
  2394. mcp->mb[5] = MSW(MSD(fce_dma));
  2395. mcp->mb[6] = buffers;
  2396. mcp->mb[7] = TC_AEN_DISABLE;
  2397. mcp->mb[8] = 0;
  2398. mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
  2399. mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
  2400. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2401. MBX_1|MBX_0;
  2402. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2403. mcp->tov = MBX_TOV_SECONDS;
  2404. mcp->flags = 0;
  2405. rval = qla2x00_mailbox_command(vha, mcp);
  2406. if (rval != QLA_SUCCESS) {
  2407. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2408. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2409. } else {
  2410. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2411. if (mb)
  2412. memcpy(mb, mcp->mb, 8 * sizeof(*mb));
  2413. if (dwords)
  2414. *dwords = buffers;
  2415. }
  2416. return rval;
  2417. }
  2418. int
  2419. qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
  2420. {
  2421. int rval;
  2422. mbx_cmd_t mc;
  2423. mbx_cmd_t *mcp = &mc;
  2424. if (!IS_FWI2_CAPABLE(vha->hw))
  2425. return QLA_FUNCTION_FAILED;
  2426. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2427. return QLA_FUNCTION_FAILED;
  2428. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2429. mcp->mb[0] = MBC_TRACE_CONTROL;
  2430. mcp->mb[1] = TC_FCE_DISABLE;
  2431. mcp->mb[2] = TC_FCE_DISABLE_TRACE;
  2432. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  2433. mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2434. MBX_1|MBX_0;
  2435. mcp->tov = MBX_TOV_SECONDS;
  2436. mcp->flags = 0;
  2437. rval = qla2x00_mailbox_command(vha, mcp);
  2438. if (rval != QLA_SUCCESS) {
  2439. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2440. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2441. } else {
  2442. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2443. if (wr)
  2444. *wr = (uint64_t) mcp->mb[5] << 48 |
  2445. (uint64_t) mcp->mb[4] << 32 |
  2446. (uint64_t) mcp->mb[3] << 16 |
  2447. (uint64_t) mcp->mb[2];
  2448. if (rd)
  2449. *rd = (uint64_t) mcp->mb[9] << 48 |
  2450. (uint64_t) mcp->mb[8] << 32 |
  2451. (uint64_t) mcp->mb[7] << 16 |
  2452. (uint64_t) mcp->mb[6];
  2453. }
  2454. return rval;
  2455. }
  2456. int
  2457. qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint16_t addr,
  2458. uint16_t off, uint16_t count)
  2459. {
  2460. int rval;
  2461. mbx_cmd_t mc;
  2462. mbx_cmd_t *mcp = &mc;
  2463. if (!IS_FWI2_CAPABLE(vha->hw))
  2464. return QLA_FUNCTION_FAILED;
  2465. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2466. mcp->mb[0] = MBC_READ_SFP;
  2467. mcp->mb[1] = addr;
  2468. mcp->mb[2] = MSW(sfp_dma);
  2469. mcp->mb[3] = LSW(sfp_dma);
  2470. mcp->mb[6] = MSW(MSD(sfp_dma));
  2471. mcp->mb[7] = LSW(MSD(sfp_dma));
  2472. mcp->mb[8] = count;
  2473. mcp->mb[9] = off;
  2474. mcp->mb[10] = 0;
  2475. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  2476. mcp->in_mb = MBX_0;
  2477. mcp->tov = MBX_TOV_SECONDS;
  2478. mcp->flags = 0;
  2479. rval = qla2x00_mailbox_command(vha, mcp);
  2480. if (rval != QLA_SUCCESS) {
  2481. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2482. vha->host_no, rval, mcp->mb[0]));
  2483. } else {
  2484. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2485. }
  2486. return rval;
  2487. }
  2488. int
  2489. qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
  2490. uint16_t *port_speed, uint16_t *mb)
  2491. {
  2492. int rval;
  2493. mbx_cmd_t mc;
  2494. mbx_cmd_t *mcp = &mc;
  2495. if (!IS_IIDMA_CAPABLE(vha->hw))
  2496. return QLA_FUNCTION_FAILED;
  2497. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2498. mcp->mb[0] = MBC_PORT_PARAMS;
  2499. mcp->mb[1] = loop_id;
  2500. mcp->mb[2] = mcp->mb[3] = 0;
  2501. mcp->mb[9] = vha->vp_idx;
  2502. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  2503. mcp->in_mb = MBX_3|MBX_1|MBX_0;
  2504. mcp->tov = MBX_TOV_SECONDS;
  2505. mcp->flags = 0;
  2506. rval = qla2x00_mailbox_command(vha, mcp);
  2507. /* Return mailbox statuses. */
  2508. if (mb != NULL) {
  2509. mb[0] = mcp->mb[0];
  2510. mb[1] = mcp->mb[1];
  2511. mb[3] = mcp->mb[3];
  2512. }
  2513. if (rval != QLA_SUCCESS) {
  2514. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2515. vha->host_no, rval));
  2516. } else {
  2517. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2518. if (port_speed)
  2519. *port_speed = mcp->mb[3];
  2520. }
  2521. return rval;
  2522. }
  2523. int
  2524. qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
  2525. uint16_t port_speed, uint16_t *mb)
  2526. {
  2527. int rval;
  2528. mbx_cmd_t mc;
  2529. mbx_cmd_t *mcp = &mc;
  2530. if (!IS_IIDMA_CAPABLE(vha->hw))
  2531. return QLA_FUNCTION_FAILED;
  2532. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2533. mcp->mb[0] = MBC_PORT_PARAMS;
  2534. mcp->mb[1] = loop_id;
  2535. mcp->mb[2] = BIT_0;
  2536. if (IS_QLA8XXX_TYPE(vha->hw))
  2537. mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
  2538. else
  2539. mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
  2540. mcp->mb[9] = vha->vp_idx;
  2541. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  2542. mcp->in_mb = MBX_3|MBX_1|MBX_0;
  2543. mcp->tov = MBX_TOV_SECONDS;
  2544. mcp->flags = 0;
  2545. rval = qla2x00_mailbox_command(vha, mcp);
  2546. /* Return mailbox statuses. */
  2547. if (mb != NULL) {
  2548. mb[0] = mcp->mb[0];
  2549. mb[1] = mcp->mb[1];
  2550. mb[3] = mcp->mb[3];
  2551. }
  2552. if (rval != QLA_SUCCESS) {
  2553. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2554. vha->host_no, rval));
  2555. } else {
  2556. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2557. }
  2558. return rval;
  2559. }
  2560. void
  2561. qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
  2562. struct vp_rpt_id_entry_24xx *rptid_entry)
  2563. {
  2564. uint8_t vp_idx;
  2565. uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
  2566. struct qla_hw_data *ha = vha->hw;
  2567. scsi_qla_host_t *vp;
  2568. unsigned long flags;
  2569. if (rptid_entry->entry_status != 0)
  2570. return;
  2571. if (rptid_entry->format == 0) {
  2572. DEBUG15(printk("%s:format 0 : scsi(%ld) number of VPs setup %d,"
  2573. " number of VPs acquired %d\n", __func__, vha->host_no,
  2574. MSB(le16_to_cpu(rptid_entry->vp_count)),
  2575. LSB(le16_to_cpu(rptid_entry->vp_count))));
  2576. DEBUG15(printk("%s primary port id %02x%02x%02x\n", __func__,
  2577. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2578. rptid_entry->port_id[0]));
  2579. } else if (rptid_entry->format == 1) {
  2580. vp_idx = LSB(stat);
  2581. DEBUG15(printk("%s:format 1: scsi(%ld): VP[%d] enabled "
  2582. "- status %d - "
  2583. "with port id %02x%02x%02x\n", __func__, vha->host_no,
  2584. vp_idx, MSB(stat),
  2585. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2586. rptid_entry->port_id[0]));
  2587. vp = vha;
  2588. if (vp_idx == 0 && (MSB(stat) != 1))
  2589. goto reg_needed;
  2590. if (MSB(stat) == 1) {
  2591. DEBUG2(printk("scsi(%ld): Could not acquire ID for "
  2592. "VP[%d].\n", vha->host_no, vp_idx));
  2593. return;
  2594. }
  2595. spin_lock_irqsave(&ha->vport_slock, flags);
  2596. list_for_each_entry(vp, &ha->vp_list, list)
  2597. if (vp_idx == vp->vp_idx)
  2598. break;
  2599. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2600. if (!vp)
  2601. return;
  2602. vp->d_id.b.domain = rptid_entry->port_id[2];
  2603. vp->d_id.b.area = rptid_entry->port_id[1];
  2604. vp->d_id.b.al_pa = rptid_entry->port_id[0];
  2605. /*
  2606. * Cannot configure here as we are still sitting on the
  2607. * response queue. Handle it in dpc context.
  2608. */
  2609. set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
  2610. reg_needed:
  2611. set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
  2612. set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
  2613. set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
  2614. qla2xxx_wake_dpc(vha);
  2615. }
  2616. }
  2617. /*
  2618. * qla24xx_modify_vp_config
  2619. * Change VP configuration for vha
  2620. *
  2621. * Input:
  2622. * vha = adapter block pointer.
  2623. *
  2624. * Returns:
  2625. * qla2xxx local function return status code.
  2626. *
  2627. * Context:
  2628. * Kernel context.
  2629. */
  2630. int
  2631. qla24xx_modify_vp_config(scsi_qla_host_t *vha)
  2632. {
  2633. int rval;
  2634. struct vp_config_entry_24xx *vpmod;
  2635. dma_addr_t vpmod_dma;
  2636. struct qla_hw_data *ha = vha->hw;
  2637. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2638. /* This can be called by the parent */
  2639. vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
  2640. if (!vpmod) {
  2641. DEBUG2_3(printk("%s(%ld): failed to allocate Modify VP "
  2642. "IOCB.\n", __func__, vha->host_no));
  2643. return QLA_MEMORY_ALLOC_FAILED;
  2644. }
  2645. memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
  2646. vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
  2647. vpmod->entry_count = 1;
  2648. vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
  2649. vpmod->vp_count = 1;
  2650. vpmod->vp_index1 = vha->vp_idx;
  2651. vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
  2652. memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
  2653. memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
  2654. vpmod->entry_count = 1;
  2655. rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
  2656. if (rval != QLA_SUCCESS) {
  2657. DEBUG2_3_11(printk("%s(%ld): failed to issue VP config IOCB"
  2658. "(%x).\n", __func__, base_vha->host_no, rval));
  2659. } else if (vpmod->comp_status != 0) {
  2660. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2661. "-- error status (%x).\n", __func__, base_vha->host_no,
  2662. vpmod->comp_status));
  2663. rval = QLA_FUNCTION_FAILED;
  2664. } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2665. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2666. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2667. le16_to_cpu(vpmod->comp_status)));
  2668. rval = QLA_FUNCTION_FAILED;
  2669. } else {
  2670. /* EMPTY */
  2671. DEBUG11(printk("%s(%ld): done.\n", __func__,
  2672. base_vha->host_no));
  2673. fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
  2674. }
  2675. dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
  2676. return rval;
  2677. }
  2678. /*
  2679. * qla24xx_control_vp
  2680. * Enable a virtual port for given host
  2681. *
  2682. * Input:
  2683. * ha = adapter block pointer.
  2684. * vhba = virtual adapter (unused)
  2685. * index = index number for enabled VP
  2686. *
  2687. * Returns:
  2688. * qla2xxx local function return status code.
  2689. *
  2690. * Context:
  2691. * Kernel context.
  2692. */
  2693. int
  2694. qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
  2695. {
  2696. int rval;
  2697. int map, pos;
  2698. struct vp_ctrl_entry_24xx *vce;
  2699. dma_addr_t vce_dma;
  2700. struct qla_hw_data *ha = vha->hw;
  2701. int vp_index = vha->vp_idx;
  2702. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2703. DEBUG11(printk("%s(%ld): entered. Enabling index %d\n", __func__,
  2704. vha->host_no, vp_index));
  2705. if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
  2706. return QLA_PARAMETER_ERROR;
  2707. vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
  2708. if (!vce) {
  2709. DEBUG2_3(printk("%s(%ld): "
  2710. "failed to allocate VP Control IOCB.\n", __func__,
  2711. base_vha->host_no));
  2712. return QLA_MEMORY_ALLOC_FAILED;
  2713. }
  2714. memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
  2715. vce->entry_type = VP_CTRL_IOCB_TYPE;
  2716. vce->entry_count = 1;
  2717. vce->command = cpu_to_le16(cmd);
  2718. vce->vp_count = __constant_cpu_to_le16(1);
  2719. /* index map in firmware starts with 1; decrement index
  2720. * this is ok as we never use index 0
  2721. */
  2722. map = (vp_index - 1) / 8;
  2723. pos = (vp_index - 1) & 7;
  2724. mutex_lock(&ha->vport_lock);
  2725. vce->vp_idx_map[map] |= 1 << pos;
  2726. mutex_unlock(&ha->vport_lock);
  2727. rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
  2728. if (rval != QLA_SUCCESS) {
  2729. DEBUG2_3_11(printk("%s(%ld): failed to issue VP control IOCB"
  2730. "(%x).\n", __func__, base_vha->host_no, rval));
  2731. printk("%s(%ld): failed to issue VP control IOCB"
  2732. "(%x).\n", __func__, base_vha->host_no, rval);
  2733. } else if (vce->entry_status != 0) {
  2734. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2735. "-- error status (%x).\n", __func__, base_vha->host_no,
  2736. vce->entry_status));
  2737. printk("%s(%ld): failed to complete IOCB "
  2738. "-- error status (%x).\n", __func__, base_vha->host_no,
  2739. vce->entry_status);
  2740. rval = QLA_FUNCTION_FAILED;
  2741. } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2742. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2743. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2744. le16_to_cpu(vce->comp_status)));
  2745. printk("%s(%ld): failed to complete IOCB "
  2746. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2747. le16_to_cpu(vce->comp_status));
  2748. rval = QLA_FUNCTION_FAILED;
  2749. } else {
  2750. DEBUG2(printk("%s(%ld): done.\n", __func__, base_vha->host_no));
  2751. }
  2752. dma_pool_free(ha->s_dma_pool, vce, vce_dma);
  2753. return rval;
  2754. }
  2755. /*
  2756. * qla2x00_send_change_request
  2757. * Receive or disable RSCN request from fabric controller
  2758. *
  2759. * Input:
  2760. * ha = adapter block pointer
  2761. * format = registration format:
  2762. * 0 - Reserved
  2763. * 1 - Fabric detected registration
  2764. * 2 - N_port detected registration
  2765. * 3 - Full registration
  2766. * FF - clear registration
  2767. * vp_idx = Virtual port index
  2768. *
  2769. * Returns:
  2770. * qla2x00 local function return status code.
  2771. *
  2772. * Context:
  2773. * Kernel Context
  2774. */
  2775. int
  2776. qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
  2777. uint16_t vp_idx)
  2778. {
  2779. int rval;
  2780. mbx_cmd_t mc;
  2781. mbx_cmd_t *mcp = &mc;
  2782. /*
  2783. * This command is implicitly executed by firmware during login for the
  2784. * physical hosts
  2785. */
  2786. if (vp_idx == 0)
  2787. return QLA_FUNCTION_FAILED;
  2788. mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
  2789. mcp->mb[1] = format;
  2790. mcp->mb[9] = vp_idx;
  2791. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  2792. mcp->in_mb = MBX_0|MBX_1;
  2793. mcp->tov = MBX_TOV_SECONDS;
  2794. mcp->flags = 0;
  2795. rval = qla2x00_mailbox_command(vha, mcp);
  2796. if (rval == QLA_SUCCESS) {
  2797. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2798. rval = BIT_1;
  2799. }
  2800. } else
  2801. rval = BIT_1;
  2802. return rval;
  2803. }
  2804. int
  2805. qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
  2806. uint32_t size)
  2807. {
  2808. int rval;
  2809. mbx_cmd_t mc;
  2810. mbx_cmd_t *mcp = &mc;
  2811. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2812. if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
  2813. mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
  2814. mcp->mb[8] = MSW(addr);
  2815. mcp->out_mb = MBX_8|MBX_0;
  2816. } else {
  2817. mcp->mb[0] = MBC_DUMP_RISC_RAM;
  2818. mcp->out_mb = MBX_0;
  2819. }
  2820. mcp->mb[1] = LSW(addr);
  2821. mcp->mb[2] = MSW(req_dma);
  2822. mcp->mb[3] = LSW(req_dma);
  2823. mcp->mb[6] = MSW(MSD(req_dma));
  2824. mcp->mb[7] = LSW(MSD(req_dma));
  2825. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  2826. if (IS_FWI2_CAPABLE(vha->hw)) {
  2827. mcp->mb[4] = MSW(size);
  2828. mcp->mb[5] = LSW(size);
  2829. mcp->out_mb |= MBX_5|MBX_4;
  2830. } else {
  2831. mcp->mb[4] = LSW(size);
  2832. mcp->out_mb |= MBX_4;
  2833. }
  2834. mcp->in_mb = MBX_0;
  2835. mcp->tov = MBX_TOV_SECONDS;
  2836. mcp->flags = 0;
  2837. rval = qla2x00_mailbox_command(vha, mcp);
  2838. if (rval != QLA_SUCCESS) {
  2839. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  2840. vha->host_no, rval, mcp->mb[0]));
  2841. } else {
  2842. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2843. }
  2844. return rval;
  2845. }
  2846. /* 84XX Support **************************************************************/
  2847. struct cs84xx_mgmt_cmd {
  2848. union {
  2849. struct verify_chip_entry_84xx req;
  2850. struct verify_chip_rsp_84xx rsp;
  2851. } p;
  2852. };
  2853. int
  2854. qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
  2855. {
  2856. int rval, retry;
  2857. struct cs84xx_mgmt_cmd *mn;
  2858. dma_addr_t mn_dma;
  2859. uint16_t options;
  2860. unsigned long flags;
  2861. struct qla_hw_data *ha = vha->hw;
  2862. DEBUG16(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2863. mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
  2864. if (mn == NULL) {
  2865. DEBUG2_3(printk("%s(%ld): failed to allocate Verify ISP84XX "
  2866. "IOCB.\n", __func__, vha->host_no));
  2867. return QLA_MEMORY_ALLOC_FAILED;
  2868. }
  2869. /* Force Update? */
  2870. options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
  2871. /* Diagnostic firmware? */
  2872. /* options |= MENLO_DIAG_FW; */
  2873. /* We update the firmware with only one data sequence. */
  2874. options |= VCO_END_OF_DATA;
  2875. do {
  2876. retry = 0;
  2877. memset(mn, 0, sizeof(*mn));
  2878. mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
  2879. mn->p.req.entry_count = 1;
  2880. mn->p.req.options = cpu_to_le16(options);
  2881. DEBUG16(printk("%s(%ld): Dump of Verify Request.\n", __func__,
  2882. vha->host_no));
  2883. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2884. sizeof(*mn)));
  2885. rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
  2886. if (rval != QLA_SUCCESS) {
  2887. DEBUG2_16(printk("%s(%ld): failed to issue Verify "
  2888. "IOCB (%x).\n", __func__, vha->host_no, rval));
  2889. goto verify_done;
  2890. }
  2891. DEBUG16(printk("%s(%ld): Dump of Verify Response.\n", __func__,
  2892. vha->host_no));
  2893. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2894. sizeof(*mn)));
  2895. status[0] = le16_to_cpu(mn->p.rsp.comp_status);
  2896. status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
  2897. le16_to_cpu(mn->p.rsp.failure_code) : 0;
  2898. DEBUG2_16(printk("%s(%ld): cs=%x fc=%x\n", __func__,
  2899. vha->host_no, status[0], status[1]));
  2900. if (status[0] != CS_COMPLETE) {
  2901. rval = QLA_FUNCTION_FAILED;
  2902. if (!(options & VCO_DONT_UPDATE_FW)) {
  2903. DEBUG2_16(printk("%s(%ld): Firmware update "
  2904. "failed. Retrying without update "
  2905. "firmware.\n", __func__, vha->host_no));
  2906. options |= VCO_DONT_UPDATE_FW;
  2907. options &= ~VCO_FORCE_UPDATE;
  2908. retry = 1;
  2909. }
  2910. } else {
  2911. DEBUG2_16(printk("%s(%ld): firmware updated to %x.\n",
  2912. __func__, vha->host_no,
  2913. le32_to_cpu(mn->p.rsp.fw_ver)));
  2914. /* NOTE: we only update OP firmware. */
  2915. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  2916. ha->cs84xx->op_fw_version =
  2917. le32_to_cpu(mn->p.rsp.fw_ver);
  2918. spin_unlock_irqrestore(&ha->cs84xx->access_lock,
  2919. flags);
  2920. }
  2921. } while (retry);
  2922. verify_done:
  2923. dma_pool_free(ha->s_dma_pool, mn, mn_dma);
  2924. if (rval != QLA_SUCCESS) {
  2925. DEBUG2_16(printk("%s(%ld): failed=%x.\n", __func__,
  2926. vha->host_no, rval));
  2927. } else {
  2928. DEBUG16(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2929. }
  2930. return rval;
  2931. }
  2932. int
  2933. qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
  2934. {
  2935. int rval;
  2936. unsigned long flags;
  2937. mbx_cmd_t mc;
  2938. mbx_cmd_t *mcp = &mc;
  2939. struct device_reg_25xxmq __iomem *reg;
  2940. struct qla_hw_data *ha = vha->hw;
  2941. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2942. mcp->mb[1] = req->options;
  2943. mcp->mb[2] = MSW(LSD(req->dma));
  2944. mcp->mb[3] = LSW(LSD(req->dma));
  2945. mcp->mb[6] = MSW(MSD(req->dma));
  2946. mcp->mb[7] = LSW(MSD(req->dma));
  2947. mcp->mb[5] = req->length;
  2948. if (req->rsp)
  2949. mcp->mb[10] = req->rsp->id;
  2950. mcp->mb[12] = req->qos;
  2951. mcp->mb[11] = req->vp_idx;
  2952. mcp->mb[13] = req->rid;
  2953. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2954. QLA_QUE_PAGE * req->id);
  2955. mcp->mb[4] = req->id;
  2956. /* que in ptr index */
  2957. mcp->mb[8] = 0;
  2958. /* que out ptr index */
  2959. mcp->mb[9] = 0;
  2960. mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
  2961. MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2962. mcp->in_mb = MBX_0;
  2963. mcp->flags = MBX_DMA_OUT;
  2964. mcp->tov = 60;
  2965. spin_lock_irqsave(&ha->hardware_lock, flags);
  2966. if (!(req->options & BIT_0)) {
  2967. WRT_REG_DWORD(&reg->req_q_in, 0);
  2968. WRT_REG_DWORD(&reg->req_q_out, 0);
  2969. }
  2970. req->req_q_in = &reg->req_q_in;
  2971. req->req_q_out = &reg->req_q_out;
  2972. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2973. rval = qla2x00_mailbox_command(vha, mcp);
  2974. if (rval != QLA_SUCCESS)
  2975. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x mb0=%x.\n",
  2976. __func__, vha->host_no, rval, mcp->mb[0]));
  2977. return rval;
  2978. }
  2979. int
  2980. qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
  2981. {
  2982. int rval;
  2983. unsigned long flags;
  2984. mbx_cmd_t mc;
  2985. mbx_cmd_t *mcp = &mc;
  2986. struct device_reg_25xxmq __iomem *reg;
  2987. struct qla_hw_data *ha = vha->hw;
  2988. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2989. mcp->mb[1] = rsp->options;
  2990. mcp->mb[2] = MSW(LSD(rsp->dma));
  2991. mcp->mb[3] = LSW(LSD(rsp->dma));
  2992. mcp->mb[6] = MSW(MSD(rsp->dma));
  2993. mcp->mb[7] = LSW(MSD(rsp->dma));
  2994. mcp->mb[5] = rsp->length;
  2995. mcp->mb[14] = rsp->msix->entry;
  2996. mcp->mb[13] = rsp->rid;
  2997. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2998. QLA_QUE_PAGE * rsp->id);
  2999. mcp->mb[4] = rsp->id;
  3000. /* que in ptr index */
  3001. mcp->mb[8] = 0;
  3002. /* que out ptr index */
  3003. mcp->mb[9] = 0;
  3004. mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
  3005. |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3006. mcp->in_mb = MBX_0;
  3007. mcp->flags = MBX_DMA_OUT;
  3008. mcp->tov = 60;
  3009. spin_lock_irqsave(&ha->hardware_lock, flags);
  3010. if (!(rsp->options & BIT_0)) {
  3011. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  3012. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  3013. }
  3014. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3015. rval = qla2x00_mailbox_command(vha, mcp);
  3016. if (rval != QLA_SUCCESS)
  3017. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x "
  3018. "mb0=%x.\n", __func__,
  3019. vha->host_no, rval, mcp->mb[0]));
  3020. return rval;
  3021. }
  3022. int
  3023. qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
  3024. {
  3025. int rval;
  3026. mbx_cmd_t mc;
  3027. mbx_cmd_t *mcp = &mc;
  3028. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3029. mcp->mb[0] = MBC_IDC_ACK;
  3030. memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  3031. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3032. mcp->in_mb = MBX_0;
  3033. mcp->tov = MBX_TOV_SECONDS;
  3034. mcp->flags = 0;
  3035. rval = qla2x00_mailbox_command(vha, mcp);
  3036. if (rval != QLA_SUCCESS) {
  3037. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3038. vha->host_no, rval, mcp->mb[0]));
  3039. } else {
  3040. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3041. }
  3042. return rval;
  3043. }
  3044. int
  3045. qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
  3046. {
  3047. int rval;
  3048. mbx_cmd_t mc;
  3049. mbx_cmd_t *mcp = &mc;
  3050. if (!IS_QLA81XX(vha->hw))
  3051. return QLA_FUNCTION_FAILED;
  3052. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3053. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3054. mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
  3055. mcp->out_mb = MBX_1|MBX_0;
  3056. mcp->in_mb = MBX_1|MBX_0;
  3057. mcp->tov = MBX_TOV_SECONDS;
  3058. mcp->flags = 0;
  3059. rval = qla2x00_mailbox_command(vha, mcp);
  3060. if (rval != QLA_SUCCESS) {
  3061. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  3062. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3063. } else {
  3064. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3065. *sector_size = mcp->mb[1];
  3066. }
  3067. return rval;
  3068. }
  3069. int
  3070. qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
  3071. {
  3072. int rval;
  3073. mbx_cmd_t mc;
  3074. mbx_cmd_t *mcp = &mc;
  3075. if (!IS_QLA81XX(vha->hw))
  3076. return QLA_FUNCTION_FAILED;
  3077. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3078. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3079. mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
  3080. FAC_OPT_CMD_WRITE_PROTECT;
  3081. mcp->out_mb = MBX_1|MBX_0;
  3082. mcp->in_mb = MBX_1|MBX_0;
  3083. mcp->tov = MBX_TOV_SECONDS;
  3084. mcp->flags = 0;
  3085. rval = qla2x00_mailbox_command(vha, mcp);
  3086. if (rval != QLA_SUCCESS) {
  3087. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  3088. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3089. } else {
  3090. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3091. }
  3092. return rval;
  3093. }
  3094. int
  3095. qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
  3096. {
  3097. int rval;
  3098. mbx_cmd_t mc;
  3099. mbx_cmd_t *mcp = &mc;
  3100. if (!IS_QLA81XX(vha->hw))
  3101. return QLA_FUNCTION_FAILED;
  3102. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3103. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  3104. mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
  3105. mcp->mb[2] = LSW(start);
  3106. mcp->mb[3] = MSW(start);
  3107. mcp->mb[4] = LSW(finish);
  3108. mcp->mb[5] = MSW(finish);
  3109. mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3110. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3111. mcp->tov = MBX_TOV_SECONDS;
  3112. mcp->flags = 0;
  3113. rval = qla2x00_mailbox_command(vha, mcp);
  3114. if (rval != QLA_SUCCESS) {
  3115. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  3116. "mb[2]=%x.\n", __func__, vha->host_no, rval, mcp->mb[0],
  3117. mcp->mb[1], mcp->mb[2]));
  3118. } else {
  3119. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3120. }
  3121. return rval;
  3122. }
  3123. int
  3124. qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
  3125. {
  3126. int rval = 0;
  3127. mbx_cmd_t mc;
  3128. mbx_cmd_t *mcp = &mc;
  3129. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3130. mcp->mb[0] = MBC_RESTART_MPI_FW;
  3131. mcp->out_mb = MBX_0;
  3132. mcp->in_mb = MBX_0|MBX_1;
  3133. mcp->tov = MBX_TOV_SECONDS;
  3134. mcp->flags = 0;
  3135. rval = qla2x00_mailbox_command(vha, mcp);
  3136. if (rval != QLA_SUCCESS) {
  3137. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3138. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3139. } else {
  3140. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3141. }
  3142. return rval;
  3143. }
  3144. int
  3145. qla2x00_read_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3146. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3147. {
  3148. int rval;
  3149. mbx_cmd_t mc;
  3150. mbx_cmd_t *mcp = &mc;
  3151. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3152. mcp->mb[0] = MBC_READ_SFP;
  3153. mcp->mb[1] = dev;
  3154. mcp->mb[2] = MSW(sfp_dma);
  3155. mcp->mb[3] = LSW(sfp_dma);
  3156. mcp->mb[6] = MSW(MSD(sfp_dma));
  3157. mcp->mb[7] = LSW(MSD(sfp_dma));
  3158. mcp->mb[8] = len;
  3159. mcp->mb[9] = adr;
  3160. mcp->mb[10] = opt;
  3161. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3162. mcp->in_mb = MBX_0;
  3163. mcp->tov = MBX_TOV_SECONDS;
  3164. mcp->flags = 0;
  3165. rval = qla2x00_mailbox_command(vha, mcp);
  3166. if (opt & BIT_0)
  3167. if (sfp)
  3168. *sfp = mcp->mb[8];
  3169. if (rval != QLA_SUCCESS) {
  3170. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3171. vha->host_no, rval, mcp->mb[0]));
  3172. } else {
  3173. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3174. }
  3175. return rval;
  3176. }
  3177. int
  3178. qla2x00_write_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3179. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3180. {
  3181. int rval;
  3182. mbx_cmd_t mc;
  3183. mbx_cmd_t *mcp = &mc;
  3184. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3185. if (opt & BIT_0)
  3186. if (sfp)
  3187. len = *sfp;
  3188. mcp->mb[0] = MBC_WRITE_SFP;
  3189. mcp->mb[1] = dev;
  3190. mcp->mb[2] = MSW(sfp_dma);
  3191. mcp->mb[3] = LSW(sfp_dma);
  3192. mcp->mb[6] = MSW(MSD(sfp_dma));
  3193. mcp->mb[7] = LSW(MSD(sfp_dma));
  3194. mcp->mb[8] = len;
  3195. mcp->mb[9] = adr;
  3196. mcp->mb[10] = opt;
  3197. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3198. mcp->in_mb = MBX_0;
  3199. mcp->tov = MBX_TOV_SECONDS;
  3200. mcp->flags = 0;
  3201. rval = qla2x00_mailbox_command(vha, mcp);
  3202. if (rval != QLA_SUCCESS) {
  3203. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3204. vha->host_no, rval, mcp->mb[0]));
  3205. } else {
  3206. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3207. }
  3208. return rval;
  3209. }
  3210. int
  3211. qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
  3212. uint16_t size_in_bytes, uint16_t *actual_size)
  3213. {
  3214. int rval;
  3215. mbx_cmd_t mc;
  3216. mbx_cmd_t *mcp = &mc;
  3217. if (!IS_QLA8XXX_TYPE(vha->hw))
  3218. return QLA_FUNCTION_FAILED;
  3219. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3220. mcp->mb[0] = MBC_GET_XGMAC_STATS;
  3221. mcp->mb[2] = MSW(stats_dma);
  3222. mcp->mb[3] = LSW(stats_dma);
  3223. mcp->mb[6] = MSW(MSD(stats_dma));
  3224. mcp->mb[7] = LSW(MSD(stats_dma));
  3225. mcp->mb[8] = size_in_bytes >> 2;
  3226. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  3227. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3228. mcp->tov = MBX_TOV_SECONDS;
  3229. mcp->flags = 0;
  3230. rval = qla2x00_mailbox_command(vha, mcp);
  3231. if (rval != QLA_SUCCESS) {
  3232. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3233. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3234. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3235. } else {
  3236. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3237. *actual_size = mcp->mb[2] << 2;
  3238. }
  3239. return rval;
  3240. }
  3241. int
  3242. qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
  3243. uint16_t size)
  3244. {
  3245. int rval;
  3246. mbx_cmd_t mc;
  3247. mbx_cmd_t *mcp = &mc;
  3248. if (!IS_QLA8XXX_TYPE(vha->hw))
  3249. return QLA_FUNCTION_FAILED;
  3250. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3251. mcp->mb[0] = MBC_GET_DCBX_PARAMS;
  3252. mcp->mb[1] = 0;
  3253. mcp->mb[2] = MSW(tlv_dma);
  3254. mcp->mb[3] = LSW(tlv_dma);
  3255. mcp->mb[6] = MSW(MSD(tlv_dma));
  3256. mcp->mb[7] = LSW(MSD(tlv_dma));
  3257. mcp->mb[8] = size;
  3258. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3259. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3260. mcp->tov = MBX_TOV_SECONDS;
  3261. mcp->flags = 0;
  3262. rval = qla2x00_mailbox_command(vha, mcp);
  3263. if (rval != QLA_SUCCESS) {
  3264. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3265. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3266. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3267. } else {
  3268. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3269. }
  3270. return rval;
  3271. }
  3272. int
  3273. qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
  3274. {
  3275. int rval;
  3276. mbx_cmd_t mc;
  3277. mbx_cmd_t *mcp = &mc;
  3278. if (!IS_FWI2_CAPABLE(vha->hw))
  3279. return QLA_FUNCTION_FAILED;
  3280. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3281. mcp->mb[0] = MBC_READ_RAM_EXTENDED;
  3282. mcp->mb[1] = LSW(risc_addr);
  3283. mcp->mb[8] = MSW(risc_addr);
  3284. mcp->out_mb = MBX_8|MBX_1|MBX_0;
  3285. mcp->in_mb = MBX_3|MBX_2|MBX_0;
  3286. mcp->tov = 30;
  3287. mcp->flags = 0;
  3288. rval = qla2x00_mailbox_command(vha, mcp);
  3289. if (rval != QLA_SUCCESS) {
  3290. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3291. vha->host_no, rval, mcp->mb[0]));
  3292. } else {
  3293. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3294. *data = mcp->mb[3] << 16 | mcp->mb[2];
  3295. }
  3296. return rval;
  3297. }
  3298. int
  3299. qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
  3300. uint16_t *mresp)
  3301. {
  3302. int rval;
  3303. mbx_cmd_t mc;
  3304. mbx_cmd_t *mcp = &mc;
  3305. uint32_t iter_cnt = 0x1;
  3306. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3307. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3308. mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
  3309. mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
  3310. /* transfer count */
  3311. mcp->mb[10] = LSW(mreq->transfer_size);
  3312. mcp->mb[11] = MSW(mreq->transfer_size);
  3313. /* send data address */
  3314. mcp->mb[14] = LSW(mreq->send_dma);
  3315. mcp->mb[15] = MSW(mreq->send_dma);
  3316. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3317. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3318. /* recieve data address */
  3319. mcp->mb[16] = LSW(mreq->rcv_dma);
  3320. mcp->mb[17] = MSW(mreq->rcv_dma);
  3321. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3322. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3323. /* Iteration count */
  3324. mcp->mb[18] = LSW(iter_cnt);
  3325. mcp->mb[19] = MSW(iter_cnt);
  3326. mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
  3327. MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3328. if (IS_QLA8XXX_TYPE(vha->hw))
  3329. mcp->out_mb |= MBX_2;
  3330. mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
  3331. mcp->buf_size = mreq->transfer_size;
  3332. mcp->tov = MBX_TOV_SECONDS;
  3333. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3334. rval = qla2x00_mailbox_command(vha, mcp);
  3335. if (rval != QLA_SUCCESS) {
  3336. DEBUG2(printk(KERN_WARNING
  3337. "(%ld): failed=%x mb[0]=0x%x "
  3338. "mb[1]=0x%x mb[2]=0x%x mb[3]=0x%x mb[18]=0x%x "
  3339. "mb[19]=0x%x.\n",
  3340. vha->host_no, rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
  3341. mcp->mb[3], mcp->mb[18], mcp->mb[19]));
  3342. } else {
  3343. DEBUG2(printk(KERN_WARNING
  3344. "scsi(%ld): done.\n", vha->host_no));
  3345. }
  3346. /* Copy mailbox information */
  3347. memcpy( mresp, mcp->mb, 64);
  3348. return rval;
  3349. }
  3350. int
  3351. qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
  3352. uint16_t *mresp)
  3353. {
  3354. int rval;
  3355. mbx_cmd_t mc;
  3356. mbx_cmd_t *mcp = &mc;
  3357. struct qla_hw_data *ha = vha->hw;
  3358. DEBUG11(printk("scsi(%ld): entered.\n", vha->host_no));
  3359. memset(mcp->mb, 0 , sizeof(mcp->mb));
  3360. mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
  3361. mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
  3362. if (IS_QLA8XXX_TYPE(ha)) {
  3363. mcp->mb[1] |= BIT_15;
  3364. mcp->mb[2] = vha->fcoe_fcf_idx;
  3365. }
  3366. mcp->mb[16] = LSW(mreq->rcv_dma);
  3367. mcp->mb[17] = MSW(mreq->rcv_dma);
  3368. mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
  3369. mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
  3370. mcp->mb[10] = LSW(mreq->transfer_size);
  3371. mcp->mb[14] = LSW(mreq->send_dma);
  3372. mcp->mb[15] = MSW(mreq->send_dma);
  3373. mcp->mb[20] = LSW(MSD(mreq->send_dma));
  3374. mcp->mb[21] = MSW(MSD(mreq->send_dma));
  3375. mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
  3376. MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
  3377. if (IS_QLA8XXX_TYPE(ha))
  3378. mcp->out_mb |= MBX_2;
  3379. mcp->in_mb = MBX_0;
  3380. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA8XXX_TYPE(ha))
  3381. mcp->in_mb |= MBX_1;
  3382. if (IS_QLA8XXX_TYPE(ha))
  3383. mcp->in_mb |= MBX_3;
  3384. mcp->tov = MBX_TOV_SECONDS;
  3385. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3386. mcp->buf_size = mreq->transfer_size;
  3387. rval = qla2x00_mailbox_command(vha, mcp);
  3388. if (rval != QLA_SUCCESS) {
  3389. DEBUG2(printk(KERN_WARNING
  3390. "(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3391. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3392. } else {
  3393. DEBUG2(printk(KERN_WARNING
  3394. "scsi(%ld): done.\n", vha->host_no));
  3395. }
  3396. /* Copy mailbox information */
  3397. memcpy(mresp, mcp->mb, 64);
  3398. return rval;
  3399. }
  3400. int
  3401. qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic)
  3402. {
  3403. int rval;
  3404. mbx_cmd_t mc;
  3405. mbx_cmd_t *mcp = &mc;
  3406. DEBUG16(printk("%s(%ld): enable_diag=%d entered.\n", __func__,
  3407. ha->host_no, enable_diagnostic));
  3408. mcp->mb[0] = MBC_ISP84XX_RESET;
  3409. mcp->mb[1] = enable_diagnostic;
  3410. mcp->out_mb = MBX_1|MBX_0;
  3411. mcp->in_mb = MBX_1|MBX_0;
  3412. mcp->tov = MBX_TOV_SECONDS;
  3413. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
  3414. rval = qla2x00_mailbox_command(ha, mcp);
  3415. if (rval != QLA_SUCCESS)
  3416. DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no,
  3417. rval));
  3418. else
  3419. DEBUG16(printk("%s(%ld): done.\n", __func__, ha->host_no));
  3420. return rval;
  3421. }
  3422. int
  3423. qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
  3424. {
  3425. int rval;
  3426. mbx_cmd_t mc;
  3427. mbx_cmd_t *mcp = &mc;
  3428. if (!IS_FWI2_CAPABLE(vha->hw))
  3429. return QLA_FUNCTION_FAILED;
  3430. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3431. mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
  3432. mcp->mb[1] = LSW(risc_addr);
  3433. mcp->mb[2] = LSW(data);
  3434. mcp->mb[3] = MSW(data);
  3435. mcp->mb[8] = MSW(risc_addr);
  3436. mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
  3437. mcp->in_mb = MBX_0;
  3438. mcp->tov = 30;
  3439. mcp->flags = 0;
  3440. rval = qla2x00_mailbox_command(vha, mcp);
  3441. if (rval != QLA_SUCCESS) {
  3442. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3443. vha->host_no, rval, mcp->mb[0]));
  3444. } else {
  3445. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3446. }
  3447. return rval;
  3448. }
  3449. int
  3450. qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
  3451. {
  3452. int rval;
  3453. uint32_t stat, timer;
  3454. uint16_t mb0 = 0;
  3455. struct qla_hw_data *ha = vha->hw;
  3456. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3457. rval = QLA_SUCCESS;
  3458. DEBUG11(qla_printk(KERN_INFO, ha,
  3459. "%s(%ld): entered.\n", __func__, vha->host_no));
  3460. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  3461. /* Write the MBC data to the registers */
  3462. WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
  3463. WRT_REG_WORD(&reg->mailbox1, mb[0]);
  3464. WRT_REG_WORD(&reg->mailbox2, mb[1]);
  3465. WRT_REG_WORD(&reg->mailbox3, mb[2]);
  3466. WRT_REG_WORD(&reg->mailbox4, mb[3]);
  3467. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
  3468. /* Poll for MBC interrupt */
  3469. for (timer = 6000000; timer; timer--) {
  3470. /* Check for pending interrupts. */
  3471. stat = RD_REG_DWORD(&reg->host_status);
  3472. if (stat & HSRX_RISC_INT) {
  3473. stat &= 0xff;
  3474. if (stat == 0x1 || stat == 0x2 ||
  3475. stat == 0x10 || stat == 0x11) {
  3476. set_bit(MBX_INTERRUPT,
  3477. &ha->mbx_cmd_flags);
  3478. mb0 = RD_REG_WORD(&reg->mailbox0);
  3479. WRT_REG_DWORD(&reg->hccr,
  3480. HCCRX_CLR_RISC_INT);
  3481. RD_REG_DWORD(&reg->hccr);
  3482. break;
  3483. }
  3484. }
  3485. udelay(5);
  3486. }
  3487. if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
  3488. rval = mb0 & MBS_MASK;
  3489. else
  3490. rval = QLA_FUNCTION_FAILED;
  3491. if (rval != QLA_SUCCESS) {
  3492. DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
  3493. __func__, vha->host_no, rval, mb[0]));
  3494. } else {
  3495. DEBUG11(printk(KERN_INFO
  3496. "%s(%ld): done.\n", __func__, vha->host_no));
  3497. }
  3498. return rval;
  3499. }
  3500. int
  3501. qla2x00_get_data_rate(scsi_qla_host_t *vha)
  3502. {
  3503. int rval;
  3504. mbx_cmd_t mc;
  3505. mbx_cmd_t *mcp = &mc;
  3506. struct qla_hw_data *ha = vha->hw;
  3507. if (!IS_FWI2_CAPABLE(ha))
  3508. return QLA_FUNCTION_FAILED;
  3509. DEBUG11(qla_printk(KERN_INFO, ha,
  3510. "%s(%ld): entered.\n", __func__, vha->host_no));
  3511. mcp->mb[0] = MBC_DATA_RATE;
  3512. mcp->mb[1] = 0;
  3513. mcp->out_mb = MBX_1|MBX_0;
  3514. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3515. mcp->tov = MBX_TOV_SECONDS;
  3516. mcp->flags = 0;
  3517. rval = qla2x00_mailbox_command(vha, mcp);
  3518. if (rval != QLA_SUCCESS) {
  3519. DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
  3520. __func__, vha->host_no, rval, mcp->mb[0]));
  3521. } else {
  3522. DEBUG11(printk(KERN_INFO
  3523. "%s(%ld): done.\n", __func__, vha->host_no));
  3524. if (mcp->mb[1] != 0x7)
  3525. ha->link_data_rate = mcp->mb[1];
  3526. }
  3527. return rval;
  3528. }
  3529. int
  3530. qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
  3531. {
  3532. int rval;
  3533. mbx_cmd_t mc;
  3534. mbx_cmd_t *mcp = &mc;
  3535. struct qla_hw_data *ha = vha->hw;
  3536. DEBUG11(printk(KERN_INFO
  3537. "%s(%ld): entered.\n", __func__, vha->host_no));
  3538. if (!IS_QLA81XX(ha))
  3539. return QLA_FUNCTION_FAILED;
  3540. mcp->mb[0] = MBC_GET_PORT_CONFIG;
  3541. mcp->out_mb = MBX_0;
  3542. mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3543. mcp->tov = MBX_TOV_SECONDS;
  3544. mcp->flags = 0;
  3545. rval = qla2x00_mailbox_command(vha, mcp);
  3546. if (rval != QLA_SUCCESS) {
  3547. DEBUG2_3_11(printk(KERN_WARNING
  3548. "%s(%ld): failed=%x (%x).\n", __func__,
  3549. vha->host_no, rval, mcp->mb[0]));
  3550. } else {
  3551. /* Copy all bits to preserve original value */
  3552. memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
  3553. DEBUG11(printk(KERN_INFO
  3554. "%s(%ld): done.\n", __func__, vha->host_no));
  3555. }
  3556. return rval;
  3557. }
  3558. int
  3559. qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
  3560. {
  3561. int rval;
  3562. mbx_cmd_t mc;
  3563. mbx_cmd_t *mcp = &mc;
  3564. DEBUG11(printk(KERN_INFO
  3565. "%s(%ld): entered.\n", __func__, vha->host_no));
  3566. mcp->mb[0] = MBC_SET_PORT_CONFIG;
  3567. /* Copy all bits to preserve original setting */
  3568. memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
  3569. mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3570. mcp->in_mb = MBX_0;
  3571. mcp->tov = MBX_TOV_SECONDS;
  3572. mcp->flags = 0;
  3573. rval = qla2x00_mailbox_command(vha, mcp);
  3574. if (rval != QLA_SUCCESS) {
  3575. DEBUG2_3_11(printk(KERN_WARNING
  3576. "%s(%ld): failed=%x (%x).\n", __func__,
  3577. vha->host_no, rval, mcp->mb[0]));
  3578. } else
  3579. DEBUG11(printk(KERN_INFO
  3580. "%s(%ld): done.\n", __func__, vha->host_no));
  3581. return rval;
  3582. }
  3583. int
  3584. qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
  3585. uint16_t *mb)
  3586. {
  3587. int rval;
  3588. mbx_cmd_t mc;
  3589. mbx_cmd_t *mcp = &mc;
  3590. struct qla_hw_data *ha = vha->hw;
  3591. if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
  3592. return QLA_FUNCTION_FAILED;
  3593. DEBUG11(printk(KERN_INFO
  3594. "%s(%ld): entered.\n", __func__, vha->host_no));
  3595. mcp->mb[0] = MBC_PORT_PARAMS;
  3596. mcp->mb[1] = loop_id;
  3597. if (ha->flags.fcp_prio_enabled)
  3598. mcp->mb[2] = BIT_1;
  3599. else
  3600. mcp->mb[2] = BIT_2;
  3601. mcp->mb[4] = priority & 0xf;
  3602. mcp->mb[9] = vha->vp_idx;
  3603. mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3604. mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
  3605. mcp->tov = 30;
  3606. mcp->flags = 0;
  3607. rval = qla2x00_mailbox_command(vha, mcp);
  3608. if (mb != NULL) {
  3609. mb[0] = mcp->mb[0];
  3610. mb[1] = mcp->mb[1];
  3611. mb[3] = mcp->mb[3];
  3612. mb[4] = mcp->mb[4];
  3613. }
  3614. if (rval != QLA_SUCCESS) {
  3615. DEBUG2_3_11(printk(KERN_WARNING
  3616. "%s(%ld): failed=%x.\n", __func__,
  3617. vha->host_no, rval));
  3618. } else {
  3619. DEBUG11(printk(KERN_INFO
  3620. "%s(%ld): done.\n", __func__, vha->host_no));
  3621. }
  3622. return rval;
  3623. }
  3624. int
  3625. qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp, uint16_t *frac)
  3626. {
  3627. int rval;
  3628. mbx_cmd_t mc;
  3629. mbx_cmd_t *mcp = &mc;
  3630. struct qla_hw_data *ha = vha->hw;
  3631. DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, ha->host_no));
  3632. /* High bits. */
  3633. mcp->mb[0] = MBC_READ_SFP;
  3634. mcp->mb[1] = 0x98;
  3635. mcp->mb[2] = 0;
  3636. mcp->mb[3] = 0;
  3637. mcp->mb[6] = 0;
  3638. mcp->mb[7] = 0;
  3639. mcp->mb[8] = 1;
  3640. mcp->mb[9] = 0x01;
  3641. mcp->mb[10] = BIT_13|BIT_0;
  3642. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3643. mcp->in_mb = MBX_1|MBX_0;
  3644. mcp->tov = MBX_TOV_SECONDS;
  3645. mcp->flags = 0;
  3646. rval = qla2x00_mailbox_command(vha, mcp);
  3647. if (rval != QLA_SUCCESS) {
  3648. DEBUG2_3_11(printk(KERN_WARNING
  3649. "%s(%ld): failed=%x (%x).\n", __func__,
  3650. vha->host_no, rval, mcp->mb[0]));
  3651. ha->flags.thermal_supported = 0;
  3652. goto fail;
  3653. }
  3654. *temp = mcp->mb[1] & 0xFF;
  3655. /* Low bits. */
  3656. mcp->mb[0] = MBC_READ_SFP;
  3657. mcp->mb[1] = 0x98;
  3658. mcp->mb[2] = 0;
  3659. mcp->mb[3] = 0;
  3660. mcp->mb[6] = 0;
  3661. mcp->mb[7] = 0;
  3662. mcp->mb[8] = 1;
  3663. mcp->mb[9] = 0x10;
  3664. mcp->mb[10] = BIT_13|BIT_0;
  3665. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3666. mcp->in_mb = MBX_1|MBX_0;
  3667. mcp->tov = MBX_TOV_SECONDS;
  3668. mcp->flags = 0;
  3669. rval = qla2x00_mailbox_command(vha, mcp);
  3670. if (rval != QLA_SUCCESS) {
  3671. DEBUG2_3_11(printk(KERN_WARNING
  3672. "%s(%ld): failed=%x (%x).\n", __func__,
  3673. vha->host_no, rval, mcp->mb[0]));
  3674. ha->flags.thermal_supported = 0;
  3675. goto fail;
  3676. }
  3677. *frac = ((mcp->mb[1] & 0xFF) >> 6) * 25;
  3678. if (rval == QLA_SUCCESS)
  3679. DEBUG11(printk(KERN_INFO
  3680. "%s(%ld): done.\n", __func__, ha->host_no));
  3681. fail:
  3682. return rval;
  3683. }
  3684. int
  3685. qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
  3686. {
  3687. int rval;
  3688. struct qla_hw_data *ha = vha->hw;
  3689. mbx_cmd_t mc;
  3690. mbx_cmd_t *mcp = &mc;
  3691. if (!IS_FWI2_CAPABLE(ha))
  3692. return QLA_FUNCTION_FAILED;
  3693. DEBUG11(qla_printk(KERN_INFO, ha,
  3694. "%s(%ld): entered.\n", __func__, vha->host_no));
  3695. memset(mcp, 0, sizeof(mbx_cmd_t));
  3696. mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
  3697. mcp->mb[1] = 1;
  3698. mcp->out_mb = MBX_1|MBX_0;
  3699. mcp->in_mb = MBX_0;
  3700. mcp->tov = 30;
  3701. mcp->flags = 0;
  3702. rval = qla2x00_mailbox_command(vha, mcp);
  3703. if (rval != QLA_SUCCESS) {
  3704. DEBUG2_3_11(qla_printk(KERN_WARNING, ha,
  3705. "%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3706. vha->host_no, rval, mcp->mb[0]));
  3707. } else {
  3708. DEBUG11(qla_printk(KERN_INFO, ha,
  3709. "%s(%ld): done.\n", __func__, vha->host_no));
  3710. }
  3711. return rval;
  3712. }
  3713. int
  3714. qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
  3715. {
  3716. int rval;
  3717. struct qla_hw_data *ha = vha->hw;
  3718. mbx_cmd_t mc;
  3719. mbx_cmd_t *mcp = &mc;
  3720. if (!IS_QLA82XX(ha))
  3721. return QLA_FUNCTION_FAILED;
  3722. DEBUG11(qla_printk(KERN_INFO, ha,
  3723. "%s(%ld): entered.\n", __func__, vha->host_no));
  3724. memset(mcp, 0, sizeof(mbx_cmd_t));
  3725. mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
  3726. mcp->mb[1] = 0;
  3727. mcp->out_mb = MBX_1|MBX_0;
  3728. mcp->in_mb = MBX_0;
  3729. mcp->tov = 30;
  3730. mcp->flags = 0;
  3731. rval = qla2x00_mailbox_command(vha, mcp);
  3732. if (rval != QLA_SUCCESS) {
  3733. DEBUG2_3_11(qla_printk(KERN_WARNING, ha,
  3734. "%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3735. vha->host_no, rval, mcp->mb[0]));
  3736. } else {
  3737. DEBUG11(qla_printk(KERN_INFO, ha,
  3738. "%s(%ld): done.\n", __func__, vha->host_no));
  3739. }
  3740. return rval;
  3741. }