hpsa.c 115 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  92. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  93. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  94. {0,}
  95. };
  96. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  97. /* board_id = Subsystem Device ID & Vendor ID
  98. * product = Marketing Name for the board
  99. * access = Address of the struct of function pointers
  100. */
  101. static struct board_type products[] = {
  102. {0x3241103C, "Smart Array P212", &SA5_access},
  103. {0x3243103C, "Smart Array P410", &SA5_access},
  104. {0x3245103C, "Smart Array P410i", &SA5_access},
  105. {0x3247103C, "Smart Array P411", &SA5_access},
  106. {0x3249103C, "Smart Array P812", &SA5_access},
  107. {0x324a103C, "Smart Array P712m", &SA5_access},
  108. {0x324b103C, "Smart Array P711m", &SA5_access},
  109. {0x3350103C, "Smart Array", &SA5_access},
  110. {0x3351103C, "Smart Array", &SA5_access},
  111. {0x3352103C, "Smart Array", &SA5_access},
  112. {0x3353103C, "Smart Array", &SA5_access},
  113. {0x3354103C, "Smart Array", &SA5_access},
  114. {0x3355103C, "Smart Array", &SA5_access},
  115. {0x3356103C, "Smart Array", &SA5_access},
  116. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  117. };
  118. static int number_of_controllers;
  119. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  120. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  121. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  122. static void start_io(struct ctlr_info *h);
  123. #ifdef CONFIG_COMPAT
  124. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  125. #endif
  126. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  127. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  128. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  129. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  130. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  131. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  132. int cmd_type);
  133. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  134. static void hpsa_scan_start(struct Scsi_Host *);
  135. static int hpsa_scan_finished(struct Scsi_Host *sh,
  136. unsigned long elapsed_time);
  137. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  138. int qdepth, int reason);
  139. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  140. static int hpsa_slave_alloc(struct scsi_device *sdev);
  141. static void hpsa_slave_destroy(struct scsi_device *sdev);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static int check_for_unit_attention(struct ctlr_info *h,
  144. struct CommandList *c);
  145. static void check_ioctl_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. /* performant mode helper functions */
  148. static void calc_bucket_map(int *bucket, int num_buckets,
  149. int nsgs, int *bucket_map);
  150. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  151. static inline u32 next_command(struct ctlr_info *h);
  152. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  153. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  154. u64 *cfg_offset);
  155. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  156. unsigned long *memory_bar);
  157. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  158. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  159. void __iomem *vaddr, int wait_for_ready);
  160. #define BOARD_NOT_READY 0
  161. #define BOARD_READY 1
  162. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  163. {
  164. unsigned long *priv = shost_priv(sdev->host);
  165. return (struct ctlr_info *) *priv;
  166. }
  167. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  168. {
  169. unsigned long *priv = shost_priv(sh);
  170. return (struct ctlr_info *) *priv;
  171. }
  172. static int check_for_unit_attention(struct ctlr_info *h,
  173. struct CommandList *c)
  174. {
  175. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  176. return 0;
  177. switch (c->err_info->SenseInfo[12]) {
  178. case STATE_CHANGED:
  179. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  180. "detected, command retried\n", h->ctlr);
  181. break;
  182. case LUN_FAILED:
  183. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  184. "detected, action required\n", h->ctlr);
  185. break;
  186. case REPORT_LUNS_CHANGED:
  187. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  188. "changed, action required\n", h->ctlr);
  189. /*
  190. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  191. */
  192. break;
  193. case POWER_OR_RESET:
  194. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  195. "or device reset detected\n", h->ctlr);
  196. break;
  197. case UNIT_ATTENTION_CLEARED:
  198. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  199. "cleared by another initiator\n", h->ctlr);
  200. break;
  201. default:
  202. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  203. "unit attention detected\n", h->ctlr);
  204. break;
  205. }
  206. return 1;
  207. }
  208. static ssize_t host_store_rescan(struct device *dev,
  209. struct device_attribute *attr,
  210. const char *buf, size_t count)
  211. {
  212. struct ctlr_info *h;
  213. struct Scsi_Host *shost = class_to_shost(dev);
  214. h = shost_to_hba(shost);
  215. hpsa_scan_start(h->scsi_host);
  216. return count;
  217. }
  218. static ssize_t host_show_firmware_revision(struct device *dev,
  219. struct device_attribute *attr, char *buf)
  220. {
  221. struct ctlr_info *h;
  222. struct Scsi_Host *shost = class_to_shost(dev);
  223. unsigned char *fwrev;
  224. h = shost_to_hba(shost);
  225. if (!h->hba_inquiry_data)
  226. return 0;
  227. fwrev = &h->hba_inquiry_data[32];
  228. return snprintf(buf, 20, "%c%c%c%c\n",
  229. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  230. }
  231. static ssize_t host_show_commands_outstanding(struct device *dev,
  232. struct device_attribute *attr, char *buf)
  233. {
  234. struct Scsi_Host *shost = class_to_shost(dev);
  235. struct ctlr_info *h = shost_to_hba(shost);
  236. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  237. }
  238. static ssize_t host_show_transport_mode(struct device *dev,
  239. struct device_attribute *attr, char *buf)
  240. {
  241. struct ctlr_info *h;
  242. struct Scsi_Host *shost = class_to_shost(dev);
  243. h = shost_to_hba(shost);
  244. return snprintf(buf, 20, "%s\n",
  245. h->transMethod & CFGTBL_Trans_Performant ?
  246. "performant" : "simple");
  247. }
  248. /* List of controllers which cannot be reset on kexec with reset_devices */
  249. static u32 unresettable_controller[] = {
  250. 0x324a103C, /* Smart Array P712m */
  251. 0x324b103C, /* SmartArray P711m */
  252. 0x3223103C, /* Smart Array P800 */
  253. 0x3234103C, /* Smart Array P400 */
  254. 0x3235103C, /* Smart Array P400i */
  255. 0x3211103C, /* Smart Array E200i */
  256. 0x3212103C, /* Smart Array E200 */
  257. 0x3213103C, /* Smart Array E200i */
  258. 0x3214103C, /* Smart Array E200i */
  259. 0x3215103C, /* Smart Array E200i */
  260. 0x3237103C, /* Smart Array E500 */
  261. 0x323D103C, /* Smart Array P700m */
  262. 0x409C0E11, /* Smart Array 6400 */
  263. 0x409D0E11, /* Smart Array 6400 EM */
  264. };
  265. static int ctlr_is_resettable(struct ctlr_info *h)
  266. {
  267. int i;
  268. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  269. if (unresettable_controller[i] == h->board_id)
  270. return 0;
  271. return 1;
  272. }
  273. static ssize_t host_show_resettable(struct device *dev,
  274. struct device_attribute *attr, char *buf)
  275. {
  276. struct ctlr_info *h;
  277. struct Scsi_Host *shost = class_to_shost(dev);
  278. h = shost_to_hba(shost);
  279. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h));
  280. }
  281. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  282. {
  283. return (scsi3addr[3] & 0xC0) == 0x40;
  284. }
  285. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  286. "UNKNOWN"
  287. };
  288. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  289. static ssize_t raid_level_show(struct device *dev,
  290. struct device_attribute *attr, char *buf)
  291. {
  292. ssize_t l = 0;
  293. unsigned char rlevel;
  294. struct ctlr_info *h;
  295. struct scsi_device *sdev;
  296. struct hpsa_scsi_dev_t *hdev;
  297. unsigned long flags;
  298. sdev = to_scsi_device(dev);
  299. h = sdev_to_hba(sdev);
  300. spin_lock_irqsave(&h->lock, flags);
  301. hdev = sdev->hostdata;
  302. if (!hdev) {
  303. spin_unlock_irqrestore(&h->lock, flags);
  304. return -ENODEV;
  305. }
  306. /* Is this even a logical drive? */
  307. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  308. spin_unlock_irqrestore(&h->lock, flags);
  309. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  310. return l;
  311. }
  312. rlevel = hdev->raid_level;
  313. spin_unlock_irqrestore(&h->lock, flags);
  314. if (rlevel > RAID_UNKNOWN)
  315. rlevel = RAID_UNKNOWN;
  316. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  317. return l;
  318. }
  319. static ssize_t lunid_show(struct device *dev,
  320. struct device_attribute *attr, char *buf)
  321. {
  322. struct ctlr_info *h;
  323. struct scsi_device *sdev;
  324. struct hpsa_scsi_dev_t *hdev;
  325. unsigned long flags;
  326. unsigned char lunid[8];
  327. sdev = to_scsi_device(dev);
  328. h = sdev_to_hba(sdev);
  329. spin_lock_irqsave(&h->lock, flags);
  330. hdev = sdev->hostdata;
  331. if (!hdev) {
  332. spin_unlock_irqrestore(&h->lock, flags);
  333. return -ENODEV;
  334. }
  335. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  336. spin_unlock_irqrestore(&h->lock, flags);
  337. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  338. lunid[0], lunid[1], lunid[2], lunid[3],
  339. lunid[4], lunid[5], lunid[6], lunid[7]);
  340. }
  341. static ssize_t unique_id_show(struct device *dev,
  342. struct device_attribute *attr, char *buf)
  343. {
  344. struct ctlr_info *h;
  345. struct scsi_device *sdev;
  346. struct hpsa_scsi_dev_t *hdev;
  347. unsigned long flags;
  348. unsigned char sn[16];
  349. sdev = to_scsi_device(dev);
  350. h = sdev_to_hba(sdev);
  351. spin_lock_irqsave(&h->lock, flags);
  352. hdev = sdev->hostdata;
  353. if (!hdev) {
  354. spin_unlock_irqrestore(&h->lock, flags);
  355. return -ENODEV;
  356. }
  357. memcpy(sn, hdev->device_id, sizeof(sn));
  358. spin_unlock_irqrestore(&h->lock, flags);
  359. return snprintf(buf, 16 * 2 + 2,
  360. "%02X%02X%02X%02X%02X%02X%02X%02X"
  361. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  362. sn[0], sn[1], sn[2], sn[3],
  363. sn[4], sn[5], sn[6], sn[7],
  364. sn[8], sn[9], sn[10], sn[11],
  365. sn[12], sn[13], sn[14], sn[15]);
  366. }
  367. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  368. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  369. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  370. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  371. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  372. host_show_firmware_revision, NULL);
  373. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  374. host_show_commands_outstanding, NULL);
  375. static DEVICE_ATTR(transport_mode, S_IRUGO,
  376. host_show_transport_mode, NULL);
  377. static DEVICE_ATTR(resettable, S_IRUGO,
  378. host_show_resettable, NULL);
  379. static struct device_attribute *hpsa_sdev_attrs[] = {
  380. &dev_attr_raid_level,
  381. &dev_attr_lunid,
  382. &dev_attr_unique_id,
  383. NULL,
  384. };
  385. static struct device_attribute *hpsa_shost_attrs[] = {
  386. &dev_attr_rescan,
  387. &dev_attr_firmware_revision,
  388. &dev_attr_commands_outstanding,
  389. &dev_attr_transport_mode,
  390. &dev_attr_resettable,
  391. NULL,
  392. };
  393. static struct scsi_host_template hpsa_driver_template = {
  394. .module = THIS_MODULE,
  395. .name = "hpsa",
  396. .proc_name = "hpsa",
  397. .queuecommand = hpsa_scsi_queue_command,
  398. .scan_start = hpsa_scan_start,
  399. .scan_finished = hpsa_scan_finished,
  400. .change_queue_depth = hpsa_change_queue_depth,
  401. .this_id = -1,
  402. .use_clustering = ENABLE_CLUSTERING,
  403. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  404. .ioctl = hpsa_ioctl,
  405. .slave_alloc = hpsa_slave_alloc,
  406. .slave_destroy = hpsa_slave_destroy,
  407. #ifdef CONFIG_COMPAT
  408. .compat_ioctl = hpsa_compat_ioctl,
  409. #endif
  410. .sdev_attrs = hpsa_sdev_attrs,
  411. .shost_attrs = hpsa_shost_attrs,
  412. };
  413. /* Enqueuing and dequeuing functions for cmdlists. */
  414. static inline void addQ(struct list_head *list, struct CommandList *c)
  415. {
  416. list_add_tail(&c->list, list);
  417. }
  418. static inline u32 next_command(struct ctlr_info *h)
  419. {
  420. u32 a;
  421. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  422. return h->access.command_completed(h);
  423. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  424. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  425. (h->reply_pool_head)++;
  426. h->commands_outstanding--;
  427. } else {
  428. a = FIFO_EMPTY;
  429. }
  430. /* Check for wraparound */
  431. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  432. h->reply_pool_head = h->reply_pool;
  433. h->reply_pool_wraparound ^= 1;
  434. }
  435. return a;
  436. }
  437. /* set_performant_mode: Modify the tag for cciss performant
  438. * set bit 0 for pull model, bits 3-1 for block fetch
  439. * register number
  440. */
  441. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  442. {
  443. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  444. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  445. }
  446. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  447. struct CommandList *c)
  448. {
  449. unsigned long flags;
  450. set_performant_mode(h, c);
  451. spin_lock_irqsave(&h->lock, flags);
  452. addQ(&h->reqQ, c);
  453. h->Qdepth++;
  454. start_io(h);
  455. spin_unlock_irqrestore(&h->lock, flags);
  456. }
  457. static inline void removeQ(struct CommandList *c)
  458. {
  459. if (WARN_ON(list_empty(&c->list)))
  460. return;
  461. list_del_init(&c->list);
  462. }
  463. static inline int is_hba_lunid(unsigned char scsi3addr[])
  464. {
  465. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  466. }
  467. static inline int is_scsi_rev_5(struct ctlr_info *h)
  468. {
  469. if (!h->hba_inquiry_data)
  470. return 0;
  471. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  472. return 1;
  473. return 0;
  474. }
  475. static int hpsa_find_target_lun(struct ctlr_info *h,
  476. unsigned char scsi3addr[], int bus, int *target, int *lun)
  477. {
  478. /* finds an unused bus, target, lun for a new physical device
  479. * assumes h->devlock is held
  480. */
  481. int i, found = 0;
  482. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  483. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  484. for (i = 0; i < h->ndevices; i++) {
  485. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  486. set_bit(h->dev[i]->target, lun_taken);
  487. }
  488. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  489. if (!test_bit(i, lun_taken)) {
  490. /* *bus = 1; */
  491. *target = i;
  492. *lun = 0;
  493. found = 1;
  494. break;
  495. }
  496. }
  497. return !found;
  498. }
  499. /* Add an entry into h->dev[] array. */
  500. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  501. struct hpsa_scsi_dev_t *device,
  502. struct hpsa_scsi_dev_t *added[], int *nadded)
  503. {
  504. /* assumes h->devlock is held */
  505. int n = h->ndevices;
  506. int i;
  507. unsigned char addr1[8], addr2[8];
  508. struct hpsa_scsi_dev_t *sd;
  509. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  510. dev_err(&h->pdev->dev, "too many devices, some will be "
  511. "inaccessible.\n");
  512. return -1;
  513. }
  514. /* physical devices do not have lun or target assigned until now. */
  515. if (device->lun != -1)
  516. /* Logical device, lun is already assigned. */
  517. goto lun_assigned;
  518. /* If this device a non-zero lun of a multi-lun device
  519. * byte 4 of the 8-byte LUN addr will contain the logical
  520. * unit no, zero otherise.
  521. */
  522. if (device->scsi3addr[4] == 0) {
  523. /* This is not a non-zero lun of a multi-lun device */
  524. if (hpsa_find_target_lun(h, device->scsi3addr,
  525. device->bus, &device->target, &device->lun) != 0)
  526. return -1;
  527. goto lun_assigned;
  528. }
  529. /* This is a non-zero lun of a multi-lun device.
  530. * Search through our list and find the device which
  531. * has the same 8 byte LUN address, excepting byte 4.
  532. * Assign the same bus and target for this new LUN.
  533. * Use the logical unit number from the firmware.
  534. */
  535. memcpy(addr1, device->scsi3addr, 8);
  536. addr1[4] = 0;
  537. for (i = 0; i < n; i++) {
  538. sd = h->dev[i];
  539. memcpy(addr2, sd->scsi3addr, 8);
  540. addr2[4] = 0;
  541. /* differ only in byte 4? */
  542. if (memcmp(addr1, addr2, 8) == 0) {
  543. device->bus = sd->bus;
  544. device->target = sd->target;
  545. device->lun = device->scsi3addr[4];
  546. break;
  547. }
  548. }
  549. if (device->lun == -1) {
  550. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  551. " suspect firmware bug or unsupported hardware "
  552. "configuration.\n");
  553. return -1;
  554. }
  555. lun_assigned:
  556. h->dev[n] = device;
  557. h->ndevices++;
  558. added[*nadded] = device;
  559. (*nadded)++;
  560. /* initially, (before registering with scsi layer) we don't
  561. * know our hostno and we don't want to print anything first
  562. * time anyway (the scsi layer's inquiries will show that info)
  563. */
  564. /* if (hostno != -1) */
  565. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  566. scsi_device_type(device->devtype), hostno,
  567. device->bus, device->target, device->lun);
  568. return 0;
  569. }
  570. /* Replace an entry from h->dev[] array. */
  571. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  572. int entry, struct hpsa_scsi_dev_t *new_entry,
  573. struct hpsa_scsi_dev_t *added[], int *nadded,
  574. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  575. {
  576. /* assumes h->devlock is held */
  577. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  578. removed[*nremoved] = h->dev[entry];
  579. (*nremoved)++;
  580. h->dev[entry] = new_entry;
  581. added[*nadded] = new_entry;
  582. (*nadded)++;
  583. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  584. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  585. new_entry->target, new_entry->lun);
  586. }
  587. /* Remove an entry from h->dev[] array. */
  588. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  589. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  590. {
  591. /* assumes h->devlock is held */
  592. int i;
  593. struct hpsa_scsi_dev_t *sd;
  594. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  595. sd = h->dev[entry];
  596. removed[*nremoved] = h->dev[entry];
  597. (*nremoved)++;
  598. for (i = entry; i < h->ndevices-1; i++)
  599. h->dev[i] = h->dev[i+1];
  600. h->ndevices--;
  601. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  602. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  603. sd->lun);
  604. }
  605. #define SCSI3ADDR_EQ(a, b) ( \
  606. (a)[7] == (b)[7] && \
  607. (a)[6] == (b)[6] && \
  608. (a)[5] == (b)[5] && \
  609. (a)[4] == (b)[4] && \
  610. (a)[3] == (b)[3] && \
  611. (a)[2] == (b)[2] && \
  612. (a)[1] == (b)[1] && \
  613. (a)[0] == (b)[0])
  614. static void fixup_botched_add(struct ctlr_info *h,
  615. struct hpsa_scsi_dev_t *added)
  616. {
  617. /* called when scsi_add_device fails in order to re-adjust
  618. * h->dev[] to match the mid layer's view.
  619. */
  620. unsigned long flags;
  621. int i, j;
  622. spin_lock_irqsave(&h->lock, flags);
  623. for (i = 0; i < h->ndevices; i++) {
  624. if (h->dev[i] == added) {
  625. for (j = i; j < h->ndevices-1; j++)
  626. h->dev[j] = h->dev[j+1];
  627. h->ndevices--;
  628. break;
  629. }
  630. }
  631. spin_unlock_irqrestore(&h->lock, flags);
  632. kfree(added);
  633. }
  634. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  635. struct hpsa_scsi_dev_t *dev2)
  636. {
  637. /* we compare everything except lun and target as these
  638. * are not yet assigned. Compare parts likely
  639. * to differ first
  640. */
  641. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  642. sizeof(dev1->scsi3addr)) != 0)
  643. return 0;
  644. if (memcmp(dev1->device_id, dev2->device_id,
  645. sizeof(dev1->device_id)) != 0)
  646. return 0;
  647. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  648. return 0;
  649. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  650. return 0;
  651. if (dev1->devtype != dev2->devtype)
  652. return 0;
  653. if (dev1->bus != dev2->bus)
  654. return 0;
  655. return 1;
  656. }
  657. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  658. * and return needle location in *index. If scsi3addr matches, but not
  659. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  660. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  661. */
  662. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  663. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  664. int *index)
  665. {
  666. int i;
  667. #define DEVICE_NOT_FOUND 0
  668. #define DEVICE_CHANGED 1
  669. #define DEVICE_SAME 2
  670. for (i = 0; i < haystack_size; i++) {
  671. if (haystack[i] == NULL) /* previously removed. */
  672. continue;
  673. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  674. *index = i;
  675. if (device_is_the_same(needle, haystack[i]))
  676. return DEVICE_SAME;
  677. else
  678. return DEVICE_CHANGED;
  679. }
  680. }
  681. *index = -1;
  682. return DEVICE_NOT_FOUND;
  683. }
  684. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  685. struct hpsa_scsi_dev_t *sd[], int nsds)
  686. {
  687. /* sd contains scsi3 addresses and devtypes, and inquiry
  688. * data. This function takes what's in sd to be the current
  689. * reality and updates h->dev[] to reflect that reality.
  690. */
  691. int i, entry, device_change, changes = 0;
  692. struct hpsa_scsi_dev_t *csd;
  693. unsigned long flags;
  694. struct hpsa_scsi_dev_t **added, **removed;
  695. int nadded, nremoved;
  696. struct Scsi_Host *sh = NULL;
  697. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  698. GFP_KERNEL);
  699. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  700. GFP_KERNEL);
  701. if (!added || !removed) {
  702. dev_warn(&h->pdev->dev, "out of memory in "
  703. "adjust_hpsa_scsi_table\n");
  704. goto free_and_out;
  705. }
  706. spin_lock_irqsave(&h->devlock, flags);
  707. /* find any devices in h->dev[] that are not in
  708. * sd[] and remove them from h->dev[], and for any
  709. * devices which have changed, remove the old device
  710. * info and add the new device info.
  711. */
  712. i = 0;
  713. nremoved = 0;
  714. nadded = 0;
  715. while (i < h->ndevices) {
  716. csd = h->dev[i];
  717. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  718. if (device_change == DEVICE_NOT_FOUND) {
  719. changes++;
  720. hpsa_scsi_remove_entry(h, hostno, i,
  721. removed, &nremoved);
  722. continue; /* remove ^^^, hence i not incremented */
  723. } else if (device_change == DEVICE_CHANGED) {
  724. changes++;
  725. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  726. added, &nadded, removed, &nremoved);
  727. /* Set it to NULL to prevent it from being freed
  728. * at the bottom of hpsa_update_scsi_devices()
  729. */
  730. sd[entry] = NULL;
  731. }
  732. i++;
  733. }
  734. /* Now, make sure every device listed in sd[] is also
  735. * listed in h->dev[], adding them if they aren't found
  736. */
  737. for (i = 0; i < nsds; i++) {
  738. if (!sd[i]) /* if already added above. */
  739. continue;
  740. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  741. h->ndevices, &entry);
  742. if (device_change == DEVICE_NOT_FOUND) {
  743. changes++;
  744. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  745. added, &nadded) != 0)
  746. break;
  747. sd[i] = NULL; /* prevent from being freed later. */
  748. } else if (device_change == DEVICE_CHANGED) {
  749. /* should never happen... */
  750. changes++;
  751. dev_warn(&h->pdev->dev,
  752. "device unexpectedly changed.\n");
  753. /* but if it does happen, we just ignore that device */
  754. }
  755. }
  756. spin_unlock_irqrestore(&h->devlock, flags);
  757. /* Don't notify scsi mid layer of any changes the first time through
  758. * (or if there are no changes) scsi_scan_host will do it later the
  759. * first time through.
  760. */
  761. if (hostno == -1 || !changes)
  762. goto free_and_out;
  763. sh = h->scsi_host;
  764. /* Notify scsi mid layer of any removed devices */
  765. for (i = 0; i < nremoved; i++) {
  766. struct scsi_device *sdev =
  767. scsi_device_lookup(sh, removed[i]->bus,
  768. removed[i]->target, removed[i]->lun);
  769. if (sdev != NULL) {
  770. scsi_remove_device(sdev);
  771. scsi_device_put(sdev);
  772. } else {
  773. /* We don't expect to get here.
  774. * future cmds to this device will get selection
  775. * timeout as if the device was gone.
  776. */
  777. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  778. " for removal.", hostno, removed[i]->bus,
  779. removed[i]->target, removed[i]->lun);
  780. }
  781. kfree(removed[i]);
  782. removed[i] = NULL;
  783. }
  784. /* Notify scsi mid layer of any added devices */
  785. for (i = 0; i < nadded; i++) {
  786. if (scsi_add_device(sh, added[i]->bus,
  787. added[i]->target, added[i]->lun) == 0)
  788. continue;
  789. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  790. "device not added.\n", hostno, added[i]->bus,
  791. added[i]->target, added[i]->lun);
  792. /* now we have to remove it from h->dev,
  793. * since it didn't get added to scsi mid layer
  794. */
  795. fixup_botched_add(h, added[i]);
  796. }
  797. free_and_out:
  798. kfree(added);
  799. kfree(removed);
  800. }
  801. /*
  802. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  803. * Assume's h->devlock is held.
  804. */
  805. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  806. int bus, int target, int lun)
  807. {
  808. int i;
  809. struct hpsa_scsi_dev_t *sd;
  810. for (i = 0; i < h->ndevices; i++) {
  811. sd = h->dev[i];
  812. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  813. return sd;
  814. }
  815. return NULL;
  816. }
  817. /* link sdev->hostdata to our per-device structure. */
  818. static int hpsa_slave_alloc(struct scsi_device *sdev)
  819. {
  820. struct hpsa_scsi_dev_t *sd;
  821. unsigned long flags;
  822. struct ctlr_info *h;
  823. h = sdev_to_hba(sdev);
  824. spin_lock_irqsave(&h->devlock, flags);
  825. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  826. sdev_id(sdev), sdev->lun);
  827. if (sd != NULL)
  828. sdev->hostdata = sd;
  829. spin_unlock_irqrestore(&h->devlock, flags);
  830. return 0;
  831. }
  832. static void hpsa_slave_destroy(struct scsi_device *sdev)
  833. {
  834. /* nothing to do. */
  835. }
  836. static void hpsa_scsi_setup(struct ctlr_info *h)
  837. {
  838. h->ndevices = 0;
  839. h->scsi_host = NULL;
  840. spin_lock_init(&h->devlock);
  841. }
  842. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  843. {
  844. int i;
  845. if (!h->cmd_sg_list)
  846. return;
  847. for (i = 0; i < h->nr_cmds; i++) {
  848. kfree(h->cmd_sg_list[i]);
  849. h->cmd_sg_list[i] = NULL;
  850. }
  851. kfree(h->cmd_sg_list);
  852. h->cmd_sg_list = NULL;
  853. }
  854. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  855. {
  856. int i;
  857. if (h->chainsize <= 0)
  858. return 0;
  859. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  860. GFP_KERNEL);
  861. if (!h->cmd_sg_list)
  862. return -ENOMEM;
  863. for (i = 0; i < h->nr_cmds; i++) {
  864. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  865. h->chainsize, GFP_KERNEL);
  866. if (!h->cmd_sg_list[i])
  867. goto clean;
  868. }
  869. return 0;
  870. clean:
  871. hpsa_free_sg_chain_blocks(h);
  872. return -ENOMEM;
  873. }
  874. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  875. struct CommandList *c)
  876. {
  877. struct SGDescriptor *chain_sg, *chain_block;
  878. u64 temp64;
  879. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  880. chain_block = h->cmd_sg_list[c->cmdindex];
  881. chain_sg->Ext = HPSA_SG_CHAIN;
  882. chain_sg->Len = sizeof(*chain_sg) *
  883. (c->Header.SGTotal - h->max_cmd_sg_entries);
  884. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  885. PCI_DMA_TODEVICE);
  886. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  887. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  888. }
  889. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  890. struct CommandList *c)
  891. {
  892. struct SGDescriptor *chain_sg;
  893. union u64bit temp64;
  894. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  895. return;
  896. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  897. temp64.val32.lower = chain_sg->Addr.lower;
  898. temp64.val32.upper = chain_sg->Addr.upper;
  899. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  900. }
  901. static void complete_scsi_command(struct CommandList *cp,
  902. int timeout, u32 tag)
  903. {
  904. struct scsi_cmnd *cmd;
  905. struct ctlr_info *h;
  906. struct ErrorInfo *ei;
  907. unsigned char sense_key;
  908. unsigned char asc; /* additional sense code */
  909. unsigned char ascq; /* additional sense code qualifier */
  910. ei = cp->err_info;
  911. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  912. h = cp->h;
  913. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  914. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  915. hpsa_unmap_sg_chain_block(h, cp);
  916. cmd->result = (DID_OK << 16); /* host byte */
  917. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  918. cmd->result |= ei->ScsiStatus;
  919. /* copy the sense data whether we need to or not. */
  920. memcpy(cmd->sense_buffer, ei->SenseInfo,
  921. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  922. SCSI_SENSE_BUFFERSIZE :
  923. ei->SenseLen);
  924. scsi_set_resid(cmd, ei->ResidualCnt);
  925. if (ei->CommandStatus == 0) {
  926. cmd->scsi_done(cmd);
  927. cmd_free(h, cp);
  928. return;
  929. }
  930. /* an error has occurred */
  931. switch (ei->CommandStatus) {
  932. case CMD_TARGET_STATUS:
  933. if (ei->ScsiStatus) {
  934. /* Get sense key */
  935. sense_key = 0xf & ei->SenseInfo[2];
  936. /* Get additional sense code */
  937. asc = ei->SenseInfo[12];
  938. /* Get addition sense code qualifier */
  939. ascq = ei->SenseInfo[13];
  940. }
  941. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  942. if (check_for_unit_attention(h, cp)) {
  943. cmd->result = DID_SOFT_ERROR << 16;
  944. break;
  945. }
  946. if (sense_key == ILLEGAL_REQUEST) {
  947. /*
  948. * SCSI REPORT_LUNS is commonly unsupported on
  949. * Smart Array. Suppress noisy complaint.
  950. */
  951. if (cp->Request.CDB[0] == REPORT_LUNS)
  952. break;
  953. /* If ASC/ASCQ indicate Logical Unit
  954. * Not Supported condition,
  955. */
  956. if ((asc == 0x25) && (ascq == 0x0)) {
  957. dev_warn(&h->pdev->dev, "cp %p "
  958. "has check condition\n", cp);
  959. break;
  960. }
  961. }
  962. if (sense_key == NOT_READY) {
  963. /* If Sense is Not Ready, Logical Unit
  964. * Not ready, Manual Intervention
  965. * required
  966. */
  967. if ((asc == 0x04) && (ascq == 0x03)) {
  968. dev_warn(&h->pdev->dev, "cp %p "
  969. "has check condition: unit "
  970. "not ready, manual "
  971. "intervention required\n", cp);
  972. break;
  973. }
  974. }
  975. if (sense_key == ABORTED_COMMAND) {
  976. /* Aborted command is retryable */
  977. dev_warn(&h->pdev->dev, "cp %p "
  978. "has check condition: aborted command: "
  979. "ASC: 0x%x, ASCQ: 0x%x\n",
  980. cp, asc, ascq);
  981. cmd->result = DID_SOFT_ERROR << 16;
  982. break;
  983. }
  984. /* Must be some other type of check condition */
  985. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  986. "unknown type: "
  987. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  988. "Returning result: 0x%x, "
  989. "cmd=[%02x %02x %02x %02x %02x "
  990. "%02x %02x %02x %02x %02x %02x "
  991. "%02x %02x %02x %02x %02x]\n",
  992. cp, sense_key, asc, ascq,
  993. cmd->result,
  994. cmd->cmnd[0], cmd->cmnd[1],
  995. cmd->cmnd[2], cmd->cmnd[3],
  996. cmd->cmnd[4], cmd->cmnd[5],
  997. cmd->cmnd[6], cmd->cmnd[7],
  998. cmd->cmnd[8], cmd->cmnd[9],
  999. cmd->cmnd[10], cmd->cmnd[11],
  1000. cmd->cmnd[12], cmd->cmnd[13],
  1001. cmd->cmnd[14], cmd->cmnd[15]);
  1002. break;
  1003. }
  1004. /* Problem was not a check condition
  1005. * Pass it up to the upper layers...
  1006. */
  1007. if (ei->ScsiStatus) {
  1008. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1009. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1010. "Returning result: 0x%x\n",
  1011. cp, ei->ScsiStatus,
  1012. sense_key, asc, ascq,
  1013. cmd->result);
  1014. } else { /* scsi status is zero??? How??? */
  1015. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1016. "Returning no connection.\n", cp),
  1017. /* Ordinarily, this case should never happen,
  1018. * but there is a bug in some released firmware
  1019. * revisions that allows it to happen if, for
  1020. * example, a 4100 backplane loses power and
  1021. * the tape drive is in it. We assume that
  1022. * it's a fatal error of some kind because we
  1023. * can't show that it wasn't. We will make it
  1024. * look like selection timeout since that is
  1025. * the most common reason for this to occur,
  1026. * and it's severe enough.
  1027. */
  1028. cmd->result = DID_NO_CONNECT << 16;
  1029. }
  1030. break;
  1031. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1032. break;
  1033. case CMD_DATA_OVERRUN:
  1034. dev_warn(&h->pdev->dev, "cp %p has"
  1035. " completed with data overrun "
  1036. "reported\n", cp);
  1037. break;
  1038. case CMD_INVALID: {
  1039. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1040. print_cmd(cp); */
  1041. /* We get CMD_INVALID if you address a non-existent device
  1042. * instead of a selection timeout (no response). You will
  1043. * see this if you yank out a drive, then try to access it.
  1044. * This is kind of a shame because it means that any other
  1045. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1046. * missing target. */
  1047. cmd->result = DID_NO_CONNECT << 16;
  1048. }
  1049. break;
  1050. case CMD_PROTOCOL_ERR:
  1051. dev_warn(&h->pdev->dev, "cp %p has "
  1052. "protocol error \n", cp);
  1053. break;
  1054. case CMD_HARDWARE_ERR:
  1055. cmd->result = DID_ERROR << 16;
  1056. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1057. break;
  1058. case CMD_CONNECTION_LOST:
  1059. cmd->result = DID_ERROR << 16;
  1060. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1061. break;
  1062. case CMD_ABORTED:
  1063. cmd->result = DID_ABORT << 16;
  1064. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1065. cp, ei->ScsiStatus);
  1066. break;
  1067. case CMD_ABORT_FAILED:
  1068. cmd->result = DID_ERROR << 16;
  1069. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1070. break;
  1071. case CMD_UNSOLICITED_ABORT:
  1072. cmd->result = DID_RESET << 16;
  1073. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1074. "abort\n", cp);
  1075. break;
  1076. case CMD_TIMEOUT:
  1077. cmd->result = DID_TIME_OUT << 16;
  1078. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1079. break;
  1080. case CMD_UNABORTABLE:
  1081. cmd->result = DID_ERROR << 16;
  1082. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1083. break;
  1084. default:
  1085. cmd->result = DID_ERROR << 16;
  1086. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1087. cp, ei->CommandStatus);
  1088. }
  1089. cmd->scsi_done(cmd);
  1090. cmd_free(h, cp);
  1091. }
  1092. static int hpsa_scsi_detect(struct ctlr_info *h)
  1093. {
  1094. struct Scsi_Host *sh;
  1095. int error;
  1096. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1097. if (sh == NULL)
  1098. goto fail;
  1099. sh->io_port = 0;
  1100. sh->n_io_port = 0;
  1101. sh->this_id = -1;
  1102. sh->max_channel = 3;
  1103. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1104. sh->max_lun = HPSA_MAX_LUN;
  1105. sh->max_id = HPSA_MAX_LUN;
  1106. sh->can_queue = h->nr_cmds;
  1107. sh->cmd_per_lun = h->nr_cmds;
  1108. sh->sg_tablesize = h->maxsgentries;
  1109. h->scsi_host = sh;
  1110. sh->hostdata[0] = (unsigned long) h;
  1111. sh->irq = h->intr[h->intr_mode];
  1112. sh->unique_id = sh->irq;
  1113. error = scsi_add_host(sh, &h->pdev->dev);
  1114. if (error)
  1115. goto fail_host_put;
  1116. scsi_scan_host(sh);
  1117. return 0;
  1118. fail_host_put:
  1119. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1120. " failed for controller %d\n", h->ctlr);
  1121. scsi_host_put(sh);
  1122. return error;
  1123. fail:
  1124. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1125. " failed for controller %d\n", h->ctlr);
  1126. return -ENOMEM;
  1127. }
  1128. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1129. struct CommandList *c, int sg_used, int data_direction)
  1130. {
  1131. int i;
  1132. union u64bit addr64;
  1133. for (i = 0; i < sg_used; i++) {
  1134. addr64.val32.lower = c->SG[i].Addr.lower;
  1135. addr64.val32.upper = c->SG[i].Addr.upper;
  1136. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1137. data_direction);
  1138. }
  1139. }
  1140. static void hpsa_map_one(struct pci_dev *pdev,
  1141. struct CommandList *cp,
  1142. unsigned char *buf,
  1143. size_t buflen,
  1144. int data_direction)
  1145. {
  1146. u64 addr64;
  1147. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1148. cp->Header.SGList = 0;
  1149. cp->Header.SGTotal = 0;
  1150. return;
  1151. }
  1152. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1153. cp->SG[0].Addr.lower =
  1154. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1155. cp->SG[0].Addr.upper =
  1156. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1157. cp->SG[0].Len = buflen;
  1158. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1159. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1160. }
  1161. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1162. struct CommandList *c)
  1163. {
  1164. DECLARE_COMPLETION_ONSTACK(wait);
  1165. c->waiting = &wait;
  1166. enqueue_cmd_and_start_io(h, c);
  1167. wait_for_completion(&wait);
  1168. }
  1169. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1170. struct CommandList *c, int data_direction)
  1171. {
  1172. int retry_count = 0;
  1173. do {
  1174. memset(c->err_info, 0, sizeof(c->err_info));
  1175. hpsa_scsi_do_simple_cmd_core(h, c);
  1176. retry_count++;
  1177. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1178. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1179. }
  1180. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1181. {
  1182. struct ErrorInfo *ei;
  1183. struct device *d = &cp->h->pdev->dev;
  1184. ei = cp->err_info;
  1185. switch (ei->CommandStatus) {
  1186. case CMD_TARGET_STATUS:
  1187. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1188. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1189. ei->ScsiStatus);
  1190. if (ei->ScsiStatus == 0)
  1191. dev_warn(d, "SCSI status is abnormally zero. "
  1192. "(probably indicates selection timeout "
  1193. "reported incorrectly due to a known "
  1194. "firmware bug, circa July, 2001.)\n");
  1195. break;
  1196. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1197. dev_info(d, "UNDERRUN\n");
  1198. break;
  1199. case CMD_DATA_OVERRUN:
  1200. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1201. break;
  1202. case CMD_INVALID: {
  1203. /* controller unfortunately reports SCSI passthru's
  1204. * to non-existent targets as invalid commands.
  1205. */
  1206. dev_warn(d, "cp %p is reported invalid (probably means "
  1207. "target device no longer present)\n", cp);
  1208. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1209. print_cmd(cp); */
  1210. }
  1211. break;
  1212. case CMD_PROTOCOL_ERR:
  1213. dev_warn(d, "cp %p has protocol error \n", cp);
  1214. break;
  1215. case CMD_HARDWARE_ERR:
  1216. /* cmd->result = DID_ERROR << 16; */
  1217. dev_warn(d, "cp %p had hardware error\n", cp);
  1218. break;
  1219. case CMD_CONNECTION_LOST:
  1220. dev_warn(d, "cp %p had connection lost\n", cp);
  1221. break;
  1222. case CMD_ABORTED:
  1223. dev_warn(d, "cp %p was aborted\n", cp);
  1224. break;
  1225. case CMD_ABORT_FAILED:
  1226. dev_warn(d, "cp %p reports abort failed\n", cp);
  1227. break;
  1228. case CMD_UNSOLICITED_ABORT:
  1229. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1230. break;
  1231. case CMD_TIMEOUT:
  1232. dev_warn(d, "cp %p timed out\n", cp);
  1233. break;
  1234. case CMD_UNABORTABLE:
  1235. dev_warn(d, "Command unabortable\n");
  1236. break;
  1237. default:
  1238. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1239. ei->CommandStatus);
  1240. }
  1241. }
  1242. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1243. unsigned char page, unsigned char *buf,
  1244. unsigned char bufsize)
  1245. {
  1246. int rc = IO_OK;
  1247. struct CommandList *c;
  1248. struct ErrorInfo *ei;
  1249. c = cmd_special_alloc(h);
  1250. if (c == NULL) { /* trouble... */
  1251. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1252. return -ENOMEM;
  1253. }
  1254. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1255. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1256. ei = c->err_info;
  1257. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1258. hpsa_scsi_interpret_error(c);
  1259. rc = -1;
  1260. }
  1261. cmd_special_free(h, c);
  1262. return rc;
  1263. }
  1264. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1265. {
  1266. int rc = IO_OK;
  1267. struct CommandList *c;
  1268. struct ErrorInfo *ei;
  1269. c = cmd_special_alloc(h);
  1270. if (c == NULL) { /* trouble... */
  1271. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1272. return -ENOMEM;
  1273. }
  1274. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1275. hpsa_scsi_do_simple_cmd_core(h, c);
  1276. /* no unmap needed here because no data xfer. */
  1277. ei = c->err_info;
  1278. if (ei->CommandStatus != 0) {
  1279. hpsa_scsi_interpret_error(c);
  1280. rc = -1;
  1281. }
  1282. cmd_special_free(h, c);
  1283. return rc;
  1284. }
  1285. static void hpsa_get_raid_level(struct ctlr_info *h,
  1286. unsigned char *scsi3addr, unsigned char *raid_level)
  1287. {
  1288. int rc;
  1289. unsigned char *buf;
  1290. *raid_level = RAID_UNKNOWN;
  1291. buf = kzalloc(64, GFP_KERNEL);
  1292. if (!buf)
  1293. return;
  1294. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1295. if (rc == 0)
  1296. *raid_level = buf[8];
  1297. if (*raid_level > RAID_UNKNOWN)
  1298. *raid_level = RAID_UNKNOWN;
  1299. kfree(buf);
  1300. return;
  1301. }
  1302. /* Get the device id from inquiry page 0x83 */
  1303. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1304. unsigned char *device_id, int buflen)
  1305. {
  1306. int rc;
  1307. unsigned char *buf;
  1308. if (buflen > 16)
  1309. buflen = 16;
  1310. buf = kzalloc(64, GFP_KERNEL);
  1311. if (!buf)
  1312. return -1;
  1313. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1314. if (rc == 0)
  1315. memcpy(device_id, &buf[8], buflen);
  1316. kfree(buf);
  1317. return rc != 0;
  1318. }
  1319. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1320. struct ReportLUNdata *buf, int bufsize,
  1321. int extended_response)
  1322. {
  1323. int rc = IO_OK;
  1324. struct CommandList *c;
  1325. unsigned char scsi3addr[8];
  1326. struct ErrorInfo *ei;
  1327. c = cmd_special_alloc(h);
  1328. if (c == NULL) { /* trouble... */
  1329. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1330. return -1;
  1331. }
  1332. /* address the controller */
  1333. memset(scsi3addr, 0, sizeof(scsi3addr));
  1334. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1335. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1336. if (extended_response)
  1337. c->Request.CDB[1] = extended_response;
  1338. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1339. ei = c->err_info;
  1340. if (ei->CommandStatus != 0 &&
  1341. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1342. hpsa_scsi_interpret_error(c);
  1343. rc = -1;
  1344. }
  1345. cmd_special_free(h, c);
  1346. return rc;
  1347. }
  1348. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1349. struct ReportLUNdata *buf,
  1350. int bufsize, int extended_response)
  1351. {
  1352. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1353. }
  1354. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1355. struct ReportLUNdata *buf, int bufsize)
  1356. {
  1357. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1358. }
  1359. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1360. int bus, int target, int lun)
  1361. {
  1362. device->bus = bus;
  1363. device->target = target;
  1364. device->lun = lun;
  1365. }
  1366. static int hpsa_update_device_info(struct ctlr_info *h,
  1367. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1368. {
  1369. #define OBDR_TAPE_INQ_SIZE 49
  1370. unsigned char *inq_buff;
  1371. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1372. if (!inq_buff)
  1373. goto bail_out;
  1374. /* Do an inquiry to the device to see what it is. */
  1375. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1376. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1377. /* Inquiry failed (msg printed already) */
  1378. dev_err(&h->pdev->dev,
  1379. "hpsa_update_device_info: inquiry failed\n");
  1380. goto bail_out;
  1381. }
  1382. this_device->devtype = (inq_buff[0] & 0x1f);
  1383. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1384. memcpy(this_device->vendor, &inq_buff[8],
  1385. sizeof(this_device->vendor));
  1386. memcpy(this_device->model, &inq_buff[16],
  1387. sizeof(this_device->model));
  1388. memset(this_device->device_id, 0,
  1389. sizeof(this_device->device_id));
  1390. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1391. sizeof(this_device->device_id));
  1392. if (this_device->devtype == TYPE_DISK &&
  1393. is_logical_dev_addr_mode(scsi3addr))
  1394. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1395. else
  1396. this_device->raid_level = RAID_UNKNOWN;
  1397. kfree(inq_buff);
  1398. return 0;
  1399. bail_out:
  1400. kfree(inq_buff);
  1401. return 1;
  1402. }
  1403. static unsigned char *msa2xxx_model[] = {
  1404. "MSA2012",
  1405. "MSA2024",
  1406. "MSA2312",
  1407. "MSA2324",
  1408. NULL,
  1409. };
  1410. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1411. {
  1412. int i;
  1413. for (i = 0; msa2xxx_model[i]; i++)
  1414. if (strncmp(device->model, msa2xxx_model[i],
  1415. strlen(msa2xxx_model[i])) == 0)
  1416. return 1;
  1417. return 0;
  1418. }
  1419. /* Helper function to assign bus, target, lun mapping of devices.
  1420. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1421. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1422. * Logical drive target and lun are assigned at this time, but
  1423. * physical device lun and target assignment are deferred (assigned
  1424. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1425. */
  1426. static void figure_bus_target_lun(struct ctlr_info *h,
  1427. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1428. struct hpsa_scsi_dev_t *device)
  1429. {
  1430. u32 lunid;
  1431. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1432. /* logical device */
  1433. if (unlikely(is_scsi_rev_5(h))) {
  1434. /* p1210m, logical drives lun assignments
  1435. * match SCSI REPORT LUNS data.
  1436. */
  1437. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1438. *bus = 0;
  1439. *target = 0;
  1440. *lun = (lunid & 0x3fff) + 1;
  1441. } else {
  1442. /* not p1210m... */
  1443. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1444. if (is_msa2xxx(h, device)) {
  1445. /* msa2xxx way, put logicals on bus 1
  1446. * and match target/lun numbers box
  1447. * reports.
  1448. */
  1449. *bus = 1;
  1450. *target = (lunid >> 16) & 0x3fff;
  1451. *lun = lunid & 0x00ff;
  1452. } else {
  1453. /* Traditional smart array way. */
  1454. *bus = 0;
  1455. *lun = 0;
  1456. *target = lunid & 0x3fff;
  1457. }
  1458. }
  1459. } else {
  1460. /* physical device */
  1461. if (is_hba_lunid(lunaddrbytes))
  1462. if (unlikely(is_scsi_rev_5(h))) {
  1463. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1464. *target = 0;
  1465. *lun = 0;
  1466. return;
  1467. } else
  1468. *bus = 3; /* traditional smartarray */
  1469. else
  1470. *bus = 2; /* physical disk */
  1471. *target = -1;
  1472. *lun = -1; /* we will fill these in later. */
  1473. }
  1474. }
  1475. /*
  1476. * If there is no lun 0 on a target, linux won't find any devices.
  1477. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1478. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1479. * it for some reason. *tmpdevice is the target we're adding,
  1480. * this_device is a pointer into the current element of currentsd[]
  1481. * that we're building up in update_scsi_devices(), below.
  1482. * lunzerobits is a bitmap that tracks which targets already have a
  1483. * lun 0 assigned.
  1484. * Returns 1 if an enclosure was added, 0 if not.
  1485. */
  1486. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1487. struct hpsa_scsi_dev_t *tmpdevice,
  1488. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1489. int bus, int target, int lun, unsigned long lunzerobits[],
  1490. int *nmsa2xxx_enclosures)
  1491. {
  1492. unsigned char scsi3addr[8];
  1493. if (test_bit(target, lunzerobits))
  1494. return 0; /* There is already a lun 0 on this target. */
  1495. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1496. return 0; /* It's the logical targets that may lack lun 0. */
  1497. if (!is_msa2xxx(h, tmpdevice))
  1498. return 0; /* It's only the MSA2xxx that have this problem. */
  1499. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1500. return 0;
  1501. memset(scsi3addr, 0, 8);
  1502. scsi3addr[3] = target;
  1503. if (is_hba_lunid(scsi3addr))
  1504. return 0; /* Don't add the RAID controller here. */
  1505. if (is_scsi_rev_5(h))
  1506. return 0; /* p1210m doesn't need to do this. */
  1507. #define MAX_MSA2XXX_ENCLOSURES 32
  1508. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1509. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1510. "enclosures exceeded. Check your hardware "
  1511. "configuration.");
  1512. return 0;
  1513. }
  1514. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1515. return 0;
  1516. (*nmsa2xxx_enclosures)++;
  1517. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1518. set_bit(target, lunzerobits);
  1519. return 1;
  1520. }
  1521. /*
  1522. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1523. * logdev. The number of luns in physdev and logdev are returned in
  1524. * *nphysicals and *nlogicals, respectively.
  1525. * Returns 0 on success, -1 otherwise.
  1526. */
  1527. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1528. int reportlunsize,
  1529. struct ReportLUNdata *physdev, u32 *nphysicals,
  1530. struct ReportLUNdata *logdev, u32 *nlogicals)
  1531. {
  1532. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1533. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1534. return -1;
  1535. }
  1536. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1537. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1538. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1539. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1540. *nphysicals - HPSA_MAX_PHYS_LUN);
  1541. *nphysicals = HPSA_MAX_PHYS_LUN;
  1542. }
  1543. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1544. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1545. return -1;
  1546. }
  1547. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1548. /* Reject Logicals in excess of our max capability. */
  1549. if (*nlogicals > HPSA_MAX_LUN) {
  1550. dev_warn(&h->pdev->dev,
  1551. "maximum logical LUNs (%d) exceeded. "
  1552. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1553. *nlogicals - HPSA_MAX_LUN);
  1554. *nlogicals = HPSA_MAX_LUN;
  1555. }
  1556. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1557. dev_warn(&h->pdev->dev,
  1558. "maximum logical + physical LUNs (%d) exceeded. "
  1559. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1560. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1561. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1562. }
  1563. return 0;
  1564. }
  1565. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1566. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1567. struct ReportLUNdata *logdev_list)
  1568. {
  1569. /* Helper function, figure out where the LUN ID info is coming from
  1570. * given index i, lists of physical and logical devices, where in
  1571. * the list the raid controller is supposed to appear (first or last)
  1572. */
  1573. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1574. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1575. if (i == raid_ctlr_position)
  1576. return RAID_CTLR_LUNID;
  1577. if (i < logicals_start)
  1578. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1579. if (i < last_device)
  1580. return &logdev_list->LUN[i - nphysicals -
  1581. (raid_ctlr_position == 0)][0];
  1582. BUG();
  1583. return NULL;
  1584. }
  1585. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1586. {
  1587. /* the idea here is we could get notified
  1588. * that some devices have changed, so we do a report
  1589. * physical luns and report logical luns cmd, and adjust
  1590. * our list of devices accordingly.
  1591. *
  1592. * The scsi3addr's of devices won't change so long as the
  1593. * adapter is not reset. That means we can rescan and
  1594. * tell which devices we already know about, vs. new
  1595. * devices, vs. disappearing devices.
  1596. */
  1597. struct ReportLUNdata *physdev_list = NULL;
  1598. struct ReportLUNdata *logdev_list = NULL;
  1599. unsigned char *inq_buff = NULL;
  1600. u32 nphysicals = 0;
  1601. u32 nlogicals = 0;
  1602. u32 ndev_allocated = 0;
  1603. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1604. int ncurrent = 0;
  1605. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1606. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1607. int bus, target, lun;
  1608. int raid_ctlr_position;
  1609. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1610. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1611. GFP_KERNEL);
  1612. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1613. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1614. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1615. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1616. if (!currentsd || !physdev_list || !logdev_list ||
  1617. !inq_buff || !tmpdevice) {
  1618. dev_err(&h->pdev->dev, "out of memory\n");
  1619. goto out;
  1620. }
  1621. memset(lunzerobits, 0, sizeof(lunzerobits));
  1622. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1623. logdev_list, &nlogicals))
  1624. goto out;
  1625. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1626. * but each of them 4 times through different paths. The plus 1
  1627. * is for the RAID controller.
  1628. */
  1629. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1630. /* Allocate the per device structures */
  1631. for (i = 0; i < ndevs_to_allocate; i++) {
  1632. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1633. if (!currentsd[i]) {
  1634. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1635. __FILE__, __LINE__);
  1636. goto out;
  1637. }
  1638. ndev_allocated++;
  1639. }
  1640. if (unlikely(is_scsi_rev_5(h)))
  1641. raid_ctlr_position = 0;
  1642. else
  1643. raid_ctlr_position = nphysicals + nlogicals;
  1644. /* adjust our table of devices */
  1645. nmsa2xxx_enclosures = 0;
  1646. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1647. u8 *lunaddrbytes;
  1648. /* Figure out where the LUN ID info is coming from */
  1649. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1650. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1651. /* skip masked physical devices. */
  1652. if (lunaddrbytes[3] & 0xC0 &&
  1653. i < nphysicals + (raid_ctlr_position == 0))
  1654. continue;
  1655. /* Get device type, vendor, model, device id */
  1656. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1657. continue; /* skip it if we can't talk to it. */
  1658. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1659. tmpdevice);
  1660. this_device = currentsd[ncurrent];
  1661. /*
  1662. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1663. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1664. * is nonetheless an enclosure device there. We have to
  1665. * present that otherwise linux won't find anything if
  1666. * there is no lun 0.
  1667. */
  1668. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1669. lunaddrbytes, bus, target, lun, lunzerobits,
  1670. &nmsa2xxx_enclosures)) {
  1671. ncurrent++;
  1672. this_device = currentsd[ncurrent];
  1673. }
  1674. *this_device = *tmpdevice;
  1675. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1676. switch (this_device->devtype) {
  1677. case TYPE_ROM: {
  1678. /* We don't *really* support actual CD-ROM devices,
  1679. * just "One Button Disaster Recovery" tape drive
  1680. * which temporarily pretends to be a CD-ROM drive.
  1681. * So we check that the device is really an OBDR tape
  1682. * device by checking for "$DR-10" in bytes 43-48 of
  1683. * the inquiry data.
  1684. */
  1685. char obdr_sig[7];
  1686. #define OBDR_TAPE_SIG "$DR-10"
  1687. strncpy(obdr_sig, &inq_buff[43], 6);
  1688. obdr_sig[6] = '\0';
  1689. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1690. /* Not OBDR device, ignore it. */
  1691. break;
  1692. }
  1693. ncurrent++;
  1694. break;
  1695. case TYPE_DISK:
  1696. if (i < nphysicals)
  1697. break;
  1698. ncurrent++;
  1699. break;
  1700. case TYPE_TAPE:
  1701. case TYPE_MEDIUM_CHANGER:
  1702. ncurrent++;
  1703. break;
  1704. case TYPE_RAID:
  1705. /* Only present the Smartarray HBA as a RAID controller.
  1706. * If it's a RAID controller other than the HBA itself
  1707. * (an external RAID controller, MSA500 or similar)
  1708. * don't present it.
  1709. */
  1710. if (!is_hba_lunid(lunaddrbytes))
  1711. break;
  1712. ncurrent++;
  1713. break;
  1714. default:
  1715. break;
  1716. }
  1717. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1718. break;
  1719. }
  1720. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1721. out:
  1722. kfree(tmpdevice);
  1723. for (i = 0; i < ndev_allocated; i++)
  1724. kfree(currentsd[i]);
  1725. kfree(currentsd);
  1726. kfree(inq_buff);
  1727. kfree(physdev_list);
  1728. kfree(logdev_list);
  1729. }
  1730. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1731. * dma mapping and fills in the scatter gather entries of the
  1732. * hpsa command, cp.
  1733. */
  1734. static int hpsa_scatter_gather(struct ctlr_info *h,
  1735. struct CommandList *cp,
  1736. struct scsi_cmnd *cmd)
  1737. {
  1738. unsigned int len;
  1739. struct scatterlist *sg;
  1740. u64 addr64;
  1741. int use_sg, i, sg_index, chained;
  1742. struct SGDescriptor *curr_sg;
  1743. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1744. use_sg = scsi_dma_map(cmd);
  1745. if (use_sg < 0)
  1746. return use_sg;
  1747. if (!use_sg)
  1748. goto sglist_finished;
  1749. curr_sg = cp->SG;
  1750. chained = 0;
  1751. sg_index = 0;
  1752. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1753. if (i == h->max_cmd_sg_entries - 1 &&
  1754. use_sg > h->max_cmd_sg_entries) {
  1755. chained = 1;
  1756. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1757. sg_index = 0;
  1758. }
  1759. addr64 = (u64) sg_dma_address(sg);
  1760. len = sg_dma_len(sg);
  1761. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1762. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1763. curr_sg->Len = len;
  1764. curr_sg->Ext = 0; /* we are not chaining */
  1765. curr_sg++;
  1766. }
  1767. if (use_sg + chained > h->maxSG)
  1768. h->maxSG = use_sg + chained;
  1769. if (chained) {
  1770. cp->Header.SGList = h->max_cmd_sg_entries;
  1771. cp->Header.SGTotal = (u16) (use_sg + 1);
  1772. hpsa_map_sg_chain_block(h, cp);
  1773. return 0;
  1774. }
  1775. sglist_finished:
  1776. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1777. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1778. return 0;
  1779. }
  1780. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1781. void (*done)(struct scsi_cmnd *))
  1782. {
  1783. struct ctlr_info *h;
  1784. struct hpsa_scsi_dev_t *dev;
  1785. unsigned char scsi3addr[8];
  1786. struct CommandList *c;
  1787. unsigned long flags;
  1788. /* Get the ptr to our adapter structure out of cmd->host. */
  1789. h = sdev_to_hba(cmd->device);
  1790. dev = cmd->device->hostdata;
  1791. if (!dev) {
  1792. cmd->result = DID_NO_CONNECT << 16;
  1793. done(cmd);
  1794. return 0;
  1795. }
  1796. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1797. /* Need a lock as this is being allocated from the pool */
  1798. spin_lock_irqsave(&h->lock, flags);
  1799. c = cmd_alloc(h);
  1800. spin_unlock_irqrestore(&h->lock, flags);
  1801. if (c == NULL) { /* trouble... */
  1802. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1803. return SCSI_MLQUEUE_HOST_BUSY;
  1804. }
  1805. /* Fill in the command list header */
  1806. cmd->scsi_done = done; /* save this for use by completion code */
  1807. /* save c in case we have to abort it */
  1808. cmd->host_scribble = (unsigned char *) c;
  1809. c->cmd_type = CMD_SCSI;
  1810. c->scsi_cmd = cmd;
  1811. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1812. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1813. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1814. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1815. /* Fill in the request block... */
  1816. c->Request.Timeout = 0;
  1817. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1818. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1819. c->Request.CDBLen = cmd->cmd_len;
  1820. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1821. c->Request.Type.Type = TYPE_CMD;
  1822. c->Request.Type.Attribute = ATTR_SIMPLE;
  1823. switch (cmd->sc_data_direction) {
  1824. case DMA_TO_DEVICE:
  1825. c->Request.Type.Direction = XFER_WRITE;
  1826. break;
  1827. case DMA_FROM_DEVICE:
  1828. c->Request.Type.Direction = XFER_READ;
  1829. break;
  1830. case DMA_NONE:
  1831. c->Request.Type.Direction = XFER_NONE;
  1832. break;
  1833. case DMA_BIDIRECTIONAL:
  1834. /* This can happen if a buggy application does a scsi passthru
  1835. * and sets both inlen and outlen to non-zero. ( see
  1836. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1837. */
  1838. c->Request.Type.Direction = XFER_RSVD;
  1839. /* This is technically wrong, and hpsa controllers should
  1840. * reject it with CMD_INVALID, which is the most correct
  1841. * response, but non-fibre backends appear to let it
  1842. * slide by, and give the same results as if this field
  1843. * were set correctly. Either way is acceptable for
  1844. * our purposes here.
  1845. */
  1846. break;
  1847. default:
  1848. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1849. cmd->sc_data_direction);
  1850. BUG();
  1851. break;
  1852. }
  1853. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1854. cmd_free(h, c);
  1855. return SCSI_MLQUEUE_HOST_BUSY;
  1856. }
  1857. enqueue_cmd_and_start_io(h, c);
  1858. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1859. return 0;
  1860. }
  1861. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1862. static void hpsa_scan_start(struct Scsi_Host *sh)
  1863. {
  1864. struct ctlr_info *h = shost_to_hba(sh);
  1865. unsigned long flags;
  1866. /* wait until any scan already in progress is finished. */
  1867. while (1) {
  1868. spin_lock_irqsave(&h->scan_lock, flags);
  1869. if (h->scan_finished)
  1870. break;
  1871. spin_unlock_irqrestore(&h->scan_lock, flags);
  1872. wait_event(h->scan_wait_queue, h->scan_finished);
  1873. /* Note: We don't need to worry about a race between this
  1874. * thread and driver unload because the midlayer will
  1875. * have incremented the reference count, so unload won't
  1876. * happen if we're in here.
  1877. */
  1878. }
  1879. h->scan_finished = 0; /* mark scan as in progress */
  1880. spin_unlock_irqrestore(&h->scan_lock, flags);
  1881. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1882. spin_lock_irqsave(&h->scan_lock, flags);
  1883. h->scan_finished = 1; /* mark scan as finished. */
  1884. wake_up_all(&h->scan_wait_queue);
  1885. spin_unlock_irqrestore(&h->scan_lock, flags);
  1886. }
  1887. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1888. unsigned long elapsed_time)
  1889. {
  1890. struct ctlr_info *h = shost_to_hba(sh);
  1891. unsigned long flags;
  1892. int finished;
  1893. spin_lock_irqsave(&h->scan_lock, flags);
  1894. finished = h->scan_finished;
  1895. spin_unlock_irqrestore(&h->scan_lock, flags);
  1896. return finished;
  1897. }
  1898. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1899. int qdepth, int reason)
  1900. {
  1901. struct ctlr_info *h = sdev_to_hba(sdev);
  1902. if (reason != SCSI_QDEPTH_DEFAULT)
  1903. return -ENOTSUPP;
  1904. if (qdepth < 1)
  1905. qdepth = 1;
  1906. else
  1907. if (qdepth > h->nr_cmds)
  1908. qdepth = h->nr_cmds;
  1909. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1910. return sdev->queue_depth;
  1911. }
  1912. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1913. {
  1914. /* we are being forcibly unloaded, and may not refuse. */
  1915. scsi_remove_host(h->scsi_host);
  1916. scsi_host_put(h->scsi_host);
  1917. h->scsi_host = NULL;
  1918. }
  1919. static int hpsa_register_scsi(struct ctlr_info *h)
  1920. {
  1921. int rc;
  1922. rc = hpsa_scsi_detect(h);
  1923. if (rc != 0)
  1924. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1925. " hpsa_scsi_detect(), rc is %d\n", rc);
  1926. return rc;
  1927. }
  1928. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1929. unsigned char lunaddr[])
  1930. {
  1931. int rc = 0;
  1932. int count = 0;
  1933. int waittime = 1; /* seconds */
  1934. struct CommandList *c;
  1935. c = cmd_special_alloc(h);
  1936. if (!c) {
  1937. dev_warn(&h->pdev->dev, "out of memory in "
  1938. "wait_for_device_to_become_ready.\n");
  1939. return IO_ERROR;
  1940. }
  1941. /* Send test unit ready until device ready, or give up. */
  1942. while (count < HPSA_TUR_RETRY_LIMIT) {
  1943. /* Wait for a bit. do this first, because if we send
  1944. * the TUR right away, the reset will just abort it.
  1945. */
  1946. msleep(1000 * waittime);
  1947. count++;
  1948. /* Increase wait time with each try, up to a point. */
  1949. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1950. waittime = waittime * 2;
  1951. /* Send the Test Unit Ready */
  1952. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1953. hpsa_scsi_do_simple_cmd_core(h, c);
  1954. /* no unmap needed here because no data xfer. */
  1955. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1956. break;
  1957. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1958. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1959. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1960. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1961. break;
  1962. dev_warn(&h->pdev->dev, "waiting %d secs "
  1963. "for device to become ready.\n", waittime);
  1964. rc = 1; /* device not ready. */
  1965. }
  1966. if (rc)
  1967. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1968. else
  1969. dev_warn(&h->pdev->dev, "device is ready.\n");
  1970. cmd_special_free(h, c);
  1971. return rc;
  1972. }
  1973. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1974. * complaining. Doing a host- or bus-reset can't do anything good here.
  1975. */
  1976. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1977. {
  1978. int rc;
  1979. struct ctlr_info *h;
  1980. struct hpsa_scsi_dev_t *dev;
  1981. /* find the controller to which the command to be aborted was sent */
  1982. h = sdev_to_hba(scsicmd->device);
  1983. if (h == NULL) /* paranoia */
  1984. return FAILED;
  1985. dev = scsicmd->device->hostdata;
  1986. if (!dev) {
  1987. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1988. "device lookup failed.\n");
  1989. return FAILED;
  1990. }
  1991. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1992. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1993. /* send a reset to the SCSI LUN which the command was sent to */
  1994. rc = hpsa_send_reset(h, dev->scsi3addr);
  1995. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1996. return SUCCESS;
  1997. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1998. return FAILED;
  1999. }
  2000. /*
  2001. * For operations that cannot sleep, a command block is allocated at init,
  2002. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2003. * which ones are free or in use. Lock must be held when calling this.
  2004. * cmd_free() is the complement.
  2005. */
  2006. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2007. {
  2008. struct CommandList *c;
  2009. int i;
  2010. union u64bit temp64;
  2011. dma_addr_t cmd_dma_handle, err_dma_handle;
  2012. do {
  2013. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2014. if (i == h->nr_cmds)
  2015. return NULL;
  2016. } while (test_and_set_bit
  2017. (i & (BITS_PER_LONG - 1),
  2018. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2019. c = h->cmd_pool + i;
  2020. memset(c, 0, sizeof(*c));
  2021. cmd_dma_handle = h->cmd_pool_dhandle
  2022. + i * sizeof(*c);
  2023. c->err_info = h->errinfo_pool + i;
  2024. memset(c->err_info, 0, sizeof(*c->err_info));
  2025. err_dma_handle = h->errinfo_pool_dhandle
  2026. + i * sizeof(*c->err_info);
  2027. h->nr_allocs++;
  2028. c->cmdindex = i;
  2029. INIT_LIST_HEAD(&c->list);
  2030. c->busaddr = (u32) cmd_dma_handle;
  2031. temp64.val = (u64) err_dma_handle;
  2032. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2033. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2034. c->ErrDesc.Len = sizeof(*c->err_info);
  2035. c->h = h;
  2036. return c;
  2037. }
  2038. /* For operations that can wait for kmalloc to possibly sleep,
  2039. * this routine can be called. Lock need not be held to call
  2040. * cmd_special_alloc. cmd_special_free() is the complement.
  2041. */
  2042. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2043. {
  2044. struct CommandList *c;
  2045. union u64bit temp64;
  2046. dma_addr_t cmd_dma_handle, err_dma_handle;
  2047. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2048. if (c == NULL)
  2049. return NULL;
  2050. memset(c, 0, sizeof(*c));
  2051. c->cmdindex = -1;
  2052. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2053. &err_dma_handle);
  2054. if (c->err_info == NULL) {
  2055. pci_free_consistent(h->pdev,
  2056. sizeof(*c), c, cmd_dma_handle);
  2057. return NULL;
  2058. }
  2059. memset(c->err_info, 0, sizeof(*c->err_info));
  2060. INIT_LIST_HEAD(&c->list);
  2061. c->busaddr = (u32) cmd_dma_handle;
  2062. temp64.val = (u64) err_dma_handle;
  2063. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2064. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2065. c->ErrDesc.Len = sizeof(*c->err_info);
  2066. c->h = h;
  2067. return c;
  2068. }
  2069. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2070. {
  2071. int i;
  2072. i = c - h->cmd_pool;
  2073. clear_bit(i & (BITS_PER_LONG - 1),
  2074. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2075. h->nr_frees++;
  2076. }
  2077. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2078. {
  2079. union u64bit temp64;
  2080. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2081. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2082. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2083. c->err_info, (dma_addr_t) temp64.val);
  2084. pci_free_consistent(h->pdev, sizeof(*c),
  2085. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2086. }
  2087. #ifdef CONFIG_COMPAT
  2088. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2089. {
  2090. IOCTL32_Command_struct __user *arg32 =
  2091. (IOCTL32_Command_struct __user *) arg;
  2092. IOCTL_Command_struct arg64;
  2093. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2094. int err;
  2095. u32 cp;
  2096. memset(&arg64, 0, sizeof(arg64));
  2097. err = 0;
  2098. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2099. sizeof(arg64.LUN_info));
  2100. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2101. sizeof(arg64.Request));
  2102. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2103. sizeof(arg64.error_info));
  2104. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2105. err |= get_user(cp, &arg32->buf);
  2106. arg64.buf = compat_ptr(cp);
  2107. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2108. if (err)
  2109. return -EFAULT;
  2110. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2111. if (err)
  2112. return err;
  2113. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2114. sizeof(arg32->error_info));
  2115. if (err)
  2116. return -EFAULT;
  2117. return err;
  2118. }
  2119. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2120. int cmd, void *arg)
  2121. {
  2122. BIG_IOCTL32_Command_struct __user *arg32 =
  2123. (BIG_IOCTL32_Command_struct __user *) arg;
  2124. BIG_IOCTL_Command_struct arg64;
  2125. BIG_IOCTL_Command_struct __user *p =
  2126. compat_alloc_user_space(sizeof(arg64));
  2127. int err;
  2128. u32 cp;
  2129. memset(&arg64, 0, sizeof(arg64));
  2130. err = 0;
  2131. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2132. sizeof(arg64.LUN_info));
  2133. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2134. sizeof(arg64.Request));
  2135. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2136. sizeof(arg64.error_info));
  2137. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2138. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2139. err |= get_user(cp, &arg32->buf);
  2140. arg64.buf = compat_ptr(cp);
  2141. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2142. if (err)
  2143. return -EFAULT;
  2144. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2145. if (err)
  2146. return err;
  2147. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2148. sizeof(arg32->error_info));
  2149. if (err)
  2150. return -EFAULT;
  2151. return err;
  2152. }
  2153. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2154. {
  2155. switch (cmd) {
  2156. case CCISS_GETPCIINFO:
  2157. case CCISS_GETINTINFO:
  2158. case CCISS_SETINTINFO:
  2159. case CCISS_GETNODENAME:
  2160. case CCISS_SETNODENAME:
  2161. case CCISS_GETHEARTBEAT:
  2162. case CCISS_GETBUSTYPES:
  2163. case CCISS_GETFIRMVER:
  2164. case CCISS_GETDRIVVER:
  2165. case CCISS_REVALIDVOLS:
  2166. case CCISS_DEREGDISK:
  2167. case CCISS_REGNEWDISK:
  2168. case CCISS_REGNEWD:
  2169. case CCISS_RESCANDISK:
  2170. case CCISS_GETLUNINFO:
  2171. return hpsa_ioctl(dev, cmd, arg);
  2172. case CCISS_PASSTHRU32:
  2173. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2174. case CCISS_BIG_PASSTHRU32:
  2175. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2176. default:
  2177. return -ENOIOCTLCMD;
  2178. }
  2179. }
  2180. #endif
  2181. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2182. {
  2183. struct hpsa_pci_info pciinfo;
  2184. if (!argp)
  2185. return -EINVAL;
  2186. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2187. pciinfo.bus = h->pdev->bus->number;
  2188. pciinfo.dev_fn = h->pdev->devfn;
  2189. pciinfo.board_id = h->board_id;
  2190. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2191. return -EFAULT;
  2192. return 0;
  2193. }
  2194. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2195. {
  2196. DriverVer_type DriverVer;
  2197. unsigned char vmaj, vmin, vsubmin;
  2198. int rc;
  2199. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2200. &vmaj, &vmin, &vsubmin);
  2201. if (rc != 3) {
  2202. dev_info(&h->pdev->dev, "driver version string '%s' "
  2203. "unrecognized.", HPSA_DRIVER_VERSION);
  2204. vmaj = 0;
  2205. vmin = 0;
  2206. vsubmin = 0;
  2207. }
  2208. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2209. if (!argp)
  2210. return -EINVAL;
  2211. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2212. return -EFAULT;
  2213. return 0;
  2214. }
  2215. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2216. {
  2217. IOCTL_Command_struct iocommand;
  2218. struct CommandList *c;
  2219. char *buff = NULL;
  2220. union u64bit temp64;
  2221. if (!argp)
  2222. return -EINVAL;
  2223. if (!capable(CAP_SYS_RAWIO))
  2224. return -EPERM;
  2225. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2226. return -EFAULT;
  2227. if ((iocommand.buf_size < 1) &&
  2228. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2229. return -EINVAL;
  2230. }
  2231. if (iocommand.buf_size > 0) {
  2232. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2233. if (buff == NULL)
  2234. return -EFAULT;
  2235. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2236. /* Copy the data into the buffer we created */
  2237. if (copy_from_user(buff, iocommand.buf,
  2238. iocommand.buf_size)) {
  2239. kfree(buff);
  2240. return -EFAULT;
  2241. }
  2242. } else {
  2243. memset(buff, 0, iocommand.buf_size);
  2244. }
  2245. }
  2246. c = cmd_special_alloc(h);
  2247. if (c == NULL) {
  2248. kfree(buff);
  2249. return -ENOMEM;
  2250. }
  2251. /* Fill in the command type */
  2252. c->cmd_type = CMD_IOCTL_PEND;
  2253. /* Fill in Command Header */
  2254. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2255. if (iocommand.buf_size > 0) { /* buffer to fill */
  2256. c->Header.SGList = 1;
  2257. c->Header.SGTotal = 1;
  2258. } else { /* no buffers to fill */
  2259. c->Header.SGList = 0;
  2260. c->Header.SGTotal = 0;
  2261. }
  2262. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2263. /* use the kernel address the cmd block for tag */
  2264. c->Header.Tag.lower = c->busaddr;
  2265. /* Fill in Request block */
  2266. memcpy(&c->Request, &iocommand.Request,
  2267. sizeof(c->Request));
  2268. /* Fill in the scatter gather information */
  2269. if (iocommand.buf_size > 0) {
  2270. temp64.val = pci_map_single(h->pdev, buff,
  2271. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2272. c->SG[0].Addr.lower = temp64.val32.lower;
  2273. c->SG[0].Addr.upper = temp64.val32.upper;
  2274. c->SG[0].Len = iocommand.buf_size;
  2275. c->SG[0].Ext = 0; /* we are not chaining*/
  2276. }
  2277. hpsa_scsi_do_simple_cmd_core(h, c);
  2278. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2279. check_ioctl_unit_attention(h, c);
  2280. /* Copy the error information out */
  2281. memcpy(&iocommand.error_info, c->err_info,
  2282. sizeof(iocommand.error_info));
  2283. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2284. kfree(buff);
  2285. cmd_special_free(h, c);
  2286. return -EFAULT;
  2287. }
  2288. if (iocommand.Request.Type.Direction == XFER_READ &&
  2289. iocommand.buf_size > 0) {
  2290. /* Copy the data out of the buffer we created */
  2291. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2292. kfree(buff);
  2293. cmd_special_free(h, c);
  2294. return -EFAULT;
  2295. }
  2296. }
  2297. kfree(buff);
  2298. cmd_special_free(h, c);
  2299. return 0;
  2300. }
  2301. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2302. {
  2303. BIG_IOCTL_Command_struct *ioc;
  2304. struct CommandList *c;
  2305. unsigned char **buff = NULL;
  2306. int *buff_size = NULL;
  2307. union u64bit temp64;
  2308. BYTE sg_used = 0;
  2309. int status = 0;
  2310. int i;
  2311. u32 left;
  2312. u32 sz;
  2313. BYTE __user *data_ptr;
  2314. if (!argp)
  2315. return -EINVAL;
  2316. if (!capable(CAP_SYS_RAWIO))
  2317. return -EPERM;
  2318. ioc = (BIG_IOCTL_Command_struct *)
  2319. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2320. if (!ioc) {
  2321. status = -ENOMEM;
  2322. goto cleanup1;
  2323. }
  2324. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2325. status = -EFAULT;
  2326. goto cleanup1;
  2327. }
  2328. if ((ioc->buf_size < 1) &&
  2329. (ioc->Request.Type.Direction != XFER_NONE)) {
  2330. status = -EINVAL;
  2331. goto cleanup1;
  2332. }
  2333. /* Check kmalloc limits using all SGs */
  2334. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2335. status = -EINVAL;
  2336. goto cleanup1;
  2337. }
  2338. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2339. status = -EINVAL;
  2340. goto cleanup1;
  2341. }
  2342. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2343. if (!buff) {
  2344. status = -ENOMEM;
  2345. goto cleanup1;
  2346. }
  2347. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2348. if (!buff_size) {
  2349. status = -ENOMEM;
  2350. goto cleanup1;
  2351. }
  2352. left = ioc->buf_size;
  2353. data_ptr = ioc->buf;
  2354. while (left) {
  2355. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2356. buff_size[sg_used] = sz;
  2357. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2358. if (buff[sg_used] == NULL) {
  2359. status = -ENOMEM;
  2360. goto cleanup1;
  2361. }
  2362. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2363. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2364. status = -ENOMEM;
  2365. goto cleanup1;
  2366. }
  2367. } else
  2368. memset(buff[sg_used], 0, sz);
  2369. left -= sz;
  2370. data_ptr += sz;
  2371. sg_used++;
  2372. }
  2373. c = cmd_special_alloc(h);
  2374. if (c == NULL) {
  2375. status = -ENOMEM;
  2376. goto cleanup1;
  2377. }
  2378. c->cmd_type = CMD_IOCTL_PEND;
  2379. c->Header.ReplyQueue = 0;
  2380. c->Header.SGList = c->Header.SGTotal = sg_used;
  2381. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2382. c->Header.Tag.lower = c->busaddr;
  2383. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2384. if (ioc->buf_size > 0) {
  2385. int i;
  2386. for (i = 0; i < sg_used; i++) {
  2387. temp64.val = pci_map_single(h->pdev, buff[i],
  2388. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2389. c->SG[i].Addr.lower = temp64.val32.lower;
  2390. c->SG[i].Addr.upper = temp64.val32.upper;
  2391. c->SG[i].Len = buff_size[i];
  2392. /* we are not chaining */
  2393. c->SG[i].Ext = 0;
  2394. }
  2395. }
  2396. hpsa_scsi_do_simple_cmd_core(h, c);
  2397. if (sg_used)
  2398. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2399. check_ioctl_unit_attention(h, c);
  2400. /* Copy the error information out */
  2401. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2402. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2403. cmd_special_free(h, c);
  2404. status = -EFAULT;
  2405. goto cleanup1;
  2406. }
  2407. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2408. /* Copy the data out of the buffer we created */
  2409. BYTE __user *ptr = ioc->buf;
  2410. for (i = 0; i < sg_used; i++) {
  2411. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2412. cmd_special_free(h, c);
  2413. status = -EFAULT;
  2414. goto cleanup1;
  2415. }
  2416. ptr += buff_size[i];
  2417. }
  2418. }
  2419. cmd_special_free(h, c);
  2420. status = 0;
  2421. cleanup1:
  2422. if (buff) {
  2423. for (i = 0; i < sg_used; i++)
  2424. kfree(buff[i]);
  2425. kfree(buff);
  2426. }
  2427. kfree(buff_size);
  2428. kfree(ioc);
  2429. return status;
  2430. }
  2431. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2432. struct CommandList *c)
  2433. {
  2434. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2435. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2436. (void) check_for_unit_attention(h, c);
  2437. }
  2438. /*
  2439. * ioctl
  2440. */
  2441. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2442. {
  2443. struct ctlr_info *h;
  2444. void __user *argp = (void __user *)arg;
  2445. h = sdev_to_hba(dev);
  2446. switch (cmd) {
  2447. case CCISS_DEREGDISK:
  2448. case CCISS_REGNEWDISK:
  2449. case CCISS_REGNEWD:
  2450. hpsa_scan_start(h->scsi_host);
  2451. return 0;
  2452. case CCISS_GETPCIINFO:
  2453. return hpsa_getpciinfo_ioctl(h, argp);
  2454. case CCISS_GETDRIVVER:
  2455. return hpsa_getdrivver_ioctl(h, argp);
  2456. case CCISS_PASSTHRU:
  2457. return hpsa_passthru_ioctl(h, argp);
  2458. case CCISS_BIG_PASSTHRU:
  2459. return hpsa_big_passthru_ioctl(h, argp);
  2460. default:
  2461. return -ENOTTY;
  2462. }
  2463. }
  2464. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2465. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2466. int cmd_type)
  2467. {
  2468. int pci_dir = XFER_NONE;
  2469. c->cmd_type = CMD_IOCTL_PEND;
  2470. c->Header.ReplyQueue = 0;
  2471. if (buff != NULL && size > 0) {
  2472. c->Header.SGList = 1;
  2473. c->Header.SGTotal = 1;
  2474. } else {
  2475. c->Header.SGList = 0;
  2476. c->Header.SGTotal = 0;
  2477. }
  2478. c->Header.Tag.lower = c->busaddr;
  2479. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2480. c->Request.Type.Type = cmd_type;
  2481. if (cmd_type == TYPE_CMD) {
  2482. switch (cmd) {
  2483. case HPSA_INQUIRY:
  2484. /* are we trying to read a vital product page */
  2485. if (page_code != 0) {
  2486. c->Request.CDB[1] = 0x01;
  2487. c->Request.CDB[2] = page_code;
  2488. }
  2489. c->Request.CDBLen = 6;
  2490. c->Request.Type.Attribute = ATTR_SIMPLE;
  2491. c->Request.Type.Direction = XFER_READ;
  2492. c->Request.Timeout = 0;
  2493. c->Request.CDB[0] = HPSA_INQUIRY;
  2494. c->Request.CDB[4] = size & 0xFF;
  2495. break;
  2496. case HPSA_REPORT_LOG:
  2497. case HPSA_REPORT_PHYS:
  2498. /* Talking to controller so It's a physical command
  2499. mode = 00 target = 0. Nothing to write.
  2500. */
  2501. c->Request.CDBLen = 12;
  2502. c->Request.Type.Attribute = ATTR_SIMPLE;
  2503. c->Request.Type.Direction = XFER_READ;
  2504. c->Request.Timeout = 0;
  2505. c->Request.CDB[0] = cmd;
  2506. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2507. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2508. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2509. c->Request.CDB[9] = size & 0xFF;
  2510. break;
  2511. case HPSA_CACHE_FLUSH:
  2512. c->Request.CDBLen = 12;
  2513. c->Request.Type.Attribute = ATTR_SIMPLE;
  2514. c->Request.Type.Direction = XFER_WRITE;
  2515. c->Request.Timeout = 0;
  2516. c->Request.CDB[0] = BMIC_WRITE;
  2517. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2518. break;
  2519. case TEST_UNIT_READY:
  2520. c->Request.CDBLen = 6;
  2521. c->Request.Type.Attribute = ATTR_SIMPLE;
  2522. c->Request.Type.Direction = XFER_NONE;
  2523. c->Request.Timeout = 0;
  2524. break;
  2525. default:
  2526. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2527. BUG();
  2528. return;
  2529. }
  2530. } else if (cmd_type == TYPE_MSG) {
  2531. switch (cmd) {
  2532. case HPSA_DEVICE_RESET_MSG:
  2533. c->Request.CDBLen = 16;
  2534. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2535. c->Request.Type.Attribute = ATTR_SIMPLE;
  2536. c->Request.Type.Direction = XFER_NONE;
  2537. c->Request.Timeout = 0; /* Don't time out */
  2538. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2539. c->Request.CDB[1] = 0x03; /* Reset target above */
  2540. /* If bytes 4-7 are zero, it means reset the */
  2541. /* LunID device */
  2542. c->Request.CDB[4] = 0x00;
  2543. c->Request.CDB[5] = 0x00;
  2544. c->Request.CDB[6] = 0x00;
  2545. c->Request.CDB[7] = 0x00;
  2546. break;
  2547. default:
  2548. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2549. cmd);
  2550. BUG();
  2551. }
  2552. } else {
  2553. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2554. BUG();
  2555. }
  2556. switch (c->Request.Type.Direction) {
  2557. case XFER_READ:
  2558. pci_dir = PCI_DMA_FROMDEVICE;
  2559. break;
  2560. case XFER_WRITE:
  2561. pci_dir = PCI_DMA_TODEVICE;
  2562. break;
  2563. case XFER_NONE:
  2564. pci_dir = PCI_DMA_NONE;
  2565. break;
  2566. default:
  2567. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2568. }
  2569. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2570. return;
  2571. }
  2572. /*
  2573. * Map (physical) PCI mem into (virtual) kernel space
  2574. */
  2575. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2576. {
  2577. ulong page_base = ((ulong) base) & PAGE_MASK;
  2578. ulong page_offs = ((ulong) base) - page_base;
  2579. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2580. return page_remapped ? (page_remapped + page_offs) : NULL;
  2581. }
  2582. /* Takes cmds off the submission queue and sends them to the hardware,
  2583. * then puts them on the queue of cmds waiting for completion.
  2584. */
  2585. static void start_io(struct ctlr_info *h)
  2586. {
  2587. struct CommandList *c;
  2588. while (!list_empty(&h->reqQ)) {
  2589. c = list_entry(h->reqQ.next, struct CommandList, list);
  2590. /* can't do anything if fifo is full */
  2591. if ((h->access.fifo_full(h))) {
  2592. dev_warn(&h->pdev->dev, "fifo full\n");
  2593. break;
  2594. }
  2595. /* Get the first entry from the Request Q */
  2596. removeQ(c);
  2597. h->Qdepth--;
  2598. /* Tell the controller execute command */
  2599. h->access.submit_command(h, c);
  2600. /* Put job onto the completed Q */
  2601. addQ(&h->cmpQ, c);
  2602. }
  2603. }
  2604. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2605. {
  2606. return h->access.command_completed(h);
  2607. }
  2608. static inline bool interrupt_pending(struct ctlr_info *h)
  2609. {
  2610. return h->access.intr_pending(h);
  2611. }
  2612. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2613. {
  2614. return (h->access.intr_pending(h) == 0) ||
  2615. (h->interrupts_enabled == 0);
  2616. }
  2617. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2618. u32 raw_tag)
  2619. {
  2620. if (unlikely(tag_index >= h->nr_cmds)) {
  2621. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2622. return 1;
  2623. }
  2624. return 0;
  2625. }
  2626. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2627. {
  2628. removeQ(c);
  2629. if (likely(c->cmd_type == CMD_SCSI))
  2630. complete_scsi_command(c, 0, raw_tag);
  2631. else if (c->cmd_type == CMD_IOCTL_PEND)
  2632. complete(c->waiting);
  2633. }
  2634. static inline u32 hpsa_tag_contains_index(u32 tag)
  2635. {
  2636. return tag & DIRECT_LOOKUP_BIT;
  2637. }
  2638. static inline u32 hpsa_tag_to_index(u32 tag)
  2639. {
  2640. return tag >> DIRECT_LOOKUP_SHIFT;
  2641. }
  2642. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2643. {
  2644. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2645. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2646. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2647. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2648. return tag & ~HPSA_PERF_ERROR_BITS;
  2649. }
  2650. /* process completion of an indexed ("direct lookup") command */
  2651. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2652. u32 raw_tag)
  2653. {
  2654. u32 tag_index;
  2655. struct CommandList *c;
  2656. tag_index = hpsa_tag_to_index(raw_tag);
  2657. if (bad_tag(h, tag_index, raw_tag))
  2658. return next_command(h);
  2659. c = h->cmd_pool + tag_index;
  2660. finish_cmd(c, raw_tag);
  2661. return next_command(h);
  2662. }
  2663. /* process completion of a non-indexed command */
  2664. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2665. u32 raw_tag)
  2666. {
  2667. u32 tag;
  2668. struct CommandList *c = NULL;
  2669. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2670. list_for_each_entry(c, &h->cmpQ, list) {
  2671. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2672. finish_cmd(c, raw_tag);
  2673. return next_command(h);
  2674. }
  2675. }
  2676. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2677. return next_command(h);
  2678. }
  2679. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2680. {
  2681. struct ctlr_info *h = dev_id;
  2682. unsigned long flags;
  2683. u32 raw_tag;
  2684. if (interrupt_not_for_us(h))
  2685. return IRQ_NONE;
  2686. spin_lock_irqsave(&h->lock, flags);
  2687. while (interrupt_pending(h)) {
  2688. raw_tag = get_next_completion(h);
  2689. while (raw_tag != FIFO_EMPTY) {
  2690. if (hpsa_tag_contains_index(raw_tag))
  2691. raw_tag = process_indexed_cmd(h, raw_tag);
  2692. else
  2693. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2694. }
  2695. }
  2696. spin_unlock_irqrestore(&h->lock, flags);
  2697. return IRQ_HANDLED;
  2698. }
  2699. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2700. {
  2701. struct ctlr_info *h = dev_id;
  2702. unsigned long flags;
  2703. u32 raw_tag;
  2704. spin_lock_irqsave(&h->lock, flags);
  2705. raw_tag = get_next_completion(h);
  2706. while (raw_tag != FIFO_EMPTY) {
  2707. if (hpsa_tag_contains_index(raw_tag))
  2708. raw_tag = process_indexed_cmd(h, raw_tag);
  2709. else
  2710. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2711. }
  2712. spin_unlock_irqrestore(&h->lock, flags);
  2713. return IRQ_HANDLED;
  2714. }
  2715. /* Send a message CDB to the firmware. Careful, this only works
  2716. * in simple mode, not performant mode due to the tag lookup.
  2717. * We only ever use this immediately after a controller reset.
  2718. */
  2719. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2720. unsigned char type)
  2721. {
  2722. struct Command {
  2723. struct CommandListHeader CommandHeader;
  2724. struct RequestBlock Request;
  2725. struct ErrDescriptor ErrorDescriptor;
  2726. };
  2727. struct Command *cmd;
  2728. static const size_t cmd_sz = sizeof(*cmd) +
  2729. sizeof(cmd->ErrorDescriptor);
  2730. dma_addr_t paddr64;
  2731. uint32_t paddr32, tag;
  2732. void __iomem *vaddr;
  2733. int i, err;
  2734. vaddr = pci_ioremap_bar(pdev, 0);
  2735. if (vaddr == NULL)
  2736. return -ENOMEM;
  2737. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2738. * CCISS commands, so they must be allocated from the lower 4GiB of
  2739. * memory.
  2740. */
  2741. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2742. if (err) {
  2743. iounmap(vaddr);
  2744. return -ENOMEM;
  2745. }
  2746. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2747. if (cmd == NULL) {
  2748. iounmap(vaddr);
  2749. return -ENOMEM;
  2750. }
  2751. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2752. * although there's no guarantee, we assume that the address is at
  2753. * least 4-byte aligned (most likely, it's page-aligned).
  2754. */
  2755. paddr32 = paddr64;
  2756. cmd->CommandHeader.ReplyQueue = 0;
  2757. cmd->CommandHeader.SGList = 0;
  2758. cmd->CommandHeader.SGTotal = 0;
  2759. cmd->CommandHeader.Tag.lower = paddr32;
  2760. cmd->CommandHeader.Tag.upper = 0;
  2761. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2762. cmd->Request.CDBLen = 16;
  2763. cmd->Request.Type.Type = TYPE_MSG;
  2764. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2765. cmd->Request.Type.Direction = XFER_NONE;
  2766. cmd->Request.Timeout = 0; /* Don't time out */
  2767. cmd->Request.CDB[0] = opcode;
  2768. cmd->Request.CDB[1] = type;
  2769. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2770. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2771. cmd->ErrorDescriptor.Addr.upper = 0;
  2772. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2773. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2774. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2775. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2776. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2777. break;
  2778. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2779. }
  2780. iounmap(vaddr);
  2781. /* we leak the DMA buffer here ... no choice since the controller could
  2782. * still complete the command.
  2783. */
  2784. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2785. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2786. opcode, type);
  2787. return -ETIMEDOUT;
  2788. }
  2789. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2790. if (tag & HPSA_ERROR_BIT) {
  2791. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2792. opcode, type);
  2793. return -EIO;
  2794. }
  2795. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2796. opcode, type);
  2797. return 0;
  2798. }
  2799. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2800. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2801. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2802. void * __iomem vaddr, bool use_doorbell)
  2803. {
  2804. u16 pmcsr;
  2805. int pos;
  2806. if (use_doorbell) {
  2807. /* For everything after the P600, the PCI power state method
  2808. * of resetting the controller doesn't work, so we have this
  2809. * other way using the doorbell register.
  2810. */
  2811. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2812. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2813. msleep(1000);
  2814. } else { /* Try to do it the PCI power state way */
  2815. /* Quoting from the Open CISS Specification: "The Power
  2816. * Management Control/Status Register (CSR) controls the power
  2817. * state of the device. The normal operating state is D0,
  2818. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2819. * the controller, place the interface device in D3 then to D0,
  2820. * this causes a secondary PCI reset which will reset the
  2821. * controller." */
  2822. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2823. if (pos == 0) {
  2824. dev_err(&pdev->dev,
  2825. "hpsa_reset_controller: "
  2826. "PCI PM not supported\n");
  2827. return -ENODEV;
  2828. }
  2829. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2830. /* enter the D3hot power management state */
  2831. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2832. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2833. pmcsr |= PCI_D3hot;
  2834. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2835. msleep(500);
  2836. /* enter the D0 power management state */
  2837. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2838. pmcsr |= PCI_D0;
  2839. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2840. msleep(500);
  2841. }
  2842. return 0;
  2843. }
  2844. /* This does a hard reset of the controller using PCI power management
  2845. * states or the using the doorbell register.
  2846. */
  2847. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2848. {
  2849. u64 cfg_offset;
  2850. u32 cfg_base_addr;
  2851. u64 cfg_base_addr_index;
  2852. void __iomem *vaddr;
  2853. unsigned long paddr;
  2854. u32 misc_fw_support, active_transport;
  2855. int rc;
  2856. struct CfgTable __iomem *cfgtable;
  2857. bool use_doorbell;
  2858. u32 board_id;
  2859. u16 command_register;
  2860. /* For controllers as old as the P600, this is very nearly
  2861. * the same thing as
  2862. *
  2863. * pci_save_state(pci_dev);
  2864. * pci_set_power_state(pci_dev, PCI_D3hot);
  2865. * pci_set_power_state(pci_dev, PCI_D0);
  2866. * pci_restore_state(pci_dev);
  2867. *
  2868. * For controllers newer than the P600, the pci power state
  2869. * method of resetting doesn't work so we have another way
  2870. * using the doorbell register.
  2871. */
  2872. /* Exclude 640x boards. These are two pci devices in one slot
  2873. * which share a battery backed cache module. One controls the
  2874. * cache, the other accesses the cache through the one that controls
  2875. * it. If we reset the one controlling the cache, the other will
  2876. * likely not be happy. Just forbid resetting this conjoined mess.
  2877. * The 640x isn't really supported by hpsa anyway.
  2878. */
  2879. rc = hpsa_lookup_board_id(pdev, &board_id);
  2880. if (rc < 0) {
  2881. dev_warn(&pdev->dev, "Not resetting device.\n");
  2882. return -ENODEV;
  2883. }
  2884. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2885. return -ENOTSUPP;
  2886. /* Save the PCI command register */
  2887. pci_read_config_word(pdev, 4, &command_register);
  2888. /* Turn the board off. This is so that later pci_restore_state()
  2889. * won't turn the board on before the rest of config space is ready.
  2890. */
  2891. pci_disable_device(pdev);
  2892. pci_save_state(pdev);
  2893. /* find the first memory BAR, so we can find the cfg table */
  2894. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2895. if (rc)
  2896. return rc;
  2897. vaddr = remap_pci_mem(paddr, 0x250);
  2898. if (!vaddr)
  2899. return -ENOMEM;
  2900. /* find cfgtable in order to check if reset via doorbell is supported */
  2901. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2902. &cfg_base_addr_index, &cfg_offset);
  2903. if (rc)
  2904. goto unmap_vaddr;
  2905. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2906. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2907. if (!cfgtable) {
  2908. rc = -ENOMEM;
  2909. goto unmap_vaddr;
  2910. }
  2911. /* If reset via doorbell register is supported, use that. */
  2912. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2913. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2914. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2915. if (rc)
  2916. goto unmap_cfgtable;
  2917. pci_restore_state(pdev);
  2918. rc = pci_enable_device(pdev);
  2919. if (rc) {
  2920. dev_warn(&pdev->dev, "failed to enable device.\n");
  2921. goto unmap_cfgtable;
  2922. }
  2923. pci_write_config_word(pdev, 4, command_register);
  2924. /* Some devices (notably the HP Smart Array 5i Controller)
  2925. need a little pause here */
  2926. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2927. /* Wait for board to become not ready, then ready. */
  2928. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  2929. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  2930. if (rc)
  2931. dev_warn(&pdev->dev,
  2932. "failed waiting for board to become not ready\n");
  2933. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  2934. if (rc) {
  2935. dev_warn(&pdev->dev,
  2936. "failed waiting for board to become ready\n");
  2937. goto unmap_cfgtable;
  2938. }
  2939. dev_info(&pdev->dev, "board ready.\n");
  2940. /* Controller should be in simple mode at this point. If it's not,
  2941. * It means we're on one of those controllers which doesn't support
  2942. * the doorbell reset method and on which the PCI power management reset
  2943. * method doesn't work (P800, for example.)
  2944. * In those cases, don't try to proceed, as it generally doesn't work.
  2945. */
  2946. active_transport = readl(&cfgtable->TransportActive);
  2947. if (active_transport & PERFORMANT_MODE) {
  2948. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2949. " Ignoring controller.\n");
  2950. rc = -ENODEV;
  2951. }
  2952. unmap_cfgtable:
  2953. iounmap(cfgtable);
  2954. unmap_vaddr:
  2955. iounmap(vaddr);
  2956. return rc;
  2957. }
  2958. /*
  2959. * We cannot read the structure directly, for portability we must use
  2960. * the io functions.
  2961. * This is for debug only.
  2962. */
  2963. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2964. {
  2965. #ifdef HPSA_DEBUG
  2966. int i;
  2967. char temp_name[17];
  2968. dev_info(dev, "Controller Configuration information\n");
  2969. dev_info(dev, "------------------------------------\n");
  2970. for (i = 0; i < 4; i++)
  2971. temp_name[i] = readb(&(tb->Signature[i]));
  2972. temp_name[4] = '\0';
  2973. dev_info(dev, " Signature = %s\n", temp_name);
  2974. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2975. dev_info(dev, " Transport methods supported = 0x%x\n",
  2976. readl(&(tb->TransportSupport)));
  2977. dev_info(dev, " Transport methods active = 0x%x\n",
  2978. readl(&(tb->TransportActive)));
  2979. dev_info(dev, " Requested transport Method = 0x%x\n",
  2980. readl(&(tb->HostWrite.TransportRequest)));
  2981. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2982. readl(&(tb->HostWrite.CoalIntDelay)));
  2983. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2984. readl(&(tb->HostWrite.CoalIntCount)));
  2985. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2986. readl(&(tb->CmdsOutMax)));
  2987. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2988. for (i = 0; i < 16; i++)
  2989. temp_name[i] = readb(&(tb->ServerName[i]));
  2990. temp_name[16] = '\0';
  2991. dev_info(dev, " Server Name = %s\n", temp_name);
  2992. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2993. readl(&(tb->HeartBeat)));
  2994. #endif /* HPSA_DEBUG */
  2995. }
  2996. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2997. {
  2998. int i, offset, mem_type, bar_type;
  2999. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3000. return 0;
  3001. offset = 0;
  3002. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3003. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3004. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3005. offset += 4;
  3006. else {
  3007. mem_type = pci_resource_flags(pdev, i) &
  3008. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3009. switch (mem_type) {
  3010. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3011. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3012. offset += 4; /* 32 bit */
  3013. break;
  3014. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3015. offset += 8;
  3016. break;
  3017. default: /* reserved in PCI 2.2 */
  3018. dev_warn(&pdev->dev,
  3019. "base address is invalid\n");
  3020. return -1;
  3021. break;
  3022. }
  3023. }
  3024. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3025. return i + 1;
  3026. }
  3027. return -1;
  3028. }
  3029. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3030. * controllers that are capable. If not, we use IO-APIC mode.
  3031. */
  3032. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3033. {
  3034. #ifdef CONFIG_PCI_MSI
  3035. int err;
  3036. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3037. {0, 2}, {0, 3}
  3038. };
  3039. /* Some boards advertise MSI but don't really support it */
  3040. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3041. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3042. goto default_int_mode;
  3043. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3044. dev_info(&h->pdev->dev, "MSIX\n");
  3045. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3046. if (!err) {
  3047. h->intr[0] = hpsa_msix_entries[0].vector;
  3048. h->intr[1] = hpsa_msix_entries[1].vector;
  3049. h->intr[2] = hpsa_msix_entries[2].vector;
  3050. h->intr[3] = hpsa_msix_entries[3].vector;
  3051. h->msix_vector = 1;
  3052. return;
  3053. }
  3054. if (err > 0) {
  3055. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3056. "available\n", err);
  3057. goto default_int_mode;
  3058. } else {
  3059. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3060. err);
  3061. goto default_int_mode;
  3062. }
  3063. }
  3064. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3065. dev_info(&h->pdev->dev, "MSI\n");
  3066. if (!pci_enable_msi(h->pdev))
  3067. h->msi_vector = 1;
  3068. else
  3069. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3070. }
  3071. default_int_mode:
  3072. #endif /* CONFIG_PCI_MSI */
  3073. /* if we get here we're going to use the default interrupt mode */
  3074. h->intr[h->intr_mode] = h->pdev->irq;
  3075. }
  3076. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3077. {
  3078. int i;
  3079. u32 subsystem_vendor_id, subsystem_device_id;
  3080. subsystem_vendor_id = pdev->subsystem_vendor;
  3081. subsystem_device_id = pdev->subsystem_device;
  3082. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3083. subsystem_vendor_id;
  3084. for (i = 0; i < ARRAY_SIZE(products); i++)
  3085. if (*board_id == products[i].board_id)
  3086. return i;
  3087. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3088. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3089. !hpsa_allow_any) {
  3090. dev_warn(&pdev->dev, "unrecognized board ID: "
  3091. "0x%08x, ignoring.\n", *board_id);
  3092. return -ENODEV;
  3093. }
  3094. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3095. }
  3096. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3097. {
  3098. u16 command;
  3099. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3100. return ((command & PCI_COMMAND_MEMORY) == 0);
  3101. }
  3102. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3103. unsigned long *memory_bar)
  3104. {
  3105. int i;
  3106. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3107. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3108. /* addressing mode bits already removed */
  3109. *memory_bar = pci_resource_start(pdev, i);
  3110. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3111. *memory_bar);
  3112. return 0;
  3113. }
  3114. dev_warn(&pdev->dev, "no memory BAR found\n");
  3115. return -ENODEV;
  3116. }
  3117. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3118. void __iomem *vaddr, int wait_for_ready)
  3119. {
  3120. int i, iterations;
  3121. u32 scratchpad;
  3122. if (wait_for_ready)
  3123. iterations = HPSA_BOARD_READY_ITERATIONS;
  3124. else
  3125. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3126. for (i = 0; i < iterations; i++) {
  3127. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3128. if (wait_for_ready) {
  3129. if (scratchpad == HPSA_FIRMWARE_READY)
  3130. return 0;
  3131. } else {
  3132. if (scratchpad != HPSA_FIRMWARE_READY)
  3133. return 0;
  3134. }
  3135. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3136. }
  3137. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3138. return -ENODEV;
  3139. }
  3140. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3141. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3142. u64 *cfg_offset)
  3143. {
  3144. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3145. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3146. *cfg_base_addr &= (u32) 0x0000ffff;
  3147. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3148. if (*cfg_base_addr_index == -1) {
  3149. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3150. return -ENODEV;
  3151. }
  3152. return 0;
  3153. }
  3154. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3155. {
  3156. u64 cfg_offset;
  3157. u32 cfg_base_addr;
  3158. u64 cfg_base_addr_index;
  3159. u32 trans_offset;
  3160. int rc;
  3161. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3162. &cfg_base_addr_index, &cfg_offset);
  3163. if (rc)
  3164. return rc;
  3165. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3166. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3167. if (!h->cfgtable)
  3168. return -ENOMEM;
  3169. /* Find performant mode table. */
  3170. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3171. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3172. cfg_base_addr_index)+cfg_offset+trans_offset,
  3173. sizeof(*h->transtable));
  3174. if (!h->transtable)
  3175. return -ENOMEM;
  3176. return 0;
  3177. }
  3178. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3179. {
  3180. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3181. /* Limit commands in memory limited kdump scenario. */
  3182. if (reset_devices && h->max_commands > 32)
  3183. h->max_commands = 32;
  3184. if (h->max_commands < 16) {
  3185. dev_warn(&h->pdev->dev, "Controller reports "
  3186. "max supported commands of %d, an obvious lie. "
  3187. "Using 16. Ensure that firmware is up to date.\n",
  3188. h->max_commands);
  3189. h->max_commands = 16;
  3190. }
  3191. }
  3192. /* Interrogate the hardware for some limits:
  3193. * max commands, max SG elements without chaining, and with chaining,
  3194. * SG chain block size, etc.
  3195. */
  3196. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3197. {
  3198. hpsa_get_max_perf_mode_cmds(h);
  3199. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3200. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3201. /*
  3202. * Limit in-command s/g elements to 32 save dma'able memory.
  3203. * Howvever spec says if 0, use 31
  3204. */
  3205. h->max_cmd_sg_entries = 31;
  3206. if (h->maxsgentries > 512) {
  3207. h->max_cmd_sg_entries = 32;
  3208. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3209. h->maxsgentries--; /* save one for chain pointer */
  3210. } else {
  3211. h->maxsgentries = 31; /* default to traditional values */
  3212. h->chainsize = 0;
  3213. }
  3214. }
  3215. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3216. {
  3217. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3218. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3219. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3220. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3221. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3222. return false;
  3223. }
  3224. return true;
  3225. }
  3226. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3227. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3228. {
  3229. #ifdef CONFIG_X86
  3230. u32 prefetch;
  3231. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3232. prefetch |= 0x100;
  3233. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3234. #endif
  3235. }
  3236. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3237. * in a prefetch beyond physical memory.
  3238. */
  3239. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3240. {
  3241. u32 dma_prefetch;
  3242. if (h->board_id != 0x3225103C)
  3243. return;
  3244. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3245. dma_prefetch |= 0x8000;
  3246. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3247. }
  3248. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3249. {
  3250. int i;
  3251. u32 doorbell_value;
  3252. unsigned long flags;
  3253. /* under certain very rare conditions, this can take awhile.
  3254. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3255. * as we enter this code.)
  3256. */
  3257. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3258. spin_lock_irqsave(&h->lock, flags);
  3259. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3260. spin_unlock_irqrestore(&h->lock, flags);
  3261. if (!(doorbell_value & CFGTBL_ChangeReq))
  3262. break;
  3263. /* delay and try again */
  3264. usleep_range(10000, 20000);
  3265. }
  3266. }
  3267. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3268. {
  3269. u32 trans_support;
  3270. trans_support = readl(&(h->cfgtable->TransportSupport));
  3271. if (!(trans_support & SIMPLE_MODE))
  3272. return -ENOTSUPP;
  3273. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3274. /* Update the field, and then ring the doorbell */
  3275. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3276. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3277. hpsa_wait_for_mode_change_ack(h);
  3278. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3279. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3280. dev_warn(&h->pdev->dev,
  3281. "unable to get board into simple mode\n");
  3282. return -ENODEV;
  3283. }
  3284. h->transMethod = CFGTBL_Trans_Simple;
  3285. return 0;
  3286. }
  3287. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3288. {
  3289. int prod_index, err;
  3290. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3291. if (prod_index < 0)
  3292. return -ENODEV;
  3293. h->product_name = products[prod_index].product_name;
  3294. h->access = *(products[prod_index].access);
  3295. if (hpsa_board_disabled(h->pdev)) {
  3296. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3297. return -ENODEV;
  3298. }
  3299. err = pci_enable_device(h->pdev);
  3300. if (err) {
  3301. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3302. return err;
  3303. }
  3304. err = pci_request_regions(h->pdev, "hpsa");
  3305. if (err) {
  3306. dev_err(&h->pdev->dev,
  3307. "cannot obtain PCI resources, aborting\n");
  3308. return err;
  3309. }
  3310. hpsa_interrupt_mode(h);
  3311. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3312. if (err)
  3313. goto err_out_free_res;
  3314. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3315. if (!h->vaddr) {
  3316. err = -ENOMEM;
  3317. goto err_out_free_res;
  3318. }
  3319. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3320. if (err)
  3321. goto err_out_free_res;
  3322. err = hpsa_find_cfgtables(h);
  3323. if (err)
  3324. goto err_out_free_res;
  3325. hpsa_find_board_params(h);
  3326. if (!hpsa_CISS_signature_present(h)) {
  3327. err = -ENODEV;
  3328. goto err_out_free_res;
  3329. }
  3330. hpsa_enable_scsi_prefetch(h);
  3331. hpsa_p600_dma_prefetch_quirk(h);
  3332. err = hpsa_enter_simple_mode(h);
  3333. if (err)
  3334. goto err_out_free_res;
  3335. return 0;
  3336. err_out_free_res:
  3337. if (h->transtable)
  3338. iounmap(h->transtable);
  3339. if (h->cfgtable)
  3340. iounmap(h->cfgtable);
  3341. if (h->vaddr)
  3342. iounmap(h->vaddr);
  3343. /*
  3344. * Deliberately omit pci_disable_device(): it does something nasty to
  3345. * Smart Array controllers that pci_enable_device does not undo
  3346. */
  3347. pci_release_regions(h->pdev);
  3348. return err;
  3349. }
  3350. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3351. {
  3352. int rc;
  3353. #define HBA_INQUIRY_BYTE_COUNT 64
  3354. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3355. if (!h->hba_inquiry_data)
  3356. return;
  3357. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3358. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3359. if (rc != 0) {
  3360. kfree(h->hba_inquiry_data);
  3361. h->hba_inquiry_data = NULL;
  3362. }
  3363. }
  3364. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3365. {
  3366. int rc, i;
  3367. if (!reset_devices)
  3368. return 0;
  3369. /* Reset the controller with a PCI power-cycle or via doorbell */
  3370. rc = hpsa_kdump_hard_reset_controller(pdev);
  3371. /* -ENOTSUPP here means we cannot reset the controller
  3372. * but it's already (and still) up and running in
  3373. * "performant mode". Or, it might be 640x, which can't reset
  3374. * due to concerns about shared bbwc between 6402/6404 pair.
  3375. */
  3376. if (rc == -ENOTSUPP)
  3377. return 0; /* just try to do the kdump anyhow. */
  3378. if (rc)
  3379. return -ENODEV;
  3380. /* Now try to get the controller to respond to a no-op */
  3381. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3382. if (hpsa_noop(pdev) == 0)
  3383. break;
  3384. else
  3385. dev_warn(&pdev->dev, "no-op failed%s\n",
  3386. (i < 11 ? "; re-trying" : ""));
  3387. }
  3388. return 0;
  3389. }
  3390. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3391. const struct pci_device_id *ent)
  3392. {
  3393. int dac, rc;
  3394. struct ctlr_info *h;
  3395. if (number_of_controllers == 0)
  3396. printk(KERN_INFO DRIVER_NAME "\n");
  3397. rc = hpsa_init_reset_devices(pdev);
  3398. if (rc)
  3399. return rc;
  3400. /* Command structures must be aligned on a 32-byte boundary because
  3401. * the 5 lower bits of the address are used by the hardware. and by
  3402. * the driver. See comments in hpsa.h for more info.
  3403. */
  3404. #define COMMANDLIST_ALIGNMENT 32
  3405. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3406. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3407. if (!h)
  3408. return -ENOMEM;
  3409. h->pdev = pdev;
  3410. h->busy_initializing = 1;
  3411. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3412. INIT_LIST_HEAD(&h->cmpQ);
  3413. INIT_LIST_HEAD(&h->reqQ);
  3414. spin_lock_init(&h->lock);
  3415. spin_lock_init(&h->scan_lock);
  3416. rc = hpsa_pci_init(h);
  3417. if (rc != 0)
  3418. goto clean1;
  3419. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3420. h->ctlr = number_of_controllers;
  3421. number_of_controllers++;
  3422. /* configure PCI DMA stuff */
  3423. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3424. if (rc == 0) {
  3425. dac = 1;
  3426. } else {
  3427. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3428. if (rc == 0) {
  3429. dac = 0;
  3430. } else {
  3431. dev_err(&pdev->dev, "no suitable DMA available\n");
  3432. goto clean1;
  3433. }
  3434. }
  3435. /* make sure the board interrupts are off */
  3436. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3437. if (h->msix_vector || h->msi_vector)
  3438. rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_msi,
  3439. IRQF_DISABLED, h->devname, h);
  3440. else
  3441. rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_intx,
  3442. IRQF_DISABLED, h->devname, h);
  3443. if (rc) {
  3444. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3445. h->intr[h->intr_mode], h->devname);
  3446. goto clean2;
  3447. }
  3448. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3449. h->devname, pdev->device,
  3450. h->intr[h->intr_mode], dac ? "" : " not");
  3451. h->cmd_pool_bits =
  3452. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3453. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3454. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3455. h->nr_cmds * sizeof(*h->cmd_pool),
  3456. &(h->cmd_pool_dhandle));
  3457. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3458. h->nr_cmds * sizeof(*h->errinfo_pool),
  3459. &(h->errinfo_pool_dhandle));
  3460. if ((h->cmd_pool_bits == NULL)
  3461. || (h->cmd_pool == NULL)
  3462. || (h->errinfo_pool == NULL)) {
  3463. dev_err(&pdev->dev, "out of memory");
  3464. rc = -ENOMEM;
  3465. goto clean4;
  3466. }
  3467. if (hpsa_allocate_sg_chain_blocks(h))
  3468. goto clean4;
  3469. init_waitqueue_head(&h->scan_wait_queue);
  3470. h->scan_finished = 1; /* no scan currently in progress */
  3471. pci_set_drvdata(pdev, h);
  3472. memset(h->cmd_pool_bits, 0,
  3473. ((h->nr_cmds + BITS_PER_LONG -
  3474. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3475. hpsa_scsi_setup(h);
  3476. /* Turn the interrupts on so we can service requests */
  3477. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3478. hpsa_put_ctlr_into_performant_mode(h);
  3479. hpsa_hba_inquiry(h);
  3480. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3481. h->busy_initializing = 0;
  3482. return 1;
  3483. clean4:
  3484. hpsa_free_sg_chain_blocks(h);
  3485. kfree(h->cmd_pool_bits);
  3486. if (h->cmd_pool)
  3487. pci_free_consistent(h->pdev,
  3488. h->nr_cmds * sizeof(struct CommandList),
  3489. h->cmd_pool, h->cmd_pool_dhandle);
  3490. if (h->errinfo_pool)
  3491. pci_free_consistent(h->pdev,
  3492. h->nr_cmds * sizeof(struct ErrorInfo),
  3493. h->errinfo_pool,
  3494. h->errinfo_pool_dhandle);
  3495. free_irq(h->intr[h->intr_mode], h);
  3496. clean2:
  3497. clean1:
  3498. h->busy_initializing = 0;
  3499. kfree(h);
  3500. return rc;
  3501. }
  3502. static void hpsa_flush_cache(struct ctlr_info *h)
  3503. {
  3504. char *flush_buf;
  3505. struct CommandList *c;
  3506. flush_buf = kzalloc(4, GFP_KERNEL);
  3507. if (!flush_buf)
  3508. return;
  3509. c = cmd_special_alloc(h);
  3510. if (!c) {
  3511. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3512. goto out_of_memory;
  3513. }
  3514. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3515. RAID_CTLR_LUNID, TYPE_CMD);
  3516. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3517. if (c->err_info->CommandStatus != 0)
  3518. dev_warn(&h->pdev->dev,
  3519. "error flushing cache on controller\n");
  3520. cmd_special_free(h, c);
  3521. out_of_memory:
  3522. kfree(flush_buf);
  3523. }
  3524. static void hpsa_shutdown(struct pci_dev *pdev)
  3525. {
  3526. struct ctlr_info *h;
  3527. h = pci_get_drvdata(pdev);
  3528. /* Turn board interrupts off and send the flush cache command
  3529. * sendcmd will turn off interrupt, and send the flush...
  3530. * To write all data in the battery backed cache to disks
  3531. */
  3532. hpsa_flush_cache(h);
  3533. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3534. free_irq(h->intr[h->intr_mode], h);
  3535. #ifdef CONFIG_PCI_MSI
  3536. if (h->msix_vector)
  3537. pci_disable_msix(h->pdev);
  3538. else if (h->msi_vector)
  3539. pci_disable_msi(h->pdev);
  3540. #endif /* CONFIG_PCI_MSI */
  3541. }
  3542. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3543. {
  3544. struct ctlr_info *h;
  3545. if (pci_get_drvdata(pdev) == NULL) {
  3546. dev_err(&pdev->dev, "unable to remove device \n");
  3547. return;
  3548. }
  3549. h = pci_get_drvdata(pdev);
  3550. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3551. hpsa_shutdown(pdev);
  3552. iounmap(h->vaddr);
  3553. iounmap(h->transtable);
  3554. iounmap(h->cfgtable);
  3555. hpsa_free_sg_chain_blocks(h);
  3556. pci_free_consistent(h->pdev,
  3557. h->nr_cmds * sizeof(struct CommandList),
  3558. h->cmd_pool, h->cmd_pool_dhandle);
  3559. pci_free_consistent(h->pdev,
  3560. h->nr_cmds * sizeof(struct ErrorInfo),
  3561. h->errinfo_pool, h->errinfo_pool_dhandle);
  3562. pci_free_consistent(h->pdev, h->reply_pool_size,
  3563. h->reply_pool, h->reply_pool_dhandle);
  3564. kfree(h->cmd_pool_bits);
  3565. kfree(h->blockFetchTable);
  3566. kfree(h->hba_inquiry_data);
  3567. /*
  3568. * Deliberately omit pci_disable_device(): it does something nasty to
  3569. * Smart Array controllers that pci_enable_device does not undo
  3570. */
  3571. pci_release_regions(pdev);
  3572. pci_set_drvdata(pdev, NULL);
  3573. kfree(h);
  3574. }
  3575. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3576. __attribute__((unused)) pm_message_t state)
  3577. {
  3578. return -ENOSYS;
  3579. }
  3580. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3581. {
  3582. return -ENOSYS;
  3583. }
  3584. static struct pci_driver hpsa_pci_driver = {
  3585. .name = "hpsa",
  3586. .probe = hpsa_init_one,
  3587. .remove = __devexit_p(hpsa_remove_one),
  3588. .id_table = hpsa_pci_device_id, /* id_table */
  3589. .shutdown = hpsa_shutdown,
  3590. .suspend = hpsa_suspend,
  3591. .resume = hpsa_resume,
  3592. };
  3593. /* Fill in bucket_map[], given nsgs (the max number of
  3594. * scatter gather elements supported) and bucket[],
  3595. * which is an array of 8 integers. The bucket[] array
  3596. * contains 8 different DMA transfer sizes (in 16
  3597. * byte increments) which the controller uses to fetch
  3598. * commands. This function fills in bucket_map[], which
  3599. * maps a given number of scatter gather elements to one of
  3600. * the 8 DMA transfer sizes. The point of it is to allow the
  3601. * controller to only do as much DMA as needed to fetch the
  3602. * command, with the DMA transfer size encoded in the lower
  3603. * bits of the command address.
  3604. */
  3605. static void calc_bucket_map(int bucket[], int num_buckets,
  3606. int nsgs, int *bucket_map)
  3607. {
  3608. int i, j, b, size;
  3609. /* even a command with 0 SGs requires 4 blocks */
  3610. #define MINIMUM_TRANSFER_BLOCKS 4
  3611. #define NUM_BUCKETS 8
  3612. /* Note, bucket_map must have nsgs+1 entries. */
  3613. for (i = 0; i <= nsgs; i++) {
  3614. /* Compute size of a command with i SG entries */
  3615. size = i + MINIMUM_TRANSFER_BLOCKS;
  3616. b = num_buckets; /* Assume the biggest bucket */
  3617. /* Find the bucket that is just big enough */
  3618. for (j = 0; j < 8; j++) {
  3619. if (bucket[j] >= size) {
  3620. b = j;
  3621. break;
  3622. }
  3623. }
  3624. /* for a command with i SG entries, use bucket b. */
  3625. bucket_map[i] = b;
  3626. }
  3627. }
  3628. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  3629. u32 use_short_tags)
  3630. {
  3631. int i;
  3632. unsigned long register_value;
  3633. /* This is a bit complicated. There are 8 registers on
  3634. * the controller which we write to to tell it 8 different
  3635. * sizes of commands which there may be. It's a way of
  3636. * reducing the DMA done to fetch each command. Encoded into
  3637. * each command's tag are 3 bits which communicate to the controller
  3638. * which of the eight sizes that command fits within. The size of
  3639. * each command depends on how many scatter gather entries there are.
  3640. * Each SG entry requires 16 bytes. The eight registers are programmed
  3641. * with the number of 16-byte blocks a command of that size requires.
  3642. * The smallest command possible requires 5 such 16 byte blocks.
  3643. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3644. * blocks. Note, this only extends to the SG entries contained
  3645. * within the command block, and does not extend to chained blocks
  3646. * of SG elements. bft[] contains the eight values we write to
  3647. * the registers. They are not evenly distributed, but have more
  3648. * sizes for small commands, and fewer sizes for larger commands.
  3649. */
  3650. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3651. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3652. /* 5 = 1 s/g entry or 4k
  3653. * 6 = 2 s/g entry or 8k
  3654. * 8 = 4 s/g entry or 16k
  3655. * 10 = 6 s/g entry or 24k
  3656. */
  3657. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3658. /* Controller spec: zero out this buffer. */
  3659. memset(h->reply_pool, 0, h->reply_pool_size);
  3660. h->reply_pool_head = h->reply_pool;
  3661. bft[7] = h->max_sg_entries + 4;
  3662. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3663. for (i = 0; i < 8; i++)
  3664. writel(bft[i], &h->transtable->BlockFetch[i]);
  3665. /* size of controller ring buffer */
  3666. writel(h->max_commands, &h->transtable->RepQSize);
  3667. writel(1, &h->transtable->RepQCount);
  3668. writel(0, &h->transtable->RepQCtrAddrLow32);
  3669. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3670. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3671. writel(0, &h->transtable->RepQAddr0High32);
  3672. writel(CFGTBL_Trans_Performant | use_short_tags,
  3673. &(h->cfgtable->HostWrite.TransportRequest));
  3674. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3675. hpsa_wait_for_mode_change_ack(h);
  3676. register_value = readl(&(h->cfgtable->TransportActive));
  3677. if (!(register_value & CFGTBL_Trans_Performant)) {
  3678. dev_warn(&h->pdev->dev, "unable to get board into"
  3679. " performant mode\n");
  3680. return;
  3681. }
  3682. /* Change the access methods to the performant access methods */
  3683. h->access = SA5_performant_access;
  3684. h->transMethod = CFGTBL_Trans_Performant;
  3685. }
  3686. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3687. {
  3688. u32 trans_support;
  3689. if (hpsa_simple_mode)
  3690. return;
  3691. trans_support = readl(&(h->cfgtable->TransportSupport));
  3692. if (!(trans_support & PERFORMANT_MODE))
  3693. return;
  3694. hpsa_get_max_perf_mode_cmds(h);
  3695. h->max_sg_entries = 32;
  3696. /* Performant mode ring buffer and supporting data structures */
  3697. h->reply_pool_size = h->max_commands * sizeof(u64);
  3698. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3699. &(h->reply_pool_dhandle));
  3700. /* Need a block fetch table for performant mode */
  3701. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3702. sizeof(u32)), GFP_KERNEL);
  3703. if ((h->reply_pool == NULL)
  3704. || (h->blockFetchTable == NULL))
  3705. goto clean_up;
  3706. hpsa_enter_performant_mode(h,
  3707. trans_support & CFGTBL_Trans_use_short_tags);
  3708. return;
  3709. clean_up:
  3710. if (h->reply_pool)
  3711. pci_free_consistent(h->pdev, h->reply_pool_size,
  3712. h->reply_pool, h->reply_pool_dhandle);
  3713. kfree(h->blockFetchTable);
  3714. }
  3715. /*
  3716. * This is it. Register the PCI driver information for the cards we control
  3717. * the OS will call our registered routines when it finds one of our cards.
  3718. */
  3719. static int __init hpsa_init(void)
  3720. {
  3721. return pci_register_driver(&hpsa_pci_driver);
  3722. }
  3723. static void __exit hpsa_cleanup(void)
  3724. {
  3725. pci_unregister_driver(&hpsa_pci_driver);
  3726. }
  3727. module_init(hpsa_init);
  3728. module_exit(hpsa_cleanup);