esp_scsi.c 65 KB

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  1. /* esp_scsi.c: ESP SCSI driver.
  2. *
  3. * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/types.h>
  7. #include <linux/slab.h>
  8. #include <linux/delay.h>
  9. #include <linux/list.h>
  10. #include <linux/completion.h>
  11. #include <linux/kallsyms.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/irqreturn.h>
  16. #include <asm/irq.h>
  17. #include <asm/io.h>
  18. #include <asm/dma.h>
  19. #include <scsi/scsi.h>
  20. #include <scsi/scsi_host.h>
  21. #include <scsi/scsi_cmnd.h>
  22. #include <scsi/scsi_device.h>
  23. #include <scsi/scsi_tcq.h>
  24. #include <scsi/scsi_dbg.h>
  25. #include <scsi/scsi_transport_spi.h>
  26. #include "esp_scsi.h"
  27. #define DRV_MODULE_NAME "esp"
  28. #define PFX DRV_MODULE_NAME ": "
  29. #define DRV_VERSION "2.000"
  30. #define DRV_MODULE_RELDATE "April 19, 2007"
  31. /* SCSI bus reset settle time in seconds. */
  32. static int esp_bus_reset_settle = 3;
  33. static u32 esp_debug;
  34. #define ESP_DEBUG_INTR 0x00000001
  35. #define ESP_DEBUG_SCSICMD 0x00000002
  36. #define ESP_DEBUG_RESET 0x00000004
  37. #define ESP_DEBUG_MSGIN 0x00000008
  38. #define ESP_DEBUG_MSGOUT 0x00000010
  39. #define ESP_DEBUG_CMDDONE 0x00000020
  40. #define ESP_DEBUG_DISCONNECT 0x00000040
  41. #define ESP_DEBUG_DATASTART 0x00000080
  42. #define ESP_DEBUG_DATADONE 0x00000100
  43. #define ESP_DEBUG_RECONNECT 0x00000200
  44. #define ESP_DEBUG_AUTOSENSE 0x00000400
  45. #define esp_log_intr(f, a...) \
  46. do { if (esp_debug & ESP_DEBUG_INTR) \
  47. printk(f, ## a); \
  48. } while (0)
  49. #define esp_log_reset(f, a...) \
  50. do { if (esp_debug & ESP_DEBUG_RESET) \
  51. printk(f, ## a); \
  52. } while (0)
  53. #define esp_log_msgin(f, a...) \
  54. do { if (esp_debug & ESP_DEBUG_MSGIN) \
  55. printk(f, ## a); \
  56. } while (0)
  57. #define esp_log_msgout(f, a...) \
  58. do { if (esp_debug & ESP_DEBUG_MSGOUT) \
  59. printk(f, ## a); \
  60. } while (0)
  61. #define esp_log_cmddone(f, a...) \
  62. do { if (esp_debug & ESP_DEBUG_CMDDONE) \
  63. printk(f, ## a); \
  64. } while (0)
  65. #define esp_log_disconnect(f, a...) \
  66. do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
  67. printk(f, ## a); \
  68. } while (0)
  69. #define esp_log_datastart(f, a...) \
  70. do { if (esp_debug & ESP_DEBUG_DATASTART) \
  71. printk(f, ## a); \
  72. } while (0)
  73. #define esp_log_datadone(f, a...) \
  74. do { if (esp_debug & ESP_DEBUG_DATADONE) \
  75. printk(f, ## a); \
  76. } while (0)
  77. #define esp_log_reconnect(f, a...) \
  78. do { if (esp_debug & ESP_DEBUG_RECONNECT) \
  79. printk(f, ## a); \
  80. } while (0)
  81. #define esp_log_autosense(f, a...) \
  82. do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
  83. printk(f, ## a); \
  84. } while (0)
  85. #define esp_read8(REG) esp->ops->esp_read8(esp, REG)
  86. #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
  87. static void esp_log_fill_regs(struct esp *esp,
  88. struct esp_event_ent *p)
  89. {
  90. p->sreg = esp->sreg;
  91. p->seqreg = esp->seqreg;
  92. p->sreg2 = esp->sreg2;
  93. p->ireg = esp->ireg;
  94. p->select_state = esp->select_state;
  95. p->event = esp->event;
  96. }
  97. void scsi_esp_cmd(struct esp *esp, u8 val)
  98. {
  99. struct esp_event_ent *p;
  100. int idx = esp->esp_event_cur;
  101. p = &esp->esp_event_log[idx];
  102. p->type = ESP_EVENT_TYPE_CMD;
  103. p->val = val;
  104. esp_log_fill_regs(esp, p);
  105. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  106. esp_write8(val, ESP_CMD);
  107. }
  108. EXPORT_SYMBOL(scsi_esp_cmd);
  109. static void esp_event(struct esp *esp, u8 val)
  110. {
  111. struct esp_event_ent *p;
  112. int idx = esp->esp_event_cur;
  113. p = &esp->esp_event_log[idx];
  114. p->type = ESP_EVENT_TYPE_EVENT;
  115. p->val = val;
  116. esp_log_fill_regs(esp, p);
  117. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  118. esp->event = val;
  119. }
  120. static void esp_dump_cmd_log(struct esp *esp)
  121. {
  122. int idx = esp->esp_event_cur;
  123. int stop = idx;
  124. printk(KERN_INFO PFX "esp%d: Dumping command log\n",
  125. esp->host->unique_id);
  126. do {
  127. struct esp_event_ent *p = &esp->esp_event_log[idx];
  128. printk(KERN_INFO PFX "esp%d: ent[%d] %s ",
  129. esp->host->unique_id, idx,
  130. p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT");
  131. printk("val[%02x] sreg[%02x] seqreg[%02x] "
  132. "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
  133. p->val, p->sreg, p->seqreg,
  134. p->sreg2, p->ireg, p->select_state, p->event);
  135. idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  136. } while (idx != stop);
  137. }
  138. static void esp_flush_fifo(struct esp *esp)
  139. {
  140. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  141. if (esp->rev == ESP236) {
  142. int lim = 1000;
  143. while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
  144. if (--lim == 0) {
  145. printk(KERN_ALERT PFX "esp%d: ESP_FF_BYTES "
  146. "will not clear!\n",
  147. esp->host->unique_id);
  148. break;
  149. }
  150. udelay(1);
  151. }
  152. }
  153. }
  154. static void hme_read_fifo(struct esp *esp)
  155. {
  156. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  157. int idx = 0;
  158. while (fcnt--) {
  159. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  160. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  161. }
  162. if (esp->sreg2 & ESP_STAT2_F1BYTE) {
  163. esp_write8(0, ESP_FDATA);
  164. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  165. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  166. }
  167. esp->fifo_cnt = idx;
  168. }
  169. static void esp_set_all_config3(struct esp *esp, u8 val)
  170. {
  171. int i;
  172. for (i = 0; i < ESP_MAX_TARGET; i++)
  173. esp->target[i].esp_config3 = val;
  174. }
  175. /* Reset the ESP chip, _not_ the SCSI bus. */
  176. static void esp_reset_esp(struct esp *esp)
  177. {
  178. u8 family_code, version;
  179. /* Now reset the ESP chip */
  180. scsi_esp_cmd(esp, ESP_CMD_RC);
  181. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  182. if (esp->rev == FAST)
  183. esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
  184. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  185. /* This is the only point at which it is reliable to read
  186. * the ID-code for a fast ESP chip variants.
  187. */
  188. esp->max_period = ((35 * esp->ccycle) / 1000);
  189. if (esp->rev == FAST) {
  190. version = esp_read8(ESP_UID);
  191. family_code = (version & 0xf8) >> 3;
  192. if (family_code == 0x02)
  193. esp->rev = FAS236;
  194. else if (family_code == 0x0a)
  195. esp->rev = FASHME; /* Version is usually '5'. */
  196. else
  197. esp->rev = FAS100A;
  198. esp->min_period = ((4 * esp->ccycle) / 1000);
  199. } else {
  200. esp->min_period = ((5 * esp->ccycle) / 1000);
  201. }
  202. esp->max_period = (esp->max_period + 3)>>2;
  203. esp->min_period = (esp->min_period + 3)>>2;
  204. esp_write8(esp->config1, ESP_CFG1);
  205. switch (esp->rev) {
  206. case ESP100:
  207. /* nothing to do */
  208. break;
  209. case ESP100A:
  210. esp_write8(esp->config2, ESP_CFG2);
  211. break;
  212. case ESP236:
  213. /* Slow 236 */
  214. esp_write8(esp->config2, ESP_CFG2);
  215. esp->prev_cfg3 = esp->target[0].esp_config3;
  216. esp_write8(esp->prev_cfg3, ESP_CFG3);
  217. break;
  218. case FASHME:
  219. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  220. /* fallthrough... */
  221. case FAS236:
  222. /* Fast 236 or HME */
  223. esp_write8(esp->config2, ESP_CFG2);
  224. if (esp->rev == FASHME) {
  225. u8 cfg3 = esp->target[0].esp_config3;
  226. cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  227. if (esp->scsi_id >= 8)
  228. cfg3 |= ESP_CONFIG3_IDBIT3;
  229. esp_set_all_config3(esp, cfg3);
  230. } else {
  231. u32 cfg3 = esp->target[0].esp_config3;
  232. cfg3 |= ESP_CONFIG3_FCLK;
  233. esp_set_all_config3(esp, cfg3);
  234. }
  235. esp->prev_cfg3 = esp->target[0].esp_config3;
  236. esp_write8(esp->prev_cfg3, ESP_CFG3);
  237. if (esp->rev == FASHME) {
  238. esp->radelay = 80;
  239. } else {
  240. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  241. esp->radelay = 0;
  242. else
  243. esp->radelay = 96;
  244. }
  245. break;
  246. case FAS100A:
  247. /* Fast 100a */
  248. esp_write8(esp->config2, ESP_CFG2);
  249. esp_set_all_config3(esp,
  250. (esp->target[0].esp_config3 |
  251. ESP_CONFIG3_FCLOCK));
  252. esp->prev_cfg3 = esp->target[0].esp_config3;
  253. esp_write8(esp->prev_cfg3, ESP_CFG3);
  254. esp->radelay = 32;
  255. break;
  256. default:
  257. break;
  258. }
  259. /* Reload the configuration registers */
  260. esp_write8(esp->cfact, ESP_CFACT);
  261. esp->prev_stp = 0;
  262. esp_write8(esp->prev_stp, ESP_STP);
  263. esp->prev_soff = 0;
  264. esp_write8(esp->prev_soff, ESP_SOFF);
  265. esp_write8(esp->neg_defp, ESP_TIMEO);
  266. /* Eat any bitrot in the chip */
  267. esp_read8(ESP_INTRPT);
  268. udelay(100);
  269. }
  270. static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
  271. {
  272. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  273. struct scatterlist *sg = scsi_sglist(cmd);
  274. int dir = cmd->sc_data_direction;
  275. int total, i;
  276. if (dir == DMA_NONE)
  277. return;
  278. spriv->u.num_sg = esp->ops->map_sg(esp, sg, scsi_sg_count(cmd), dir);
  279. spriv->cur_residue = sg_dma_len(sg);
  280. spriv->cur_sg = sg;
  281. total = 0;
  282. for (i = 0; i < spriv->u.num_sg; i++)
  283. total += sg_dma_len(&sg[i]);
  284. spriv->tot_residue = total;
  285. }
  286. static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
  287. struct scsi_cmnd *cmd)
  288. {
  289. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  290. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  291. return ent->sense_dma +
  292. (ent->sense_ptr - cmd->sense_buffer);
  293. }
  294. return sg_dma_address(p->cur_sg) +
  295. (sg_dma_len(p->cur_sg) -
  296. p->cur_residue);
  297. }
  298. static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
  299. struct scsi_cmnd *cmd)
  300. {
  301. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  302. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  303. return SCSI_SENSE_BUFFERSIZE -
  304. (ent->sense_ptr - cmd->sense_buffer);
  305. }
  306. return p->cur_residue;
  307. }
  308. static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
  309. struct scsi_cmnd *cmd, unsigned int len)
  310. {
  311. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  312. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  313. ent->sense_ptr += len;
  314. return;
  315. }
  316. p->cur_residue -= len;
  317. p->tot_residue -= len;
  318. if (p->cur_residue < 0 || p->tot_residue < 0) {
  319. printk(KERN_ERR PFX "esp%d: Data transfer overflow.\n",
  320. esp->host->unique_id);
  321. printk(KERN_ERR PFX "esp%d: cur_residue[%d] tot_residue[%d] "
  322. "len[%u]\n",
  323. esp->host->unique_id,
  324. p->cur_residue, p->tot_residue, len);
  325. p->cur_residue = 0;
  326. p->tot_residue = 0;
  327. }
  328. if (!p->cur_residue && p->tot_residue) {
  329. p->cur_sg++;
  330. p->cur_residue = sg_dma_len(p->cur_sg);
  331. }
  332. }
  333. static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
  334. {
  335. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  336. int dir = cmd->sc_data_direction;
  337. if (dir == DMA_NONE)
  338. return;
  339. esp->ops->unmap_sg(esp, scsi_sglist(cmd), spriv->u.num_sg, dir);
  340. }
  341. static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  342. {
  343. struct scsi_cmnd *cmd = ent->cmd;
  344. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  345. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  346. ent->saved_sense_ptr = ent->sense_ptr;
  347. return;
  348. }
  349. ent->saved_cur_residue = spriv->cur_residue;
  350. ent->saved_cur_sg = spriv->cur_sg;
  351. ent->saved_tot_residue = spriv->tot_residue;
  352. }
  353. static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  354. {
  355. struct scsi_cmnd *cmd = ent->cmd;
  356. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  357. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  358. ent->sense_ptr = ent->saved_sense_ptr;
  359. return;
  360. }
  361. spriv->cur_residue = ent->saved_cur_residue;
  362. spriv->cur_sg = ent->saved_cur_sg;
  363. spriv->tot_residue = ent->saved_tot_residue;
  364. }
  365. static void esp_check_command_len(struct esp *esp, struct scsi_cmnd *cmd)
  366. {
  367. if (cmd->cmd_len == 6 ||
  368. cmd->cmd_len == 10 ||
  369. cmd->cmd_len == 12) {
  370. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  371. } else {
  372. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  373. }
  374. }
  375. static void esp_write_tgt_config3(struct esp *esp, int tgt)
  376. {
  377. if (esp->rev > ESP100A) {
  378. u8 val = esp->target[tgt].esp_config3;
  379. if (val != esp->prev_cfg3) {
  380. esp->prev_cfg3 = val;
  381. esp_write8(val, ESP_CFG3);
  382. }
  383. }
  384. }
  385. static void esp_write_tgt_sync(struct esp *esp, int tgt)
  386. {
  387. u8 off = esp->target[tgt].esp_offset;
  388. u8 per = esp->target[tgt].esp_period;
  389. if (off != esp->prev_soff) {
  390. esp->prev_soff = off;
  391. esp_write8(off, ESP_SOFF);
  392. }
  393. if (per != esp->prev_stp) {
  394. esp->prev_stp = per;
  395. esp_write8(per, ESP_STP);
  396. }
  397. }
  398. static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  399. {
  400. if (esp->rev == FASHME) {
  401. /* Arbitrary segment boundaries, 24-bit counts. */
  402. if (dma_len > (1U << 24))
  403. dma_len = (1U << 24);
  404. } else {
  405. u32 base, end;
  406. /* ESP chip limits other variants by 16-bits of transfer
  407. * count. Actually on FAS100A and FAS236 we could get
  408. * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
  409. * in the ESP_CFG2 register but that causes other unwanted
  410. * changes so we don't use it currently.
  411. */
  412. if (dma_len > (1U << 16))
  413. dma_len = (1U << 16);
  414. /* All of the DMA variants hooked up to these chips
  415. * cannot handle crossing a 24-bit address boundary.
  416. */
  417. base = dma_addr & ((1U << 24) - 1U);
  418. end = base + dma_len;
  419. if (end > (1U << 24))
  420. end = (1U <<24);
  421. dma_len = end - base;
  422. }
  423. return dma_len;
  424. }
  425. static int esp_need_to_nego_wide(struct esp_target_data *tp)
  426. {
  427. struct scsi_target *target = tp->starget;
  428. return spi_width(target) != tp->nego_goal_width;
  429. }
  430. static int esp_need_to_nego_sync(struct esp_target_data *tp)
  431. {
  432. struct scsi_target *target = tp->starget;
  433. /* When offset is zero, period is "don't care". */
  434. if (!spi_offset(target) && !tp->nego_goal_offset)
  435. return 0;
  436. if (spi_offset(target) == tp->nego_goal_offset &&
  437. spi_period(target) == tp->nego_goal_period)
  438. return 0;
  439. return 1;
  440. }
  441. static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
  442. struct esp_lun_data *lp)
  443. {
  444. if (!ent->tag[0]) {
  445. /* Non-tagged, slot already taken? */
  446. if (lp->non_tagged_cmd)
  447. return -EBUSY;
  448. if (lp->hold) {
  449. /* We are being held by active tagged
  450. * commands.
  451. */
  452. if (lp->num_tagged)
  453. return -EBUSY;
  454. /* Tagged commands completed, we can unplug
  455. * the queue and run this untagged command.
  456. */
  457. lp->hold = 0;
  458. } else if (lp->num_tagged) {
  459. /* Plug the queue until num_tagged decreases
  460. * to zero in esp_free_lun_tag.
  461. */
  462. lp->hold = 1;
  463. return -EBUSY;
  464. }
  465. lp->non_tagged_cmd = ent;
  466. return 0;
  467. } else {
  468. /* Tagged command, see if blocked by a
  469. * non-tagged one.
  470. */
  471. if (lp->non_tagged_cmd || lp->hold)
  472. return -EBUSY;
  473. }
  474. BUG_ON(lp->tagged_cmds[ent->tag[1]]);
  475. lp->tagged_cmds[ent->tag[1]] = ent;
  476. lp->num_tagged++;
  477. return 0;
  478. }
  479. static void esp_free_lun_tag(struct esp_cmd_entry *ent,
  480. struct esp_lun_data *lp)
  481. {
  482. if (ent->tag[0]) {
  483. BUG_ON(lp->tagged_cmds[ent->tag[1]] != ent);
  484. lp->tagged_cmds[ent->tag[1]] = NULL;
  485. lp->num_tagged--;
  486. } else {
  487. BUG_ON(lp->non_tagged_cmd != ent);
  488. lp->non_tagged_cmd = NULL;
  489. }
  490. }
  491. /* When a contingent allegiance conditon is created, we force feed a
  492. * REQUEST_SENSE command to the device to fetch the sense data. I
  493. * tried many other schemes, relying on the scsi error handling layer
  494. * to send out the REQUEST_SENSE automatically, but this was difficult
  495. * to get right especially in the presence of applications like smartd
  496. * which use SG_IO to send out their own REQUEST_SENSE commands.
  497. */
  498. static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
  499. {
  500. struct scsi_cmnd *cmd = ent->cmd;
  501. struct scsi_device *dev = cmd->device;
  502. int tgt, lun;
  503. u8 *p, val;
  504. tgt = dev->id;
  505. lun = dev->lun;
  506. if (!ent->sense_ptr) {
  507. esp_log_autosense("esp%d: Doing auto-sense for "
  508. "tgt[%d] lun[%d]\n",
  509. esp->host->unique_id, tgt, lun);
  510. ent->sense_ptr = cmd->sense_buffer;
  511. ent->sense_dma = esp->ops->map_single(esp,
  512. ent->sense_ptr,
  513. SCSI_SENSE_BUFFERSIZE,
  514. DMA_FROM_DEVICE);
  515. }
  516. ent->saved_sense_ptr = ent->sense_ptr;
  517. esp->active_cmd = ent;
  518. p = esp->command_block;
  519. esp->msg_out_len = 0;
  520. *p++ = IDENTIFY(0, lun);
  521. *p++ = REQUEST_SENSE;
  522. *p++ = ((dev->scsi_level <= SCSI_2) ?
  523. (lun << 5) : 0);
  524. *p++ = 0;
  525. *p++ = 0;
  526. *p++ = SCSI_SENSE_BUFFERSIZE;
  527. *p++ = 0;
  528. esp->select_state = ESP_SELECT_BASIC;
  529. val = tgt;
  530. if (esp->rev == FASHME)
  531. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  532. esp_write8(val, ESP_BUSID);
  533. esp_write_tgt_sync(esp, tgt);
  534. esp_write_tgt_config3(esp, tgt);
  535. val = (p - esp->command_block);
  536. if (esp->rev == FASHME)
  537. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  538. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  539. val, 16, 0, ESP_CMD_DMA | ESP_CMD_SELA);
  540. }
  541. static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
  542. {
  543. struct esp_cmd_entry *ent;
  544. list_for_each_entry(ent, &esp->queued_cmds, list) {
  545. struct scsi_cmnd *cmd = ent->cmd;
  546. struct scsi_device *dev = cmd->device;
  547. struct esp_lun_data *lp = dev->hostdata;
  548. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  549. ent->tag[0] = 0;
  550. ent->tag[1] = 0;
  551. return ent;
  552. }
  553. if (!scsi_populate_tag_msg(cmd, &ent->tag[0])) {
  554. ent->tag[0] = 0;
  555. ent->tag[1] = 0;
  556. }
  557. if (esp_alloc_lun_tag(ent, lp) < 0)
  558. continue;
  559. return ent;
  560. }
  561. return NULL;
  562. }
  563. static void esp_maybe_execute_command(struct esp *esp)
  564. {
  565. struct esp_target_data *tp;
  566. struct esp_lun_data *lp;
  567. struct scsi_device *dev;
  568. struct scsi_cmnd *cmd;
  569. struct esp_cmd_entry *ent;
  570. int tgt, lun, i;
  571. u32 val, start_cmd;
  572. u8 *p;
  573. if (esp->active_cmd ||
  574. (esp->flags & ESP_FLAG_RESETTING))
  575. return;
  576. ent = find_and_prep_issuable_command(esp);
  577. if (!ent)
  578. return;
  579. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  580. esp_autosense(esp, ent);
  581. return;
  582. }
  583. cmd = ent->cmd;
  584. dev = cmd->device;
  585. tgt = dev->id;
  586. lun = dev->lun;
  587. tp = &esp->target[tgt];
  588. lp = dev->hostdata;
  589. list_del(&ent->list);
  590. list_add(&ent->list, &esp->active_cmds);
  591. esp->active_cmd = ent;
  592. esp_map_dma(esp, cmd);
  593. esp_save_pointers(esp, ent);
  594. esp_check_command_len(esp, cmd);
  595. p = esp->command_block;
  596. esp->msg_out_len = 0;
  597. if (tp->flags & ESP_TGT_CHECK_NEGO) {
  598. /* Need to negotiate. If the target is broken
  599. * go for synchronous transfers and non-wide.
  600. */
  601. if (tp->flags & ESP_TGT_BROKEN) {
  602. tp->flags &= ~ESP_TGT_DISCONNECT;
  603. tp->nego_goal_period = 0;
  604. tp->nego_goal_offset = 0;
  605. tp->nego_goal_width = 0;
  606. tp->nego_goal_tags = 0;
  607. }
  608. /* If the settings are not changing, skip this. */
  609. if (spi_width(tp->starget) == tp->nego_goal_width &&
  610. spi_period(tp->starget) == tp->nego_goal_period &&
  611. spi_offset(tp->starget) == tp->nego_goal_offset) {
  612. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  613. goto build_identify;
  614. }
  615. if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
  616. esp->msg_out_len =
  617. spi_populate_width_msg(&esp->msg_out[0],
  618. (tp->nego_goal_width ?
  619. 1 : 0));
  620. tp->flags |= ESP_TGT_NEGO_WIDE;
  621. } else if (esp_need_to_nego_sync(tp)) {
  622. esp->msg_out_len =
  623. spi_populate_sync_msg(&esp->msg_out[0],
  624. tp->nego_goal_period,
  625. tp->nego_goal_offset);
  626. tp->flags |= ESP_TGT_NEGO_SYNC;
  627. } else {
  628. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  629. }
  630. /* Process it like a slow command. */
  631. if (tp->flags & (ESP_TGT_NEGO_WIDE | ESP_TGT_NEGO_SYNC))
  632. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  633. }
  634. build_identify:
  635. /* If we don't have a lun-data struct yet, we're probing
  636. * so do not disconnect. Also, do not disconnect unless
  637. * we have a tag on this command.
  638. */
  639. if (lp && (tp->flags & ESP_TGT_DISCONNECT) && ent->tag[0])
  640. *p++ = IDENTIFY(1, lun);
  641. else
  642. *p++ = IDENTIFY(0, lun);
  643. if (ent->tag[0] && esp->rev == ESP100) {
  644. /* ESP100 lacks select w/atn3 command, use select
  645. * and stop instead.
  646. */
  647. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  648. }
  649. if (!(esp->flags & ESP_FLAG_DOING_SLOWCMD)) {
  650. start_cmd = ESP_CMD_DMA | ESP_CMD_SELA;
  651. if (ent->tag[0]) {
  652. *p++ = ent->tag[0];
  653. *p++ = ent->tag[1];
  654. start_cmd = ESP_CMD_DMA | ESP_CMD_SA3;
  655. }
  656. for (i = 0; i < cmd->cmd_len; i++)
  657. *p++ = cmd->cmnd[i];
  658. esp->select_state = ESP_SELECT_BASIC;
  659. } else {
  660. esp->cmd_bytes_left = cmd->cmd_len;
  661. esp->cmd_bytes_ptr = &cmd->cmnd[0];
  662. if (ent->tag[0]) {
  663. for (i = esp->msg_out_len - 1;
  664. i >= 0; i--)
  665. esp->msg_out[i + 2] = esp->msg_out[i];
  666. esp->msg_out[0] = ent->tag[0];
  667. esp->msg_out[1] = ent->tag[1];
  668. esp->msg_out_len += 2;
  669. }
  670. start_cmd = ESP_CMD_DMA | ESP_CMD_SELAS;
  671. esp->select_state = ESP_SELECT_MSGOUT;
  672. }
  673. val = tgt;
  674. if (esp->rev == FASHME)
  675. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  676. esp_write8(val, ESP_BUSID);
  677. esp_write_tgt_sync(esp, tgt);
  678. esp_write_tgt_config3(esp, tgt);
  679. val = (p - esp->command_block);
  680. if (esp_debug & ESP_DEBUG_SCSICMD) {
  681. printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
  682. for (i = 0; i < cmd->cmd_len; i++)
  683. printk("%02x ", cmd->cmnd[i]);
  684. printk("]\n");
  685. }
  686. if (esp->rev == FASHME)
  687. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  688. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  689. val, 16, 0, start_cmd);
  690. }
  691. static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
  692. {
  693. struct list_head *head = &esp->esp_cmd_pool;
  694. struct esp_cmd_entry *ret;
  695. if (list_empty(head)) {
  696. ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
  697. } else {
  698. ret = list_entry(head->next, struct esp_cmd_entry, list);
  699. list_del(&ret->list);
  700. memset(ret, 0, sizeof(*ret));
  701. }
  702. return ret;
  703. }
  704. static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
  705. {
  706. list_add(&ent->list, &esp->esp_cmd_pool);
  707. }
  708. static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
  709. struct scsi_cmnd *cmd, unsigned int result)
  710. {
  711. struct scsi_device *dev = cmd->device;
  712. int tgt = dev->id;
  713. int lun = dev->lun;
  714. esp->active_cmd = NULL;
  715. esp_unmap_dma(esp, cmd);
  716. esp_free_lun_tag(ent, dev->hostdata);
  717. cmd->result = result;
  718. if (ent->eh_done) {
  719. complete(ent->eh_done);
  720. ent->eh_done = NULL;
  721. }
  722. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  723. esp->ops->unmap_single(esp, ent->sense_dma,
  724. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  725. ent->sense_ptr = NULL;
  726. /* Restore the message/status bytes to what we actually
  727. * saw originally. Also, report that we are providing
  728. * the sense data.
  729. */
  730. cmd->result = ((DRIVER_SENSE << 24) |
  731. (DID_OK << 16) |
  732. (COMMAND_COMPLETE << 8) |
  733. (SAM_STAT_CHECK_CONDITION << 0));
  734. ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
  735. if (esp_debug & ESP_DEBUG_AUTOSENSE) {
  736. int i;
  737. printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
  738. esp->host->unique_id, tgt, lun);
  739. for (i = 0; i < 18; i++)
  740. printk("%02x ", cmd->sense_buffer[i]);
  741. printk("]\n");
  742. }
  743. }
  744. cmd->scsi_done(cmd);
  745. list_del(&ent->list);
  746. esp_put_ent(esp, ent);
  747. esp_maybe_execute_command(esp);
  748. }
  749. static unsigned int compose_result(unsigned int status, unsigned int message,
  750. unsigned int driver_code)
  751. {
  752. return (status | (message << 8) | (driver_code << 16));
  753. }
  754. static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
  755. {
  756. struct scsi_device *dev = ent->cmd->device;
  757. struct esp_lun_data *lp = dev->hostdata;
  758. scsi_track_queue_full(dev, lp->num_tagged - 1);
  759. }
  760. static int esp_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  761. {
  762. struct scsi_device *dev = cmd->device;
  763. struct esp *esp = shost_priv(dev->host);
  764. struct esp_cmd_priv *spriv;
  765. struct esp_cmd_entry *ent;
  766. ent = esp_get_ent(esp);
  767. if (!ent)
  768. return SCSI_MLQUEUE_HOST_BUSY;
  769. ent->cmd = cmd;
  770. cmd->scsi_done = done;
  771. spriv = ESP_CMD_PRIV(cmd);
  772. spriv->u.dma_addr = ~(dma_addr_t)0x0;
  773. list_add_tail(&ent->list, &esp->queued_cmds);
  774. esp_maybe_execute_command(esp);
  775. return 0;
  776. }
  777. static DEF_SCSI_QCMD(esp_queuecommand)
  778. static int esp_check_gross_error(struct esp *esp)
  779. {
  780. if (esp->sreg & ESP_STAT_SPAM) {
  781. /* Gross Error, could be one of:
  782. * - top of fifo overwritten
  783. * - top of command register overwritten
  784. * - DMA programmed with wrong direction
  785. * - improper phase change
  786. */
  787. printk(KERN_ERR PFX "esp%d: Gross error sreg[%02x]\n",
  788. esp->host->unique_id, esp->sreg);
  789. /* XXX Reset the chip. XXX */
  790. return 1;
  791. }
  792. return 0;
  793. }
  794. static int esp_check_spur_intr(struct esp *esp)
  795. {
  796. switch (esp->rev) {
  797. case ESP100:
  798. case ESP100A:
  799. /* The interrupt pending bit of the status register cannot
  800. * be trusted on these revisions.
  801. */
  802. esp->sreg &= ~ESP_STAT_INTR;
  803. break;
  804. default:
  805. if (!(esp->sreg & ESP_STAT_INTR)) {
  806. esp->ireg = esp_read8(ESP_INTRPT);
  807. if (esp->ireg & ESP_INTR_SR)
  808. return 1;
  809. /* If the DMA is indicating interrupt pending and the
  810. * ESP is not, the only possibility is a DMA error.
  811. */
  812. if (!esp->ops->dma_error(esp)) {
  813. printk(KERN_ERR PFX "esp%d: Spurious irq, "
  814. "sreg=%02x.\n",
  815. esp->host->unique_id, esp->sreg);
  816. return -1;
  817. }
  818. printk(KERN_ERR PFX "esp%d: DMA error\n",
  819. esp->host->unique_id);
  820. /* XXX Reset the chip. XXX */
  821. return -1;
  822. }
  823. break;
  824. }
  825. return 0;
  826. }
  827. static void esp_schedule_reset(struct esp *esp)
  828. {
  829. esp_log_reset("ESP: esp_schedule_reset() from %p\n",
  830. __builtin_return_address(0));
  831. esp->flags |= ESP_FLAG_RESETTING;
  832. esp_event(esp, ESP_EVENT_RESET);
  833. }
  834. /* In order to avoid having to add a special half-reconnected state
  835. * into the driver we just sit here and poll through the rest of
  836. * the reselection process to get the tag message bytes.
  837. */
  838. static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
  839. struct esp_lun_data *lp)
  840. {
  841. struct esp_cmd_entry *ent;
  842. int i;
  843. if (!lp->num_tagged) {
  844. printk(KERN_ERR PFX "esp%d: Reconnect w/num_tagged==0\n",
  845. esp->host->unique_id);
  846. return NULL;
  847. }
  848. esp_log_reconnect("ESP: reconnect tag, ");
  849. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  850. if (esp->ops->irq_pending(esp))
  851. break;
  852. }
  853. if (i == ESP_QUICKIRQ_LIMIT) {
  854. printk(KERN_ERR PFX "esp%d: Reconnect IRQ1 timeout\n",
  855. esp->host->unique_id);
  856. return NULL;
  857. }
  858. esp->sreg = esp_read8(ESP_STATUS);
  859. esp->ireg = esp_read8(ESP_INTRPT);
  860. esp_log_reconnect("IRQ(%d:%x:%x), ",
  861. i, esp->ireg, esp->sreg);
  862. if (esp->ireg & ESP_INTR_DC) {
  863. printk(KERN_ERR PFX "esp%d: Reconnect, got disconnect.\n",
  864. esp->host->unique_id);
  865. return NULL;
  866. }
  867. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
  868. printk(KERN_ERR PFX "esp%d: Reconnect, not MIP sreg[%02x].\n",
  869. esp->host->unique_id, esp->sreg);
  870. return NULL;
  871. }
  872. /* DMA in the tag bytes... */
  873. esp->command_block[0] = 0xff;
  874. esp->command_block[1] = 0xff;
  875. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  876. 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
  877. /* ACK the msssage. */
  878. scsi_esp_cmd(esp, ESP_CMD_MOK);
  879. for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
  880. if (esp->ops->irq_pending(esp)) {
  881. esp->sreg = esp_read8(ESP_STATUS);
  882. esp->ireg = esp_read8(ESP_INTRPT);
  883. if (esp->ireg & ESP_INTR_FDONE)
  884. break;
  885. }
  886. udelay(1);
  887. }
  888. if (i == ESP_RESELECT_TAG_LIMIT) {
  889. printk(KERN_ERR PFX "esp%d: Reconnect IRQ2 timeout\n",
  890. esp->host->unique_id);
  891. return NULL;
  892. }
  893. esp->ops->dma_drain(esp);
  894. esp->ops->dma_invalidate(esp);
  895. esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
  896. i, esp->ireg, esp->sreg,
  897. esp->command_block[0],
  898. esp->command_block[1]);
  899. if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
  900. esp->command_block[0] > ORDERED_QUEUE_TAG) {
  901. printk(KERN_ERR PFX "esp%d: Reconnect, bad tag "
  902. "type %02x.\n",
  903. esp->host->unique_id, esp->command_block[0]);
  904. return NULL;
  905. }
  906. ent = lp->tagged_cmds[esp->command_block[1]];
  907. if (!ent) {
  908. printk(KERN_ERR PFX "esp%d: Reconnect, no entry for "
  909. "tag %02x.\n",
  910. esp->host->unique_id, esp->command_block[1]);
  911. return NULL;
  912. }
  913. return ent;
  914. }
  915. static int esp_reconnect(struct esp *esp)
  916. {
  917. struct esp_cmd_entry *ent;
  918. struct esp_target_data *tp;
  919. struct esp_lun_data *lp;
  920. struct scsi_device *dev;
  921. int target, lun;
  922. BUG_ON(esp->active_cmd);
  923. if (esp->rev == FASHME) {
  924. /* FASHME puts the target and lun numbers directly
  925. * into the fifo.
  926. */
  927. target = esp->fifo[0];
  928. lun = esp->fifo[1] & 0x7;
  929. } else {
  930. u8 bits = esp_read8(ESP_FDATA);
  931. /* Older chips put the lun directly into the fifo, but
  932. * the target is given as a sample of the arbitration
  933. * lines on the bus at reselection time. So we should
  934. * see the ID of the ESP and the one reconnecting target
  935. * set in the bitmap.
  936. */
  937. if (!(bits & esp->scsi_id_mask))
  938. goto do_reset;
  939. bits &= ~esp->scsi_id_mask;
  940. if (!bits || (bits & (bits - 1)))
  941. goto do_reset;
  942. target = ffs(bits) - 1;
  943. lun = (esp_read8(ESP_FDATA) & 0x7);
  944. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  945. if (esp->rev == ESP100) {
  946. u8 ireg = esp_read8(ESP_INTRPT);
  947. /* This chip has a bug during reselection that can
  948. * cause a spurious illegal-command interrupt, which
  949. * we simply ACK here. Another possibility is a bus
  950. * reset so we must check for that.
  951. */
  952. if (ireg & ESP_INTR_SR)
  953. goto do_reset;
  954. }
  955. scsi_esp_cmd(esp, ESP_CMD_NULL);
  956. }
  957. esp_write_tgt_sync(esp, target);
  958. esp_write_tgt_config3(esp, target);
  959. scsi_esp_cmd(esp, ESP_CMD_MOK);
  960. if (esp->rev == FASHME)
  961. esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
  962. ESP_BUSID);
  963. tp = &esp->target[target];
  964. dev = __scsi_device_lookup_by_target(tp->starget, lun);
  965. if (!dev) {
  966. printk(KERN_ERR PFX "esp%d: Reconnect, no lp "
  967. "tgt[%u] lun[%u]\n",
  968. esp->host->unique_id, target, lun);
  969. goto do_reset;
  970. }
  971. lp = dev->hostdata;
  972. ent = lp->non_tagged_cmd;
  973. if (!ent) {
  974. ent = esp_reconnect_with_tag(esp, lp);
  975. if (!ent)
  976. goto do_reset;
  977. }
  978. esp->active_cmd = ent;
  979. if (ent->flags & ESP_CMD_FLAG_ABORT) {
  980. esp->msg_out[0] = ABORT_TASK_SET;
  981. esp->msg_out_len = 1;
  982. scsi_esp_cmd(esp, ESP_CMD_SATN);
  983. }
  984. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  985. esp_restore_pointers(esp, ent);
  986. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  987. return 1;
  988. do_reset:
  989. esp_schedule_reset(esp);
  990. return 0;
  991. }
  992. static int esp_finish_select(struct esp *esp)
  993. {
  994. struct esp_cmd_entry *ent;
  995. struct scsi_cmnd *cmd;
  996. u8 orig_select_state;
  997. orig_select_state = esp->select_state;
  998. /* No longer selecting. */
  999. esp->select_state = ESP_SELECT_NONE;
  1000. esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
  1001. ent = esp->active_cmd;
  1002. cmd = ent->cmd;
  1003. if (esp->ops->dma_error(esp)) {
  1004. /* If we see a DMA error during or as a result of selection,
  1005. * all bets are off.
  1006. */
  1007. esp_schedule_reset(esp);
  1008. esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
  1009. return 0;
  1010. }
  1011. esp->ops->dma_invalidate(esp);
  1012. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  1013. struct esp_target_data *tp = &esp->target[cmd->device->id];
  1014. /* Carefully back out of the selection attempt. Release
  1015. * resources (such as DMA mapping & TAG) and reset state (such
  1016. * as message out and command delivery variables).
  1017. */
  1018. if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1019. esp_unmap_dma(esp, cmd);
  1020. esp_free_lun_tag(ent, cmd->device->hostdata);
  1021. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
  1022. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  1023. esp->cmd_bytes_ptr = NULL;
  1024. esp->cmd_bytes_left = 0;
  1025. } else {
  1026. esp->ops->unmap_single(esp, ent->sense_dma,
  1027. SCSI_SENSE_BUFFERSIZE,
  1028. DMA_FROM_DEVICE);
  1029. ent->sense_ptr = NULL;
  1030. }
  1031. /* Now that the state is unwound properly, put back onto
  1032. * the issue queue. This command is no longer active.
  1033. */
  1034. list_del(&ent->list);
  1035. list_add(&ent->list, &esp->queued_cmds);
  1036. esp->active_cmd = NULL;
  1037. /* Return value ignored by caller, it directly invokes
  1038. * esp_reconnect().
  1039. */
  1040. return 0;
  1041. }
  1042. if (esp->ireg == ESP_INTR_DC) {
  1043. struct scsi_device *dev = cmd->device;
  1044. /* Disconnect. Make sure we re-negotiate sync and
  1045. * wide parameters if this target starts responding
  1046. * again in the future.
  1047. */
  1048. esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
  1049. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1050. esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
  1051. return 1;
  1052. }
  1053. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  1054. /* Selection successful. On pre-FAST chips we have
  1055. * to do a NOP and possibly clean out the FIFO.
  1056. */
  1057. if (esp->rev <= ESP236) {
  1058. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1059. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1060. if (!fcnt &&
  1061. (!esp->prev_soff ||
  1062. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  1063. esp_flush_fifo(esp);
  1064. }
  1065. /* If we are doing a slow command, negotiation, etc.
  1066. * we'll do the right thing as we transition to the
  1067. * next phase.
  1068. */
  1069. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1070. return 0;
  1071. }
  1072. printk("ESP: Unexpected selection completion ireg[%x].\n",
  1073. esp->ireg);
  1074. esp_schedule_reset(esp);
  1075. return 0;
  1076. }
  1077. static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
  1078. struct scsi_cmnd *cmd)
  1079. {
  1080. int fifo_cnt, ecount, bytes_sent, flush_fifo;
  1081. fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1082. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  1083. fifo_cnt <<= 1;
  1084. ecount = 0;
  1085. if (!(esp->sreg & ESP_STAT_TCNT)) {
  1086. ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
  1087. (((unsigned int)esp_read8(ESP_TCMED)) << 8));
  1088. if (esp->rev == FASHME)
  1089. ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
  1090. }
  1091. bytes_sent = esp->data_dma_len;
  1092. bytes_sent -= ecount;
  1093. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1094. bytes_sent -= fifo_cnt;
  1095. flush_fifo = 0;
  1096. if (!esp->prev_soff) {
  1097. /* Synchronous data transfer, always flush fifo. */
  1098. flush_fifo = 1;
  1099. } else {
  1100. if (esp->rev == ESP100) {
  1101. u32 fflags, phase;
  1102. /* ESP100 has a chip bug where in the synchronous data
  1103. * phase it can mistake a final long REQ pulse from the
  1104. * target as an extra data byte. Fun.
  1105. *
  1106. * To detect this case we resample the status register
  1107. * and fifo flags. If we're still in a data phase and
  1108. * we see spurious chunks in the fifo, we return error
  1109. * to the caller which should reset and set things up
  1110. * such that we only try future transfers to this
  1111. * target in synchronous mode.
  1112. */
  1113. esp->sreg = esp_read8(ESP_STATUS);
  1114. phase = esp->sreg & ESP_STAT_PMASK;
  1115. fflags = esp_read8(ESP_FFLAGS);
  1116. if ((phase == ESP_DOP &&
  1117. (fflags & ESP_FF_ONOTZERO)) ||
  1118. (phase == ESP_DIP &&
  1119. (fflags & ESP_FF_FBYTES)))
  1120. return -1;
  1121. }
  1122. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1123. flush_fifo = 1;
  1124. }
  1125. if (flush_fifo)
  1126. esp_flush_fifo(esp);
  1127. return bytes_sent;
  1128. }
  1129. static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
  1130. u8 scsi_period, u8 scsi_offset,
  1131. u8 esp_stp, u8 esp_soff)
  1132. {
  1133. spi_period(tp->starget) = scsi_period;
  1134. spi_offset(tp->starget) = scsi_offset;
  1135. spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
  1136. if (esp_soff) {
  1137. esp_stp &= 0x1f;
  1138. esp_soff |= esp->radelay;
  1139. if (esp->rev >= FAS236) {
  1140. u8 bit = ESP_CONFIG3_FSCSI;
  1141. if (esp->rev >= FAS100A)
  1142. bit = ESP_CONFIG3_FAST;
  1143. if (scsi_period < 50) {
  1144. if (esp->rev == FASHME)
  1145. esp_soff &= ~esp->radelay;
  1146. tp->esp_config3 |= bit;
  1147. } else {
  1148. tp->esp_config3 &= ~bit;
  1149. }
  1150. esp->prev_cfg3 = tp->esp_config3;
  1151. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1152. }
  1153. }
  1154. tp->esp_period = esp->prev_stp = esp_stp;
  1155. tp->esp_offset = esp->prev_soff = esp_soff;
  1156. esp_write8(esp_soff, ESP_SOFF);
  1157. esp_write8(esp_stp, ESP_STP);
  1158. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1159. spi_display_xfer_agreement(tp->starget);
  1160. }
  1161. static void esp_msgin_reject(struct esp *esp)
  1162. {
  1163. struct esp_cmd_entry *ent = esp->active_cmd;
  1164. struct scsi_cmnd *cmd = ent->cmd;
  1165. struct esp_target_data *tp;
  1166. int tgt;
  1167. tgt = cmd->device->id;
  1168. tp = &esp->target[tgt];
  1169. if (tp->flags & ESP_TGT_NEGO_WIDE) {
  1170. tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
  1171. if (!esp_need_to_nego_sync(tp)) {
  1172. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1173. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1174. } else {
  1175. esp->msg_out_len =
  1176. spi_populate_sync_msg(&esp->msg_out[0],
  1177. tp->nego_goal_period,
  1178. tp->nego_goal_offset);
  1179. tp->flags |= ESP_TGT_NEGO_SYNC;
  1180. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1181. }
  1182. return;
  1183. }
  1184. if (tp->flags & ESP_TGT_NEGO_SYNC) {
  1185. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1186. tp->esp_period = 0;
  1187. tp->esp_offset = 0;
  1188. esp_setsync(esp, tp, 0, 0, 0, 0);
  1189. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1190. return;
  1191. }
  1192. esp->msg_out[0] = ABORT_TASK_SET;
  1193. esp->msg_out_len = 1;
  1194. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1195. }
  1196. static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
  1197. {
  1198. u8 period = esp->msg_in[3];
  1199. u8 offset = esp->msg_in[4];
  1200. u8 stp;
  1201. if (!(tp->flags & ESP_TGT_NEGO_SYNC))
  1202. goto do_reject;
  1203. if (offset > 15)
  1204. goto do_reject;
  1205. if (offset) {
  1206. int one_clock;
  1207. if (period > esp->max_period) {
  1208. period = offset = 0;
  1209. goto do_sdtr;
  1210. }
  1211. if (period < esp->min_period)
  1212. goto do_reject;
  1213. one_clock = esp->ccycle / 1000;
  1214. stp = DIV_ROUND_UP(period << 2, one_clock);
  1215. if (stp && esp->rev >= FAS236) {
  1216. if (stp >= 50)
  1217. stp--;
  1218. }
  1219. } else {
  1220. stp = 0;
  1221. }
  1222. esp_setsync(esp, tp, period, offset, stp, offset);
  1223. return;
  1224. do_reject:
  1225. esp->msg_out[0] = MESSAGE_REJECT;
  1226. esp->msg_out_len = 1;
  1227. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1228. return;
  1229. do_sdtr:
  1230. tp->nego_goal_period = period;
  1231. tp->nego_goal_offset = offset;
  1232. esp->msg_out_len =
  1233. spi_populate_sync_msg(&esp->msg_out[0],
  1234. tp->nego_goal_period,
  1235. tp->nego_goal_offset);
  1236. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1237. }
  1238. static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
  1239. {
  1240. int size = 8 << esp->msg_in[3];
  1241. u8 cfg3;
  1242. if (esp->rev != FASHME)
  1243. goto do_reject;
  1244. if (size != 8 && size != 16)
  1245. goto do_reject;
  1246. if (!(tp->flags & ESP_TGT_NEGO_WIDE))
  1247. goto do_reject;
  1248. cfg3 = tp->esp_config3;
  1249. if (size == 16) {
  1250. tp->flags |= ESP_TGT_WIDE;
  1251. cfg3 |= ESP_CONFIG3_EWIDE;
  1252. } else {
  1253. tp->flags &= ~ESP_TGT_WIDE;
  1254. cfg3 &= ~ESP_CONFIG3_EWIDE;
  1255. }
  1256. tp->esp_config3 = cfg3;
  1257. esp->prev_cfg3 = cfg3;
  1258. esp_write8(cfg3, ESP_CFG3);
  1259. tp->flags &= ~ESP_TGT_NEGO_WIDE;
  1260. spi_period(tp->starget) = 0;
  1261. spi_offset(tp->starget) = 0;
  1262. if (!esp_need_to_nego_sync(tp)) {
  1263. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1264. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1265. } else {
  1266. esp->msg_out_len =
  1267. spi_populate_sync_msg(&esp->msg_out[0],
  1268. tp->nego_goal_period,
  1269. tp->nego_goal_offset);
  1270. tp->flags |= ESP_TGT_NEGO_SYNC;
  1271. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1272. }
  1273. return;
  1274. do_reject:
  1275. esp->msg_out[0] = MESSAGE_REJECT;
  1276. esp->msg_out_len = 1;
  1277. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1278. }
  1279. static void esp_msgin_extended(struct esp *esp)
  1280. {
  1281. struct esp_cmd_entry *ent = esp->active_cmd;
  1282. struct scsi_cmnd *cmd = ent->cmd;
  1283. struct esp_target_data *tp;
  1284. int tgt = cmd->device->id;
  1285. tp = &esp->target[tgt];
  1286. if (esp->msg_in[2] == EXTENDED_SDTR) {
  1287. esp_msgin_sdtr(esp, tp);
  1288. return;
  1289. }
  1290. if (esp->msg_in[2] == EXTENDED_WDTR) {
  1291. esp_msgin_wdtr(esp, tp);
  1292. return;
  1293. }
  1294. printk("ESP: Unexpected extended msg type %x\n",
  1295. esp->msg_in[2]);
  1296. esp->msg_out[0] = ABORT_TASK_SET;
  1297. esp->msg_out_len = 1;
  1298. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1299. }
  1300. /* Analyze msgin bytes received from target so far. Return non-zero
  1301. * if there are more bytes needed to complete the message.
  1302. */
  1303. static int esp_msgin_process(struct esp *esp)
  1304. {
  1305. u8 msg0 = esp->msg_in[0];
  1306. int len = esp->msg_in_len;
  1307. if (msg0 & 0x80) {
  1308. /* Identify */
  1309. printk("ESP: Unexpected msgin identify\n");
  1310. return 0;
  1311. }
  1312. switch (msg0) {
  1313. case EXTENDED_MESSAGE:
  1314. if (len == 1)
  1315. return 1;
  1316. if (len < esp->msg_in[1] + 2)
  1317. return 1;
  1318. esp_msgin_extended(esp);
  1319. return 0;
  1320. case IGNORE_WIDE_RESIDUE: {
  1321. struct esp_cmd_entry *ent;
  1322. struct esp_cmd_priv *spriv;
  1323. if (len == 1)
  1324. return 1;
  1325. if (esp->msg_in[1] != 1)
  1326. goto do_reject;
  1327. ent = esp->active_cmd;
  1328. spriv = ESP_CMD_PRIV(ent->cmd);
  1329. if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
  1330. spriv->cur_sg--;
  1331. spriv->cur_residue = 1;
  1332. } else
  1333. spriv->cur_residue++;
  1334. spriv->tot_residue++;
  1335. return 0;
  1336. }
  1337. case NOP:
  1338. return 0;
  1339. case RESTORE_POINTERS:
  1340. esp_restore_pointers(esp, esp->active_cmd);
  1341. return 0;
  1342. case SAVE_POINTERS:
  1343. esp_save_pointers(esp, esp->active_cmd);
  1344. return 0;
  1345. case COMMAND_COMPLETE:
  1346. case DISCONNECT: {
  1347. struct esp_cmd_entry *ent = esp->active_cmd;
  1348. ent->message = msg0;
  1349. esp_event(esp, ESP_EVENT_FREE_BUS);
  1350. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1351. return 0;
  1352. }
  1353. case MESSAGE_REJECT:
  1354. esp_msgin_reject(esp);
  1355. return 0;
  1356. default:
  1357. do_reject:
  1358. esp->msg_out[0] = MESSAGE_REJECT;
  1359. esp->msg_out_len = 1;
  1360. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1361. return 0;
  1362. }
  1363. }
  1364. static int esp_process_event(struct esp *esp)
  1365. {
  1366. int write;
  1367. again:
  1368. write = 0;
  1369. switch (esp->event) {
  1370. case ESP_EVENT_CHECK_PHASE:
  1371. switch (esp->sreg & ESP_STAT_PMASK) {
  1372. case ESP_DOP:
  1373. esp_event(esp, ESP_EVENT_DATA_OUT);
  1374. break;
  1375. case ESP_DIP:
  1376. esp_event(esp, ESP_EVENT_DATA_IN);
  1377. break;
  1378. case ESP_STATP:
  1379. esp_flush_fifo(esp);
  1380. scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
  1381. esp_event(esp, ESP_EVENT_STATUS);
  1382. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1383. return 1;
  1384. case ESP_MOP:
  1385. esp_event(esp, ESP_EVENT_MSGOUT);
  1386. break;
  1387. case ESP_MIP:
  1388. esp_event(esp, ESP_EVENT_MSGIN);
  1389. break;
  1390. case ESP_CMDP:
  1391. esp_event(esp, ESP_EVENT_CMD_START);
  1392. break;
  1393. default:
  1394. printk("ESP: Unexpected phase, sreg=%02x\n",
  1395. esp->sreg);
  1396. esp_schedule_reset(esp);
  1397. return 0;
  1398. }
  1399. goto again;
  1400. break;
  1401. case ESP_EVENT_DATA_IN:
  1402. write = 1;
  1403. /* fallthru */
  1404. case ESP_EVENT_DATA_OUT: {
  1405. struct esp_cmd_entry *ent = esp->active_cmd;
  1406. struct scsi_cmnd *cmd = ent->cmd;
  1407. dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
  1408. unsigned int dma_len = esp_cur_dma_len(ent, cmd);
  1409. if (esp->rev == ESP100)
  1410. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1411. if (write)
  1412. ent->flags |= ESP_CMD_FLAG_WRITE;
  1413. else
  1414. ent->flags &= ~ESP_CMD_FLAG_WRITE;
  1415. if (esp->ops->dma_length_limit)
  1416. dma_len = esp->ops->dma_length_limit(esp, dma_addr,
  1417. dma_len);
  1418. else
  1419. dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
  1420. esp->data_dma_len = dma_len;
  1421. if (!dma_len) {
  1422. printk(KERN_ERR PFX "esp%d: DMA length is zero!\n",
  1423. esp->host->unique_id);
  1424. printk(KERN_ERR PFX "esp%d: cur adr[%08llx] len[%08x]\n",
  1425. esp->host->unique_id,
  1426. (unsigned long long)esp_cur_dma_addr(ent, cmd),
  1427. esp_cur_dma_len(ent, cmd));
  1428. esp_schedule_reset(esp);
  1429. return 0;
  1430. }
  1431. esp_log_datastart("ESP: start data addr[%08llx] len[%u] "
  1432. "write(%d)\n",
  1433. (unsigned long long)dma_addr, dma_len, write);
  1434. esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
  1435. write, ESP_CMD_DMA | ESP_CMD_TI);
  1436. esp_event(esp, ESP_EVENT_DATA_DONE);
  1437. break;
  1438. }
  1439. case ESP_EVENT_DATA_DONE: {
  1440. struct esp_cmd_entry *ent = esp->active_cmd;
  1441. struct scsi_cmnd *cmd = ent->cmd;
  1442. int bytes_sent;
  1443. if (esp->ops->dma_error(esp)) {
  1444. printk("ESP: data done, DMA error, resetting\n");
  1445. esp_schedule_reset(esp);
  1446. return 0;
  1447. }
  1448. if (ent->flags & ESP_CMD_FLAG_WRITE) {
  1449. /* XXX parity errors, etc. XXX */
  1450. esp->ops->dma_drain(esp);
  1451. }
  1452. esp->ops->dma_invalidate(esp);
  1453. if (esp->ireg != ESP_INTR_BSERV) {
  1454. /* We should always see exactly a bus-service
  1455. * interrupt at the end of a successful transfer.
  1456. */
  1457. printk("ESP: data done, not BSERV, resetting\n");
  1458. esp_schedule_reset(esp);
  1459. return 0;
  1460. }
  1461. bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
  1462. esp_log_datadone("ESP: data done flgs[%x] sent[%d]\n",
  1463. ent->flags, bytes_sent);
  1464. if (bytes_sent < 0) {
  1465. /* XXX force sync mode for this target XXX */
  1466. esp_schedule_reset(esp);
  1467. return 0;
  1468. }
  1469. esp_advance_dma(esp, ent, cmd, bytes_sent);
  1470. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1471. goto again;
  1472. }
  1473. case ESP_EVENT_STATUS: {
  1474. struct esp_cmd_entry *ent = esp->active_cmd;
  1475. if (esp->ireg & ESP_INTR_FDONE) {
  1476. ent->status = esp_read8(ESP_FDATA);
  1477. ent->message = esp_read8(ESP_FDATA);
  1478. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1479. } else if (esp->ireg == ESP_INTR_BSERV) {
  1480. ent->status = esp_read8(ESP_FDATA);
  1481. ent->message = 0xff;
  1482. esp_event(esp, ESP_EVENT_MSGIN);
  1483. return 0;
  1484. }
  1485. if (ent->message != COMMAND_COMPLETE) {
  1486. printk("ESP: Unexpected message %x in status\n",
  1487. ent->message);
  1488. esp_schedule_reset(esp);
  1489. return 0;
  1490. }
  1491. esp_event(esp, ESP_EVENT_FREE_BUS);
  1492. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1493. break;
  1494. }
  1495. case ESP_EVENT_FREE_BUS: {
  1496. struct esp_cmd_entry *ent = esp->active_cmd;
  1497. struct scsi_cmnd *cmd = ent->cmd;
  1498. if (ent->message == COMMAND_COMPLETE ||
  1499. ent->message == DISCONNECT)
  1500. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1501. if (ent->message == COMMAND_COMPLETE) {
  1502. esp_log_cmddone("ESP: Command done status[%x] "
  1503. "message[%x]\n",
  1504. ent->status, ent->message);
  1505. if (ent->status == SAM_STAT_TASK_SET_FULL)
  1506. esp_event_queue_full(esp, ent);
  1507. if (ent->status == SAM_STAT_CHECK_CONDITION &&
  1508. !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1509. ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
  1510. esp_autosense(esp, ent);
  1511. } else {
  1512. esp_cmd_is_done(esp, ent, cmd,
  1513. compose_result(ent->status,
  1514. ent->message,
  1515. DID_OK));
  1516. }
  1517. } else if (ent->message == DISCONNECT) {
  1518. esp_log_disconnect("ESP: Disconnecting tgt[%d] "
  1519. "tag[%x:%x]\n",
  1520. cmd->device->id,
  1521. ent->tag[0], ent->tag[1]);
  1522. esp->active_cmd = NULL;
  1523. esp_maybe_execute_command(esp);
  1524. } else {
  1525. printk("ESP: Unexpected message %x in freebus\n",
  1526. ent->message);
  1527. esp_schedule_reset(esp);
  1528. return 0;
  1529. }
  1530. if (esp->active_cmd)
  1531. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1532. break;
  1533. }
  1534. case ESP_EVENT_MSGOUT: {
  1535. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1536. if (esp_debug & ESP_DEBUG_MSGOUT) {
  1537. int i;
  1538. printk("ESP: Sending message [ ");
  1539. for (i = 0; i < esp->msg_out_len; i++)
  1540. printk("%02x ", esp->msg_out[i]);
  1541. printk("]\n");
  1542. }
  1543. if (esp->rev == FASHME) {
  1544. int i;
  1545. /* Always use the fifo. */
  1546. for (i = 0; i < esp->msg_out_len; i++) {
  1547. esp_write8(esp->msg_out[i], ESP_FDATA);
  1548. esp_write8(0, ESP_FDATA);
  1549. }
  1550. scsi_esp_cmd(esp, ESP_CMD_TI);
  1551. } else {
  1552. if (esp->msg_out_len == 1) {
  1553. esp_write8(esp->msg_out[0], ESP_FDATA);
  1554. scsi_esp_cmd(esp, ESP_CMD_TI);
  1555. } else {
  1556. /* Use DMA. */
  1557. memcpy(esp->command_block,
  1558. esp->msg_out,
  1559. esp->msg_out_len);
  1560. esp->ops->send_dma_cmd(esp,
  1561. esp->command_block_dma,
  1562. esp->msg_out_len,
  1563. esp->msg_out_len,
  1564. 0,
  1565. ESP_CMD_DMA|ESP_CMD_TI);
  1566. }
  1567. }
  1568. esp_event(esp, ESP_EVENT_MSGOUT_DONE);
  1569. break;
  1570. }
  1571. case ESP_EVENT_MSGOUT_DONE:
  1572. if (esp->rev == FASHME) {
  1573. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1574. } else {
  1575. if (esp->msg_out_len > 1)
  1576. esp->ops->dma_invalidate(esp);
  1577. }
  1578. if (!(esp->ireg & ESP_INTR_DC)) {
  1579. if (esp->rev != FASHME)
  1580. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1581. }
  1582. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1583. goto again;
  1584. case ESP_EVENT_MSGIN:
  1585. if (esp->ireg & ESP_INTR_BSERV) {
  1586. if (esp->rev == FASHME) {
  1587. if (!(esp_read8(ESP_STATUS2) &
  1588. ESP_STAT2_FEMPTY))
  1589. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1590. } else {
  1591. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1592. if (esp->rev == ESP100)
  1593. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1594. }
  1595. scsi_esp_cmd(esp, ESP_CMD_TI);
  1596. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1597. return 1;
  1598. }
  1599. if (esp->ireg & ESP_INTR_FDONE) {
  1600. u8 val;
  1601. if (esp->rev == FASHME)
  1602. val = esp->fifo[0];
  1603. else
  1604. val = esp_read8(ESP_FDATA);
  1605. esp->msg_in[esp->msg_in_len++] = val;
  1606. esp_log_msgin("ESP: Got msgin byte %x\n", val);
  1607. if (!esp_msgin_process(esp))
  1608. esp->msg_in_len = 0;
  1609. if (esp->rev == FASHME)
  1610. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1611. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1612. if (esp->event != ESP_EVENT_FREE_BUS)
  1613. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1614. } else {
  1615. printk("ESP: MSGIN neither BSERV not FDON, resetting");
  1616. esp_schedule_reset(esp);
  1617. return 0;
  1618. }
  1619. break;
  1620. case ESP_EVENT_CMD_START:
  1621. memcpy(esp->command_block, esp->cmd_bytes_ptr,
  1622. esp->cmd_bytes_left);
  1623. if (esp->rev == FASHME)
  1624. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1625. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  1626. esp->cmd_bytes_left, 16, 0,
  1627. ESP_CMD_DMA | ESP_CMD_TI);
  1628. esp_event(esp, ESP_EVENT_CMD_DONE);
  1629. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1630. break;
  1631. case ESP_EVENT_CMD_DONE:
  1632. esp->ops->dma_invalidate(esp);
  1633. if (esp->ireg & ESP_INTR_BSERV) {
  1634. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1635. goto again;
  1636. }
  1637. esp_schedule_reset(esp);
  1638. return 0;
  1639. break;
  1640. case ESP_EVENT_RESET:
  1641. scsi_esp_cmd(esp, ESP_CMD_RS);
  1642. break;
  1643. default:
  1644. printk("ESP: Unexpected event %x, resetting\n",
  1645. esp->event);
  1646. esp_schedule_reset(esp);
  1647. return 0;
  1648. break;
  1649. }
  1650. return 1;
  1651. }
  1652. static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
  1653. {
  1654. struct scsi_cmnd *cmd = ent->cmd;
  1655. esp_unmap_dma(esp, cmd);
  1656. esp_free_lun_tag(ent, cmd->device->hostdata);
  1657. cmd->result = DID_RESET << 16;
  1658. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  1659. esp->ops->unmap_single(esp, ent->sense_dma,
  1660. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  1661. ent->sense_ptr = NULL;
  1662. }
  1663. cmd->scsi_done(cmd);
  1664. list_del(&ent->list);
  1665. esp_put_ent(esp, ent);
  1666. }
  1667. static void esp_clear_hold(struct scsi_device *dev, void *data)
  1668. {
  1669. struct esp_lun_data *lp = dev->hostdata;
  1670. BUG_ON(lp->num_tagged);
  1671. lp->hold = 0;
  1672. }
  1673. static void esp_reset_cleanup(struct esp *esp)
  1674. {
  1675. struct esp_cmd_entry *ent, *tmp;
  1676. int i;
  1677. list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
  1678. struct scsi_cmnd *cmd = ent->cmd;
  1679. list_del(&ent->list);
  1680. cmd->result = DID_RESET << 16;
  1681. cmd->scsi_done(cmd);
  1682. esp_put_ent(esp, ent);
  1683. }
  1684. list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
  1685. if (ent == esp->active_cmd)
  1686. esp->active_cmd = NULL;
  1687. esp_reset_cleanup_one(esp, ent);
  1688. }
  1689. BUG_ON(esp->active_cmd != NULL);
  1690. /* Force renegotiation of sync/wide transfers. */
  1691. for (i = 0; i < ESP_MAX_TARGET; i++) {
  1692. struct esp_target_data *tp = &esp->target[i];
  1693. tp->esp_period = 0;
  1694. tp->esp_offset = 0;
  1695. tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
  1696. ESP_CONFIG3_FSCSI |
  1697. ESP_CONFIG3_FAST);
  1698. tp->flags &= ~ESP_TGT_WIDE;
  1699. tp->flags |= ESP_TGT_CHECK_NEGO;
  1700. if (tp->starget)
  1701. __starget_for_each_device(tp->starget, NULL,
  1702. esp_clear_hold);
  1703. }
  1704. esp->flags &= ~ESP_FLAG_RESETTING;
  1705. }
  1706. /* Runs under host->lock */
  1707. static void __esp_interrupt(struct esp *esp)
  1708. {
  1709. int finish_reset, intr_done;
  1710. u8 phase;
  1711. esp->sreg = esp_read8(ESP_STATUS);
  1712. if (esp->flags & ESP_FLAG_RESETTING) {
  1713. finish_reset = 1;
  1714. } else {
  1715. if (esp_check_gross_error(esp))
  1716. return;
  1717. finish_reset = esp_check_spur_intr(esp);
  1718. if (finish_reset < 0)
  1719. return;
  1720. }
  1721. esp->ireg = esp_read8(ESP_INTRPT);
  1722. if (esp->ireg & ESP_INTR_SR)
  1723. finish_reset = 1;
  1724. if (finish_reset) {
  1725. esp_reset_cleanup(esp);
  1726. if (esp->eh_reset) {
  1727. complete(esp->eh_reset);
  1728. esp->eh_reset = NULL;
  1729. }
  1730. return;
  1731. }
  1732. phase = (esp->sreg & ESP_STAT_PMASK);
  1733. if (esp->rev == FASHME) {
  1734. if (((phase != ESP_DIP && phase != ESP_DOP) &&
  1735. esp->select_state == ESP_SELECT_NONE &&
  1736. esp->event != ESP_EVENT_STATUS &&
  1737. esp->event != ESP_EVENT_DATA_DONE) ||
  1738. (esp->ireg & ESP_INTR_RSEL)) {
  1739. esp->sreg2 = esp_read8(ESP_STATUS2);
  1740. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1741. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1742. hme_read_fifo(esp);
  1743. }
  1744. }
  1745. esp_log_intr("ESP: intr sreg[%02x] seqreg[%02x] "
  1746. "sreg2[%02x] ireg[%02x]\n",
  1747. esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
  1748. intr_done = 0;
  1749. if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
  1750. printk("ESP: unexpected IREG %02x\n", esp->ireg);
  1751. if (esp->ireg & ESP_INTR_IC)
  1752. esp_dump_cmd_log(esp);
  1753. esp_schedule_reset(esp);
  1754. } else {
  1755. if (!(esp->ireg & ESP_INTR_RSEL)) {
  1756. /* Some combination of FDONE, BSERV, DC. */
  1757. if (esp->select_state != ESP_SELECT_NONE)
  1758. intr_done = esp_finish_select(esp);
  1759. } else if (esp->ireg & ESP_INTR_RSEL) {
  1760. if (esp->active_cmd)
  1761. (void) esp_finish_select(esp);
  1762. intr_done = esp_reconnect(esp);
  1763. }
  1764. }
  1765. while (!intr_done)
  1766. intr_done = esp_process_event(esp);
  1767. }
  1768. irqreturn_t scsi_esp_intr(int irq, void *dev_id)
  1769. {
  1770. struct esp *esp = dev_id;
  1771. unsigned long flags;
  1772. irqreturn_t ret;
  1773. spin_lock_irqsave(esp->host->host_lock, flags);
  1774. ret = IRQ_NONE;
  1775. if (esp->ops->irq_pending(esp)) {
  1776. ret = IRQ_HANDLED;
  1777. for (;;) {
  1778. int i;
  1779. __esp_interrupt(esp);
  1780. if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
  1781. break;
  1782. esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
  1783. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  1784. if (esp->ops->irq_pending(esp))
  1785. break;
  1786. }
  1787. if (i == ESP_QUICKIRQ_LIMIT)
  1788. break;
  1789. }
  1790. }
  1791. spin_unlock_irqrestore(esp->host->host_lock, flags);
  1792. return ret;
  1793. }
  1794. EXPORT_SYMBOL(scsi_esp_intr);
  1795. static void esp_get_revision(struct esp *esp)
  1796. {
  1797. u8 val;
  1798. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  1799. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  1800. esp_write8(esp->config2, ESP_CFG2);
  1801. val = esp_read8(ESP_CFG2);
  1802. val &= ~ESP_CONFIG2_MAGIC;
  1803. if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  1804. /* If what we write to cfg2 does not come back, cfg2 is not
  1805. * implemented, therefore this must be a plain esp100.
  1806. */
  1807. esp->rev = ESP100;
  1808. } else {
  1809. esp->config2 = 0;
  1810. esp_set_all_config3(esp, 5);
  1811. esp->prev_cfg3 = 5;
  1812. esp_write8(esp->config2, ESP_CFG2);
  1813. esp_write8(0, ESP_CFG3);
  1814. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1815. val = esp_read8(ESP_CFG3);
  1816. if (val != 5) {
  1817. /* The cfg2 register is implemented, however
  1818. * cfg3 is not, must be esp100a.
  1819. */
  1820. esp->rev = ESP100A;
  1821. } else {
  1822. esp_set_all_config3(esp, 0);
  1823. esp->prev_cfg3 = 0;
  1824. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1825. /* All of cfg{1,2,3} implemented, must be one of
  1826. * the fas variants, figure out which one.
  1827. */
  1828. if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
  1829. esp->rev = FAST;
  1830. esp->sync_defp = SYNC_DEFP_FAST;
  1831. } else {
  1832. esp->rev = ESP236;
  1833. }
  1834. esp->config2 = 0;
  1835. esp_write8(esp->config2, ESP_CFG2);
  1836. }
  1837. }
  1838. }
  1839. static void esp_init_swstate(struct esp *esp)
  1840. {
  1841. int i;
  1842. INIT_LIST_HEAD(&esp->queued_cmds);
  1843. INIT_LIST_HEAD(&esp->active_cmds);
  1844. INIT_LIST_HEAD(&esp->esp_cmd_pool);
  1845. /* Start with a clear state, domain validation (via ->slave_configure,
  1846. * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
  1847. * commands.
  1848. */
  1849. for (i = 0 ; i < ESP_MAX_TARGET; i++) {
  1850. esp->target[i].flags = 0;
  1851. esp->target[i].nego_goal_period = 0;
  1852. esp->target[i].nego_goal_offset = 0;
  1853. esp->target[i].nego_goal_width = 0;
  1854. esp->target[i].nego_goal_tags = 0;
  1855. }
  1856. }
  1857. /* This places the ESP into a known state at boot time. */
  1858. static void esp_bootup_reset(struct esp *esp)
  1859. {
  1860. u8 val;
  1861. /* Reset the DMA */
  1862. esp->ops->reset_dma(esp);
  1863. /* Reset the ESP */
  1864. esp_reset_esp(esp);
  1865. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  1866. val = esp_read8(ESP_CFG1);
  1867. val |= ESP_CONFIG1_SRRDISAB;
  1868. esp_write8(val, ESP_CFG1);
  1869. scsi_esp_cmd(esp, ESP_CMD_RS);
  1870. udelay(400);
  1871. esp_write8(esp->config1, ESP_CFG1);
  1872. /* Eat any bitrot in the chip and we are done... */
  1873. esp_read8(ESP_INTRPT);
  1874. }
  1875. static void esp_set_clock_params(struct esp *esp)
  1876. {
  1877. int fhz;
  1878. u8 ccf;
  1879. /* This is getting messy but it has to be done correctly or else
  1880. * you get weird behavior all over the place. We are trying to
  1881. * basically figure out three pieces of information.
  1882. *
  1883. * a) Clock Conversion Factor
  1884. *
  1885. * This is a representation of the input crystal clock frequency
  1886. * going into the ESP on this machine. Any operation whose timing
  1887. * is longer than 400ns depends on this value being correct. For
  1888. * example, you'll get blips for arbitration/selection during high
  1889. * load or with multiple targets if this is not set correctly.
  1890. *
  1891. * b) Selection Time-Out
  1892. *
  1893. * The ESP isn't very bright and will arbitrate for the bus and try
  1894. * to select a target forever if you let it. This value tells the
  1895. * ESP when it has taken too long to negotiate and that it should
  1896. * interrupt the CPU so we can see what happened. The value is
  1897. * computed as follows (from NCR/Symbios chip docs).
  1898. *
  1899. * (Time Out Period) * (Input Clock)
  1900. * STO = ----------------------------------
  1901. * (8192) * (Clock Conversion Factor)
  1902. *
  1903. * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
  1904. *
  1905. * c) Imperical constants for synchronous offset and transfer period
  1906. * register values
  1907. *
  1908. * This entails the smallest and largest sync period we could ever
  1909. * handle on this ESP.
  1910. */
  1911. fhz = esp->cfreq;
  1912. ccf = ((fhz / 1000000) + 4) / 5;
  1913. if (ccf == 1)
  1914. ccf = 2;
  1915. /* If we can't find anything reasonable, just assume 20MHZ.
  1916. * This is the clock frequency of the older sun4c's where I've
  1917. * been unable to find the clock-frequency PROM property. All
  1918. * other machines provide useful values it seems.
  1919. */
  1920. if (fhz <= 5000000 || ccf < 1 || ccf > 8) {
  1921. fhz = 20000000;
  1922. ccf = 4;
  1923. }
  1924. esp->cfact = (ccf == 8 ? 0 : ccf);
  1925. esp->cfreq = fhz;
  1926. esp->ccycle = ESP_HZ_TO_CYCLE(fhz);
  1927. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  1928. esp->neg_defp = ESP_NEG_DEFP(fhz, ccf);
  1929. esp->sync_defp = SYNC_DEFP_SLOW;
  1930. }
  1931. static const char *esp_chip_names[] = {
  1932. "ESP100",
  1933. "ESP100A",
  1934. "ESP236",
  1935. "FAS236",
  1936. "FAS100A",
  1937. "FAST",
  1938. "FASHME",
  1939. };
  1940. static struct scsi_transport_template *esp_transport_template;
  1941. int scsi_esp_register(struct esp *esp, struct device *dev)
  1942. {
  1943. static int instance;
  1944. int err;
  1945. esp->host->transportt = esp_transport_template;
  1946. esp->host->max_lun = ESP_MAX_LUN;
  1947. esp->host->cmd_per_lun = 2;
  1948. esp->host->unique_id = instance;
  1949. esp_set_clock_params(esp);
  1950. esp_get_revision(esp);
  1951. esp_init_swstate(esp);
  1952. esp_bootup_reset(esp);
  1953. printk(KERN_INFO PFX "esp%u, regs[%1p:%1p] irq[%u]\n",
  1954. esp->host->unique_id, esp->regs, esp->dma_regs,
  1955. esp->host->irq);
  1956. printk(KERN_INFO PFX "esp%u is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
  1957. esp->host->unique_id, esp_chip_names[esp->rev],
  1958. esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
  1959. /* Let the SCSI bus reset settle. */
  1960. ssleep(esp_bus_reset_settle);
  1961. err = scsi_add_host(esp->host, dev);
  1962. if (err)
  1963. return err;
  1964. instance++;
  1965. scsi_scan_host(esp->host);
  1966. return 0;
  1967. }
  1968. EXPORT_SYMBOL(scsi_esp_register);
  1969. void scsi_esp_unregister(struct esp *esp)
  1970. {
  1971. scsi_remove_host(esp->host);
  1972. }
  1973. EXPORT_SYMBOL(scsi_esp_unregister);
  1974. static int esp_target_alloc(struct scsi_target *starget)
  1975. {
  1976. struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
  1977. struct esp_target_data *tp = &esp->target[starget->id];
  1978. tp->starget = starget;
  1979. return 0;
  1980. }
  1981. static void esp_target_destroy(struct scsi_target *starget)
  1982. {
  1983. struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
  1984. struct esp_target_data *tp = &esp->target[starget->id];
  1985. tp->starget = NULL;
  1986. }
  1987. static int esp_slave_alloc(struct scsi_device *dev)
  1988. {
  1989. struct esp *esp = shost_priv(dev->host);
  1990. struct esp_target_data *tp = &esp->target[dev->id];
  1991. struct esp_lun_data *lp;
  1992. lp = kzalloc(sizeof(*lp), GFP_KERNEL);
  1993. if (!lp)
  1994. return -ENOMEM;
  1995. dev->hostdata = lp;
  1996. spi_min_period(tp->starget) = esp->min_period;
  1997. spi_max_offset(tp->starget) = 15;
  1998. if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
  1999. spi_max_width(tp->starget) = 1;
  2000. else
  2001. spi_max_width(tp->starget) = 0;
  2002. return 0;
  2003. }
  2004. static int esp_slave_configure(struct scsi_device *dev)
  2005. {
  2006. struct esp *esp = shost_priv(dev->host);
  2007. struct esp_target_data *tp = &esp->target[dev->id];
  2008. int goal_tags, queue_depth;
  2009. goal_tags = 0;
  2010. if (dev->tagged_supported) {
  2011. /* XXX make this configurable somehow XXX */
  2012. goal_tags = ESP_DEFAULT_TAGS;
  2013. if (goal_tags > ESP_MAX_TAG)
  2014. goal_tags = ESP_MAX_TAG;
  2015. }
  2016. queue_depth = goal_tags;
  2017. if (queue_depth < dev->host->cmd_per_lun)
  2018. queue_depth = dev->host->cmd_per_lun;
  2019. if (goal_tags) {
  2020. scsi_set_tag_type(dev, MSG_ORDERED_TAG);
  2021. scsi_activate_tcq(dev, queue_depth);
  2022. } else {
  2023. scsi_deactivate_tcq(dev, queue_depth);
  2024. }
  2025. tp->flags |= ESP_TGT_DISCONNECT;
  2026. if (!spi_initial_dv(dev->sdev_target))
  2027. spi_dv_device(dev);
  2028. return 0;
  2029. }
  2030. static void esp_slave_destroy(struct scsi_device *dev)
  2031. {
  2032. struct esp_lun_data *lp = dev->hostdata;
  2033. kfree(lp);
  2034. dev->hostdata = NULL;
  2035. }
  2036. static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
  2037. {
  2038. struct esp *esp = shost_priv(cmd->device->host);
  2039. struct esp_cmd_entry *ent, *tmp;
  2040. struct completion eh_done;
  2041. unsigned long flags;
  2042. /* XXX This helps a lot with debugging but might be a bit
  2043. * XXX much for the final driver.
  2044. */
  2045. spin_lock_irqsave(esp->host->host_lock, flags);
  2046. printk(KERN_ERR PFX "esp%d: Aborting command [%p:%02x]\n",
  2047. esp->host->unique_id, cmd, cmd->cmnd[0]);
  2048. ent = esp->active_cmd;
  2049. if (ent)
  2050. printk(KERN_ERR PFX "esp%d: Current command [%p:%02x]\n",
  2051. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2052. list_for_each_entry(ent, &esp->queued_cmds, list) {
  2053. printk(KERN_ERR PFX "esp%d: Queued command [%p:%02x]\n",
  2054. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2055. }
  2056. list_for_each_entry(ent, &esp->active_cmds, list) {
  2057. printk(KERN_ERR PFX "esp%d: Active command [%p:%02x]\n",
  2058. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2059. }
  2060. esp_dump_cmd_log(esp);
  2061. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2062. spin_lock_irqsave(esp->host->host_lock, flags);
  2063. ent = NULL;
  2064. list_for_each_entry(tmp, &esp->queued_cmds, list) {
  2065. if (tmp->cmd == cmd) {
  2066. ent = tmp;
  2067. break;
  2068. }
  2069. }
  2070. if (ent) {
  2071. /* Easiest case, we didn't even issue the command
  2072. * yet so it is trivial to abort.
  2073. */
  2074. list_del(&ent->list);
  2075. cmd->result = DID_ABORT << 16;
  2076. cmd->scsi_done(cmd);
  2077. esp_put_ent(esp, ent);
  2078. goto out_success;
  2079. }
  2080. init_completion(&eh_done);
  2081. ent = esp->active_cmd;
  2082. if (ent && ent->cmd == cmd) {
  2083. /* Command is the currently active command on
  2084. * the bus. If we already have an output message
  2085. * pending, no dice.
  2086. */
  2087. if (esp->msg_out_len)
  2088. goto out_failure;
  2089. /* Send out an abort, encouraging the target to
  2090. * go to MSGOUT phase by asserting ATN.
  2091. */
  2092. esp->msg_out[0] = ABORT_TASK_SET;
  2093. esp->msg_out_len = 1;
  2094. ent->eh_done = &eh_done;
  2095. scsi_esp_cmd(esp, ESP_CMD_SATN);
  2096. } else {
  2097. /* The command is disconnected. This is not easy to
  2098. * abort. For now we fail and let the scsi error
  2099. * handling layer go try a scsi bus reset or host
  2100. * reset.
  2101. *
  2102. * What we could do is put together a scsi command
  2103. * solely for the purpose of sending an abort message
  2104. * to the target. Coming up with all the code to
  2105. * cook up scsi commands, special case them everywhere,
  2106. * etc. is for questionable gain and it would be better
  2107. * if the generic scsi error handling layer could do at
  2108. * least some of that for us.
  2109. *
  2110. * Anyways this is an area for potential future improvement
  2111. * in this driver.
  2112. */
  2113. goto out_failure;
  2114. }
  2115. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2116. if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
  2117. spin_lock_irqsave(esp->host->host_lock, flags);
  2118. ent->eh_done = NULL;
  2119. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2120. return FAILED;
  2121. }
  2122. return SUCCESS;
  2123. out_success:
  2124. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2125. return SUCCESS;
  2126. out_failure:
  2127. /* XXX This might be a good location to set ESP_TGT_BROKEN
  2128. * XXX since we know which target/lun in particular is
  2129. * XXX causing trouble.
  2130. */
  2131. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2132. return FAILED;
  2133. }
  2134. static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
  2135. {
  2136. struct esp *esp = shost_priv(cmd->device->host);
  2137. struct completion eh_reset;
  2138. unsigned long flags;
  2139. init_completion(&eh_reset);
  2140. spin_lock_irqsave(esp->host->host_lock, flags);
  2141. esp->eh_reset = &eh_reset;
  2142. /* XXX This is too simple... We should add lots of
  2143. * XXX checks here so that if we find that the chip is
  2144. * XXX very wedged we return failure immediately so
  2145. * XXX that we can perform a full chip reset.
  2146. */
  2147. esp->flags |= ESP_FLAG_RESETTING;
  2148. scsi_esp_cmd(esp, ESP_CMD_RS);
  2149. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2150. ssleep(esp_bus_reset_settle);
  2151. if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
  2152. spin_lock_irqsave(esp->host->host_lock, flags);
  2153. esp->eh_reset = NULL;
  2154. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2155. return FAILED;
  2156. }
  2157. return SUCCESS;
  2158. }
  2159. /* All bets are off, reset the entire device. */
  2160. static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
  2161. {
  2162. struct esp *esp = shost_priv(cmd->device->host);
  2163. unsigned long flags;
  2164. spin_lock_irqsave(esp->host->host_lock, flags);
  2165. esp_bootup_reset(esp);
  2166. esp_reset_cleanup(esp);
  2167. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2168. ssleep(esp_bus_reset_settle);
  2169. return SUCCESS;
  2170. }
  2171. static const char *esp_info(struct Scsi_Host *host)
  2172. {
  2173. return "esp";
  2174. }
  2175. struct scsi_host_template scsi_esp_template = {
  2176. .module = THIS_MODULE,
  2177. .name = "esp",
  2178. .info = esp_info,
  2179. .queuecommand = esp_queuecommand,
  2180. .target_alloc = esp_target_alloc,
  2181. .target_destroy = esp_target_destroy,
  2182. .slave_alloc = esp_slave_alloc,
  2183. .slave_configure = esp_slave_configure,
  2184. .slave_destroy = esp_slave_destroy,
  2185. .eh_abort_handler = esp_eh_abort_handler,
  2186. .eh_bus_reset_handler = esp_eh_bus_reset_handler,
  2187. .eh_host_reset_handler = esp_eh_host_reset_handler,
  2188. .can_queue = 7,
  2189. .this_id = 7,
  2190. .sg_tablesize = SG_ALL,
  2191. .use_clustering = ENABLE_CLUSTERING,
  2192. .max_sectors = 0xffff,
  2193. .skip_settle_delay = 1,
  2194. };
  2195. EXPORT_SYMBOL(scsi_esp_template);
  2196. static void esp_get_signalling(struct Scsi_Host *host)
  2197. {
  2198. struct esp *esp = shost_priv(host);
  2199. enum spi_signal_type type;
  2200. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  2201. type = SPI_SIGNAL_HVD;
  2202. else
  2203. type = SPI_SIGNAL_SE;
  2204. spi_signalling(host) = type;
  2205. }
  2206. static void esp_set_offset(struct scsi_target *target, int offset)
  2207. {
  2208. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2209. struct esp *esp = shost_priv(host);
  2210. struct esp_target_data *tp = &esp->target[target->id];
  2211. if (esp->flags & ESP_FLAG_DISABLE_SYNC)
  2212. tp->nego_goal_offset = 0;
  2213. else
  2214. tp->nego_goal_offset = offset;
  2215. tp->flags |= ESP_TGT_CHECK_NEGO;
  2216. }
  2217. static void esp_set_period(struct scsi_target *target, int period)
  2218. {
  2219. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2220. struct esp *esp = shost_priv(host);
  2221. struct esp_target_data *tp = &esp->target[target->id];
  2222. tp->nego_goal_period = period;
  2223. tp->flags |= ESP_TGT_CHECK_NEGO;
  2224. }
  2225. static void esp_set_width(struct scsi_target *target, int width)
  2226. {
  2227. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2228. struct esp *esp = shost_priv(host);
  2229. struct esp_target_data *tp = &esp->target[target->id];
  2230. tp->nego_goal_width = (width ? 1 : 0);
  2231. tp->flags |= ESP_TGT_CHECK_NEGO;
  2232. }
  2233. static struct spi_function_template esp_transport_ops = {
  2234. .set_offset = esp_set_offset,
  2235. .show_offset = 1,
  2236. .set_period = esp_set_period,
  2237. .show_period = 1,
  2238. .set_width = esp_set_width,
  2239. .show_width = 1,
  2240. .get_signalling = esp_get_signalling,
  2241. };
  2242. static int __init esp_init(void)
  2243. {
  2244. BUILD_BUG_ON(sizeof(struct scsi_pointer) <
  2245. sizeof(struct esp_cmd_priv));
  2246. esp_transport_template = spi_attach_transport(&esp_transport_ops);
  2247. if (!esp_transport_template)
  2248. return -ENODEV;
  2249. return 0;
  2250. }
  2251. static void __exit esp_exit(void)
  2252. {
  2253. spi_release_transport(esp_transport_template);
  2254. }
  2255. MODULE_DESCRIPTION("ESP SCSI driver core");
  2256. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  2257. MODULE_LICENSE("GPL");
  2258. MODULE_VERSION(DRV_VERSION);
  2259. module_param(esp_bus_reset_settle, int, 0);
  2260. MODULE_PARM_DESC(esp_bus_reset_settle,
  2261. "ESP scsi bus reset delay in seconds");
  2262. module_param(esp_debug, int, 0);
  2263. MODULE_PARM_DESC(esp_debug,
  2264. "ESP bitmapped debugging message enable value:\n"
  2265. " 0x00000001 Log interrupt events\n"
  2266. " 0x00000002 Log scsi commands\n"
  2267. " 0x00000004 Log resets\n"
  2268. " 0x00000008 Log message in events\n"
  2269. " 0x00000010 Log message out events\n"
  2270. " 0x00000020 Log command completion\n"
  2271. " 0x00000040 Log disconnects\n"
  2272. " 0x00000080 Log data start\n"
  2273. " 0x00000100 Log data done\n"
  2274. " 0x00000200 Log reconnects\n"
  2275. " 0x00000400 Log auto-sense data\n"
  2276. );
  2277. module_init(esp_init);
  2278. module_exit(esp_exit);